drivers/kvm/mmu.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * MMU support
   8  *
   9  * Copyright (C) 2006 Qumranet, Inc.
  10  *
  11  * Authors:
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *
  15  * This work is licensed under the terms of the GNU GPL, version 2.  See
  16  * the COPYING file in the top-level directory.
  17  *
  18  */
  19 #include <linux/types.h>
  20 #include <linux/string.h>
  21 #include <asm/page.h>
  22 #include <linux/mm.h>
  23 #include <linux/highmem.h>
  24 #include <linux/module.h>
  25
  26 #include "vmx.h"
  27 #include "kvm.h"
  28
  29 #define pgprintk(x...) do { printk(x); } while (0)
  30 #define rmap_printk(x...) do { printk(x); } while (0)
  31
  32 #define ASSERT(x)                                                       \
  33         if (!(x)) {                                                     \
  34                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
  35                        __FILE__, __LINE__, #x);                         \
  36         }
  37
  38 #define PT64_PT_BITS 9
  39 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
  40 #define PT32_PT_BITS 10
  41 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
  42
  43 #define PT_WRITABLE_SHIFT 1
  44
  45 #define PT_PRESENT_MASK (1ULL << 0)
  46 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
  47 #define PT_USER_MASK (1ULL << 2)
  48 #define PT_PWT_MASK (1ULL << 3)
  49 #define PT_PCD_MASK (1ULL << 4)
  50 #define PT_ACCESSED_MASK (1ULL << 5)
  51 #define PT_DIRTY_MASK (1ULL << 6)
  52 #define PT_PAGE_SIZE_MASK (1ULL << 7)
  53 #define PT_PAT_MASK (1ULL << 7)
  54 #define PT_GLOBAL_MASK (1ULL << 8)
  55 #define PT64_NX_MASK (1ULL << 63)
  56
  57 #define PT_PAT_SHIFT 7
  58 #define PT_DIR_PAT_SHIFT 12
  59 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
  60
  61 #define PT32_DIR_PSE36_SIZE 4
  62 #define PT32_DIR_PSE36_SHIFT 13
  63 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
  64
  65
  66 #define PT32_PTE_COPY_MASK \
  67         (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
  68
  69 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
  70
  71 #define PT_FIRST_AVAIL_BITS_SHIFT 9
  72 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  73
  74 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  75 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  76
  77 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
  78 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
  79
  80 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
  81 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
  82
  83 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
  84
  85 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  86
  87 #define PT64_LEVEL_BITS 9
  88
  89 #define PT64_LEVEL_SHIFT(level) \
  90                 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
  91
  92 #define PT64_LEVEL_MASK(level) \
  93                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  94
  95 #define PT64_INDEX(address, level)\
  96         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  97
  98
  99 #define PT32_LEVEL_BITS 10
 100
 101 #define PT32_LEVEL_SHIFT(level) \
 102                 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
 103
 104 #define PT32_LEVEL_MASK(level) \
 105                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
 106
 107 #define PT32_INDEX(address, level)\
 108         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
 109
 110
 111 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & PAGE_MASK)
 112 #define PT64_DIR_BASE_ADDR_MASK \
 113         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
 114
 115 #define PT32_BASE_ADDR_MASK PAGE_MASK
 116 #define PT32_DIR_BASE_ADDR_MASK \
 117         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
 118
 119
 120 #define PFERR_PRESENT_MASK (1U << 0)
 121 #define PFERR_WRITE_MASK (1U << 1)
 122 #define PFERR_USER_MASK (1U << 2)
 123
 124 #define PT64_ROOT_LEVEL 4
 125 #define PT32_ROOT_LEVEL 2
 126 #define PT32E_ROOT_LEVEL 3
 127
 128 #define PT_DIRECTORY_LEVEL 2
 129 #define PT_PAGE_TABLE_LEVEL 1
 130
 131 #define RMAP_EXT 4
 132
 133 struct kvm_rmap_desc {
 134         u64 *shadow_ptes[RMAP_EXT];
 135         struct kvm_rmap_desc *more;
 136 };
 137
 138 static int is_write_protection(struct kvm_vcpu *vcpu)
 139 {
 140         return vcpu->cr0 & CR0_WP_MASK;
 141 }
 142
 143 static int is_cpuid_PSE36(void)
 144 {
 145         return 1;
 146 }
 147
 148 static int is_present_pte(unsigned long pte)
 149 {
 150         return pte & PT_PRESENT_MASK;
 151 }
 152
 153 static int is_writeble_pte(unsigned long pte)
 154 {
 155         return pte & PT_WRITABLE_MASK;
 156 }
 157
 158 static int is_io_pte(unsigned long pte)
 159 {
 160         return pte & PT_SHADOW_IO_MARK;
 161 }
 162
 163 static int is_rmap_pte(u64 pte)
 164 {
 165         return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
 166                 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
 167 }
 168
 169 /*
 170  * Reverse mapping data structures:
 171  *
 172  * If page->private bit zero is zero, then page->private points to the
 173  * shadow page table entry that points to page_address(page).
 174  *
 175  * If page->private bit zero is one, (then page->private & ~1) points
 176  * to a struct kvm_rmap_desc containing more mappings.
 177  */
 178 static void rmap_add(struct kvm *kvm, u64 *spte)
 179 {
 180         struct page *page;
 181         struct kvm_rmap_desc *desc;
 182         int i;
 183
 184         if (!is_rmap_pte(*spte))
 185                 return;
 186         page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
 187         if (!page->private) {
 188                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
 189                 page->private = (unsigned long)spte;
 190         } else if (!(page->private & 1)) {
 191                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
 192                 desc = kzalloc(sizeof *desc, GFP_NOWAIT);
 193                 if (!desc)
 194                         BUG(); /* FIXME: return error */
 195                 desc->shadow_ptes[0] = (u64 *)page->private;
 196                 desc->shadow_ptes[1] = spte;
 197                 page->private = (unsigned long)desc | 1;
 198         } else {
 199                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
 200                 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
 201                 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
 202                         desc = desc->more;
 203                 if (desc->shadow_ptes[RMAP_EXT-1]) {
 204                         desc->more = kzalloc(sizeof *desc->more, GFP_NOWAIT);
 205                         if (!desc->more)
 206                                 BUG(); /* FIXME: return error */
 207                         desc = desc->more;
 208                 }
 209                 for (i = 0; desc->shadow_ptes[i]; ++i)
 210                         ;
 211                 desc->shadow_ptes[i] = spte;
 212         }
 213 }
 214
 215 static void rmap_desc_remove_entry(struct page *page,
 216                                    struct kvm_rmap_desc *desc,
 217                                    int i,
 218                                    struct kvm_rmap_desc *prev_desc)
 219 {
 220         int j;
 221
 222         for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
 223                 ;
 224         desc->shadow_ptes[i] = desc->shadow_ptes[j];
 225         desc->shadow_ptes[j] = 0;
 226         if (j != 0)
 227                 return;
 228         if (!prev_desc && !desc->more)
 229                 page->private = (unsigned long)desc->shadow_ptes[0];
 230         else
 231                 if (prev_desc)
 232                         prev_desc->more = desc->more;
 233                 else
 234                         page->private = (unsigned long)desc->more | 1;
 235         kfree(desc);
 236 }
 237
 238 static void rmap_remove(struct kvm *kvm, u64 *spte)
 239 {
 240         struct page *page;
 241         struct kvm_rmap_desc *desc;
 242         struct kvm_rmap_desc *prev_desc;
 243         int i;
 244
 245         if (!is_rmap_pte(*spte))
 246                 return;
 247         page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
 248         if (!page->private) {
 249                 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
 250                 BUG();
 251         } else if (!(page->private & 1)) {
 252                 rmap_printk("rmap_remove:  %p %llx 1->0\n", spte, *spte);
 253                 if ((u64 *)page->private != spte) {
 254                         printk(KERN_ERR "rmap_remove:  %p %llx 1->BUG\n",
 255                                spte, *spte);
 256                         BUG();
 257                 }
 258                 page->private = 0;
 259         } else {
 260                 rmap_printk("rmap_remove:  %p %llx many->many\n", spte, *spte);
 261                 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
 262                 prev_desc = NULL;
 263                 while (desc) {
 264                         for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
 265                                 if (desc->shadow_ptes[i] == spte) {
 266                                         rmap_desc_remove_entry(page, desc, i,
 267                                                                prev_desc);
 268                                         return;
 269                                 }
 270                         prev_desc = desc;
 271                         desc = desc->more;
 272                 }
 273                 BUG();
 274         }
 275 }
 276
 277 static void rmap_write_protect(struct kvm *kvm, u64 gfn)
 278 {
 279         struct page *page;
 280         struct kvm_memory_slot *slot;
 281         struct kvm_rmap_desc *desc;
 282         u64 *spte;
 283
 284         slot = gfn_to_memslot(kvm, gfn);
 285         BUG_ON(!slot);
 286         page = gfn_to_page(slot, gfn);
 287
 288         while (page->private) {
 289                 if (!(page->private & 1))
 290                         spte = (u64 *)page->private;
 291                 else {
 292                         desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
 293                         spte = desc->shadow_ptes[0];
 294                 }
 295                 BUG_ON(!spte);
 296                 BUG_ON((*spte & PT64_BASE_ADDR_MASK) !=
 297                        page_to_pfn(page) << PAGE_SHIFT);
 298                 BUG_ON(!(*spte & PT_PRESENT_MASK));
 299                 BUG_ON(!(*spte & PT_WRITABLE_MASK));
 300                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
 301                 rmap_remove(kvm, spte);
 302                 *spte &= ~(u64)PT_WRITABLE_MASK;
 303         }
 304 }
 305
 306 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
 307 {
 308         struct kvm_mmu_page *page_head = page_header(page_hpa);
 309
 310         list_del(&page_head->link);
 311         page_head->page_hpa = page_hpa;
 312         list_add(&page_head->link, &vcpu->free_pages);
 313 }
 314
 315 static int is_empty_shadow_page(hpa_t page_hpa)
 316 {
 317         u32 *pos;
 318         u32 *end;
 319         for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u32);
 320                       pos != end; pos++)
 321                 if (*pos != 0)
 322                         return 0;
 323         return 1;
 324 }
 325
 326 static unsigned kvm_page_table_hashfn(gfn_t gfn)
 327 {
 328         return gfn;
 329 }
 330
 331 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
 332                                                u64 *parent_pte)
 333 {
 334         struct kvm_mmu_page *page;
 335
 336         if (list_empty(&vcpu->free_pages))
 337                 return NULL;
 338
 339         page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
 340         list_del(&page->link);
 341         list_add(&page->link, &vcpu->kvm->active_mmu_pages);
 342         ASSERT(is_empty_shadow_page(page->page_hpa));
 343         page->slot_bitmap = 0;
 344         page->global = 1;
 345         page->multimapped = 0;
 346         page->parent_pte = parent_pte;
 347         return page;
 348 }
 349
 350 static void mmu_page_add_parent_pte(struct kvm_mmu_page *page, u64 *parent_pte)
 351 {
 352         struct kvm_pte_chain *pte_chain;
 353         struct hlist_node *node;
 354         int i;
 355
 356         if (!parent_pte)
 357                 return;
 358         if (!page->multimapped) {
 359                 u64 *old = page->parent_pte;
 360
 361                 if (!old) {
 362                         page->parent_pte = parent_pte;
 363                         return;
 364                 }
 365                 page->multimapped = 1;
 366                 pte_chain = kzalloc(sizeof(struct kvm_pte_chain), GFP_NOWAIT);
 367                 BUG_ON(!pte_chain);
 368                 INIT_HLIST_HEAD(&page->parent_ptes);
 369                 hlist_add_head(&pte_chain->link, &page->parent_ptes);
 370                 pte_chain->parent_ptes[0] = old;
 371         }
 372         hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
 373                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
 374                         continue;
 375                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
 376                         if (!pte_chain->parent_ptes[i]) {
 377                                 pte_chain->parent_ptes[i] = parent_pte;
 378                                 return;
 379                         }
 380         }
 381         pte_chain = kzalloc(sizeof(struct kvm_pte_chain), GFP_NOWAIT);
 382         BUG_ON(!pte_chain);
 383         hlist_add_head(&pte_chain->link, &page->parent_ptes);
 384         pte_chain->parent_ptes[0] = parent_pte;
 385 }
 386
 387 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
 388                                        u64 *parent_pte)
 389 {
 390         struct kvm_pte_chain *pte_chain;
 391         struct hlist_node *node;
 392         int i;
 393
 394         if (!page->multimapped) {
 395                 BUG_ON(page->parent_pte != parent_pte);
 396                 page->parent_pte = NULL;
 397                 return;
 398         }
 399         hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
 400                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
 401                         if (!pte_chain->parent_ptes[i])
 402                                 break;
 403                         if (pte_chain->parent_ptes[i] != parent_pte)
 404                                 continue;
 405                         while (i + 1 < NR_PTE_CHAIN_ENTRIES) {
 406                                 pte_chain->parent_ptes[i]
 407                                         = pte_chain->parent_ptes[i + 1];
 408                                 ++i;
 409                         }
 410                         pte_chain->parent_ptes[i] = NULL;
 411                         return;
 412                 }
 413         BUG();
 414 }
 415
 416 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
 417                                                 gfn_t gfn)
 418 {
 419         unsigned index;
 420         struct hlist_head *bucket;
 421         struct kvm_mmu_page *page;
 422         struct hlist_node *node;
 423
 424         pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
 425         index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
 426         bucket = &vcpu->kvm->mmu_page_hash[index];
 427         hlist_for_each_entry(page, node, bucket, hash_link)
 428                 if (page->gfn == gfn && !page->role.metaphysical) {
 429                         pgprintk("%s: found role %x\n",
 430                                  __FUNCTION__, page->role.word);
 431                         return page;
 432                 }
 433         return NULL;
 434 }
 435
 436 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
 437                                              gfn_t gfn,
 438                                              gva_t gaddr,
 439                                              unsigned level,
 440                                              int metaphysical,
 441                                              u64 *parent_pte)
 442 {
 443         union kvm_mmu_page_role role;
 444         unsigned index;
 445         unsigned quadrant;
 446         struct hlist_head *bucket;
 447         struct kvm_mmu_page *page;
 448         struct hlist_node *node;
 449
 450         role.word = 0;
 451         role.glevels = vcpu->mmu.root_level;
 452         role.level = level;
 453         role.metaphysical = metaphysical;
 454         if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
 455                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
 456                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
 457                 role.quadrant = quadrant;
 458         }
 459         pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
 460                  gfn, role.word);
 461         index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
 462         bucket = &vcpu->kvm->mmu_page_hash[index];
 463         hlist_for_each_entry(page, node, bucket, hash_link)
 464                 if (page->gfn == gfn && page->role.word == role.word) {
 465                         mmu_page_add_parent_pte(page, parent_pte);
 466                         pgprintk("%s: found\n", __FUNCTION__);
 467                         return page;
 468                 }
 469         page = kvm_mmu_alloc_page(vcpu, parent_pte);
 470         if (!page)
 471                 return page;
 472         pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
 473         page->gfn = gfn;
 474         page->role = role;
 475         hlist_add_head(&page->hash_link, bucket);
 476         if (!metaphysical)
 477                 rmap_write_protect(vcpu->kvm, gfn);
 478         return page;
 479 }
 480
 481 static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
 482                                          struct kvm_mmu_page *page)
 483 {
 484         BUG();
 485 }
 486
 487 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
 488                              struct kvm_mmu_page *page,
 489                              u64 *parent_pte)
 490 {
 491         mmu_page_remove_parent_pte(page, parent_pte);
 492         if (page->role.level > PT_PAGE_TABLE_LEVEL)
 493                 kvm_mmu_page_unlink_children(vcpu, page);
 494         hlist_del(&page->hash_link);
 495         list_del(&page->link);
 496         list_add(&page->link, &vcpu->free_pages);
 497 }
 498
 499 static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
 500                              struct kvm_mmu_page *page)
 501 {
 502         u64 *parent_pte;
 503
 504         while (page->multimapped || page->parent_pte) {
 505                 if (!page->multimapped)
 506                         parent_pte = page->parent_pte;
 507                 else {
 508                         struct kvm_pte_chain *chain;
 509
 510                         chain = container_of(page->parent_ptes.first,
 511                                              struct kvm_pte_chain, link);
 512                         parent_pte = chain->parent_ptes[0];
 513                 }
 514                 kvm_mmu_put_page(vcpu, page, parent_pte);
 515                 *parent_pte = 0;
 516         }
 517 }
 518
 519 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
 520 {
 521         unsigned index;
 522         struct hlist_head *bucket;
 523         struct kvm_mmu_page *page;
 524         struct hlist_node *node, *n;
 525         int r;
 526
 527         pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
 528         r = 0;
 529         index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
 530         bucket = &vcpu->kvm->mmu_page_hash[index];
 531         hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
 532                 if (page->gfn == gfn && !page->role.metaphysical) {
 533                         kvm_mmu_zap_page(vcpu, page);
 534                         r = 1;
 535                 }
 536         return r;
 537 }
 538
 539 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
 540 {
 541         int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
 542         struct kvm_mmu_page *page_head = page_header(__pa(pte));
 543
 544         __set_bit(slot, &page_head->slot_bitmap);
 545 }
 546
 547 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
 548 {
 549         hpa_t hpa = gpa_to_hpa(vcpu, gpa);
 550
 551         return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
 552 }
 553
 554 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
 555 {
 556         struct kvm_memory_slot *slot;
 557         struct page *page;
 558
 559         ASSERT((gpa & HPA_ERR_MASK) == 0);
 560         slot = gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT);
 561         if (!slot)
 562                 return gpa | HPA_ERR_MASK;
 563         page = gfn_to_page(slot, gpa >> PAGE_SHIFT);
 564         return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
 565                 | (gpa & (PAGE_SIZE-1));
 566 }
 567
 568 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
 569 {
 570         gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
 571
 572         if (gpa == UNMAPPED_GVA)
 573                 return UNMAPPED_GVA;
 574         return gpa_to_hpa(vcpu, gpa);
 575 }
 576
 577
 578 static void release_pt_page_64(struct kvm_vcpu *vcpu, hpa_t page_hpa,
 579                                int level)
 580 {
 581         u64 *pos;
 582         u64 *end;
 583
 584         ASSERT(vcpu);
 585         ASSERT(VALID_PAGE(page_hpa));
 586         ASSERT(level <= PT64_ROOT_LEVEL && level > 0);
 587
 588         for (pos = __va(page_hpa), end = pos + PT64_ENT_PER_PAGE;
 589              pos != end; pos++) {
 590                 u64 current_ent = *pos;
 591
 592                 if (is_present_pte(current_ent)) {
 593                         if (level != 1)
 594                                 release_pt_page_64(vcpu,
 595                                                   current_ent &
 596                                                   PT64_BASE_ADDR_MASK,
 597                                                   level - 1);
 598                         else
 599                                 rmap_remove(vcpu->kvm, pos);
 600                 }
 601                 *pos = 0;
 602         }
 603         kvm_mmu_free_page(vcpu, page_hpa);
 604 }
 605
 606 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
 607 {
 608 }
 609
 610 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
 611 {
 612         int level = PT32E_ROOT_LEVEL;
 613         hpa_t table_addr = vcpu->mmu.root_hpa;
 614
 615         for (; ; level--) {
 616                 u32 index = PT64_INDEX(v, level);
 617                 u64 *table;
 618                 u64 pte;
 619
 620                 ASSERT(VALID_PAGE(table_addr));
 621                 table = __va(table_addr);
 622
 623                 if (level == 1) {
 624                         pte = table[index];
 625                         if (is_present_pte(pte) && is_writeble_pte(pte))
 626                                 return 0;
 627                         mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
 628                         page_header_update_slot(vcpu->kvm, table, v);
 629                         table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
 630                                                                 PT_USER_MASK;
 631                         rmap_add(vcpu->kvm, &table[index]);
 632                         return 0;
 633                 }
 634
 635                 if (table[index] == 0) {
 636                         struct kvm_mmu_page *new_table;
 637                         gfn_t pseudo_gfn;
 638
 639                         pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
 640                                 >> PAGE_SHIFT;
 641                         new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
 642                                                      v, level - 1,
 643                                                      1, &table[index]);
 644                         if (!new_table) {
 645                                 pgprintk("nonpaging_map: ENOMEM\n");
 646                                 return -ENOMEM;
 647                         }
 648
 649                         table[index] = new_table->page_hpa | PT_PRESENT_MASK
 650                                 | PT_WRITABLE_MASK | PT_USER_MASK;
 651                 }
 652                 table_addr = table[index] & PT64_BASE_ADDR_MASK;
 653         }
 654 }
 655
 656 static void mmu_free_roots(struct kvm_vcpu *vcpu)
 657 {
 658         int i;
 659
 660 #ifdef CONFIG_X86_64
 661         if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
 662                 hpa_t root = vcpu->mmu.root_hpa;
 663
 664                 ASSERT(VALID_PAGE(root));
 665                 vcpu->mmu.root_hpa = INVALID_PAGE;
 666                 return;
 667         }
 668 #endif
 669         for (i = 0; i < 4; ++i) {
 670                 hpa_t root = vcpu->mmu.pae_root[i];
 671
 672                 ASSERT(VALID_PAGE(root));
 673                 root &= PT64_BASE_ADDR_MASK;
 674                 vcpu->mmu.pae_root[i] = INVALID_PAGE;
 675         }
 676         vcpu->mmu.root_hpa = INVALID_PAGE;
 677 }
 678
 679 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
 680 {
 681         int i;
 682         gfn_t root_gfn;
 683         root_gfn = vcpu->cr3 >> PAGE_SHIFT;
 684
 685 #ifdef CONFIG_X86_64
 686         if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
 687                 hpa_t root = vcpu->mmu.root_hpa;
 688
 689                 ASSERT(!VALID_PAGE(root));
 690                 root = kvm_mmu_get_page(vcpu, root_gfn, 0,
 691                                         PT64_ROOT_LEVEL, 0, NULL)->page_hpa;
 692                 vcpu->mmu.root_hpa = root;
 693                 return;
 694         }
 695 #endif
 696         for (i = 0; i < 4; ++i) {
 697                 hpa_t root = vcpu->mmu.pae_root[i];
 698
 699                 ASSERT(!VALID_PAGE(root));
 700                 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL)
 701                         root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
 702                 else if (vcpu->mmu.root_level == 0)
 703                         root_gfn = 0;
 704                 root = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
 705                                         PT32_ROOT_LEVEL, !is_paging(vcpu),
 706                                         NULL)->page_hpa;
 707                 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
 708         }
 709         vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
 710 }
 711
 712 static void nonpaging_flush(struct kvm_vcpu *vcpu)
 713 {
 714         hpa_t root = vcpu->mmu.root_hpa;
 715
 716         ++kvm_stat.tlb_flush;
 717         pgprintk("nonpaging_flush\n");
 718         mmu_free_roots(vcpu);
 719         mmu_alloc_roots(vcpu);
 720         kvm_arch_ops->set_cr3(vcpu, root);
 721         kvm_arch_ops->tlb_flush(vcpu);
 722 }
 723
 724 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
 725 {
 726         return vaddr;
 727 }
 728
 729 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
 730                                u32 error_code)
 731 {
 732         int ret;
 733         gpa_t addr = gva;
 734
 735         ASSERT(vcpu);
 736         ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
 737
 738         for (;;) {
 739              hpa_t paddr;
 740
 741              paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
 742
 743              if (is_error_hpa(paddr))
 744                      return 1;
 745
 746              ret = nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
 747              if (ret) {
 748                      nonpaging_flush(vcpu);
 749                      continue;
 750              }
 751              break;
 752         }
 753         return ret;
 754 }
 755
 756 static void nonpaging_inval_page(struct kvm_vcpu *vcpu, gva_t addr)
 757 {
 758 }
 759
 760 static void nonpaging_free(struct kvm_vcpu *vcpu)
 761 {
 762         mmu_free_roots(vcpu);
 763 }
 764
 765 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
 766 {
 767         struct kvm_mmu *context = &vcpu->mmu;
 768
 769         context->new_cr3 = nonpaging_new_cr3;
 770         context->page_fault = nonpaging_page_fault;
 771         context->inval_page = nonpaging_inval_page;
 772         context->gva_to_gpa = nonpaging_gva_to_gpa;
 773         context->free = nonpaging_free;
 774         context->root_level = 0;
 775         context->shadow_root_level = PT32E_ROOT_LEVEL;
 776         mmu_alloc_roots(vcpu);
 777         ASSERT(VALID_PAGE(context->root_hpa));
 778         kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
 779         return 0;
 780 }
 781
 782 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
 783 {
 784         ++kvm_stat.tlb_flush;
 785         kvm_arch_ops->tlb_flush(vcpu);
 786 }
 787
 788 static void paging_new_cr3(struct kvm_vcpu *vcpu)
 789 {
 790         pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
 791         mmu_free_roots(vcpu);
 792         mmu_alloc_roots(vcpu);
 793         kvm_mmu_flush_tlb(vcpu);
 794         kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
 795 }
 796
 797 static void mark_pagetable_nonglobal(void *shadow_pte)
 798 {
 799         page_header(__pa(shadow_pte))->global = 0;
 800 }
 801
 802 static inline void set_pte_common(struct kvm_vcpu *vcpu,
 803                              u64 *shadow_pte,
 804                              gpa_t gaddr,
 805                              int dirty,
 806                              u64 access_bits,
 807                              gfn_t gfn)
 808 {
 809         hpa_t paddr;
 810
 811         *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
 812         if (!dirty)
 813                 access_bits &= ~PT_WRITABLE_MASK;
 814
 815         paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
 816
 817         *shadow_pte |= access_bits;
 818
 819         if (!(*shadow_pte & PT_GLOBAL_MASK))
 820                 mark_pagetable_nonglobal(shadow_pte);
 821
 822         if (is_error_hpa(paddr)) {
 823                 *shadow_pte |= gaddr;
 824                 *shadow_pte |= PT_SHADOW_IO_MARK;
 825                 *shadow_pte &= ~PT_PRESENT_MASK;
 826                 return;
 827         }
 828
 829         *shadow_pte |= paddr;
 830
 831         if (access_bits & PT_WRITABLE_MASK) {
 832                 struct kvm_mmu_page *shadow;
 833
 834                 shadow = kvm_mmu_lookup_page(vcpu, gfn);
 835                 if (shadow) {
 836                         pgprintk("%s: found shadow page for %lx, marking ro\n",
 837                                  __FUNCTION__, gfn);
 838                         access_bits &= ~PT_WRITABLE_MASK;
 839                         *shadow_pte &= ~PT_WRITABLE_MASK;
 840                 }
 841         }
 842
 843         if (access_bits & PT_WRITABLE_MASK)
 844                 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
 845
 846         page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
 847         rmap_add(vcpu->kvm, shadow_pte);
 848 }
 849
 850 static void inject_page_fault(struct kvm_vcpu *vcpu,
 851                               u64 addr,
 852                               u32 err_code)
 853 {
 854         kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
 855 }
 856
 857 static inline int fix_read_pf(u64 *shadow_ent)
 858 {
 859         if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
 860             !(*shadow_ent & PT_USER_MASK)) {
 861                 /*
 862                  * If supervisor write protect is disabled, we shadow kernel
 863                  * pages as user pages so we can trap the write access.
 864                  */
 865                 *shadow_ent |= PT_USER_MASK;
 866                 *shadow_ent &= ~PT_WRITABLE_MASK;
 867
 868                 return 1;
 869
 870         }
 871         return 0;
 872 }
 873
 874 static int may_access(u64 pte, int write, int user)
 875 {
 876
 877         if (user && !(pte & PT_USER_MASK))
 878                 return 0;
 879         if (write && !(pte & PT_WRITABLE_MASK))
 880                 return 0;
 881         return 1;
 882 }
 883
 884 /*
 885  * Remove a shadow pte.
 886  */
 887 static void paging_inval_page(struct kvm_vcpu *vcpu, gva_t addr)
 888 {
 889         hpa_t page_addr = vcpu->mmu.root_hpa;
 890         int level = vcpu->mmu.shadow_root_level;
 891
 892         ++kvm_stat.invlpg;
 893
 894         for (; ; level--) {
 895                 u32 index = PT64_INDEX(addr, level);
 896                 u64 *table = __va(page_addr);
 897
 898                 if (level == PT_PAGE_TABLE_LEVEL ) {
 899                         rmap_remove(vcpu->kvm, &table[index]);
 900                         table[index] = 0;
 901                         return;
 902                 }
 903
 904                 if (!is_present_pte(table[index]))
 905                         return;
 906
 907                 page_addr = table[index] & PT64_BASE_ADDR_MASK;
 908
 909                 if (level == PT_DIRECTORY_LEVEL &&
 910                           (table[index] & PT_SHADOW_PS_MARK)) {
 911                         table[index] = 0;
 912                         release_pt_page_64(vcpu, page_addr, PT_PAGE_TABLE_LEVEL);
 913
 914                         kvm_arch_ops->tlb_flush(vcpu);
 915                         return;
 916                 }
 917         }
 918 }
 919
 920 static void paging_free(struct kvm_vcpu *vcpu)
 921 {
 922         nonpaging_free(vcpu);
 923 }
 924
 925 #define PTTYPE 64
 926 #include "paging_tmpl.h"
 927 #undef PTTYPE
 928
 929 #define PTTYPE 32
 930 #include "paging_tmpl.h"
 931 #undef PTTYPE
 932
 933 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
 934 {
 935         struct kvm_mmu *context = &vcpu->mmu;
 936
 937         ASSERT(is_pae(vcpu));
 938         context->new_cr3 = paging_new_cr3;
 939         context->page_fault = paging64_page_fault;
 940         context->inval_page = paging_inval_page;
 941         context->gva_to_gpa = paging64_gva_to_gpa;
 942         context->free = paging_free;
 943         context->root_level = level;
 944         context->shadow_root_level = level;
 945         mmu_alloc_roots(vcpu);
 946         ASSERT(VALID_PAGE(context->root_hpa));
 947         kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
 948                     (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
 949         return 0;
 950 }
 951
 952 static int paging64_init_context(struct kvm_vcpu *vcpu)
 953 {
 954         return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
 955 }
 956
 957 static int paging32_init_context(struct kvm_vcpu *vcpu)
 958 {
 959         struct kvm_mmu *context = &vcpu->mmu;
 960
 961         context->new_cr3 = paging_new_cr3;
 962         context->page_fault = paging32_page_fault;
 963         context->inval_page = paging_inval_page;
 964         context->gva_to_gpa = paging32_gva_to_gpa;
 965         context->free = paging_free;
 966         context->root_level = PT32_ROOT_LEVEL;
 967         context->shadow_root_level = PT32E_ROOT_LEVEL;
 968         mmu_alloc_roots(vcpu);
 969         ASSERT(VALID_PAGE(context->root_hpa));
 970         kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
 971                     (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
 972         return 0;
 973 }
 974
 975 static int paging32E_init_context(struct kvm_vcpu *vcpu)
 976 {
 977         return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
 978 }
 979
 980 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
 981 {
 982         ASSERT(vcpu);
 983         ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
 984
 985         if (!is_paging(vcpu))
 986                 return nonpaging_init_context(vcpu);
 987         else if (is_long_mode(vcpu))
 988                 return paging64_init_context(vcpu);
 989         else if (is_pae(vcpu))
 990                 return paging32E_init_context(vcpu);
 991         else
 992                 return paging32_init_context(vcpu);
 993 }
 994
 995 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
 996 {
 997         ASSERT(vcpu);
 998         if (VALID_PAGE(vcpu->mmu.root_hpa)) {
 999                 vcpu->mmu.free(vcpu);
1000                 vcpu->mmu.root_hpa = INVALID_PAGE;
1001         }
1002 }
1003
1004 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1005 {
1006         destroy_kvm_mmu(vcpu);
1007         return init_kvm_mmu(vcpu);
1008 }
1009
1010 void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1011 {
1012         gfn_t gfn = gpa >> PAGE_SHIFT;
1013         struct kvm_mmu_page *page;
1014         struct kvm_mmu_page *child;
1015         struct hlist_node *node;
1016         struct hlist_head *bucket;
1017         unsigned index;
1018         u64 *spte;
1019         u64 pte;
1020         unsigned offset = offset_in_page(gpa);
1021         unsigned page_offset;
1022         int level;
1023
1024         pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1025         index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1026         bucket = &vcpu->kvm->mmu_page_hash[index];
1027         hlist_for_each_entry(page, node, bucket, hash_link) {
1028                 if (page->gfn != gfn || page->role.metaphysical)
1029                         continue;
1030                 page_offset = offset;
1031                 level = page->role.level;
1032                 if (page->role.glevels == PT32_ROOT_LEVEL) {
1033                         page_offset <<= 1;          /* 32->64 */
1034                         page_offset &= ~PAGE_MASK;
1035                 }
1036                 spte = __va(page->page_hpa);
1037                 spte += page_offset / sizeof(*spte);
1038                 pte = *spte;
1039                 if (is_present_pte(pte)) {
1040                         if (level == PT_PAGE_TABLE_LEVEL)
1041                                 rmap_remove(vcpu->kvm, spte);
1042                         else {
1043                                 child = page_header(pte & PT64_BASE_ADDR_MASK);
1044                                 mmu_page_remove_parent_pte(child, spte);
1045                         }
1046                 }
1047                 *spte = 0;
1048         }
1049 }
1050
1051 void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1052 {
1053 }
1054
1055 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1056 {
1057         gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1058
1059         return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1060 }
1061
1062 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1063 {
1064         while (!list_empty(&vcpu->free_pages)) {
1065                 struct kvm_mmu_page *page;
1066
1067                 page = list_entry(vcpu->free_pages.next,
1068                                   struct kvm_mmu_page, link);
1069                 list_del(&page->link);
1070                 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
1071                 page->page_hpa = INVALID_PAGE;
1072         }
1073         free_page((unsigned long)vcpu->mmu.pae_root);
1074 }
1075
1076 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1077 {
1078         struct page *page;
1079         int i;
1080
1081         ASSERT(vcpu);
1082
1083         for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
1084                 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
1085
1086                 INIT_LIST_HEAD(&page_header->link);
1087                 if ((page = alloc_page(GFP_KERNEL)) == NULL)
1088                         goto error_1;
1089                 page->private = (unsigned long)page_header;
1090                 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
1091                 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
1092                 list_add(&page_header->link, &vcpu->free_pages);
1093         }
1094
1095         /*
1096          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1097          * Therefore we need to allocate shadow page tables in the first
1098          * 4GB of memory, which happens to fit the DMA32 zone.
1099          */
1100         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1101         if (!page)
1102                 goto error_1;
1103         vcpu->mmu.pae_root = page_address(page);
1104         for (i = 0; i < 4; ++i)
1105                 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1106
1107         return 0;
1108
1109 error_1:
1110         free_mmu_pages(vcpu);
1111         return -ENOMEM;
1112 }
1113
1114 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1115 {
1116         ASSERT(vcpu);
1117         ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1118         ASSERT(list_empty(&vcpu->free_pages));
1119
1120         return alloc_mmu_pages(vcpu);
1121 }
1122
1123 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1124 {
1125         ASSERT(vcpu);
1126         ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1127         ASSERT(!list_empty(&vcpu->free_pages));
1128
1129         return init_kvm_mmu(vcpu);
1130 }
1131
1132 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1133 {
1134         ASSERT(vcpu);
1135
1136         destroy_kvm_mmu(vcpu);
1137         free_mmu_pages(vcpu);
1138 }
1139
1140 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
1141 {
1142         struct kvm_mmu_page *page;
1143
1144         list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1145                 int i;
1146                 u64 *pt;
1147
1148                 if (!test_bit(slot, &page->slot_bitmap))
1149                         continue;
1150
1151                 pt = __va(page->page_hpa);
1152                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1153                         /* avoid RMW */
1154                         if (pt[i] & PT_WRITABLE_MASK) {
1155                                 rmap_remove(kvm, &pt[i]);
1156                                 pt[i] &= ~PT_WRITABLE_MASK;
1157                         }
1158         }
1159 }