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[mirror_ubuntu-jammy-kernel.git] / drivers / kvm / mmu.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19 #include <linux/types.h>
20 #include <linux/string.h>
21 #include <asm/page.h>
22 #include <linux/mm.h>
23 #include <linux/highmem.h>
24 #include <linux/module.h>
25
26 #include "vmx.h"
27 #include "kvm.h"
28
29 #undef MMU_DEBUG
30
31 #undef AUDIT
32
33 #ifdef AUDIT
34 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
35 #else
36 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
37 #endif
38
39 #ifdef MMU_DEBUG
40
41 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
42 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
43
44 #else
45
46 #define pgprintk(x...) do { } while (0)
47 #define rmap_printk(x...) do { } while (0)
48
49 #endif
50
51 #if defined(MMU_DEBUG) || defined(AUDIT)
52 static int dbg = 1;
53 #endif
54
55 #define ASSERT(x) \
56 if (!(x)) { \
57 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
58 __FILE__, __LINE__, #x); \
59 }
60
61 #define PT64_PT_BITS 9
62 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
63 #define PT32_PT_BITS 10
64 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
65
66 #define PT_WRITABLE_SHIFT 1
67
68 #define PT_PRESENT_MASK (1ULL << 0)
69 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
70 #define PT_USER_MASK (1ULL << 2)
71 #define PT_PWT_MASK (1ULL << 3)
72 #define PT_PCD_MASK (1ULL << 4)
73 #define PT_ACCESSED_MASK (1ULL << 5)
74 #define PT_DIRTY_MASK (1ULL << 6)
75 #define PT_PAGE_SIZE_MASK (1ULL << 7)
76 #define PT_PAT_MASK (1ULL << 7)
77 #define PT_GLOBAL_MASK (1ULL << 8)
78 #define PT64_NX_MASK (1ULL << 63)
79
80 #define PT_PAT_SHIFT 7
81 #define PT_DIR_PAT_SHIFT 12
82 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
83
84 #define PT32_DIR_PSE36_SIZE 4
85 #define PT32_DIR_PSE36_SHIFT 13
86 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
87
88
89 #define PT32_PTE_COPY_MASK \
90 (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
91
92 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
93
94 #define PT_FIRST_AVAIL_BITS_SHIFT 9
95 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
96
97 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
98 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
99
100 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
101 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
102
103 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
104 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
105
106 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
107
108 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
109
110 #define PT64_LEVEL_BITS 9
111
112 #define PT64_LEVEL_SHIFT(level) \
113 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
114
115 #define PT64_LEVEL_MASK(level) \
116 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
117
118 #define PT64_INDEX(address, level)\
119 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
120
121
122 #define PT32_LEVEL_BITS 10
123
124 #define PT32_LEVEL_SHIFT(level) \
125 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
126
127 #define PT32_LEVEL_MASK(level) \
128 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
129
130 #define PT32_INDEX(address, level)\
131 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
132
133
134 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
135 #define PT64_DIR_BASE_ADDR_MASK \
136 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
137
138 #define PT32_BASE_ADDR_MASK PAGE_MASK
139 #define PT32_DIR_BASE_ADDR_MASK \
140 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
141
142
143 #define PFERR_PRESENT_MASK (1U << 0)
144 #define PFERR_WRITE_MASK (1U << 1)
145 #define PFERR_USER_MASK (1U << 2)
146 #define PFERR_FETCH_MASK (1U << 4)
147
148 #define PT64_ROOT_LEVEL 4
149 #define PT32_ROOT_LEVEL 2
150 #define PT32E_ROOT_LEVEL 3
151
152 #define PT_DIRECTORY_LEVEL 2
153 #define PT_PAGE_TABLE_LEVEL 1
154
155 #define RMAP_EXT 4
156
157 struct kvm_rmap_desc {
158 u64 *shadow_ptes[RMAP_EXT];
159 struct kvm_rmap_desc *more;
160 };
161
162 static int is_write_protection(struct kvm_vcpu *vcpu)
163 {
164 return vcpu->cr0 & CR0_WP_MASK;
165 }
166
167 static int is_cpuid_PSE36(void)
168 {
169 return 1;
170 }
171
172 static int is_nx(struct kvm_vcpu *vcpu)
173 {
174 return vcpu->shadow_efer & EFER_NX;
175 }
176
177 static int is_present_pte(unsigned long pte)
178 {
179 return pte & PT_PRESENT_MASK;
180 }
181
182 static int is_writeble_pte(unsigned long pte)
183 {
184 return pte & PT_WRITABLE_MASK;
185 }
186
187 static int is_io_pte(unsigned long pte)
188 {
189 return pte & PT_SHADOW_IO_MARK;
190 }
191
192 static int is_rmap_pte(u64 pte)
193 {
194 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
195 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
196 }
197
198 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
199 size_t objsize, int min)
200 {
201 void *obj;
202
203 if (cache->nobjs >= min)
204 return 0;
205 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
206 obj = kzalloc(objsize, GFP_NOWAIT);
207 if (!obj)
208 return -ENOMEM;
209 cache->objects[cache->nobjs++] = obj;
210 }
211 return 0;
212 }
213
214 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
215 {
216 while (mc->nobjs)
217 kfree(mc->objects[--mc->nobjs]);
218 }
219
220 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
221 {
222 int r;
223
224 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
225 sizeof(struct kvm_pte_chain), 4);
226 if (r)
227 goto out;
228 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
229 sizeof(struct kvm_rmap_desc), 1);
230 out:
231 return r;
232 }
233
234 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
235 {
236 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
237 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
238 }
239
240 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
241 size_t size)
242 {
243 void *p;
244
245 BUG_ON(!mc->nobjs);
246 p = mc->objects[--mc->nobjs];
247 memset(p, 0, size);
248 return p;
249 }
250
251 static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj)
252 {
253 if (mc->nobjs < KVM_NR_MEM_OBJS)
254 mc->objects[mc->nobjs++] = obj;
255 else
256 kfree(obj);
257 }
258
259 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
260 {
261 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
262 sizeof(struct kvm_pte_chain));
263 }
264
265 static void mmu_free_pte_chain(struct kvm_vcpu *vcpu,
266 struct kvm_pte_chain *pc)
267 {
268 mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc);
269 }
270
271 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
272 {
273 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
274 sizeof(struct kvm_rmap_desc));
275 }
276
277 static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu,
278 struct kvm_rmap_desc *rd)
279 {
280 mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd);
281 }
282
283 /*
284 * Reverse mapping data structures:
285 *
286 * If page->private bit zero is zero, then page->private points to the
287 * shadow page table entry that points to page_address(page).
288 *
289 * If page->private bit zero is one, (then page->private & ~1) points
290 * to a struct kvm_rmap_desc containing more mappings.
291 */
292 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
293 {
294 struct page *page;
295 struct kvm_rmap_desc *desc;
296 int i;
297
298 if (!is_rmap_pte(*spte))
299 return;
300 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
301 if (!page_private(page)) {
302 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
303 set_page_private(page,(unsigned long)spte);
304 } else if (!(page_private(page) & 1)) {
305 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
306 desc = mmu_alloc_rmap_desc(vcpu);
307 desc->shadow_ptes[0] = (u64 *)page_private(page);
308 desc->shadow_ptes[1] = spte;
309 set_page_private(page,(unsigned long)desc | 1);
310 } else {
311 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
312 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
313 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
314 desc = desc->more;
315 if (desc->shadow_ptes[RMAP_EXT-1]) {
316 desc->more = mmu_alloc_rmap_desc(vcpu);
317 desc = desc->more;
318 }
319 for (i = 0; desc->shadow_ptes[i]; ++i)
320 ;
321 desc->shadow_ptes[i] = spte;
322 }
323 }
324
325 static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu,
326 struct page *page,
327 struct kvm_rmap_desc *desc,
328 int i,
329 struct kvm_rmap_desc *prev_desc)
330 {
331 int j;
332
333 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
334 ;
335 desc->shadow_ptes[i] = desc->shadow_ptes[j];
336 desc->shadow_ptes[j] = NULL;
337 if (j != 0)
338 return;
339 if (!prev_desc && !desc->more)
340 set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
341 else
342 if (prev_desc)
343 prev_desc->more = desc->more;
344 else
345 set_page_private(page,(unsigned long)desc->more | 1);
346 mmu_free_rmap_desc(vcpu, desc);
347 }
348
349 static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte)
350 {
351 struct page *page;
352 struct kvm_rmap_desc *desc;
353 struct kvm_rmap_desc *prev_desc;
354 int i;
355
356 if (!is_rmap_pte(*spte))
357 return;
358 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
359 if (!page_private(page)) {
360 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
361 BUG();
362 } else if (!(page_private(page) & 1)) {
363 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
364 if ((u64 *)page_private(page) != spte) {
365 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
366 spte, *spte);
367 BUG();
368 }
369 set_page_private(page,0);
370 } else {
371 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
372 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
373 prev_desc = NULL;
374 while (desc) {
375 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
376 if (desc->shadow_ptes[i] == spte) {
377 rmap_desc_remove_entry(vcpu, page,
378 desc, i,
379 prev_desc);
380 return;
381 }
382 prev_desc = desc;
383 desc = desc->more;
384 }
385 BUG();
386 }
387 }
388
389 static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
390 {
391 struct kvm *kvm = vcpu->kvm;
392 struct page *page;
393 struct kvm_rmap_desc *desc;
394 u64 *spte;
395
396 page = gfn_to_page(kvm, gfn);
397 BUG_ON(!page);
398
399 while (page_private(page)) {
400 if (!(page_private(page) & 1))
401 spte = (u64 *)page_private(page);
402 else {
403 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
404 spte = desc->shadow_ptes[0];
405 }
406 BUG_ON(!spte);
407 BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
408 != page_to_pfn(page));
409 BUG_ON(!(*spte & PT_PRESENT_MASK));
410 BUG_ON(!(*spte & PT_WRITABLE_MASK));
411 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
412 rmap_remove(vcpu, spte);
413 kvm_arch_ops->tlb_flush(vcpu);
414 *spte &= ~(u64)PT_WRITABLE_MASK;
415 }
416 }
417
418 static int is_empty_shadow_page(hpa_t page_hpa)
419 {
420 u64 *pos;
421 u64 *end;
422
423 for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u64);
424 pos != end; pos++)
425 if (*pos != 0) {
426 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
427 pos, *pos);
428 return 0;
429 }
430 return 1;
431 }
432
433 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
434 {
435 struct kvm_mmu_page *page_head = page_header(page_hpa);
436
437 ASSERT(is_empty_shadow_page(page_hpa));
438 page_head->page_hpa = page_hpa;
439 list_move(&page_head->link, &vcpu->free_pages);
440 ++vcpu->kvm->n_free_mmu_pages;
441 }
442
443 static unsigned kvm_page_table_hashfn(gfn_t gfn)
444 {
445 return gfn;
446 }
447
448 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
449 u64 *parent_pte)
450 {
451 struct kvm_mmu_page *page;
452
453 if (list_empty(&vcpu->free_pages))
454 return NULL;
455
456 page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
457 list_move(&page->link, &vcpu->kvm->active_mmu_pages);
458 ASSERT(is_empty_shadow_page(page->page_hpa));
459 page->slot_bitmap = 0;
460 page->multimapped = 0;
461 page->parent_pte = parent_pte;
462 --vcpu->kvm->n_free_mmu_pages;
463 return page;
464 }
465
466 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
467 struct kvm_mmu_page *page, u64 *parent_pte)
468 {
469 struct kvm_pte_chain *pte_chain;
470 struct hlist_node *node;
471 int i;
472
473 if (!parent_pte)
474 return;
475 if (!page->multimapped) {
476 u64 *old = page->parent_pte;
477
478 if (!old) {
479 page->parent_pte = parent_pte;
480 return;
481 }
482 page->multimapped = 1;
483 pte_chain = mmu_alloc_pte_chain(vcpu);
484 INIT_HLIST_HEAD(&page->parent_ptes);
485 hlist_add_head(&pte_chain->link, &page->parent_ptes);
486 pte_chain->parent_ptes[0] = old;
487 }
488 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
489 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
490 continue;
491 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
492 if (!pte_chain->parent_ptes[i]) {
493 pte_chain->parent_ptes[i] = parent_pte;
494 return;
495 }
496 }
497 pte_chain = mmu_alloc_pte_chain(vcpu);
498 BUG_ON(!pte_chain);
499 hlist_add_head(&pte_chain->link, &page->parent_ptes);
500 pte_chain->parent_ptes[0] = parent_pte;
501 }
502
503 static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu,
504 struct kvm_mmu_page *page,
505 u64 *parent_pte)
506 {
507 struct kvm_pte_chain *pte_chain;
508 struct hlist_node *node;
509 int i;
510
511 if (!page->multimapped) {
512 BUG_ON(page->parent_pte != parent_pte);
513 page->parent_pte = NULL;
514 return;
515 }
516 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
517 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
518 if (!pte_chain->parent_ptes[i])
519 break;
520 if (pte_chain->parent_ptes[i] != parent_pte)
521 continue;
522 while (i + 1 < NR_PTE_CHAIN_ENTRIES
523 && pte_chain->parent_ptes[i + 1]) {
524 pte_chain->parent_ptes[i]
525 = pte_chain->parent_ptes[i + 1];
526 ++i;
527 }
528 pte_chain->parent_ptes[i] = NULL;
529 if (i == 0) {
530 hlist_del(&pte_chain->link);
531 mmu_free_pte_chain(vcpu, pte_chain);
532 if (hlist_empty(&page->parent_ptes)) {
533 page->multimapped = 0;
534 page->parent_pte = NULL;
535 }
536 }
537 return;
538 }
539 BUG();
540 }
541
542 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
543 gfn_t gfn)
544 {
545 unsigned index;
546 struct hlist_head *bucket;
547 struct kvm_mmu_page *page;
548 struct hlist_node *node;
549
550 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
551 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
552 bucket = &vcpu->kvm->mmu_page_hash[index];
553 hlist_for_each_entry(page, node, bucket, hash_link)
554 if (page->gfn == gfn && !page->role.metaphysical) {
555 pgprintk("%s: found role %x\n",
556 __FUNCTION__, page->role.word);
557 return page;
558 }
559 return NULL;
560 }
561
562 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
563 gfn_t gfn,
564 gva_t gaddr,
565 unsigned level,
566 int metaphysical,
567 unsigned hugepage_access,
568 u64 *parent_pte)
569 {
570 union kvm_mmu_page_role role;
571 unsigned index;
572 unsigned quadrant;
573 struct hlist_head *bucket;
574 struct kvm_mmu_page *page;
575 struct hlist_node *node;
576
577 role.word = 0;
578 role.glevels = vcpu->mmu.root_level;
579 role.level = level;
580 role.metaphysical = metaphysical;
581 role.hugepage_access = hugepage_access;
582 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
583 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
584 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
585 role.quadrant = quadrant;
586 }
587 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
588 gfn, role.word);
589 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
590 bucket = &vcpu->kvm->mmu_page_hash[index];
591 hlist_for_each_entry(page, node, bucket, hash_link)
592 if (page->gfn == gfn && page->role.word == role.word) {
593 mmu_page_add_parent_pte(vcpu, page, parent_pte);
594 pgprintk("%s: found\n", __FUNCTION__);
595 return page;
596 }
597 page = kvm_mmu_alloc_page(vcpu, parent_pte);
598 if (!page)
599 return page;
600 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
601 page->gfn = gfn;
602 page->role = role;
603 hlist_add_head(&page->hash_link, bucket);
604 if (!metaphysical)
605 rmap_write_protect(vcpu, gfn);
606 return page;
607 }
608
609 static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
610 struct kvm_mmu_page *page)
611 {
612 unsigned i;
613 u64 *pt;
614 u64 ent;
615
616 pt = __va(page->page_hpa);
617
618 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
619 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
620 if (pt[i] & PT_PRESENT_MASK)
621 rmap_remove(vcpu, &pt[i]);
622 pt[i] = 0;
623 }
624 kvm_arch_ops->tlb_flush(vcpu);
625 return;
626 }
627
628 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
629 ent = pt[i];
630
631 pt[i] = 0;
632 if (!(ent & PT_PRESENT_MASK))
633 continue;
634 ent &= PT64_BASE_ADDR_MASK;
635 mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]);
636 }
637 }
638
639 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
640 struct kvm_mmu_page *page,
641 u64 *parent_pte)
642 {
643 mmu_page_remove_parent_pte(vcpu, page, parent_pte);
644 }
645
646 static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
647 struct kvm_mmu_page *page)
648 {
649 u64 *parent_pte;
650
651 while (page->multimapped || page->parent_pte) {
652 if (!page->multimapped)
653 parent_pte = page->parent_pte;
654 else {
655 struct kvm_pte_chain *chain;
656
657 chain = container_of(page->parent_ptes.first,
658 struct kvm_pte_chain, link);
659 parent_pte = chain->parent_ptes[0];
660 }
661 BUG_ON(!parent_pte);
662 kvm_mmu_put_page(vcpu, page, parent_pte);
663 *parent_pte = 0;
664 }
665 kvm_mmu_page_unlink_children(vcpu, page);
666 if (!page->root_count) {
667 hlist_del(&page->hash_link);
668 kvm_mmu_free_page(vcpu, page->page_hpa);
669 } else
670 list_move(&page->link, &vcpu->kvm->active_mmu_pages);
671 }
672
673 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
674 {
675 unsigned index;
676 struct hlist_head *bucket;
677 struct kvm_mmu_page *page;
678 struct hlist_node *node, *n;
679 int r;
680
681 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
682 r = 0;
683 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
684 bucket = &vcpu->kvm->mmu_page_hash[index];
685 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
686 if (page->gfn == gfn && !page->role.metaphysical) {
687 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
688 page->role.word);
689 kvm_mmu_zap_page(vcpu, page);
690 r = 1;
691 }
692 return r;
693 }
694
695 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
696 {
697 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
698 struct kvm_mmu_page *page_head = page_header(__pa(pte));
699
700 __set_bit(slot, &page_head->slot_bitmap);
701 }
702
703 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
704 {
705 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
706
707 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
708 }
709
710 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
711 {
712 struct page *page;
713
714 ASSERT((gpa & HPA_ERR_MASK) == 0);
715 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
716 if (!page)
717 return gpa | HPA_ERR_MASK;
718 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
719 | (gpa & (PAGE_SIZE-1));
720 }
721
722 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
723 {
724 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
725
726 if (gpa == UNMAPPED_GVA)
727 return UNMAPPED_GVA;
728 return gpa_to_hpa(vcpu, gpa);
729 }
730
731 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
732 {
733 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
734
735 if (gpa == UNMAPPED_GVA)
736 return NULL;
737 return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
738 }
739
740 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
741 {
742 }
743
744 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
745 {
746 int level = PT32E_ROOT_LEVEL;
747 hpa_t table_addr = vcpu->mmu.root_hpa;
748
749 for (; ; level--) {
750 u32 index = PT64_INDEX(v, level);
751 u64 *table;
752 u64 pte;
753
754 ASSERT(VALID_PAGE(table_addr));
755 table = __va(table_addr);
756
757 if (level == 1) {
758 pte = table[index];
759 if (is_present_pte(pte) && is_writeble_pte(pte))
760 return 0;
761 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
762 page_header_update_slot(vcpu->kvm, table, v);
763 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
764 PT_USER_MASK;
765 rmap_add(vcpu, &table[index]);
766 return 0;
767 }
768
769 if (table[index] == 0) {
770 struct kvm_mmu_page *new_table;
771 gfn_t pseudo_gfn;
772
773 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
774 >> PAGE_SHIFT;
775 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
776 v, level - 1,
777 1, 0, &table[index]);
778 if (!new_table) {
779 pgprintk("nonpaging_map: ENOMEM\n");
780 return -ENOMEM;
781 }
782
783 table[index] = new_table->page_hpa | PT_PRESENT_MASK
784 | PT_WRITABLE_MASK | PT_USER_MASK;
785 }
786 table_addr = table[index] & PT64_BASE_ADDR_MASK;
787 }
788 }
789
790 static void mmu_free_roots(struct kvm_vcpu *vcpu)
791 {
792 int i;
793 struct kvm_mmu_page *page;
794
795 #ifdef CONFIG_X86_64
796 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
797 hpa_t root = vcpu->mmu.root_hpa;
798
799 ASSERT(VALID_PAGE(root));
800 page = page_header(root);
801 --page->root_count;
802 vcpu->mmu.root_hpa = INVALID_PAGE;
803 return;
804 }
805 #endif
806 for (i = 0; i < 4; ++i) {
807 hpa_t root = vcpu->mmu.pae_root[i];
808
809 ASSERT(VALID_PAGE(root));
810 root &= PT64_BASE_ADDR_MASK;
811 page = page_header(root);
812 --page->root_count;
813 vcpu->mmu.pae_root[i] = INVALID_PAGE;
814 }
815 vcpu->mmu.root_hpa = INVALID_PAGE;
816 }
817
818 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
819 {
820 int i;
821 gfn_t root_gfn;
822 struct kvm_mmu_page *page;
823
824 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
825
826 #ifdef CONFIG_X86_64
827 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
828 hpa_t root = vcpu->mmu.root_hpa;
829
830 ASSERT(!VALID_PAGE(root));
831 page = kvm_mmu_get_page(vcpu, root_gfn, 0,
832 PT64_ROOT_LEVEL, 0, 0, NULL);
833 root = page->page_hpa;
834 ++page->root_count;
835 vcpu->mmu.root_hpa = root;
836 return;
837 }
838 #endif
839 for (i = 0; i < 4; ++i) {
840 hpa_t root = vcpu->mmu.pae_root[i];
841
842 ASSERT(!VALID_PAGE(root));
843 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL)
844 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
845 else if (vcpu->mmu.root_level == 0)
846 root_gfn = 0;
847 page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
848 PT32_ROOT_LEVEL, !is_paging(vcpu),
849 0, NULL);
850 root = page->page_hpa;
851 ++page->root_count;
852 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
853 }
854 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
855 }
856
857 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
858 {
859 return vaddr;
860 }
861
862 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
863 u32 error_code)
864 {
865 gpa_t addr = gva;
866 hpa_t paddr;
867 int r;
868
869 r = mmu_topup_memory_caches(vcpu);
870 if (r)
871 return r;
872
873 ASSERT(vcpu);
874 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
875
876
877 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
878
879 if (is_error_hpa(paddr))
880 return 1;
881
882 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
883 }
884
885 static void nonpaging_free(struct kvm_vcpu *vcpu)
886 {
887 mmu_free_roots(vcpu);
888 }
889
890 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
891 {
892 struct kvm_mmu *context = &vcpu->mmu;
893
894 context->new_cr3 = nonpaging_new_cr3;
895 context->page_fault = nonpaging_page_fault;
896 context->gva_to_gpa = nonpaging_gva_to_gpa;
897 context->free = nonpaging_free;
898 context->root_level = 0;
899 context->shadow_root_level = PT32E_ROOT_LEVEL;
900 mmu_alloc_roots(vcpu);
901 ASSERT(VALID_PAGE(context->root_hpa));
902 kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
903 return 0;
904 }
905
906 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
907 {
908 ++kvm_stat.tlb_flush;
909 kvm_arch_ops->tlb_flush(vcpu);
910 }
911
912 static void paging_new_cr3(struct kvm_vcpu *vcpu)
913 {
914 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
915 mmu_free_roots(vcpu);
916 if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
917 kvm_mmu_free_some_pages(vcpu);
918 mmu_alloc_roots(vcpu);
919 kvm_mmu_flush_tlb(vcpu);
920 kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
921 }
922
923 static inline void set_pte_common(struct kvm_vcpu *vcpu,
924 u64 *shadow_pte,
925 gpa_t gaddr,
926 int dirty,
927 u64 access_bits,
928 gfn_t gfn)
929 {
930 hpa_t paddr;
931
932 *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
933 if (!dirty)
934 access_bits &= ~PT_WRITABLE_MASK;
935
936 paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
937
938 *shadow_pte |= access_bits;
939
940 if (is_error_hpa(paddr)) {
941 *shadow_pte |= gaddr;
942 *shadow_pte |= PT_SHADOW_IO_MARK;
943 *shadow_pte &= ~PT_PRESENT_MASK;
944 return;
945 }
946
947 *shadow_pte |= paddr;
948
949 if (access_bits & PT_WRITABLE_MASK) {
950 struct kvm_mmu_page *shadow;
951
952 shadow = kvm_mmu_lookup_page(vcpu, gfn);
953 if (shadow) {
954 pgprintk("%s: found shadow page for %lx, marking ro\n",
955 __FUNCTION__, gfn);
956 access_bits &= ~PT_WRITABLE_MASK;
957 if (is_writeble_pte(*shadow_pte)) {
958 *shadow_pte &= ~PT_WRITABLE_MASK;
959 kvm_arch_ops->tlb_flush(vcpu);
960 }
961 }
962 }
963
964 if (access_bits & PT_WRITABLE_MASK)
965 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
966
967 page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
968 rmap_add(vcpu, shadow_pte);
969 }
970
971 static void inject_page_fault(struct kvm_vcpu *vcpu,
972 u64 addr,
973 u32 err_code)
974 {
975 kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
976 }
977
978 static inline int fix_read_pf(u64 *shadow_ent)
979 {
980 if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
981 !(*shadow_ent & PT_USER_MASK)) {
982 /*
983 * If supervisor write protect is disabled, we shadow kernel
984 * pages as user pages so we can trap the write access.
985 */
986 *shadow_ent |= PT_USER_MASK;
987 *shadow_ent &= ~PT_WRITABLE_MASK;
988
989 return 1;
990
991 }
992 return 0;
993 }
994
995 static void paging_free(struct kvm_vcpu *vcpu)
996 {
997 nonpaging_free(vcpu);
998 }
999
1000 #define PTTYPE 64
1001 #include "paging_tmpl.h"
1002 #undef PTTYPE
1003
1004 #define PTTYPE 32
1005 #include "paging_tmpl.h"
1006 #undef PTTYPE
1007
1008 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
1009 {
1010 struct kvm_mmu *context = &vcpu->mmu;
1011
1012 ASSERT(is_pae(vcpu));
1013 context->new_cr3 = paging_new_cr3;
1014 context->page_fault = paging64_page_fault;
1015 context->gva_to_gpa = paging64_gva_to_gpa;
1016 context->free = paging_free;
1017 context->root_level = level;
1018 context->shadow_root_level = level;
1019 mmu_alloc_roots(vcpu);
1020 ASSERT(VALID_PAGE(context->root_hpa));
1021 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1022 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1023 return 0;
1024 }
1025
1026 static int paging64_init_context(struct kvm_vcpu *vcpu)
1027 {
1028 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1029 }
1030
1031 static int paging32_init_context(struct kvm_vcpu *vcpu)
1032 {
1033 struct kvm_mmu *context = &vcpu->mmu;
1034
1035 context->new_cr3 = paging_new_cr3;
1036 context->page_fault = paging32_page_fault;
1037 context->gva_to_gpa = paging32_gva_to_gpa;
1038 context->free = paging_free;
1039 context->root_level = PT32_ROOT_LEVEL;
1040 context->shadow_root_level = PT32E_ROOT_LEVEL;
1041 mmu_alloc_roots(vcpu);
1042 ASSERT(VALID_PAGE(context->root_hpa));
1043 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1044 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1045 return 0;
1046 }
1047
1048 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1049 {
1050 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1051 }
1052
1053 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1054 {
1055 ASSERT(vcpu);
1056 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1057
1058 if (!is_paging(vcpu))
1059 return nonpaging_init_context(vcpu);
1060 else if (is_long_mode(vcpu))
1061 return paging64_init_context(vcpu);
1062 else if (is_pae(vcpu))
1063 return paging32E_init_context(vcpu);
1064 else
1065 return paging32_init_context(vcpu);
1066 }
1067
1068 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1069 {
1070 ASSERT(vcpu);
1071 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1072 vcpu->mmu.free(vcpu);
1073 vcpu->mmu.root_hpa = INVALID_PAGE;
1074 }
1075 }
1076
1077 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1078 {
1079 int r;
1080
1081 destroy_kvm_mmu(vcpu);
1082 r = init_kvm_mmu(vcpu);
1083 if (r < 0)
1084 goto out;
1085 r = mmu_topup_memory_caches(vcpu);
1086 out:
1087 return r;
1088 }
1089
1090 static void mmu_pre_write_zap_pte(struct kvm_vcpu *vcpu,
1091 struct kvm_mmu_page *page,
1092 u64 *spte)
1093 {
1094 u64 pte;
1095 struct kvm_mmu_page *child;
1096
1097 pte = *spte;
1098 if (is_present_pte(pte)) {
1099 if (page->role.level == PT_PAGE_TABLE_LEVEL)
1100 rmap_remove(vcpu, spte);
1101 else {
1102 child = page_header(pte & PT64_BASE_ADDR_MASK);
1103 mmu_page_remove_parent_pte(vcpu, child, spte);
1104 }
1105 }
1106 *spte = 0;
1107 }
1108
1109 void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1110 {
1111 gfn_t gfn = gpa >> PAGE_SHIFT;
1112 struct kvm_mmu_page *page;
1113 struct hlist_node *node, *n;
1114 struct hlist_head *bucket;
1115 unsigned index;
1116 u64 *spte;
1117 unsigned offset = offset_in_page(gpa);
1118 unsigned pte_size;
1119 unsigned page_offset;
1120 unsigned misaligned;
1121 int level;
1122 int flooded = 0;
1123 int npte;
1124
1125 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1126 if (gfn == vcpu->last_pt_write_gfn) {
1127 ++vcpu->last_pt_write_count;
1128 if (vcpu->last_pt_write_count >= 3)
1129 flooded = 1;
1130 } else {
1131 vcpu->last_pt_write_gfn = gfn;
1132 vcpu->last_pt_write_count = 1;
1133 }
1134 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1135 bucket = &vcpu->kvm->mmu_page_hash[index];
1136 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
1137 if (page->gfn != gfn || page->role.metaphysical)
1138 continue;
1139 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1140 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1141 if (misaligned || flooded) {
1142 /*
1143 * Misaligned accesses are too much trouble to fix
1144 * up; also, they usually indicate a page is not used
1145 * as a page table.
1146 *
1147 * If we're seeing too many writes to a page,
1148 * it may no longer be a page table, or we may be
1149 * forking, in which case it is better to unmap the
1150 * page.
1151 */
1152 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1153 gpa, bytes, page->role.word);
1154 kvm_mmu_zap_page(vcpu, page);
1155 continue;
1156 }
1157 page_offset = offset;
1158 level = page->role.level;
1159 npte = 1;
1160 if (page->role.glevels == PT32_ROOT_LEVEL) {
1161 page_offset <<= 1; /* 32->64 */
1162 /*
1163 * A 32-bit pde maps 4MB while the shadow pdes map
1164 * only 2MB. So we need to double the offset again
1165 * and zap two pdes instead of one.
1166 */
1167 if (level == PT32_ROOT_LEVEL) {
1168 page_offset &= ~7; /* kill rounding error */
1169 page_offset <<= 1;
1170 npte = 2;
1171 }
1172 page_offset &= ~PAGE_MASK;
1173 }
1174 spte = __va(page->page_hpa);
1175 spte += page_offset / sizeof(*spte);
1176 while (npte--) {
1177 mmu_pre_write_zap_pte(vcpu, page, spte);
1178 ++spte;
1179 }
1180 }
1181 }
1182
1183 void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1184 {
1185 }
1186
1187 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1188 {
1189 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1190
1191 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1192 }
1193
1194 void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1195 {
1196 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1197 struct kvm_mmu_page *page;
1198
1199 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1200 struct kvm_mmu_page, link);
1201 kvm_mmu_zap_page(vcpu, page);
1202 }
1203 }
1204 EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
1205
1206 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1207 {
1208 struct kvm_mmu_page *page;
1209
1210 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1211 page = container_of(vcpu->kvm->active_mmu_pages.next,
1212 struct kvm_mmu_page, link);
1213 kvm_mmu_zap_page(vcpu, page);
1214 }
1215 while (!list_empty(&vcpu->free_pages)) {
1216 page = list_entry(vcpu->free_pages.next,
1217 struct kvm_mmu_page, link);
1218 list_del(&page->link);
1219 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
1220 page->page_hpa = INVALID_PAGE;
1221 }
1222 free_page((unsigned long)vcpu->mmu.pae_root);
1223 }
1224
1225 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1226 {
1227 struct page *page;
1228 int i;
1229
1230 ASSERT(vcpu);
1231
1232 for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
1233 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
1234
1235 INIT_LIST_HEAD(&page_header->link);
1236 if ((page = alloc_page(GFP_KERNEL)) == NULL)
1237 goto error_1;
1238 set_page_private(page, (unsigned long)page_header);
1239 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
1240 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
1241 list_add(&page_header->link, &vcpu->free_pages);
1242 ++vcpu->kvm->n_free_mmu_pages;
1243 }
1244
1245 /*
1246 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1247 * Therefore we need to allocate shadow page tables in the first
1248 * 4GB of memory, which happens to fit the DMA32 zone.
1249 */
1250 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1251 if (!page)
1252 goto error_1;
1253 vcpu->mmu.pae_root = page_address(page);
1254 for (i = 0; i < 4; ++i)
1255 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1256
1257 return 0;
1258
1259 error_1:
1260 free_mmu_pages(vcpu);
1261 return -ENOMEM;
1262 }
1263
1264 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1265 {
1266 ASSERT(vcpu);
1267 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1268 ASSERT(list_empty(&vcpu->free_pages));
1269
1270 return alloc_mmu_pages(vcpu);
1271 }
1272
1273 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1274 {
1275 ASSERT(vcpu);
1276 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1277 ASSERT(!list_empty(&vcpu->free_pages));
1278
1279 return init_kvm_mmu(vcpu);
1280 }
1281
1282 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1283 {
1284 ASSERT(vcpu);
1285
1286 destroy_kvm_mmu(vcpu);
1287 free_mmu_pages(vcpu);
1288 mmu_free_memory_caches(vcpu);
1289 }
1290
1291 void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot)
1292 {
1293 struct kvm *kvm = vcpu->kvm;
1294 struct kvm_mmu_page *page;
1295
1296 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1297 int i;
1298 u64 *pt;
1299
1300 if (!test_bit(slot, &page->slot_bitmap))
1301 continue;
1302
1303 pt = __va(page->page_hpa);
1304 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1305 /* avoid RMW */
1306 if (pt[i] & PT_WRITABLE_MASK) {
1307 rmap_remove(vcpu, &pt[i]);
1308 pt[i] &= ~PT_WRITABLE_MASK;
1309 }
1310 }
1311 }
1312
1313 void kvm_mmu_zap_all(struct kvm_vcpu *vcpu)
1314 {
1315 destroy_kvm_mmu(vcpu);
1316
1317 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1318 struct kvm_mmu_page *page;
1319
1320 page = container_of(vcpu->kvm->active_mmu_pages.next,
1321 struct kvm_mmu_page, link);
1322 kvm_mmu_zap_page(vcpu, page);
1323 }
1324
1325 mmu_free_memory_caches(vcpu);
1326 kvm_arch_ops->tlb_flush(vcpu);
1327 init_kvm_mmu(vcpu);
1328 }
1329
1330 #ifdef AUDIT
1331
1332 static const char *audit_msg;
1333
1334 static gva_t canonicalize(gva_t gva)
1335 {
1336 #ifdef CONFIG_X86_64
1337 gva = (long long)(gva << 16) >> 16;
1338 #endif
1339 return gva;
1340 }
1341
1342 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1343 gva_t va, int level)
1344 {
1345 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1346 int i;
1347 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1348
1349 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1350 u64 ent = pt[i];
1351
1352 if (!ent & PT_PRESENT_MASK)
1353 continue;
1354
1355 va = canonicalize(va);
1356 if (level > 1)
1357 audit_mappings_page(vcpu, ent, va, level - 1);
1358 else {
1359 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1360 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
1361
1362 if ((ent & PT_PRESENT_MASK)
1363 && (ent & PT64_BASE_ADDR_MASK) != hpa)
1364 printk(KERN_ERR "audit error: (%s) levels %d"
1365 " gva %lx gpa %llx hpa %llx ent %llx\n",
1366 audit_msg, vcpu->mmu.root_level,
1367 va, gpa, hpa, ent);
1368 }
1369 }
1370 }
1371
1372 static void audit_mappings(struct kvm_vcpu *vcpu)
1373 {
1374 unsigned i;
1375
1376 if (vcpu->mmu.root_level == 4)
1377 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1378 else
1379 for (i = 0; i < 4; ++i)
1380 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1381 audit_mappings_page(vcpu,
1382 vcpu->mmu.pae_root[i],
1383 i << 30,
1384 2);
1385 }
1386
1387 static int count_rmaps(struct kvm_vcpu *vcpu)
1388 {
1389 int nmaps = 0;
1390 int i, j, k;
1391
1392 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1393 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1394 struct kvm_rmap_desc *d;
1395
1396 for (j = 0; j < m->npages; ++j) {
1397 struct page *page = m->phys_mem[j];
1398
1399 if (!page->private)
1400 continue;
1401 if (!(page->private & 1)) {
1402 ++nmaps;
1403 continue;
1404 }
1405 d = (struct kvm_rmap_desc *)(page->private & ~1ul);
1406 while (d) {
1407 for (k = 0; k < RMAP_EXT; ++k)
1408 if (d->shadow_ptes[k])
1409 ++nmaps;
1410 else
1411 break;
1412 d = d->more;
1413 }
1414 }
1415 }
1416 return nmaps;
1417 }
1418
1419 static int count_writable_mappings(struct kvm_vcpu *vcpu)
1420 {
1421 int nmaps = 0;
1422 struct kvm_mmu_page *page;
1423 int i;
1424
1425 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1426 u64 *pt = __va(page->page_hpa);
1427
1428 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1429 continue;
1430
1431 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1432 u64 ent = pt[i];
1433
1434 if (!(ent & PT_PRESENT_MASK))
1435 continue;
1436 if (!(ent & PT_WRITABLE_MASK))
1437 continue;
1438 ++nmaps;
1439 }
1440 }
1441 return nmaps;
1442 }
1443
1444 static void audit_rmap(struct kvm_vcpu *vcpu)
1445 {
1446 int n_rmap = count_rmaps(vcpu);
1447 int n_actual = count_writable_mappings(vcpu);
1448
1449 if (n_rmap != n_actual)
1450 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1451 __FUNCTION__, audit_msg, n_rmap, n_actual);
1452 }
1453
1454 static void audit_write_protection(struct kvm_vcpu *vcpu)
1455 {
1456 struct kvm_mmu_page *page;
1457
1458 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1459 hfn_t hfn;
1460 struct page *pg;
1461
1462 if (page->role.metaphysical)
1463 continue;
1464
1465 hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
1466 >> PAGE_SHIFT;
1467 pg = pfn_to_page(hfn);
1468 if (pg->private)
1469 printk(KERN_ERR "%s: (%s) shadow page has writable"
1470 " mappings: gfn %lx role %x\n",
1471 __FUNCTION__, audit_msg, page->gfn,
1472 page->role.word);
1473 }
1474 }
1475
1476 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1477 {
1478 int olddbg = dbg;
1479
1480 dbg = 0;
1481 audit_msg = msg;
1482 audit_rmap(vcpu);
1483 audit_write_protection(vcpu);
1484 audit_mappings(vcpu);
1485 dbg = olddbg;
1486 }
1487
1488 #endif
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