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KVM: Use slab caches to allocate mmu data structures
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1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19 #include <linux/types.h>
20 #include <linux/string.h>
21 #include <asm/page.h>
22 #include <linux/mm.h>
23 #include <linux/highmem.h>
24 #include <linux/module.h>
25
26 #include "vmx.h"
27 #include "kvm.h"
28
29 #undef MMU_DEBUG
30
31 #undef AUDIT
32
33 #ifdef AUDIT
34 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
35 #else
36 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
37 #endif
38
39 #ifdef MMU_DEBUG
40
41 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
42 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
43
44 #else
45
46 #define pgprintk(x...) do { } while (0)
47 #define rmap_printk(x...) do { } while (0)
48
49 #endif
50
51 #if defined(MMU_DEBUG) || defined(AUDIT)
52 static int dbg = 1;
53 #endif
54
55 #define ASSERT(x) \
56 if (!(x)) { \
57 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
58 __FILE__, __LINE__, #x); \
59 }
60
61 #define PT64_PT_BITS 9
62 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
63 #define PT32_PT_BITS 10
64 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
65
66 #define PT_WRITABLE_SHIFT 1
67
68 #define PT_PRESENT_MASK (1ULL << 0)
69 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
70 #define PT_USER_MASK (1ULL << 2)
71 #define PT_PWT_MASK (1ULL << 3)
72 #define PT_PCD_MASK (1ULL << 4)
73 #define PT_ACCESSED_MASK (1ULL << 5)
74 #define PT_DIRTY_MASK (1ULL << 6)
75 #define PT_PAGE_SIZE_MASK (1ULL << 7)
76 #define PT_PAT_MASK (1ULL << 7)
77 #define PT_GLOBAL_MASK (1ULL << 8)
78 #define PT64_NX_MASK (1ULL << 63)
79
80 #define PT_PAT_SHIFT 7
81 #define PT_DIR_PAT_SHIFT 12
82 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
83
84 #define PT32_DIR_PSE36_SIZE 4
85 #define PT32_DIR_PSE36_SHIFT 13
86 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
87
88
89 #define PT32_PTE_COPY_MASK \
90 (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
91
92 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
93
94 #define PT_FIRST_AVAIL_BITS_SHIFT 9
95 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
96
97 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
98 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
99
100 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
101 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
102
103 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
104 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
105
106 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
107
108 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
109
110 #define PT64_LEVEL_BITS 9
111
112 #define PT64_LEVEL_SHIFT(level) \
113 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
114
115 #define PT64_LEVEL_MASK(level) \
116 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
117
118 #define PT64_INDEX(address, level)\
119 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
120
121
122 #define PT32_LEVEL_BITS 10
123
124 #define PT32_LEVEL_SHIFT(level) \
125 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
126
127 #define PT32_LEVEL_MASK(level) \
128 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
129
130 #define PT32_INDEX(address, level)\
131 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
132
133
134 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
135 #define PT64_DIR_BASE_ADDR_MASK \
136 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
137
138 #define PT32_BASE_ADDR_MASK PAGE_MASK
139 #define PT32_DIR_BASE_ADDR_MASK \
140 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
141
142
143 #define PFERR_PRESENT_MASK (1U << 0)
144 #define PFERR_WRITE_MASK (1U << 1)
145 #define PFERR_USER_MASK (1U << 2)
146 #define PFERR_FETCH_MASK (1U << 4)
147
148 #define PT64_ROOT_LEVEL 4
149 #define PT32_ROOT_LEVEL 2
150 #define PT32E_ROOT_LEVEL 3
151
152 #define PT_DIRECTORY_LEVEL 2
153 #define PT_PAGE_TABLE_LEVEL 1
154
155 #define RMAP_EXT 4
156
157 struct kvm_rmap_desc {
158 u64 *shadow_ptes[RMAP_EXT];
159 struct kvm_rmap_desc *more;
160 };
161
162 static struct kmem_cache *pte_chain_cache;
163 static struct kmem_cache *rmap_desc_cache;
164
165 static int is_write_protection(struct kvm_vcpu *vcpu)
166 {
167 return vcpu->cr0 & CR0_WP_MASK;
168 }
169
170 static int is_cpuid_PSE36(void)
171 {
172 return 1;
173 }
174
175 static int is_nx(struct kvm_vcpu *vcpu)
176 {
177 return vcpu->shadow_efer & EFER_NX;
178 }
179
180 static int is_present_pte(unsigned long pte)
181 {
182 return pte & PT_PRESENT_MASK;
183 }
184
185 static int is_writeble_pte(unsigned long pte)
186 {
187 return pte & PT_WRITABLE_MASK;
188 }
189
190 static int is_io_pte(unsigned long pte)
191 {
192 return pte & PT_SHADOW_IO_MARK;
193 }
194
195 static int is_rmap_pte(u64 pte)
196 {
197 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
198 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
199 }
200
201 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
202 struct kmem_cache *base_cache, int min)
203 {
204 void *obj;
205
206 if (cache->nobjs >= min)
207 return 0;
208 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
209 obj = kmem_cache_zalloc(base_cache, GFP_NOWAIT);
210 if (!obj)
211 return -ENOMEM;
212 cache->objects[cache->nobjs++] = obj;
213 }
214 return 0;
215 }
216
217 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
218 {
219 while (mc->nobjs)
220 kfree(mc->objects[--mc->nobjs]);
221 }
222
223 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
224 {
225 int r;
226
227 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
228 pte_chain_cache, 4);
229 if (r)
230 goto out;
231 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
232 rmap_desc_cache, 1);
233 out:
234 return r;
235 }
236
237 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
238 {
239 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
240 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
241 }
242
243 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
244 size_t size)
245 {
246 void *p;
247
248 BUG_ON(!mc->nobjs);
249 p = mc->objects[--mc->nobjs];
250 memset(p, 0, size);
251 return p;
252 }
253
254 static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj)
255 {
256 if (mc->nobjs < KVM_NR_MEM_OBJS)
257 mc->objects[mc->nobjs++] = obj;
258 else
259 kfree(obj);
260 }
261
262 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
263 {
264 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
265 sizeof(struct kvm_pte_chain));
266 }
267
268 static void mmu_free_pte_chain(struct kvm_vcpu *vcpu,
269 struct kvm_pte_chain *pc)
270 {
271 mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc);
272 }
273
274 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
275 {
276 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
277 sizeof(struct kvm_rmap_desc));
278 }
279
280 static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu,
281 struct kvm_rmap_desc *rd)
282 {
283 mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd);
284 }
285
286 /*
287 * Reverse mapping data structures:
288 *
289 * If page->private bit zero is zero, then page->private points to the
290 * shadow page table entry that points to page_address(page).
291 *
292 * If page->private bit zero is one, (then page->private & ~1) points
293 * to a struct kvm_rmap_desc containing more mappings.
294 */
295 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
296 {
297 struct page *page;
298 struct kvm_rmap_desc *desc;
299 int i;
300
301 if (!is_rmap_pte(*spte))
302 return;
303 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
304 if (!page_private(page)) {
305 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
306 set_page_private(page,(unsigned long)spte);
307 } else if (!(page_private(page) & 1)) {
308 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
309 desc = mmu_alloc_rmap_desc(vcpu);
310 desc->shadow_ptes[0] = (u64 *)page_private(page);
311 desc->shadow_ptes[1] = spte;
312 set_page_private(page,(unsigned long)desc | 1);
313 } else {
314 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
315 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
316 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
317 desc = desc->more;
318 if (desc->shadow_ptes[RMAP_EXT-1]) {
319 desc->more = mmu_alloc_rmap_desc(vcpu);
320 desc = desc->more;
321 }
322 for (i = 0; desc->shadow_ptes[i]; ++i)
323 ;
324 desc->shadow_ptes[i] = spte;
325 }
326 }
327
328 static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu,
329 struct page *page,
330 struct kvm_rmap_desc *desc,
331 int i,
332 struct kvm_rmap_desc *prev_desc)
333 {
334 int j;
335
336 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
337 ;
338 desc->shadow_ptes[i] = desc->shadow_ptes[j];
339 desc->shadow_ptes[j] = NULL;
340 if (j != 0)
341 return;
342 if (!prev_desc && !desc->more)
343 set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
344 else
345 if (prev_desc)
346 prev_desc->more = desc->more;
347 else
348 set_page_private(page,(unsigned long)desc->more | 1);
349 mmu_free_rmap_desc(vcpu, desc);
350 }
351
352 static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte)
353 {
354 struct page *page;
355 struct kvm_rmap_desc *desc;
356 struct kvm_rmap_desc *prev_desc;
357 int i;
358
359 if (!is_rmap_pte(*spte))
360 return;
361 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
362 if (!page_private(page)) {
363 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
364 BUG();
365 } else if (!(page_private(page) & 1)) {
366 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
367 if ((u64 *)page_private(page) != spte) {
368 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
369 spte, *spte);
370 BUG();
371 }
372 set_page_private(page,0);
373 } else {
374 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
375 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
376 prev_desc = NULL;
377 while (desc) {
378 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
379 if (desc->shadow_ptes[i] == spte) {
380 rmap_desc_remove_entry(vcpu, page,
381 desc, i,
382 prev_desc);
383 return;
384 }
385 prev_desc = desc;
386 desc = desc->more;
387 }
388 BUG();
389 }
390 }
391
392 static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
393 {
394 struct kvm *kvm = vcpu->kvm;
395 struct page *page;
396 struct kvm_rmap_desc *desc;
397 u64 *spte;
398
399 page = gfn_to_page(kvm, gfn);
400 BUG_ON(!page);
401
402 while (page_private(page)) {
403 if (!(page_private(page) & 1))
404 spte = (u64 *)page_private(page);
405 else {
406 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
407 spte = desc->shadow_ptes[0];
408 }
409 BUG_ON(!spte);
410 BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
411 != page_to_pfn(page));
412 BUG_ON(!(*spte & PT_PRESENT_MASK));
413 BUG_ON(!(*spte & PT_WRITABLE_MASK));
414 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
415 rmap_remove(vcpu, spte);
416 kvm_arch_ops->tlb_flush(vcpu);
417 *spte &= ~(u64)PT_WRITABLE_MASK;
418 }
419 }
420
421 static int is_empty_shadow_page(hpa_t page_hpa)
422 {
423 u64 *pos;
424 u64 *end;
425
426 for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u64);
427 pos != end; pos++)
428 if (*pos != 0) {
429 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
430 pos, *pos);
431 return 0;
432 }
433 return 1;
434 }
435
436 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
437 {
438 struct kvm_mmu_page *page_head = page_header(page_hpa);
439
440 ASSERT(is_empty_shadow_page(page_hpa));
441 page_head->page_hpa = page_hpa;
442 list_move(&page_head->link, &vcpu->free_pages);
443 ++vcpu->kvm->n_free_mmu_pages;
444 }
445
446 static unsigned kvm_page_table_hashfn(gfn_t gfn)
447 {
448 return gfn;
449 }
450
451 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
452 u64 *parent_pte)
453 {
454 struct kvm_mmu_page *page;
455
456 if (list_empty(&vcpu->free_pages))
457 return NULL;
458
459 page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
460 list_move(&page->link, &vcpu->kvm->active_mmu_pages);
461 ASSERT(is_empty_shadow_page(page->page_hpa));
462 page->slot_bitmap = 0;
463 page->multimapped = 0;
464 page->parent_pte = parent_pte;
465 --vcpu->kvm->n_free_mmu_pages;
466 return page;
467 }
468
469 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
470 struct kvm_mmu_page *page, u64 *parent_pte)
471 {
472 struct kvm_pte_chain *pte_chain;
473 struct hlist_node *node;
474 int i;
475
476 if (!parent_pte)
477 return;
478 if (!page->multimapped) {
479 u64 *old = page->parent_pte;
480
481 if (!old) {
482 page->parent_pte = parent_pte;
483 return;
484 }
485 page->multimapped = 1;
486 pte_chain = mmu_alloc_pte_chain(vcpu);
487 INIT_HLIST_HEAD(&page->parent_ptes);
488 hlist_add_head(&pte_chain->link, &page->parent_ptes);
489 pte_chain->parent_ptes[0] = old;
490 }
491 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
492 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
493 continue;
494 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
495 if (!pte_chain->parent_ptes[i]) {
496 pte_chain->parent_ptes[i] = parent_pte;
497 return;
498 }
499 }
500 pte_chain = mmu_alloc_pte_chain(vcpu);
501 BUG_ON(!pte_chain);
502 hlist_add_head(&pte_chain->link, &page->parent_ptes);
503 pte_chain->parent_ptes[0] = parent_pte;
504 }
505
506 static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu,
507 struct kvm_mmu_page *page,
508 u64 *parent_pte)
509 {
510 struct kvm_pte_chain *pte_chain;
511 struct hlist_node *node;
512 int i;
513
514 if (!page->multimapped) {
515 BUG_ON(page->parent_pte != parent_pte);
516 page->parent_pte = NULL;
517 return;
518 }
519 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
520 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
521 if (!pte_chain->parent_ptes[i])
522 break;
523 if (pte_chain->parent_ptes[i] != parent_pte)
524 continue;
525 while (i + 1 < NR_PTE_CHAIN_ENTRIES
526 && pte_chain->parent_ptes[i + 1]) {
527 pte_chain->parent_ptes[i]
528 = pte_chain->parent_ptes[i + 1];
529 ++i;
530 }
531 pte_chain->parent_ptes[i] = NULL;
532 if (i == 0) {
533 hlist_del(&pte_chain->link);
534 mmu_free_pte_chain(vcpu, pte_chain);
535 if (hlist_empty(&page->parent_ptes)) {
536 page->multimapped = 0;
537 page->parent_pte = NULL;
538 }
539 }
540 return;
541 }
542 BUG();
543 }
544
545 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
546 gfn_t gfn)
547 {
548 unsigned index;
549 struct hlist_head *bucket;
550 struct kvm_mmu_page *page;
551 struct hlist_node *node;
552
553 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
554 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
555 bucket = &vcpu->kvm->mmu_page_hash[index];
556 hlist_for_each_entry(page, node, bucket, hash_link)
557 if (page->gfn == gfn && !page->role.metaphysical) {
558 pgprintk("%s: found role %x\n",
559 __FUNCTION__, page->role.word);
560 return page;
561 }
562 return NULL;
563 }
564
565 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
566 gfn_t gfn,
567 gva_t gaddr,
568 unsigned level,
569 int metaphysical,
570 unsigned hugepage_access,
571 u64 *parent_pte)
572 {
573 union kvm_mmu_page_role role;
574 unsigned index;
575 unsigned quadrant;
576 struct hlist_head *bucket;
577 struct kvm_mmu_page *page;
578 struct hlist_node *node;
579
580 role.word = 0;
581 role.glevels = vcpu->mmu.root_level;
582 role.level = level;
583 role.metaphysical = metaphysical;
584 role.hugepage_access = hugepage_access;
585 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
586 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
587 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
588 role.quadrant = quadrant;
589 }
590 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
591 gfn, role.word);
592 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
593 bucket = &vcpu->kvm->mmu_page_hash[index];
594 hlist_for_each_entry(page, node, bucket, hash_link)
595 if (page->gfn == gfn && page->role.word == role.word) {
596 mmu_page_add_parent_pte(vcpu, page, parent_pte);
597 pgprintk("%s: found\n", __FUNCTION__);
598 return page;
599 }
600 page = kvm_mmu_alloc_page(vcpu, parent_pte);
601 if (!page)
602 return page;
603 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
604 page->gfn = gfn;
605 page->role = role;
606 hlist_add_head(&page->hash_link, bucket);
607 if (!metaphysical)
608 rmap_write_protect(vcpu, gfn);
609 return page;
610 }
611
612 static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
613 struct kvm_mmu_page *page)
614 {
615 unsigned i;
616 u64 *pt;
617 u64 ent;
618
619 pt = __va(page->page_hpa);
620
621 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
622 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
623 if (pt[i] & PT_PRESENT_MASK)
624 rmap_remove(vcpu, &pt[i]);
625 pt[i] = 0;
626 }
627 kvm_arch_ops->tlb_flush(vcpu);
628 return;
629 }
630
631 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
632 ent = pt[i];
633
634 pt[i] = 0;
635 if (!(ent & PT_PRESENT_MASK))
636 continue;
637 ent &= PT64_BASE_ADDR_MASK;
638 mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]);
639 }
640 }
641
642 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
643 struct kvm_mmu_page *page,
644 u64 *parent_pte)
645 {
646 mmu_page_remove_parent_pte(vcpu, page, parent_pte);
647 }
648
649 static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
650 struct kvm_mmu_page *page)
651 {
652 u64 *parent_pte;
653
654 while (page->multimapped || page->parent_pte) {
655 if (!page->multimapped)
656 parent_pte = page->parent_pte;
657 else {
658 struct kvm_pte_chain *chain;
659
660 chain = container_of(page->parent_ptes.first,
661 struct kvm_pte_chain, link);
662 parent_pte = chain->parent_ptes[0];
663 }
664 BUG_ON(!parent_pte);
665 kvm_mmu_put_page(vcpu, page, parent_pte);
666 *parent_pte = 0;
667 }
668 kvm_mmu_page_unlink_children(vcpu, page);
669 if (!page->root_count) {
670 hlist_del(&page->hash_link);
671 kvm_mmu_free_page(vcpu, page->page_hpa);
672 } else
673 list_move(&page->link, &vcpu->kvm->active_mmu_pages);
674 }
675
676 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
677 {
678 unsigned index;
679 struct hlist_head *bucket;
680 struct kvm_mmu_page *page;
681 struct hlist_node *node, *n;
682 int r;
683
684 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
685 r = 0;
686 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
687 bucket = &vcpu->kvm->mmu_page_hash[index];
688 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
689 if (page->gfn == gfn && !page->role.metaphysical) {
690 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
691 page->role.word);
692 kvm_mmu_zap_page(vcpu, page);
693 r = 1;
694 }
695 return r;
696 }
697
698 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
699 {
700 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
701 struct kvm_mmu_page *page_head = page_header(__pa(pte));
702
703 __set_bit(slot, &page_head->slot_bitmap);
704 }
705
706 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
707 {
708 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
709
710 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
711 }
712
713 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
714 {
715 struct page *page;
716
717 ASSERT((gpa & HPA_ERR_MASK) == 0);
718 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
719 if (!page)
720 return gpa | HPA_ERR_MASK;
721 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
722 | (gpa & (PAGE_SIZE-1));
723 }
724
725 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
726 {
727 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
728
729 if (gpa == UNMAPPED_GVA)
730 return UNMAPPED_GVA;
731 return gpa_to_hpa(vcpu, gpa);
732 }
733
734 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
735 {
736 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
737
738 if (gpa == UNMAPPED_GVA)
739 return NULL;
740 return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
741 }
742
743 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
744 {
745 }
746
747 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
748 {
749 int level = PT32E_ROOT_LEVEL;
750 hpa_t table_addr = vcpu->mmu.root_hpa;
751
752 for (; ; level--) {
753 u32 index = PT64_INDEX(v, level);
754 u64 *table;
755 u64 pte;
756
757 ASSERT(VALID_PAGE(table_addr));
758 table = __va(table_addr);
759
760 if (level == 1) {
761 pte = table[index];
762 if (is_present_pte(pte) && is_writeble_pte(pte))
763 return 0;
764 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
765 page_header_update_slot(vcpu->kvm, table, v);
766 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
767 PT_USER_MASK;
768 rmap_add(vcpu, &table[index]);
769 return 0;
770 }
771
772 if (table[index] == 0) {
773 struct kvm_mmu_page *new_table;
774 gfn_t pseudo_gfn;
775
776 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
777 >> PAGE_SHIFT;
778 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
779 v, level - 1,
780 1, 0, &table[index]);
781 if (!new_table) {
782 pgprintk("nonpaging_map: ENOMEM\n");
783 return -ENOMEM;
784 }
785
786 table[index] = new_table->page_hpa | PT_PRESENT_MASK
787 | PT_WRITABLE_MASK | PT_USER_MASK;
788 }
789 table_addr = table[index] & PT64_BASE_ADDR_MASK;
790 }
791 }
792
793 static void mmu_free_roots(struct kvm_vcpu *vcpu)
794 {
795 int i;
796 struct kvm_mmu_page *page;
797
798 #ifdef CONFIG_X86_64
799 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
800 hpa_t root = vcpu->mmu.root_hpa;
801
802 ASSERT(VALID_PAGE(root));
803 page = page_header(root);
804 --page->root_count;
805 vcpu->mmu.root_hpa = INVALID_PAGE;
806 return;
807 }
808 #endif
809 for (i = 0; i < 4; ++i) {
810 hpa_t root = vcpu->mmu.pae_root[i];
811
812 if (root) {
813 ASSERT(VALID_PAGE(root));
814 root &= PT64_BASE_ADDR_MASK;
815 page = page_header(root);
816 --page->root_count;
817 }
818 vcpu->mmu.pae_root[i] = INVALID_PAGE;
819 }
820 vcpu->mmu.root_hpa = INVALID_PAGE;
821 }
822
823 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
824 {
825 int i;
826 gfn_t root_gfn;
827 struct kvm_mmu_page *page;
828
829 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
830
831 #ifdef CONFIG_X86_64
832 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
833 hpa_t root = vcpu->mmu.root_hpa;
834
835 ASSERT(!VALID_PAGE(root));
836 page = kvm_mmu_get_page(vcpu, root_gfn, 0,
837 PT64_ROOT_LEVEL, 0, 0, NULL);
838 root = page->page_hpa;
839 ++page->root_count;
840 vcpu->mmu.root_hpa = root;
841 return;
842 }
843 #endif
844 for (i = 0; i < 4; ++i) {
845 hpa_t root = vcpu->mmu.pae_root[i];
846
847 ASSERT(!VALID_PAGE(root));
848 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
849 if (!is_present_pte(vcpu->pdptrs[i])) {
850 vcpu->mmu.pae_root[i] = 0;
851 continue;
852 }
853 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
854 } else if (vcpu->mmu.root_level == 0)
855 root_gfn = 0;
856 page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
857 PT32_ROOT_LEVEL, !is_paging(vcpu),
858 0, NULL);
859 root = page->page_hpa;
860 ++page->root_count;
861 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
862 }
863 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
864 }
865
866 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
867 {
868 return vaddr;
869 }
870
871 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
872 u32 error_code)
873 {
874 gpa_t addr = gva;
875 hpa_t paddr;
876 int r;
877
878 r = mmu_topup_memory_caches(vcpu);
879 if (r)
880 return r;
881
882 ASSERT(vcpu);
883 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
884
885
886 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
887
888 if (is_error_hpa(paddr))
889 return 1;
890
891 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
892 }
893
894 static void nonpaging_free(struct kvm_vcpu *vcpu)
895 {
896 mmu_free_roots(vcpu);
897 }
898
899 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
900 {
901 struct kvm_mmu *context = &vcpu->mmu;
902
903 context->new_cr3 = nonpaging_new_cr3;
904 context->page_fault = nonpaging_page_fault;
905 context->gva_to_gpa = nonpaging_gva_to_gpa;
906 context->free = nonpaging_free;
907 context->root_level = 0;
908 context->shadow_root_level = PT32E_ROOT_LEVEL;
909 mmu_alloc_roots(vcpu);
910 ASSERT(VALID_PAGE(context->root_hpa));
911 kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
912 return 0;
913 }
914
915 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
916 {
917 ++kvm_stat.tlb_flush;
918 kvm_arch_ops->tlb_flush(vcpu);
919 }
920
921 static void paging_new_cr3(struct kvm_vcpu *vcpu)
922 {
923 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
924 mmu_free_roots(vcpu);
925 if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
926 kvm_mmu_free_some_pages(vcpu);
927 mmu_alloc_roots(vcpu);
928 kvm_mmu_flush_tlb(vcpu);
929 kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
930 }
931
932 static inline void set_pte_common(struct kvm_vcpu *vcpu,
933 u64 *shadow_pte,
934 gpa_t gaddr,
935 int dirty,
936 u64 access_bits,
937 gfn_t gfn)
938 {
939 hpa_t paddr;
940
941 *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
942 if (!dirty)
943 access_bits &= ~PT_WRITABLE_MASK;
944
945 paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
946
947 *shadow_pte |= access_bits;
948
949 if (is_error_hpa(paddr)) {
950 *shadow_pte |= gaddr;
951 *shadow_pte |= PT_SHADOW_IO_MARK;
952 *shadow_pte &= ~PT_PRESENT_MASK;
953 return;
954 }
955
956 *shadow_pte |= paddr;
957
958 if (access_bits & PT_WRITABLE_MASK) {
959 struct kvm_mmu_page *shadow;
960
961 shadow = kvm_mmu_lookup_page(vcpu, gfn);
962 if (shadow) {
963 pgprintk("%s: found shadow page for %lx, marking ro\n",
964 __FUNCTION__, gfn);
965 access_bits &= ~PT_WRITABLE_MASK;
966 if (is_writeble_pte(*shadow_pte)) {
967 *shadow_pte &= ~PT_WRITABLE_MASK;
968 kvm_arch_ops->tlb_flush(vcpu);
969 }
970 }
971 }
972
973 if (access_bits & PT_WRITABLE_MASK)
974 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
975
976 page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
977 rmap_add(vcpu, shadow_pte);
978 }
979
980 static void inject_page_fault(struct kvm_vcpu *vcpu,
981 u64 addr,
982 u32 err_code)
983 {
984 kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
985 }
986
987 static inline int fix_read_pf(u64 *shadow_ent)
988 {
989 if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
990 !(*shadow_ent & PT_USER_MASK)) {
991 /*
992 * If supervisor write protect is disabled, we shadow kernel
993 * pages as user pages so we can trap the write access.
994 */
995 *shadow_ent |= PT_USER_MASK;
996 *shadow_ent &= ~PT_WRITABLE_MASK;
997
998 return 1;
999
1000 }
1001 return 0;
1002 }
1003
1004 static void paging_free(struct kvm_vcpu *vcpu)
1005 {
1006 nonpaging_free(vcpu);
1007 }
1008
1009 #define PTTYPE 64
1010 #include "paging_tmpl.h"
1011 #undef PTTYPE
1012
1013 #define PTTYPE 32
1014 #include "paging_tmpl.h"
1015 #undef PTTYPE
1016
1017 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
1018 {
1019 struct kvm_mmu *context = &vcpu->mmu;
1020
1021 ASSERT(is_pae(vcpu));
1022 context->new_cr3 = paging_new_cr3;
1023 context->page_fault = paging64_page_fault;
1024 context->gva_to_gpa = paging64_gva_to_gpa;
1025 context->free = paging_free;
1026 context->root_level = level;
1027 context->shadow_root_level = level;
1028 mmu_alloc_roots(vcpu);
1029 ASSERT(VALID_PAGE(context->root_hpa));
1030 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1031 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1032 return 0;
1033 }
1034
1035 static int paging64_init_context(struct kvm_vcpu *vcpu)
1036 {
1037 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1038 }
1039
1040 static int paging32_init_context(struct kvm_vcpu *vcpu)
1041 {
1042 struct kvm_mmu *context = &vcpu->mmu;
1043
1044 context->new_cr3 = paging_new_cr3;
1045 context->page_fault = paging32_page_fault;
1046 context->gva_to_gpa = paging32_gva_to_gpa;
1047 context->free = paging_free;
1048 context->root_level = PT32_ROOT_LEVEL;
1049 context->shadow_root_level = PT32E_ROOT_LEVEL;
1050 mmu_alloc_roots(vcpu);
1051 ASSERT(VALID_PAGE(context->root_hpa));
1052 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1053 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1054 return 0;
1055 }
1056
1057 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1058 {
1059 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1060 }
1061
1062 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1063 {
1064 ASSERT(vcpu);
1065 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1066
1067 if (!is_paging(vcpu))
1068 return nonpaging_init_context(vcpu);
1069 else if (is_long_mode(vcpu))
1070 return paging64_init_context(vcpu);
1071 else if (is_pae(vcpu))
1072 return paging32E_init_context(vcpu);
1073 else
1074 return paging32_init_context(vcpu);
1075 }
1076
1077 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1078 {
1079 ASSERT(vcpu);
1080 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1081 vcpu->mmu.free(vcpu);
1082 vcpu->mmu.root_hpa = INVALID_PAGE;
1083 }
1084 }
1085
1086 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1087 {
1088 int r;
1089
1090 destroy_kvm_mmu(vcpu);
1091 r = init_kvm_mmu(vcpu);
1092 if (r < 0)
1093 goto out;
1094 r = mmu_topup_memory_caches(vcpu);
1095 out:
1096 return r;
1097 }
1098
1099 static void mmu_pre_write_zap_pte(struct kvm_vcpu *vcpu,
1100 struct kvm_mmu_page *page,
1101 u64 *spte)
1102 {
1103 u64 pte;
1104 struct kvm_mmu_page *child;
1105
1106 pte = *spte;
1107 if (is_present_pte(pte)) {
1108 if (page->role.level == PT_PAGE_TABLE_LEVEL)
1109 rmap_remove(vcpu, spte);
1110 else {
1111 child = page_header(pte & PT64_BASE_ADDR_MASK);
1112 mmu_page_remove_parent_pte(vcpu, child, spte);
1113 }
1114 }
1115 *spte = 0;
1116 }
1117
1118 void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1119 {
1120 gfn_t gfn = gpa >> PAGE_SHIFT;
1121 struct kvm_mmu_page *page;
1122 struct hlist_node *node, *n;
1123 struct hlist_head *bucket;
1124 unsigned index;
1125 u64 *spte;
1126 unsigned offset = offset_in_page(gpa);
1127 unsigned pte_size;
1128 unsigned page_offset;
1129 unsigned misaligned;
1130 int level;
1131 int flooded = 0;
1132 int npte;
1133
1134 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1135 if (gfn == vcpu->last_pt_write_gfn) {
1136 ++vcpu->last_pt_write_count;
1137 if (vcpu->last_pt_write_count >= 3)
1138 flooded = 1;
1139 } else {
1140 vcpu->last_pt_write_gfn = gfn;
1141 vcpu->last_pt_write_count = 1;
1142 }
1143 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1144 bucket = &vcpu->kvm->mmu_page_hash[index];
1145 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
1146 if (page->gfn != gfn || page->role.metaphysical)
1147 continue;
1148 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1149 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1150 if (misaligned || flooded) {
1151 /*
1152 * Misaligned accesses are too much trouble to fix
1153 * up; also, they usually indicate a page is not used
1154 * as a page table.
1155 *
1156 * If we're seeing too many writes to a page,
1157 * it may no longer be a page table, or we may be
1158 * forking, in which case it is better to unmap the
1159 * page.
1160 */
1161 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1162 gpa, bytes, page->role.word);
1163 kvm_mmu_zap_page(vcpu, page);
1164 continue;
1165 }
1166 page_offset = offset;
1167 level = page->role.level;
1168 npte = 1;
1169 if (page->role.glevels == PT32_ROOT_LEVEL) {
1170 page_offset <<= 1; /* 32->64 */
1171 /*
1172 * A 32-bit pde maps 4MB while the shadow pdes map
1173 * only 2MB. So we need to double the offset again
1174 * and zap two pdes instead of one.
1175 */
1176 if (level == PT32_ROOT_LEVEL) {
1177 page_offset &= ~7; /* kill rounding error */
1178 page_offset <<= 1;
1179 npte = 2;
1180 }
1181 page_offset &= ~PAGE_MASK;
1182 }
1183 spte = __va(page->page_hpa);
1184 spte += page_offset / sizeof(*spte);
1185 while (npte--) {
1186 mmu_pre_write_zap_pte(vcpu, page, spte);
1187 ++spte;
1188 }
1189 }
1190 }
1191
1192 void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1193 {
1194 }
1195
1196 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1197 {
1198 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1199
1200 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1201 }
1202
1203 void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1204 {
1205 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1206 struct kvm_mmu_page *page;
1207
1208 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1209 struct kvm_mmu_page, link);
1210 kvm_mmu_zap_page(vcpu, page);
1211 }
1212 }
1213 EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
1214
1215 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1216 {
1217 struct kvm_mmu_page *page;
1218
1219 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1220 page = container_of(vcpu->kvm->active_mmu_pages.next,
1221 struct kvm_mmu_page, link);
1222 kvm_mmu_zap_page(vcpu, page);
1223 }
1224 while (!list_empty(&vcpu->free_pages)) {
1225 page = list_entry(vcpu->free_pages.next,
1226 struct kvm_mmu_page, link);
1227 list_del(&page->link);
1228 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
1229 page->page_hpa = INVALID_PAGE;
1230 }
1231 free_page((unsigned long)vcpu->mmu.pae_root);
1232 }
1233
1234 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1235 {
1236 struct page *page;
1237 int i;
1238
1239 ASSERT(vcpu);
1240
1241 for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
1242 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
1243
1244 INIT_LIST_HEAD(&page_header->link);
1245 if ((page = alloc_page(GFP_KERNEL)) == NULL)
1246 goto error_1;
1247 set_page_private(page, (unsigned long)page_header);
1248 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
1249 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
1250 list_add(&page_header->link, &vcpu->free_pages);
1251 ++vcpu->kvm->n_free_mmu_pages;
1252 }
1253
1254 /*
1255 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1256 * Therefore we need to allocate shadow page tables in the first
1257 * 4GB of memory, which happens to fit the DMA32 zone.
1258 */
1259 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1260 if (!page)
1261 goto error_1;
1262 vcpu->mmu.pae_root = page_address(page);
1263 for (i = 0; i < 4; ++i)
1264 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1265
1266 return 0;
1267
1268 error_1:
1269 free_mmu_pages(vcpu);
1270 return -ENOMEM;
1271 }
1272
1273 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1274 {
1275 ASSERT(vcpu);
1276 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1277 ASSERT(list_empty(&vcpu->free_pages));
1278
1279 return alloc_mmu_pages(vcpu);
1280 }
1281
1282 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1283 {
1284 ASSERT(vcpu);
1285 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1286 ASSERT(!list_empty(&vcpu->free_pages));
1287
1288 return init_kvm_mmu(vcpu);
1289 }
1290
1291 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1292 {
1293 ASSERT(vcpu);
1294
1295 destroy_kvm_mmu(vcpu);
1296 free_mmu_pages(vcpu);
1297 mmu_free_memory_caches(vcpu);
1298 }
1299
1300 void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot)
1301 {
1302 struct kvm *kvm = vcpu->kvm;
1303 struct kvm_mmu_page *page;
1304
1305 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1306 int i;
1307 u64 *pt;
1308
1309 if (!test_bit(slot, &page->slot_bitmap))
1310 continue;
1311
1312 pt = __va(page->page_hpa);
1313 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1314 /* avoid RMW */
1315 if (pt[i] & PT_WRITABLE_MASK) {
1316 rmap_remove(vcpu, &pt[i]);
1317 pt[i] &= ~PT_WRITABLE_MASK;
1318 }
1319 }
1320 }
1321
1322 void kvm_mmu_zap_all(struct kvm_vcpu *vcpu)
1323 {
1324 destroy_kvm_mmu(vcpu);
1325
1326 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1327 struct kvm_mmu_page *page;
1328
1329 page = container_of(vcpu->kvm->active_mmu_pages.next,
1330 struct kvm_mmu_page, link);
1331 kvm_mmu_zap_page(vcpu, page);
1332 }
1333
1334 mmu_free_memory_caches(vcpu);
1335 kvm_arch_ops->tlb_flush(vcpu);
1336 init_kvm_mmu(vcpu);
1337 }
1338
1339 void kvm_mmu_module_exit(void)
1340 {
1341 if (pte_chain_cache)
1342 kmem_cache_destroy(pte_chain_cache);
1343 if (rmap_desc_cache)
1344 kmem_cache_destroy(rmap_desc_cache);
1345 }
1346
1347 int kvm_mmu_module_init(void)
1348 {
1349 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1350 sizeof(struct kvm_pte_chain),
1351 0, 0, NULL, NULL);
1352 if (!pte_chain_cache)
1353 goto nomem;
1354 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1355 sizeof(struct kvm_rmap_desc),
1356 0, 0, NULL, NULL);
1357 if (!rmap_desc_cache)
1358 goto nomem;
1359
1360 return 0;
1361
1362 nomem:
1363 kvm_mmu_module_exit();
1364 return -ENOMEM;
1365 }
1366
1367 #ifdef AUDIT
1368
1369 static const char *audit_msg;
1370
1371 static gva_t canonicalize(gva_t gva)
1372 {
1373 #ifdef CONFIG_X86_64
1374 gva = (long long)(gva << 16) >> 16;
1375 #endif
1376 return gva;
1377 }
1378
1379 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1380 gva_t va, int level)
1381 {
1382 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1383 int i;
1384 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1385
1386 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1387 u64 ent = pt[i];
1388
1389 if (!ent & PT_PRESENT_MASK)
1390 continue;
1391
1392 va = canonicalize(va);
1393 if (level > 1)
1394 audit_mappings_page(vcpu, ent, va, level - 1);
1395 else {
1396 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1397 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
1398
1399 if ((ent & PT_PRESENT_MASK)
1400 && (ent & PT64_BASE_ADDR_MASK) != hpa)
1401 printk(KERN_ERR "audit error: (%s) levels %d"
1402 " gva %lx gpa %llx hpa %llx ent %llx\n",
1403 audit_msg, vcpu->mmu.root_level,
1404 va, gpa, hpa, ent);
1405 }
1406 }
1407 }
1408
1409 static void audit_mappings(struct kvm_vcpu *vcpu)
1410 {
1411 unsigned i;
1412
1413 if (vcpu->mmu.root_level == 4)
1414 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1415 else
1416 for (i = 0; i < 4; ++i)
1417 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1418 audit_mappings_page(vcpu,
1419 vcpu->mmu.pae_root[i],
1420 i << 30,
1421 2);
1422 }
1423
1424 static int count_rmaps(struct kvm_vcpu *vcpu)
1425 {
1426 int nmaps = 0;
1427 int i, j, k;
1428
1429 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1430 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1431 struct kvm_rmap_desc *d;
1432
1433 for (j = 0; j < m->npages; ++j) {
1434 struct page *page = m->phys_mem[j];
1435
1436 if (!page->private)
1437 continue;
1438 if (!(page->private & 1)) {
1439 ++nmaps;
1440 continue;
1441 }
1442 d = (struct kvm_rmap_desc *)(page->private & ~1ul);
1443 while (d) {
1444 for (k = 0; k < RMAP_EXT; ++k)
1445 if (d->shadow_ptes[k])
1446 ++nmaps;
1447 else
1448 break;
1449 d = d->more;
1450 }
1451 }
1452 }
1453 return nmaps;
1454 }
1455
1456 static int count_writable_mappings(struct kvm_vcpu *vcpu)
1457 {
1458 int nmaps = 0;
1459 struct kvm_mmu_page *page;
1460 int i;
1461
1462 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1463 u64 *pt = __va(page->page_hpa);
1464
1465 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1466 continue;
1467
1468 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1469 u64 ent = pt[i];
1470
1471 if (!(ent & PT_PRESENT_MASK))
1472 continue;
1473 if (!(ent & PT_WRITABLE_MASK))
1474 continue;
1475 ++nmaps;
1476 }
1477 }
1478 return nmaps;
1479 }
1480
1481 static void audit_rmap(struct kvm_vcpu *vcpu)
1482 {
1483 int n_rmap = count_rmaps(vcpu);
1484 int n_actual = count_writable_mappings(vcpu);
1485
1486 if (n_rmap != n_actual)
1487 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1488 __FUNCTION__, audit_msg, n_rmap, n_actual);
1489 }
1490
1491 static void audit_write_protection(struct kvm_vcpu *vcpu)
1492 {
1493 struct kvm_mmu_page *page;
1494
1495 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1496 hfn_t hfn;
1497 struct page *pg;
1498
1499 if (page->role.metaphysical)
1500 continue;
1501
1502 hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
1503 >> PAGE_SHIFT;
1504 pg = pfn_to_page(hfn);
1505 if (pg->private)
1506 printk(KERN_ERR "%s: (%s) shadow page has writable"
1507 " mappings: gfn %lx role %x\n",
1508 __FUNCTION__, audit_msg, page->gfn,
1509 page->role.word);
1510 }
1511 }
1512
1513 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1514 {
1515 int olddbg = dbg;
1516
1517 dbg = 0;
1518 audit_msg = msg;
1519 audit_rmap(vcpu);
1520 audit_write_protection(vcpu);
1521 audit_mappings(vcpu);
1522 dbg = olddbg;
1523 }
1524
1525 #endif