2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
7 * Copyright (C) 2006 Qumranet, Inc.
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
21 #include <linux/module.h>
23 #include <linux/highmem.h>
27 #include "segment_descriptor.h"
30 MODULE_AUTHOR("Qumranet");
31 MODULE_LICENSE("GPL");
33 static DEFINE_PER_CPU(struct vmcs
*, vmxarea
);
34 static DEFINE_PER_CPU(struct vmcs
*, current_vmcs
);
42 static struct vmcs_descriptor
{
48 #define VMX_SEGMENT_FIELD(seg) \
49 [VCPU_SREG_##seg] = { \
50 .selector = GUEST_##seg##_SELECTOR, \
51 .base = GUEST_##seg##_BASE, \
52 .limit = GUEST_##seg##_LIMIT, \
53 .ar_bytes = GUEST_##seg##_AR_BYTES, \
56 static struct kvm_vmx_segment_field
{
61 } kvm_vmx_segment_fields
[] = {
62 VMX_SEGMENT_FIELD(CS
),
63 VMX_SEGMENT_FIELD(DS
),
64 VMX_SEGMENT_FIELD(ES
),
65 VMX_SEGMENT_FIELD(FS
),
66 VMX_SEGMENT_FIELD(GS
),
67 VMX_SEGMENT_FIELD(SS
),
68 VMX_SEGMENT_FIELD(TR
),
69 VMX_SEGMENT_FIELD(LDTR
),
72 static const u32 vmx_msr_index
[] = {
74 MSR_SYSCALL_MASK
, MSR_LSTAR
, MSR_CSTAR
, MSR_KERNEL_GS_BASE
,
76 MSR_EFER
, MSR_K6_STAR
,
78 #define NR_VMX_MSR (sizeof(vmx_msr_index) / sizeof(*vmx_msr_index))
80 static inline int is_page_fault(u32 intr_info
)
82 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
83 INTR_INFO_VALID_MASK
)) ==
84 (INTR_TYPE_EXCEPTION
| PF_VECTOR
| INTR_INFO_VALID_MASK
);
87 static inline int is_external_interrupt(u32 intr_info
)
89 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VALID_MASK
))
90 == (INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
93 static struct vmx_msr_entry
*find_msr_entry(struct kvm_vcpu
*vcpu
, u32 msr
)
97 for (i
= 0; i
< vcpu
->nmsrs
; ++i
)
98 if (vcpu
->guest_msrs
[i
].index
== msr
)
99 return &vcpu
->guest_msrs
[i
];
103 static void vmcs_clear(struct vmcs
*vmcs
)
105 u64 phys_addr
= __pa(vmcs
);
108 asm volatile (ASM_VMX_VMCLEAR_RAX
"; setna %0"
109 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
112 printk(KERN_ERR
"kvm: vmclear fail: %p/%llx\n",
116 static void __vcpu_clear(void *arg
)
118 struct kvm_vcpu
*vcpu
= arg
;
119 int cpu
= raw_smp_processor_id();
121 if (vcpu
->cpu
== cpu
)
122 vmcs_clear(vcpu
->vmcs
);
123 if (per_cpu(current_vmcs
, cpu
) == vcpu
->vmcs
)
124 per_cpu(current_vmcs
, cpu
) = NULL
;
127 static unsigned long vmcs_readl(unsigned long field
)
131 asm volatile (ASM_VMX_VMREAD_RDX_RAX
132 : "=a"(value
) : "d"(field
) : "cc");
136 static u16
vmcs_read16(unsigned long field
)
138 return vmcs_readl(field
);
141 static u32
vmcs_read32(unsigned long field
)
143 return vmcs_readl(field
);
146 static u64
vmcs_read64(unsigned long field
)
149 return vmcs_readl(field
);
151 return vmcs_readl(field
) | ((u64
)vmcs_readl(field
+1) << 32);
155 static noinline
void vmwrite_error(unsigned long field
, unsigned long value
)
157 printk(KERN_ERR
"vmwrite error: reg %lx value %lx (err %d)\n",
158 field
, value
, vmcs_read32(VM_INSTRUCTION_ERROR
));
162 static void vmcs_writel(unsigned long field
, unsigned long value
)
166 asm volatile (ASM_VMX_VMWRITE_RAX_RDX
"; setna %0"
167 : "=q"(error
) : "a"(value
), "d"(field
) : "cc" );
169 vmwrite_error(field
, value
);
172 static void vmcs_write16(unsigned long field
, u16 value
)
174 vmcs_writel(field
, value
);
177 static void vmcs_write32(unsigned long field
, u32 value
)
179 vmcs_writel(field
, value
);
182 static void vmcs_write64(unsigned long field
, u64 value
)
185 vmcs_writel(field
, value
);
187 vmcs_writel(field
, value
);
189 vmcs_writel(field
+1, value
>> 32);
194 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
195 * vcpu mutex is already taken.
197 static struct kvm_vcpu
*vmx_vcpu_load(struct kvm_vcpu
*vcpu
)
199 u64 phys_addr
= __pa(vcpu
->vmcs
);
204 if (vcpu
->cpu
!= cpu
) {
205 smp_call_function(__vcpu_clear
, vcpu
, 0, 1);
209 if (per_cpu(current_vmcs
, cpu
) != vcpu
->vmcs
) {
212 per_cpu(current_vmcs
, cpu
) = vcpu
->vmcs
;
213 asm volatile (ASM_VMX_VMPTRLD_RAX
"; setna %0"
214 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
217 printk(KERN_ERR
"kvm: vmptrld %p/%llx fail\n",
218 vcpu
->vmcs
, phys_addr
);
221 if (vcpu
->cpu
!= cpu
) {
222 struct descriptor_table dt
;
223 unsigned long sysenter_esp
;
227 * Linux uses per-cpu TSS and GDT, so set these when switching
230 vmcs_writel(HOST_TR_BASE
, read_tr_base()); /* 22.2.4 */
232 vmcs_writel(HOST_GDTR_BASE
, dt
.base
); /* 22.2.4 */
234 rdmsrl(MSR_IA32_SYSENTER_ESP
, sysenter_esp
);
235 vmcs_writel(HOST_IA32_SYSENTER_ESP
, sysenter_esp
); /* 22.2.3 */
240 static void vmx_vcpu_put(struct kvm_vcpu
*vcpu
)
245 static unsigned long vmx_get_rflags(struct kvm_vcpu
*vcpu
)
247 return vmcs_readl(GUEST_RFLAGS
);
250 static void vmx_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
252 vmcs_writel(GUEST_RFLAGS
, rflags
);
255 static void skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
258 u32 interruptibility
;
260 rip
= vmcs_readl(GUEST_RIP
);
261 rip
+= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
262 vmcs_writel(GUEST_RIP
, rip
);
265 * We emulated an instruction, so temporary interrupt blocking
266 * should be removed, if set.
268 interruptibility
= vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
);
269 if (interruptibility
& 3)
270 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
,
271 interruptibility
& ~3);
272 vcpu
->interrupt_window_open
= 1;
275 static void vmx_inject_gp(struct kvm_vcpu
*vcpu
, unsigned error_code
)
277 printk(KERN_DEBUG
"inject_general_protection: rip 0x%lx\n",
278 vmcs_readl(GUEST_RIP
));
279 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, error_code
);
280 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
282 INTR_TYPE_EXCEPTION
|
283 INTR_INFO_DELIEVER_CODE_MASK
|
284 INTR_INFO_VALID_MASK
);
288 * reads and returns guest's timestamp counter "register"
289 * guest_tsc = host_tsc + tsc_offset -- 21.3
291 static u64
guest_read_tsc(void)
293 u64 host_tsc
, tsc_offset
;
296 tsc_offset
= vmcs_read64(TSC_OFFSET
);
297 return host_tsc
+ tsc_offset
;
301 * writes 'guest_tsc' into guest's timestamp counter "register"
302 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
304 static void guest_write_tsc(u64 guest_tsc
)
309 vmcs_write64(TSC_OFFSET
, guest_tsc
- host_tsc
);
312 static void reload_tss(void)
314 #ifndef CONFIG_X86_64
317 * VT restores TR but not its size. Useless.
319 struct descriptor_table gdt
;
320 struct segment_descriptor
*descs
;
323 descs
= (void *)gdt
.base
;
324 descs
[GDT_ENTRY_TSS
].type
= 9; /* available TSS */
330 * Reads an msr value (of 'msr_index') into 'pdata'.
331 * Returns 0 on success, non-0 otherwise.
332 * Assumes vcpu_load() was already called.
334 static int vmx_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
337 struct vmx_msr_entry
*msr
;
340 printk(KERN_ERR
"BUG: get_msr called with NULL pdata\n");
347 data
= vmcs_readl(GUEST_FS_BASE
);
350 data
= vmcs_readl(GUEST_GS_BASE
);
353 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
355 case MSR_IA32_TIME_STAMP_COUNTER
:
356 data
= guest_read_tsc();
358 case MSR_IA32_SYSENTER_CS
:
359 data
= vmcs_read32(GUEST_SYSENTER_CS
);
361 case MSR_IA32_SYSENTER_EIP
:
362 data
= vmcs_read32(GUEST_SYSENTER_EIP
);
364 case MSR_IA32_SYSENTER_ESP
:
365 data
= vmcs_read32(GUEST_SYSENTER_ESP
);
368 msr
= find_msr_entry(vcpu
, msr_index
);
373 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
381 * Writes msr value into into the appropriate "register".
382 * Returns 0 on success, non-0 otherwise.
383 * Assumes vcpu_load() was already called.
385 static int vmx_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
387 struct vmx_msr_entry
*msr
;
391 return kvm_set_msr_common(vcpu
, msr_index
, data
);
393 vmcs_writel(GUEST_FS_BASE
, data
);
396 vmcs_writel(GUEST_GS_BASE
, data
);
399 case MSR_IA32_SYSENTER_CS
:
400 vmcs_write32(GUEST_SYSENTER_CS
, data
);
402 case MSR_IA32_SYSENTER_EIP
:
403 vmcs_write32(GUEST_SYSENTER_EIP
, data
);
405 case MSR_IA32_SYSENTER_ESP
:
406 vmcs_write32(GUEST_SYSENTER_ESP
, data
);
408 case MSR_IA32_TIME_STAMP_COUNTER
: {
409 guest_write_tsc(data
);
413 msr
= find_msr_entry(vcpu
, msr_index
);
418 return kvm_set_msr_common(vcpu
, msr_index
, data
);
427 * Sync the rsp and rip registers into the vcpu structure. This allows
428 * registers to be accessed by indexing vcpu->regs.
430 static void vcpu_load_rsp_rip(struct kvm_vcpu
*vcpu
)
432 vcpu
->regs
[VCPU_REGS_RSP
] = vmcs_readl(GUEST_RSP
);
433 vcpu
->rip
= vmcs_readl(GUEST_RIP
);
437 * Syncs rsp and rip back into the vmcs. Should be called after possible
440 static void vcpu_put_rsp_rip(struct kvm_vcpu
*vcpu
)
442 vmcs_writel(GUEST_RSP
, vcpu
->regs
[VCPU_REGS_RSP
]);
443 vmcs_writel(GUEST_RIP
, vcpu
->rip
);
446 static int set_guest_debug(struct kvm_vcpu
*vcpu
, struct kvm_debug_guest
*dbg
)
448 unsigned long dr7
= 0x400;
449 u32 exception_bitmap
;
452 exception_bitmap
= vmcs_read32(EXCEPTION_BITMAP
);
453 old_singlestep
= vcpu
->guest_debug
.singlestep
;
455 vcpu
->guest_debug
.enabled
= dbg
->enabled
;
456 if (vcpu
->guest_debug
.enabled
) {
459 dr7
|= 0x200; /* exact */
460 for (i
= 0; i
< 4; ++i
) {
461 if (!dbg
->breakpoints
[i
].enabled
)
463 vcpu
->guest_debug
.bp
[i
] = dbg
->breakpoints
[i
].address
;
464 dr7
|= 2 << (i
*2); /* global enable */
465 dr7
|= 0 << (i
*4+16); /* execution breakpoint */
468 exception_bitmap
|= (1u << 1); /* Trap debug exceptions */
470 vcpu
->guest_debug
.singlestep
= dbg
->singlestep
;
472 exception_bitmap
&= ~(1u << 1); /* Ignore debug exceptions */
473 vcpu
->guest_debug
.singlestep
= 0;
476 if (old_singlestep
&& !vcpu
->guest_debug
.singlestep
) {
479 flags
= vmcs_readl(GUEST_RFLAGS
);
480 flags
&= ~(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
481 vmcs_writel(GUEST_RFLAGS
, flags
);
484 vmcs_write32(EXCEPTION_BITMAP
, exception_bitmap
);
485 vmcs_writel(GUEST_DR7
, dr7
);
490 static __init
int cpu_has_kvm_support(void)
492 unsigned long ecx
= cpuid_ecx(1);
493 return test_bit(5, &ecx
); /* CPUID.1:ECX.VMX[bit 5] -> VT */
496 static __init
int vmx_disabled_by_bios(void)
500 rdmsrl(MSR_IA32_FEATURE_CONTROL
, msr
);
501 return (msr
& 5) == 1; /* locked but not enabled */
504 static __init
void hardware_enable(void *garbage
)
506 int cpu
= raw_smp_processor_id();
507 u64 phys_addr
= __pa(per_cpu(vmxarea
, cpu
));
510 rdmsrl(MSR_IA32_FEATURE_CONTROL
, old
);
512 /* enable and lock */
513 wrmsrl(MSR_IA32_FEATURE_CONTROL
, old
| 5);
514 write_cr4(read_cr4() | CR4_VMXE
); /* FIXME: not cpu hotplug safe */
515 asm volatile (ASM_VMX_VMXON_RAX
: : "a"(&phys_addr
), "m"(phys_addr
)
519 static void hardware_disable(void *garbage
)
521 asm volatile (ASM_VMX_VMXOFF
: : : "cc");
524 static __init
void setup_vmcs_descriptor(void)
526 u32 vmx_msr_low
, vmx_msr_high
;
528 rdmsr(MSR_IA32_VMX_BASIC
, vmx_msr_low
, vmx_msr_high
);
529 vmcs_descriptor
.size
= vmx_msr_high
& 0x1fff;
530 vmcs_descriptor
.order
= get_order(vmcs_descriptor
.size
);
531 vmcs_descriptor
.revision_id
= vmx_msr_low
;
534 static struct vmcs
*alloc_vmcs_cpu(int cpu
)
536 int node
= cpu_to_node(cpu
);
540 pages
= alloc_pages_node(node
, GFP_KERNEL
, vmcs_descriptor
.order
);
543 vmcs
= page_address(pages
);
544 memset(vmcs
, 0, vmcs_descriptor
.size
);
545 vmcs
->revision_id
= vmcs_descriptor
.revision_id
; /* vmcs revision id */
549 static struct vmcs
*alloc_vmcs(void)
551 return alloc_vmcs_cpu(raw_smp_processor_id());
554 static void free_vmcs(struct vmcs
*vmcs
)
556 free_pages((unsigned long)vmcs
, vmcs_descriptor
.order
);
559 static __exit
void free_kvm_area(void)
563 for_each_online_cpu(cpu
)
564 free_vmcs(per_cpu(vmxarea
, cpu
));
567 extern struct vmcs
*alloc_vmcs_cpu(int cpu
);
569 static __init
int alloc_kvm_area(void)
573 for_each_online_cpu(cpu
) {
576 vmcs
= alloc_vmcs_cpu(cpu
);
582 per_cpu(vmxarea
, cpu
) = vmcs
;
587 static __init
int hardware_setup(void)
589 setup_vmcs_descriptor();
590 return alloc_kvm_area();
593 static __exit
void hardware_unsetup(void)
598 static void update_exception_bitmap(struct kvm_vcpu
*vcpu
)
600 if (vcpu
->rmode
.active
)
601 vmcs_write32(EXCEPTION_BITMAP
, ~0);
603 vmcs_write32(EXCEPTION_BITMAP
, 1 << PF_VECTOR
);
606 static void fix_pmode_dataseg(int seg
, struct kvm_save_segment
*save
)
608 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
610 if (vmcs_readl(sf
->base
) == save
->base
) {
611 vmcs_write16(sf
->selector
, save
->selector
);
612 vmcs_writel(sf
->base
, save
->base
);
613 vmcs_write32(sf
->limit
, save
->limit
);
614 vmcs_write32(sf
->ar_bytes
, save
->ar
);
616 u32 dpl
= (vmcs_read16(sf
->selector
) & SELECTOR_RPL_MASK
)
618 vmcs_write32(sf
->ar_bytes
, 0x93 | dpl
);
622 static void enter_pmode(struct kvm_vcpu
*vcpu
)
626 vcpu
->rmode
.active
= 0;
628 vmcs_writel(GUEST_TR_BASE
, vcpu
->rmode
.tr
.base
);
629 vmcs_write32(GUEST_TR_LIMIT
, vcpu
->rmode
.tr
.limit
);
630 vmcs_write32(GUEST_TR_AR_BYTES
, vcpu
->rmode
.tr
.ar
);
632 flags
= vmcs_readl(GUEST_RFLAGS
);
633 flags
&= ~(IOPL_MASK
| X86_EFLAGS_VM
);
634 flags
|= (vcpu
->rmode
.save_iopl
<< IOPL_SHIFT
);
635 vmcs_writel(GUEST_RFLAGS
, flags
);
637 vmcs_writel(GUEST_CR4
, (vmcs_readl(GUEST_CR4
) & ~CR4_VME_MASK
) |
638 (vmcs_readl(CR4_READ_SHADOW
) & CR4_VME_MASK
));
640 update_exception_bitmap(vcpu
);
642 fix_pmode_dataseg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
643 fix_pmode_dataseg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
644 fix_pmode_dataseg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
645 fix_pmode_dataseg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
647 vmcs_write16(GUEST_SS_SELECTOR
, 0);
648 vmcs_write32(GUEST_SS_AR_BYTES
, 0x93);
650 vmcs_write16(GUEST_CS_SELECTOR
,
651 vmcs_read16(GUEST_CS_SELECTOR
) & ~SELECTOR_RPL_MASK
);
652 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
655 static int rmode_tss_base(struct kvm
* kvm
)
657 gfn_t base_gfn
= kvm
->memslots
[0].base_gfn
+ kvm
->memslots
[0].npages
- 3;
658 return base_gfn
<< PAGE_SHIFT
;
661 static void fix_rmode_seg(int seg
, struct kvm_save_segment
*save
)
663 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
665 save
->selector
= vmcs_read16(sf
->selector
);
666 save
->base
= vmcs_readl(sf
->base
);
667 save
->limit
= vmcs_read32(sf
->limit
);
668 save
->ar
= vmcs_read32(sf
->ar_bytes
);
669 vmcs_write16(sf
->selector
, vmcs_readl(sf
->base
) >> 4);
670 vmcs_write32(sf
->limit
, 0xffff);
671 vmcs_write32(sf
->ar_bytes
, 0xf3);
674 static void enter_rmode(struct kvm_vcpu
*vcpu
)
678 vcpu
->rmode
.active
= 1;
680 vcpu
->rmode
.tr
.base
= vmcs_readl(GUEST_TR_BASE
);
681 vmcs_writel(GUEST_TR_BASE
, rmode_tss_base(vcpu
->kvm
));
683 vcpu
->rmode
.tr
.limit
= vmcs_read32(GUEST_TR_LIMIT
);
684 vmcs_write32(GUEST_TR_LIMIT
, RMODE_TSS_SIZE
- 1);
686 vcpu
->rmode
.tr
.ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
687 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
689 flags
= vmcs_readl(GUEST_RFLAGS
);
690 vcpu
->rmode
.save_iopl
= (flags
& IOPL_MASK
) >> IOPL_SHIFT
;
692 flags
|= IOPL_MASK
| X86_EFLAGS_VM
;
694 vmcs_writel(GUEST_RFLAGS
, flags
);
695 vmcs_writel(GUEST_CR4
, vmcs_readl(GUEST_CR4
) | CR4_VME_MASK
);
696 update_exception_bitmap(vcpu
);
698 vmcs_write16(GUEST_SS_SELECTOR
, vmcs_readl(GUEST_SS_BASE
) >> 4);
699 vmcs_write32(GUEST_SS_LIMIT
, 0xffff);
700 vmcs_write32(GUEST_SS_AR_BYTES
, 0xf3);
702 vmcs_write32(GUEST_CS_AR_BYTES
, 0xf3);
703 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
704 vmcs_write16(GUEST_CS_SELECTOR
, vmcs_readl(GUEST_CS_BASE
) >> 4);
706 fix_rmode_seg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
707 fix_rmode_seg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
708 fix_rmode_seg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
709 fix_rmode_seg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
714 static void enter_lmode(struct kvm_vcpu
*vcpu
)
718 guest_tr_ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
719 if ((guest_tr_ar
& AR_TYPE_MASK
) != AR_TYPE_BUSY_64_TSS
) {
720 printk(KERN_DEBUG
"%s: tss fixup for long mode. \n",
722 vmcs_write32(GUEST_TR_AR_BYTES
,
723 (guest_tr_ar
& ~AR_TYPE_MASK
)
724 | AR_TYPE_BUSY_64_TSS
);
727 vcpu
->shadow_efer
|= EFER_LMA
;
729 find_msr_entry(vcpu
, MSR_EFER
)->data
|= EFER_LMA
| EFER_LME
;
730 vmcs_write32(VM_ENTRY_CONTROLS
,
731 vmcs_read32(VM_ENTRY_CONTROLS
)
732 | VM_ENTRY_CONTROLS_IA32E_MASK
);
735 static void exit_lmode(struct kvm_vcpu
*vcpu
)
737 vcpu
->shadow_efer
&= ~EFER_LMA
;
739 vmcs_write32(VM_ENTRY_CONTROLS
,
740 vmcs_read32(VM_ENTRY_CONTROLS
)
741 & ~VM_ENTRY_CONTROLS_IA32E_MASK
);
746 static void vmx_decache_cr0_cr4_guest_bits(struct kvm_vcpu
*vcpu
)
748 vcpu
->cr0
&= KVM_GUEST_CR0_MASK
;
749 vcpu
->cr0
|= vmcs_readl(GUEST_CR0
) & ~KVM_GUEST_CR0_MASK
;
751 vcpu
->cr4
&= KVM_GUEST_CR4_MASK
;
752 vcpu
->cr4
|= vmcs_readl(GUEST_CR4
) & ~KVM_GUEST_CR4_MASK
;
755 static void vmx_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
757 if (vcpu
->rmode
.active
&& (cr0
& CR0_PE_MASK
))
760 if (!vcpu
->rmode
.active
&& !(cr0
& CR0_PE_MASK
))
764 if (vcpu
->shadow_efer
& EFER_LME
) {
765 if (!is_paging(vcpu
) && (cr0
& CR0_PG_MASK
))
767 if (is_paging(vcpu
) && !(cr0
& CR0_PG_MASK
))
772 vmcs_writel(CR0_READ_SHADOW
, cr0
);
773 vmcs_writel(GUEST_CR0
,
774 (cr0
& ~KVM_GUEST_CR0_MASK
) | KVM_VM_CR0_ALWAYS_ON
);
779 * Used when restoring the VM to avoid corrupting segment registers
781 static void vmx_set_cr0_no_modeswitch(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
783 vcpu
->rmode
.active
= ((cr0
& CR0_PE_MASK
) == 0);
784 update_exception_bitmap(vcpu
);
785 vmcs_writel(CR0_READ_SHADOW
, cr0
);
786 vmcs_writel(GUEST_CR0
,
787 (cr0
& ~KVM_GUEST_CR0_MASK
) | KVM_VM_CR0_ALWAYS_ON
);
791 static void vmx_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
793 vmcs_writel(GUEST_CR3
, cr3
);
796 static void vmx_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
798 vmcs_writel(CR4_READ_SHADOW
, cr4
);
799 vmcs_writel(GUEST_CR4
, cr4
| (vcpu
->rmode
.active
?
800 KVM_RMODE_VM_CR4_ALWAYS_ON
: KVM_PMODE_VM_CR4_ALWAYS_ON
));
806 static void vmx_set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
808 struct vmx_msr_entry
*msr
= find_msr_entry(vcpu
, MSR_EFER
);
810 vcpu
->shadow_efer
= efer
;
811 if (efer
& EFER_LMA
) {
812 vmcs_write32(VM_ENTRY_CONTROLS
,
813 vmcs_read32(VM_ENTRY_CONTROLS
) |
814 VM_ENTRY_CONTROLS_IA32E_MASK
);
818 vmcs_write32(VM_ENTRY_CONTROLS
,
819 vmcs_read32(VM_ENTRY_CONTROLS
) &
820 ~VM_ENTRY_CONTROLS_IA32E_MASK
);
822 msr
->data
= efer
& ~EFER_LME
;
828 static u64
vmx_get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
830 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
832 return vmcs_readl(sf
->base
);
835 static void vmx_get_segment(struct kvm_vcpu
*vcpu
,
836 struct kvm_segment
*var
, int seg
)
838 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
841 var
->base
= vmcs_readl(sf
->base
);
842 var
->limit
= vmcs_read32(sf
->limit
);
843 var
->selector
= vmcs_read16(sf
->selector
);
844 ar
= vmcs_read32(sf
->ar_bytes
);
845 if (ar
& AR_UNUSABLE_MASK
)
848 var
->s
= (ar
>> 4) & 1;
849 var
->dpl
= (ar
>> 5) & 3;
850 var
->present
= (ar
>> 7) & 1;
851 var
->avl
= (ar
>> 12) & 1;
852 var
->l
= (ar
>> 13) & 1;
853 var
->db
= (ar
>> 14) & 1;
854 var
->g
= (ar
>> 15) & 1;
855 var
->unusable
= (ar
>> 16) & 1;
858 static void vmx_set_segment(struct kvm_vcpu
*vcpu
,
859 struct kvm_segment
*var
, int seg
)
861 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
864 vmcs_writel(sf
->base
, var
->base
);
865 vmcs_write32(sf
->limit
, var
->limit
);
866 vmcs_write16(sf
->selector
, var
->selector
);
871 ar
|= (var
->s
& 1) << 4;
872 ar
|= (var
->dpl
& 3) << 5;
873 ar
|= (var
->present
& 1) << 7;
874 ar
|= (var
->avl
& 1) << 12;
875 ar
|= (var
->l
& 1) << 13;
876 ar
|= (var
->db
& 1) << 14;
877 ar
|= (var
->g
& 1) << 15;
879 if (ar
== 0) /* a 0 value means unusable */
880 ar
= AR_UNUSABLE_MASK
;
881 vmcs_write32(sf
->ar_bytes
, ar
);
884 static void vmx_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
886 u32 ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
888 *db
= (ar
>> 14) & 1;
892 static void vmx_get_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
894 dt
->limit
= vmcs_read32(GUEST_IDTR_LIMIT
);
895 dt
->base
= vmcs_readl(GUEST_IDTR_BASE
);
898 static void vmx_set_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
900 vmcs_write32(GUEST_IDTR_LIMIT
, dt
->limit
);
901 vmcs_writel(GUEST_IDTR_BASE
, dt
->base
);
904 static void vmx_get_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
906 dt
->limit
= vmcs_read32(GUEST_GDTR_LIMIT
);
907 dt
->base
= vmcs_readl(GUEST_GDTR_BASE
);
910 static void vmx_set_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
912 vmcs_write32(GUEST_GDTR_LIMIT
, dt
->limit
);
913 vmcs_writel(GUEST_GDTR_BASE
, dt
->base
);
916 static int init_rmode_tss(struct kvm
* kvm
)
918 struct page
*p1
, *p2
, *p3
;
919 gfn_t fn
= rmode_tss_base(kvm
) >> PAGE_SHIFT
;
922 p1
= _gfn_to_page(kvm
, fn
++);
923 p2
= _gfn_to_page(kvm
, fn
++);
924 p3
= _gfn_to_page(kvm
, fn
);
926 if (!p1
|| !p2
|| !p3
) {
927 kvm_printf(kvm
,"%s: gfn_to_page failed\n", __FUNCTION__
);
931 page
= kmap_atomic(p1
, KM_USER0
);
932 memset(page
, 0, PAGE_SIZE
);
933 *(u16
*)(page
+ 0x66) = TSS_BASE_SIZE
+ TSS_REDIRECTION_SIZE
;
934 kunmap_atomic(page
, KM_USER0
);
936 page
= kmap_atomic(p2
, KM_USER0
);
937 memset(page
, 0, PAGE_SIZE
);
938 kunmap_atomic(page
, KM_USER0
);
940 page
= kmap_atomic(p3
, KM_USER0
);
941 memset(page
, 0, PAGE_SIZE
);
942 *(page
+ RMODE_TSS_SIZE
- 2 * PAGE_SIZE
- 1) = ~0;
943 kunmap_atomic(page
, KM_USER0
);
948 static void vmcs_write32_fixedbits(u32 msr
, u32 vmcs_field
, u32 val
)
950 u32 msr_high
, msr_low
;
952 rdmsr(msr
, msr_low
, msr_high
);
956 vmcs_write32(vmcs_field
, val
);
959 static void seg_setup(int seg
)
961 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
963 vmcs_write16(sf
->selector
, 0);
964 vmcs_writel(sf
->base
, 0);
965 vmcs_write32(sf
->limit
, 0xffff);
966 vmcs_write32(sf
->ar_bytes
, 0x93);
970 * Sets up the vmcs for emulated real mode.
972 static int vmx_vcpu_setup(struct kvm_vcpu
*vcpu
)
974 u32 host_sysenter_cs
;
977 struct descriptor_table dt
;
981 extern asmlinkage
void kvm_vmx_return(void);
983 if (!init_rmode_tss(vcpu
->kvm
)) {
988 memset(vcpu
->regs
, 0, sizeof(vcpu
->regs
));
989 vcpu
->regs
[VCPU_REGS_RDX
] = get_rdx_init_val();
991 vcpu
->apic_base
= 0xfee00000 |
992 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP
|
993 MSR_IA32_APICBASE_ENABLE
;
998 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
999 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1001 vmcs_write16(GUEST_CS_SELECTOR
, 0xf000);
1002 vmcs_writel(GUEST_CS_BASE
, 0x000f0000);
1003 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
1004 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
1006 seg_setup(VCPU_SREG_DS
);
1007 seg_setup(VCPU_SREG_ES
);
1008 seg_setup(VCPU_SREG_FS
);
1009 seg_setup(VCPU_SREG_GS
);
1010 seg_setup(VCPU_SREG_SS
);
1012 vmcs_write16(GUEST_TR_SELECTOR
, 0);
1013 vmcs_writel(GUEST_TR_BASE
, 0);
1014 vmcs_write32(GUEST_TR_LIMIT
, 0xffff);
1015 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
1017 vmcs_write16(GUEST_LDTR_SELECTOR
, 0);
1018 vmcs_writel(GUEST_LDTR_BASE
, 0);
1019 vmcs_write32(GUEST_LDTR_LIMIT
, 0xffff);
1020 vmcs_write32(GUEST_LDTR_AR_BYTES
, 0x00082);
1022 vmcs_write32(GUEST_SYSENTER_CS
, 0);
1023 vmcs_writel(GUEST_SYSENTER_ESP
, 0);
1024 vmcs_writel(GUEST_SYSENTER_EIP
, 0);
1026 vmcs_writel(GUEST_RFLAGS
, 0x02);
1027 vmcs_writel(GUEST_RIP
, 0xfff0);
1028 vmcs_writel(GUEST_RSP
, 0);
1030 vmcs_writel(GUEST_CR3
, 0);
1032 //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1033 vmcs_writel(GUEST_DR7
, 0x400);
1035 vmcs_writel(GUEST_GDTR_BASE
, 0);
1036 vmcs_write32(GUEST_GDTR_LIMIT
, 0xffff);
1038 vmcs_writel(GUEST_IDTR_BASE
, 0);
1039 vmcs_write32(GUEST_IDTR_LIMIT
, 0xffff);
1041 vmcs_write32(GUEST_ACTIVITY_STATE
, 0);
1042 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
, 0);
1043 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS
, 0);
1046 vmcs_write64(IO_BITMAP_A
, 0);
1047 vmcs_write64(IO_BITMAP_B
, 0);
1051 vmcs_write64(VMCS_LINK_POINTER
, -1ull); /* 22.3.1.5 */
1053 /* Special registers */
1054 vmcs_write64(GUEST_IA32_DEBUGCTL
, 0);
1057 vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS
,
1058 PIN_BASED_VM_EXEC_CONTROL
,
1059 PIN_BASED_EXT_INTR_MASK
/* 20.6.1 */
1060 | PIN_BASED_NMI_EXITING
/* 20.6.1 */
1062 vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS
,
1063 CPU_BASED_VM_EXEC_CONTROL
,
1064 CPU_BASED_HLT_EXITING
/* 20.6.2 */
1065 | CPU_BASED_CR8_LOAD_EXITING
/* 20.6.2 */
1066 | CPU_BASED_CR8_STORE_EXITING
/* 20.6.2 */
1067 | CPU_BASED_UNCOND_IO_EXITING
/* 20.6.2 */
1068 | CPU_BASED_MOV_DR_EXITING
1069 | CPU_BASED_USE_TSC_OFFSETING
/* 21.3 */
1072 vmcs_write32(EXCEPTION_BITMAP
, 1 << PF_VECTOR
);
1073 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK
, 0);
1074 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH
, 0);
1075 vmcs_write32(CR3_TARGET_COUNT
, 0); /* 22.2.1 */
1077 vmcs_writel(HOST_CR0
, read_cr0()); /* 22.2.3 */
1078 vmcs_writel(HOST_CR4
, read_cr4()); /* 22.2.3, 22.2.5 */
1079 vmcs_writel(HOST_CR3
, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1081 vmcs_write16(HOST_CS_SELECTOR
, __KERNEL_CS
); /* 22.2.4 */
1082 vmcs_write16(HOST_DS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1083 vmcs_write16(HOST_ES_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1084 vmcs_write16(HOST_FS_SELECTOR
, read_fs()); /* 22.2.4 */
1085 vmcs_write16(HOST_GS_SELECTOR
, read_gs()); /* 22.2.4 */
1086 vmcs_write16(HOST_SS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1087 #ifdef CONFIG_X86_64
1088 rdmsrl(MSR_FS_BASE
, a
);
1089 vmcs_writel(HOST_FS_BASE
, a
); /* 22.2.4 */
1090 rdmsrl(MSR_GS_BASE
, a
);
1091 vmcs_writel(HOST_GS_BASE
, a
); /* 22.2.4 */
1093 vmcs_writel(HOST_FS_BASE
, 0); /* 22.2.4 */
1094 vmcs_writel(HOST_GS_BASE
, 0); /* 22.2.4 */
1097 vmcs_write16(HOST_TR_SELECTOR
, GDT_ENTRY_TSS
*8); /* 22.2.4 */
1100 vmcs_writel(HOST_IDTR_BASE
, dt
.base
); /* 22.2.4 */
1103 vmcs_writel(HOST_RIP
, (unsigned long)kvm_vmx_return
); /* 22.2.5 */
1105 rdmsr(MSR_IA32_SYSENTER_CS
, host_sysenter_cs
, junk
);
1106 vmcs_write32(HOST_IA32_SYSENTER_CS
, host_sysenter_cs
);
1107 rdmsrl(MSR_IA32_SYSENTER_ESP
, a
);
1108 vmcs_writel(HOST_IA32_SYSENTER_ESP
, a
); /* 22.2.3 */
1109 rdmsrl(MSR_IA32_SYSENTER_EIP
, a
);
1110 vmcs_writel(HOST_IA32_SYSENTER_EIP
, a
); /* 22.2.3 */
1112 for (i
= 0; i
< NR_VMX_MSR
; ++i
) {
1113 u32 index
= vmx_msr_index
[i
];
1114 u32 data_low
, data_high
;
1116 int j
= vcpu
->nmsrs
;
1118 if (rdmsr_safe(index
, &data_low
, &data_high
) < 0)
1120 data
= data_low
| ((u64
)data_high
<< 32);
1121 vcpu
->host_msrs
[j
].index
= index
;
1122 vcpu
->host_msrs
[j
].reserved
= 0;
1123 vcpu
->host_msrs
[j
].data
= data
;
1124 vcpu
->guest_msrs
[j
] = vcpu
->host_msrs
[j
];
1127 printk(KERN_DEBUG
"kvm: msrs: %d\n", vcpu
->nmsrs
);
1129 nr_good_msrs
= vcpu
->nmsrs
- NR_BAD_MSRS
;
1130 vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR
,
1131 virt_to_phys(vcpu
->guest_msrs
+ NR_BAD_MSRS
));
1132 vmcs_writel(VM_EXIT_MSR_STORE_ADDR
,
1133 virt_to_phys(vcpu
->guest_msrs
+ NR_BAD_MSRS
));
1134 vmcs_writel(VM_EXIT_MSR_LOAD_ADDR
,
1135 virt_to_phys(vcpu
->host_msrs
+ NR_BAD_MSRS
));
1136 vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS
, VM_EXIT_CONTROLS
,
1137 (HOST_IS_64
<< 9)); /* 22.2,1, 20.7.1 */
1138 vmcs_write32(VM_EXIT_MSR_STORE_COUNT
, nr_good_msrs
); /* 22.2.2 */
1139 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT
, nr_good_msrs
); /* 22.2.2 */
1140 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT
, nr_good_msrs
); /* 22.2.2 */
1143 /* 22.2.1, 20.8.1 */
1144 vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS
,
1145 VM_ENTRY_CONTROLS
, 0);
1146 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
, 0); /* 22.2.1 */
1148 #ifdef CONFIG_X86_64
1149 vmcs_writel(VIRTUAL_APIC_PAGE_ADDR
, 0);
1150 vmcs_writel(TPR_THRESHOLD
, 0);
1153 vmcs_writel(CR0_GUEST_HOST_MASK
, KVM_GUEST_CR0_MASK
);
1154 vmcs_writel(CR4_GUEST_HOST_MASK
, KVM_GUEST_CR4_MASK
);
1156 vcpu
->cr0
= 0x60000010;
1157 vmx_set_cr0(vcpu
, vcpu
->cr0
); // enter rmode
1158 vmx_set_cr4(vcpu
, 0);
1159 #ifdef CONFIG_X86_64
1160 vmx_set_efer(vcpu
, 0);
1169 static void inject_rmode_irq(struct kvm_vcpu
*vcpu
, int irq
)
1174 unsigned long flags
;
1175 unsigned long ss_base
= vmcs_readl(GUEST_SS_BASE
);
1176 u16 sp
= vmcs_readl(GUEST_RSP
);
1177 u32 ss_limit
= vmcs_read32(GUEST_SS_LIMIT
);
1179 if (sp
> ss_limit
|| sp
- 6 > sp
) {
1180 vcpu_printf(vcpu
, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1182 vmcs_readl(GUEST_RSP
),
1183 vmcs_readl(GUEST_SS_BASE
),
1184 vmcs_read32(GUEST_SS_LIMIT
));
1188 if (kvm_read_guest(vcpu
, irq
* sizeof(ent
), sizeof(ent
), &ent
) !=
1190 vcpu_printf(vcpu
, "%s: read guest err\n", __FUNCTION__
);
1194 flags
= vmcs_readl(GUEST_RFLAGS
);
1195 cs
= vmcs_readl(GUEST_CS_BASE
) >> 4;
1196 ip
= vmcs_readl(GUEST_RIP
);
1199 if (kvm_write_guest(vcpu
, ss_base
+ sp
- 2, 2, &flags
) != 2 ||
1200 kvm_write_guest(vcpu
, ss_base
+ sp
- 4, 2, &cs
) != 2 ||
1201 kvm_write_guest(vcpu
, ss_base
+ sp
- 6, 2, &ip
) != 2) {
1202 vcpu_printf(vcpu
, "%s: write guest err\n", __FUNCTION__
);
1206 vmcs_writel(GUEST_RFLAGS
, flags
&
1207 ~( X86_EFLAGS_IF
| X86_EFLAGS_AC
| X86_EFLAGS_TF
));
1208 vmcs_write16(GUEST_CS_SELECTOR
, ent
[1]) ;
1209 vmcs_writel(GUEST_CS_BASE
, ent
[1] << 4);
1210 vmcs_writel(GUEST_RIP
, ent
[0]);
1211 vmcs_writel(GUEST_RSP
, (vmcs_readl(GUEST_RSP
) & ~0xffff) | (sp
- 6));
1214 static void kvm_do_inject_irq(struct kvm_vcpu
*vcpu
)
1216 int word_index
= __ffs(vcpu
->irq_summary
);
1217 int bit_index
= __ffs(vcpu
->irq_pending
[word_index
]);
1218 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
1220 clear_bit(bit_index
, &vcpu
->irq_pending
[word_index
]);
1221 if (!vcpu
->irq_pending
[word_index
])
1222 clear_bit(word_index
, &vcpu
->irq_summary
);
1224 if (vcpu
->rmode
.active
) {
1225 inject_rmode_irq(vcpu
, irq
);
1228 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1229 irq
| INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
1233 static void do_interrupt_requests(struct kvm_vcpu
*vcpu
,
1234 struct kvm_run
*kvm_run
)
1236 u32 cpu_based_vm_exec_control
;
1238 vcpu
->interrupt_window_open
=
1239 ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) &&
1240 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0);
1242 if (vcpu
->interrupt_window_open
&&
1243 vcpu
->irq_summary
&&
1244 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD
) & INTR_INFO_VALID_MASK
))
1246 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1248 kvm_do_inject_irq(vcpu
);
1250 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
1251 if (!vcpu
->interrupt_window_open
&&
1252 (vcpu
->irq_summary
|| kvm_run
->request_interrupt_window
))
1254 * Interrupts blocked. Wait for unblock.
1256 cpu_based_vm_exec_control
|= CPU_BASED_VIRTUAL_INTR_PENDING
;
1258 cpu_based_vm_exec_control
&= ~CPU_BASED_VIRTUAL_INTR_PENDING
;
1259 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
1262 static void kvm_guest_debug_pre(struct kvm_vcpu
*vcpu
)
1264 struct kvm_guest_debug
*dbg
= &vcpu
->guest_debug
;
1266 set_debugreg(dbg
->bp
[0], 0);
1267 set_debugreg(dbg
->bp
[1], 1);
1268 set_debugreg(dbg
->bp
[2], 2);
1269 set_debugreg(dbg
->bp
[3], 3);
1271 if (dbg
->singlestep
) {
1272 unsigned long flags
;
1274 flags
= vmcs_readl(GUEST_RFLAGS
);
1275 flags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
1276 vmcs_writel(GUEST_RFLAGS
, flags
);
1280 static int handle_rmode_exception(struct kvm_vcpu
*vcpu
,
1281 int vec
, u32 err_code
)
1283 if (!vcpu
->rmode
.active
)
1286 if (vec
== GP_VECTOR
&& err_code
== 0)
1287 if (emulate_instruction(vcpu
, NULL
, 0, 0) == EMULATE_DONE
)
1292 static int handle_exception(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1294 u32 intr_info
, error_code
;
1295 unsigned long cr2
, rip
;
1297 enum emulation_result er
;
1300 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1301 intr_info
= vmcs_read32(VM_EXIT_INTR_INFO
);
1303 if ((vect_info
& VECTORING_INFO_VALID_MASK
) &&
1304 !is_page_fault(intr_info
)) {
1305 printk(KERN_ERR
"%s: unexpected, vectoring info 0x%x "
1306 "intr info 0x%x\n", __FUNCTION__
, vect_info
, intr_info
);
1309 if (is_external_interrupt(vect_info
)) {
1310 int irq
= vect_info
& VECTORING_INFO_VECTOR_MASK
;
1311 set_bit(irq
, vcpu
->irq_pending
);
1312 set_bit(irq
/ BITS_PER_LONG
, &vcpu
->irq_summary
);
1315 if ((intr_info
& INTR_INFO_INTR_TYPE_MASK
) == 0x200) { /* nmi */
1320 rip
= vmcs_readl(GUEST_RIP
);
1321 if (intr_info
& INTR_INFO_DELIEVER_CODE_MASK
)
1322 error_code
= vmcs_read32(VM_EXIT_INTR_ERROR_CODE
);
1323 if (is_page_fault(intr_info
)) {
1324 cr2
= vmcs_readl(EXIT_QUALIFICATION
);
1326 spin_lock(&vcpu
->kvm
->lock
);
1327 r
= kvm_mmu_page_fault(vcpu
, cr2
, error_code
);
1329 spin_unlock(&vcpu
->kvm
->lock
);
1333 spin_unlock(&vcpu
->kvm
->lock
);
1337 er
= emulate_instruction(vcpu
, kvm_run
, cr2
, error_code
);
1338 spin_unlock(&vcpu
->kvm
->lock
);
1343 case EMULATE_DO_MMIO
:
1344 ++kvm_stat
.mmio_exits
;
1345 kvm_run
->exit_reason
= KVM_EXIT_MMIO
;
1348 vcpu_printf(vcpu
, "%s: emulate fail\n", __FUNCTION__
);
1355 if (vcpu
->rmode
.active
&&
1356 handle_rmode_exception(vcpu
, intr_info
& INTR_INFO_VECTOR_MASK
,
1360 if ((intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
)) == (INTR_TYPE_EXCEPTION
| 1)) {
1361 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
1364 kvm_run
->exit_reason
= KVM_EXIT_EXCEPTION
;
1365 kvm_run
->ex
.exception
= intr_info
& INTR_INFO_VECTOR_MASK
;
1366 kvm_run
->ex
.error_code
= error_code
;
1370 static int handle_external_interrupt(struct kvm_vcpu
*vcpu
,
1371 struct kvm_run
*kvm_run
)
1373 ++kvm_stat
.irq_exits
;
1378 static int get_io_count(struct kvm_vcpu
*vcpu
, u64
*count
)
1385 if ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_VM
)) {
1388 u32 cs_ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
1390 countr_size
= (cs_ar
& AR_L_MASK
) ? 8:
1391 (cs_ar
& AR_DB_MASK
) ? 4: 2;
1394 rip
= vmcs_readl(GUEST_RIP
);
1395 if (countr_size
!= 8)
1396 rip
+= vmcs_readl(GUEST_CS_BASE
);
1398 n
= kvm_read_guest(vcpu
, rip
, sizeof(inst
), &inst
);
1400 for (i
= 0; i
< n
; i
++) {
1401 switch (((u8
*)&inst
)[i
]) {
1414 countr_size
= (countr_size
== 2) ? 4: (countr_size
>> 1);
1422 *count
= vcpu
->regs
[VCPU_REGS_RCX
] & (~0ULL >> (64 - countr_size
));
1426 static int handle_io(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1428 u64 exit_qualification
;
1430 ++kvm_stat
.io_exits
;
1431 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1432 kvm_run
->exit_reason
= KVM_EXIT_IO
;
1433 if (exit_qualification
& 8)
1434 kvm_run
->io
.direction
= KVM_EXIT_IO_IN
;
1436 kvm_run
->io
.direction
= KVM_EXIT_IO_OUT
;
1437 kvm_run
->io
.size
= (exit_qualification
& 7) + 1;
1438 kvm_run
->io
.string
= (exit_qualification
& 16) != 0;
1439 kvm_run
->io
.string_down
1440 = (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_DF
) != 0;
1441 kvm_run
->io
.rep
= (exit_qualification
& 32) != 0;
1442 kvm_run
->io
.port
= exit_qualification
>> 16;
1443 if (kvm_run
->io
.string
) {
1444 if (!get_io_count(vcpu
, &kvm_run
->io
.count
))
1446 kvm_run
->io
.address
= vmcs_readl(GUEST_LINEAR_ADDRESS
);
1448 kvm_run
->io
.value
= vcpu
->regs
[VCPU_REGS_RAX
]; /* rax */
1452 static int handle_cr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1454 u64 exit_qualification
;
1458 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1459 cr
= exit_qualification
& 15;
1460 reg
= (exit_qualification
>> 8) & 15;
1461 switch ((exit_qualification
>> 4) & 3) {
1462 case 0: /* mov to cr */
1465 vcpu_load_rsp_rip(vcpu
);
1466 set_cr0(vcpu
, vcpu
->regs
[reg
]);
1467 skip_emulated_instruction(vcpu
);
1470 vcpu_load_rsp_rip(vcpu
);
1471 set_cr3(vcpu
, vcpu
->regs
[reg
]);
1472 skip_emulated_instruction(vcpu
);
1475 vcpu_load_rsp_rip(vcpu
);
1476 set_cr4(vcpu
, vcpu
->regs
[reg
]);
1477 skip_emulated_instruction(vcpu
);
1480 vcpu_load_rsp_rip(vcpu
);
1481 set_cr8(vcpu
, vcpu
->regs
[reg
]);
1482 skip_emulated_instruction(vcpu
);
1486 case 1: /*mov from cr*/
1489 vcpu_load_rsp_rip(vcpu
);
1490 vcpu
->regs
[reg
] = vcpu
->cr3
;
1491 vcpu_put_rsp_rip(vcpu
);
1492 skip_emulated_instruction(vcpu
);
1495 printk(KERN_DEBUG
"handle_cr: read CR8 "
1496 "cpu erratum AA15\n");
1497 vcpu_load_rsp_rip(vcpu
);
1498 vcpu
->regs
[reg
] = vcpu
->cr8
;
1499 vcpu_put_rsp_rip(vcpu
);
1500 skip_emulated_instruction(vcpu
);
1505 lmsw(vcpu
, (exit_qualification
>> LMSW_SOURCE_DATA_SHIFT
) & 0x0f);
1507 skip_emulated_instruction(vcpu
);
1512 kvm_run
->exit_reason
= 0;
1513 printk(KERN_ERR
"kvm: unhandled control register: op %d cr %d\n",
1514 (int)(exit_qualification
>> 4) & 3, cr
);
1518 static int handle_dr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1520 u64 exit_qualification
;
1525 * FIXME: this code assumes the host is debugging the guest.
1526 * need to deal with guest debugging itself too.
1528 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1529 dr
= exit_qualification
& 7;
1530 reg
= (exit_qualification
>> 8) & 15;
1531 vcpu_load_rsp_rip(vcpu
);
1532 if (exit_qualification
& 16) {
1544 vcpu
->regs
[reg
] = val
;
1548 vcpu_put_rsp_rip(vcpu
);
1549 skip_emulated_instruction(vcpu
);
1553 static int handle_cpuid(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1555 kvm_run
->exit_reason
= KVM_EXIT_CPUID
;
1559 static int handle_rdmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1561 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1564 if (vmx_get_msr(vcpu
, ecx
, &data
)) {
1565 vmx_inject_gp(vcpu
, 0);
1569 /* FIXME: handling of bits 32:63 of rax, rdx */
1570 vcpu
->regs
[VCPU_REGS_RAX
] = data
& -1u;
1571 vcpu
->regs
[VCPU_REGS_RDX
] = (data
>> 32) & -1u;
1572 skip_emulated_instruction(vcpu
);
1576 static int handle_wrmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1578 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1579 u64 data
= (vcpu
->regs
[VCPU_REGS_RAX
] & -1u)
1580 | ((u64
)(vcpu
->regs
[VCPU_REGS_RDX
] & -1u) << 32);
1582 if (vmx_set_msr(vcpu
, ecx
, data
) != 0) {
1583 vmx_inject_gp(vcpu
, 0);
1587 skip_emulated_instruction(vcpu
);
1591 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
,
1592 struct kvm_run
*kvm_run
)
1594 kvm_run
->if_flag
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) != 0;
1595 kvm_run
->cr8
= vcpu
->cr8
;
1596 kvm_run
->apic_base
= vcpu
->apic_base
;
1597 kvm_run
->ready_for_interrupt_injection
= (vcpu
->interrupt_window_open
&&
1598 vcpu
->irq_summary
== 0);
1601 static int handle_interrupt_window(struct kvm_vcpu
*vcpu
,
1602 struct kvm_run
*kvm_run
)
1605 * If the user space waits to inject interrupts, exit as soon as
1608 if (kvm_run
->request_interrupt_window
&&
1609 !vcpu
->irq_summary
&&
1610 (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
)) {
1611 kvm_run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
1612 ++kvm_stat
.irq_window_exits
;
1618 static int handle_halt(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1620 skip_emulated_instruction(vcpu
);
1621 if (vcpu
->irq_summary
)
1624 kvm_run
->exit_reason
= KVM_EXIT_HLT
;
1625 ++kvm_stat
.halt_exits
;
1630 * The exit handlers return 1 if the exit was handled fully and guest execution
1631 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
1632 * to be done to userspace and return 0.
1634 static int (*kvm_vmx_exit_handlers
[])(struct kvm_vcpu
*vcpu
,
1635 struct kvm_run
*kvm_run
) = {
1636 [EXIT_REASON_EXCEPTION_NMI
] = handle_exception
,
1637 [EXIT_REASON_EXTERNAL_INTERRUPT
] = handle_external_interrupt
,
1638 [EXIT_REASON_IO_INSTRUCTION
] = handle_io
,
1639 [EXIT_REASON_CR_ACCESS
] = handle_cr
,
1640 [EXIT_REASON_DR_ACCESS
] = handle_dr
,
1641 [EXIT_REASON_CPUID
] = handle_cpuid
,
1642 [EXIT_REASON_MSR_READ
] = handle_rdmsr
,
1643 [EXIT_REASON_MSR_WRITE
] = handle_wrmsr
,
1644 [EXIT_REASON_PENDING_INTERRUPT
] = handle_interrupt_window
,
1645 [EXIT_REASON_HLT
] = handle_halt
,
1648 static const int kvm_vmx_max_exit_handlers
=
1649 sizeof(kvm_vmx_exit_handlers
) / sizeof(*kvm_vmx_exit_handlers
);
1652 * The guest has exited. See if we can fix it or if we need userspace
1655 static int kvm_handle_exit(struct kvm_run
*kvm_run
, struct kvm_vcpu
*vcpu
)
1657 u32 vectoring_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1658 u32 exit_reason
= vmcs_read32(VM_EXIT_REASON
);
1660 if ( (vectoring_info
& VECTORING_INFO_VALID_MASK
) &&
1661 exit_reason
!= EXIT_REASON_EXCEPTION_NMI
)
1662 printk(KERN_WARNING
"%s: unexpected, valid vectoring info and "
1663 "exit reason is 0x%x\n", __FUNCTION__
, exit_reason
);
1664 kvm_run
->instruction_length
= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
1665 if (exit_reason
< kvm_vmx_max_exit_handlers
1666 && kvm_vmx_exit_handlers
[exit_reason
])
1667 return kvm_vmx_exit_handlers
[exit_reason
](vcpu
, kvm_run
);
1669 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
1670 kvm_run
->hw
.hardware_exit_reason
= exit_reason
;
1676 * Check if userspace requested an interrupt window, and that the
1677 * interrupt window is open.
1679 * No need to exit to userspace if we already have an interrupt queued.
1681 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
,
1682 struct kvm_run
*kvm_run
)
1684 return (!vcpu
->irq_summary
&&
1685 kvm_run
->request_interrupt_window
&&
1686 vcpu
->interrupt_window_open
&&
1687 (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
));
1690 static int vmx_vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1693 u16 fs_sel
, gs_sel
, ldt_sel
;
1694 int fs_gs_ldt_reload_needed
;
1699 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
1700 * allow segment selectors with cpl > 0 or ti == 1.
1704 ldt_sel
= read_ldt();
1705 fs_gs_ldt_reload_needed
= (fs_sel
& 7) | (gs_sel
& 7) | ldt_sel
;
1706 if (!fs_gs_ldt_reload_needed
) {
1707 vmcs_write16(HOST_FS_SELECTOR
, fs_sel
);
1708 vmcs_write16(HOST_GS_SELECTOR
, gs_sel
);
1710 vmcs_write16(HOST_FS_SELECTOR
, 0);
1711 vmcs_write16(HOST_GS_SELECTOR
, 0);
1714 #ifdef CONFIG_X86_64
1715 vmcs_writel(HOST_FS_BASE
, read_msr(MSR_FS_BASE
));
1716 vmcs_writel(HOST_GS_BASE
, read_msr(MSR_GS_BASE
));
1718 vmcs_writel(HOST_FS_BASE
, segment_base(fs_sel
));
1719 vmcs_writel(HOST_GS_BASE
, segment_base(gs_sel
));
1722 do_interrupt_requests(vcpu
, kvm_run
);
1724 if (vcpu
->guest_debug
.enabled
)
1725 kvm_guest_debug_pre(vcpu
);
1727 fx_save(vcpu
->host_fx_image
);
1728 fx_restore(vcpu
->guest_fx_image
);
1730 save_msrs(vcpu
->host_msrs
, vcpu
->nmsrs
);
1731 load_msrs(vcpu
->guest_msrs
, NR_BAD_MSRS
);
1734 /* Store host registers */
1736 #ifdef CONFIG_X86_64
1737 "push %%rax; push %%rbx; push %%rdx;"
1738 "push %%rsi; push %%rdi; push %%rbp;"
1739 "push %%r8; push %%r9; push %%r10; push %%r11;"
1740 "push %%r12; push %%r13; push %%r14; push %%r15;"
1742 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
1744 "pusha; push %%ecx \n\t"
1745 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
1747 /* Check if vmlaunch of vmresume is needed */
1749 /* Load guest registers. Don't clobber flags. */
1750 #ifdef CONFIG_X86_64
1751 "mov %c[cr2](%3), %%rax \n\t"
1752 "mov %%rax, %%cr2 \n\t"
1753 "mov %c[rax](%3), %%rax \n\t"
1754 "mov %c[rbx](%3), %%rbx \n\t"
1755 "mov %c[rdx](%3), %%rdx \n\t"
1756 "mov %c[rsi](%3), %%rsi \n\t"
1757 "mov %c[rdi](%3), %%rdi \n\t"
1758 "mov %c[rbp](%3), %%rbp \n\t"
1759 "mov %c[r8](%3), %%r8 \n\t"
1760 "mov %c[r9](%3), %%r9 \n\t"
1761 "mov %c[r10](%3), %%r10 \n\t"
1762 "mov %c[r11](%3), %%r11 \n\t"
1763 "mov %c[r12](%3), %%r12 \n\t"
1764 "mov %c[r13](%3), %%r13 \n\t"
1765 "mov %c[r14](%3), %%r14 \n\t"
1766 "mov %c[r15](%3), %%r15 \n\t"
1767 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1769 "mov %c[cr2](%3), %%eax \n\t"
1770 "mov %%eax, %%cr2 \n\t"
1771 "mov %c[rax](%3), %%eax \n\t"
1772 "mov %c[rbx](%3), %%ebx \n\t"
1773 "mov %c[rdx](%3), %%edx \n\t"
1774 "mov %c[rsi](%3), %%esi \n\t"
1775 "mov %c[rdi](%3), %%edi \n\t"
1776 "mov %c[rbp](%3), %%ebp \n\t"
1777 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1779 /* Enter guest mode */
1781 ASM_VMX_VMLAUNCH
"\n\t"
1782 "jmp kvm_vmx_return \n\t"
1783 "launched: " ASM_VMX_VMRESUME
"\n\t"
1784 ".globl kvm_vmx_return \n\t"
1786 /* Save guest registers, load host registers, keep flags */
1787 #ifdef CONFIG_X86_64
1788 "xchg %3, 0(%%rsp) \n\t"
1789 "mov %%rax, %c[rax](%3) \n\t"
1790 "mov %%rbx, %c[rbx](%3) \n\t"
1791 "pushq 0(%%rsp); popq %c[rcx](%3) \n\t"
1792 "mov %%rdx, %c[rdx](%3) \n\t"
1793 "mov %%rsi, %c[rsi](%3) \n\t"
1794 "mov %%rdi, %c[rdi](%3) \n\t"
1795 "mov %%rbp, %c[rbp](%3) \n\t"
1796 "mov %%r8, %c[r8](%3) \n\t"
1797 "mov %%r9, %c[r9](%3) \n\t"
1798 "mov %%r10, %c[r10](%3) \n\t"
1799 "mov %%r11, %c[r11](%3) \n\t"
1800 "mov %%r12, %c[r12](%3) \n\t"
1801 "mov %%r13, %c[r13](%3) \n\t"
1802 "mov %%r14, %c[r14](%3) \n\t"
1803 "mov %%r15, %c[r15](%3) \n\t"
1804 "mov %%cr2, %%rax \n\t"
1805 "mov %%rax, %c[cr2](%3) \n\t"
1806 "mov 0(%%rsp), %3 \n\t"
1808 "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1809 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1810 "pop %%rbp; pop %%rdi; pop %%rsi;"
1811 "pop %%rdx; pop %%rbx; pop %%rax \n\t"
1813 "xchg %3, 0(%%esp) \n\t"
1814 "mov %%eax, %c[rax](%3) \n\t"
1815 "mov %%ebx, %c[rbx](%3) \n\t"
1816 "pushl 0(%%esp); popl %c[rcx](%3) \n\t"
1817 "mov %%edx, %c[rdx](%3) \n\t"
1818 "mov %%esi, %c[rsi](%3) \n\t"
1819 "mov %%edi, %c[rdi](%3) \n\t"
1820 "mov %%ebp, %c[rbp](%3) \n\t"
1821 "mov %%cr2, %%eax \n\t"
1822 "mov %%eax, %c[cr2](%3) \n\t"
1823 "mov 0(%%esp), %3 \n\t"
1825 "pop %%ecx; popa \n\t"
1830 : "r"(vcpu
->launched
), "d"((unsigned long)HOST_RSP
),
1832 [rax
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RAX
])),
1833 [rbx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBX
])),
1834 [rcx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RCX
])),
1835 [rdx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDX
])),
1836 [rsi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RSI
])),
1837 [rdi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDI
])),
1838 [rbp
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBP
])),
1839 #ifdef CONFIG_X86_64
1840 [r8
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R8
])),
1841 [r9
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R9
])),
1842 [r10
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R10
])),
1843 [r11
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R11
])),
1844 [r12
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R12
])),
1845 [r13
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R13
])),
1846 [r14
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R14
])),
1847 [r15
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R15
])),
1849 [cr2
]"i"(offsetof(struct kvm_vcpu
, cr2
))
1854 save_msrs(vcpu
->guest_msrs
, NR_BAD_MSRS
);
1855 load_msrs(vcpu
->host_msrs
, NR_BAD_MSRS
);
1857 fx_save(vcpu
->guest_fx_image
);
1858 fx_restore(vcpu
->host_fx_image
);
1859 vcpu
->interrupt_window_open
= (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0;
1861 #ifndef CONFIG_X86_64
1862 asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS
));
1865 kvm_run
->exit_type
= 0;
1867 kvm_run
->exit_type
= KVM_EXIT_TYPE_FAIL_ENTRY
;
1868 kvm_run
->exit_reason
= vmcs_read32(VM_INSTRUCTION_ERROR
);
1871 if (fs_gs_ldt_reload_needed
) {
1875 * If we have to reload gs, we must take care to
1876 * preserve our gs base.
1878 local_irq_disable();
1880 #ifdef CONFIG_X86_64
1881 wrmsrl(MSR_GS_BASE
, vmcs_readl(HOST_GS_BASE
));
1888 kvm_run
->exit_type
= KVM_EXIT_TYPE_VM_EXIT
;
1889 r
= kvm_handle_exit(kvm_run
, vcpu
);
1891 /* Give scheduler a change to reschedule. */
1892 if (signal_pending(current
)) {
1893 ++kvm_stat
.signal_exits
;
1894 post_kvm_run_save(vcpu
, kvm_run
);
1898 if (dm_request_for_irq_injection(vcpu
, kvm_run
)) {
1899 ++kvm_stat
.request_irq_exits
;
1900 post_kvm_run_save(vcpu
, kvm_run
);
1909 post_kvm_run_save(vcpu
, kvm_run
);
1913 static void vmx_flush_tlb(struct kvm_vcpu
*vcpu
)
1915 vmcs_writel(GUEST_CR3
, vmcs_readl(GUEST_CR3
));
1918 static void vmx_inject_page_fault(struct kvm_vcpu
*vcpu
,
1922 u32 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1924 ++kvm_stat
.pf_guest
;
1926 if (is_page_fault(vect_info
)) {
1927 printk(KERN_DEBUG
"inject_page_fault: "
1928 "double fault 0x%lx @ 0x%lx\n",
1929 addr
, vmcs_readl(GUEST_RIP
));
1930 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, 0);
1931 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1933 INTR_TYPE_EXCEPTION
|
1934 INTR_INFO_DELIEVER_CODE_MASK
|
1935 INTR_INFO_VALID_MASK
);
1939 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, err_code
);
1940 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1942 INTR_TYPE_EXCEPTION
|
1943 INTR_INFO_DELIEVER_CODE_MASK
|
1944 INTR_INFO_VALID_MASK
);
1948 static void vmx_free_vmcs(struct kvm_vcpu
*vcpu
)
1951 on_each_cpu(__vcpu_clear
, vcpu
, 0, 1);
1952 free_vmcs(vcpu
->vmcs
);
1957 static void vmx_free_vcpu(struct kvm_vcpu
*vcpu
)
1959 vmx_free_vmcs(vcpu
);
1962 static int vmx_create_vcpu(struct kvm_vcpu
*vcpu
)
1966 vcpu
->guest_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
1967 if (!vcpu
->guest_msrs
)
1970 vcpu
->host_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
1971 if (!vcpu
->host_msrs
)
1972 goto out_free_guest_msrs
;
1974 vmcs
= alloc_vmcs();
1985 kfree(vcpu
->host_msrs
);
1986 vcpu
->host_msrs
= NULL
;
1988 out_free_guest_msrs
:
1989 kfree(vcpu
->guest_msrs
);
1990 vcpu
->guest_msrs
= NULL
;
1995 static struct kvm_arch_ops vmx_arch_ops
= {
1996 .cpu_has_kvm_support
= cpu_has_kvm_support
,
1997 .disabled_by_bios
= vmx_disabled_by_bios
,
1998 .hardware_setup
= hardware_setup
,
1999 .hardware_unsetup
= hardware_unsetup
,
2000 .hardware_enable
= hardware_enable
,
2001 .hardware_disable
= hardware_disable
,
2003 .vcpu_create
= vmx_create_vcpu
,
2004 .vcpu_free
= vmx_free_vcpu
,
2006 .vcpu_load
= vmx_vcpu_load
,
2007 .vcpu_put
= vmx_vcpu_put
,
2009 .set_guest_debug
= set_guest_debug
,
2010 .get_msr
= vmx_get_msr
,
2011 .set_msr
= vmx_set_msr
,
2012 .get_segment_base
= vmx_get_segment_base
,
2013 .get_segment
= vmx_get_segment
,
2014 .set_segment
= vmx_set_segment
,
2015 .get_cs_db_l_bits
= vmx_get_cs_db_l_bits
,
2016 .decache_cr0_cr4_guest_bits
= vmx_decache_cr0_cr4_guest_bits
,
2017 .set_cr0
= vmx_set_cr0
,
2018 .set_cr0_no_modeswitch
= vmx_set_cr0_no_modeswitch
,
2019 .set_cr3
= vmx_set_cr3
,
2020 .set_cr4
= vmx_set_cr4
,
2021 #ifdef CONFIG_X86_64
2022 .set_efer
= vmx_set_efer
,
2024 .get_idt
= vmx_get_idt
,
2025 .set_idt
= vmx_set_idt
,
2026 .get_gdt
= vmx_get_gdt
,
2027 .set_gdt
= vmx_set_gdt
,
2028 .cache_regs
= vcpu_load_rsp_rip
,
2029 .decache_regs
= vcpu_put_rsp_rip
,
2030 .get_rflags
= vmx_get_rflags
,
2031 .set_rflags
= vmx_set_rflags
,
2033 .tlb_flush
= vmx_flush_tlb
,
2034 .inject_page_fault
= vmx_inject_page_fault
,
2036 .inject_gp
= vmx_inject_gp
,
2038 .run
= vmx_vcpu_run
,
2039 .skip_emulated_instruction
= skip_emulated_instruction
,
2040 .vcpu_setup
= vmx_vcpu_setup
,
2043 static int __init
vmx_init(void)
2045 return kvm_init_arch(&vmx_arch_ops
, THIS_MODULE
);
2048 static void __exit
vmx_exit(void)
2053 module_init(vmx_init
)
2054 module_exit(vmx_exit
)