2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
7 * Copyright (C) 2006 Qumranet, Inc.
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
20 #include <linux/module.h>
21 #include <linux/kernel.h>
23 #include <linux/highmem.h>
24 #include <linux/profile.h>
25 #include <linux/sched.h>
29 #include "segment_descriptor.h"
31 MODULE_AUTHOR("Qumranet");
32 MODULE_LICENSE("GPL");
34 static DEFINE_PER_CPU(struct vmcs
*, vmxarea
);
35 static DEFINE_PER_CPU(struct vmcs
*, current_vmcs
);
43 static struct vmcs_descriptor
{
49 #define VMX_SEGMENT_FIELD(seg) \
50 [VCPU_SREG_##seg] = { \
51 .selector = GUEST_##seg##_SELECTOR, \
52 .base = GUEST_##seg##_BASE, \
53 .limit = GUEST_##seg##_LIMIT, \
54 .ar_bytes = GUEST_##seg##_AR_BYTES, \
57 static struct kvm_vmx_segment_field
{
62 } kvm_vmx_segment_fields
[] = {
63 VMX_SEGMENT_FIELD(CS
),
64 VMX_SEGMENT_FIELD(DS
),
65 VMX_SEGMENT_FIELD(ES
),
66 VMX_SEGMENT_FIELD(FS
),
67 VMX_SEGMENT_FIELD(GS
),
68 VMX_SEGMENT_FIELD(SS
),
69 VMX_SEGMENT_FIELD(TR
),
70 VMX_SEGMENT_FIELD(LDTR
),
74 * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
75 * away by decrementing the array size.
77 static const u32 vmx_msr_index
[] = {
79 MSR_SYSCALL_MASK
, MSR_LSTAR
, MSR_CSTAR
, MSR_KERNEL_GS_BASE
,
81 MSR_EFER
, MSR_K6_STAR
,
83 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
86 static unsigned msr_offset_kernel_gs_base
;
87 #define NR_64BIT_MSRS 4
89 * avoid save/load MSR_SYSCALL_MASK and MSR_LSTAR by std vt
90 * mechanism (cpu bug AA24)
94 #define NR_64BIT_MSRS 0
98 static inline int is_page_fault(u32 intr_info
)
100 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
101 INTR_INFO_VALID_MASK
)) ==
102 (INTR_TYPE_EXCEPTION
| PF_VECTOR
| INTR_INFO_VALID_MASK
);
105 static inline int is_no_device(u32 intr_info
)
107 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
108 INTR_INFO_VALID_MASK
)) ==
109 (INTR_TYPE_EXCEPTION
| NM_VECTOR
| INTR_INFO_VALID_MASK
);
112 static inline int is_external_interrupt(u32 intr_info
)
114 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VALID_MASK
))
115 == (INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
118 static struct vmx_msr_entry
*find_msr_entry(struct kvm_vcpu
*vcpu
, u32 msr
)
122 for (i
= 0; i
< vcpu
->nmsrs
; ++i
)
123 if (vcpu
->guest_msrs
[i
].index
== msr
)
124 return &vcpu
->guest_msrs
[i
];
128 static void vmcs_clear(struct vmcs
*vmcs
)
130 u64 phys_addr
= __pa(vmcs
);
133 asm volatile (ASM_VMX_VMCLEAR_RAX
"; setna %0"
134 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
137 printk(KERN_ERR
"kvm: vmclear fail: %p/%llx\n",
141 static void __vcpu_clear(void *arg
)
143 struct kvm_vcpu
*vcpu
= arg
;
144 int cpu
= raw_smp_processor_id();
146 if (vcpu
->cpu
== cpu
)
147 vmcs_clear(vcpu
->vmcs
);
148 if (per_cpu(current_vmcs
, cpu
) == vcpu
->vmcs
)
149 per_cpu(current_vmcs
, cpu
) = NULL
;
152 static void vcpu_clear(struct kvm_vcpu
*vcpu
)
154 if (vcpu
->cpu
!= raw_smp_processor_id() && vcpu
->cpu
!= -1)
155 smp_call_function_single(vcpu
->cpu
, __vcpu_clear
, vcpu
, 0, 1);
161 static unsigned long vmcs_readl(unsigned long field
)
165 asm volatile (ASM_VMX_VMREAD_RDX_RAX
166 : "=a"(value
) : "d"(field
) : "cc");
170 static u16
vmcs_read16(unsigned long field
)
172 return vmcs_readl(field
);
175 static u32
vmcs_read32(unsigned long field
)
177 return vmcs_readl(field
);
180 static u64
vmcs_read64(unsigned long field
)
183 return vmcs_readl(field
);
185 return vmcs_readl(field
) | ((u64
)vmcs_readl(field
+1) << 32);
189 static noinline
void vmwrite_error(unsigned long field
, unsigned long value
)
191 printk(KERN_ERR
"vmwrite error: reg %lx value %lx (err %d)\n",
192 field
, value
, vmcs_read32(VM_INSTRUCTION_ERROR
));
196 static void vmcs_writel(unsigned long field
, unsigned long value
)
200 asm volatile (ASM_VMX_VMWRITE_RAX_RDX
"; setna %0"
201 : "=q"(error
) : "a"(value
), "d"(field
) : "cc" );
203 vmwrite_error(field
, value
);
206 static void vmcs_write16(unsigned long field
, u16 value
)
208 vmcs_writel(field
, value
);
211 static void vmcs_write32(unsigned long field
, u32 value
)
213 vmcs_writel(field
, value
);
216 static void vmcs_write64(unsigned long field
, u64 value
)
219 vmcs_writel(field
, value
);
221 vmcs_writel(field
, value
);
223 vmcs_writel(field
+1, value
>> 32);
227 static void vmcs_clear_bits(unsigned long field
, u32 mask
)
229 vmcs_writel(field
, vmcs_readl(field
) & ~mask
);
232 static void vmcs_set_bits(unsigned long field
, u32 mask
)
234 vmcs_writel(field
, vmcs_readl(field
) | mask
);
238 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
239 * vcpu mutex is already taken.
241 static void vmx_vcpu_load(struct kvm_vcpu
*vcpu
)
243 u64 phys_addr
= __pa(vcpu
->vmcs
);
248 if (vcpu
->cpu
!= cpu
)
251 if (per_cpu(current_vmcs
, cpu
) != vcpu
->vmcs
) {
254 per_cpu(current_vmcs
, cpu
) = vcpu
->vmcs
;
255 asm volatile (ASM_VMX_VMPTRLD_RAX
"; setna %0"
256 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
259 printk(KERN_ERR
"kvm: vmptrld %p/%llx fail\n",
260 vcpu
->vmcs
, phys_addr
);
263 if (vcpu
->cpu
!= cpu
) {
264 struct descriptor_table dt
;
265 unsigned long sysenter_esp
;
269 * Linux uses per-cpu TSS and GDT, so set these when switching
272 vmcs_writel(HOST_TR_BASE
, read_tr_base()); /* 22.2.4 */
274 vmcs_writel(HOST_GDTR_BASE
, dt
.base
); /* 22.2.4 */
276 rdmsrl(MSR_IA32_SYSENTER_ESP
, sysenter_esp
);
277 vmcs_writel(HOST_IA32_SYSENTER_ESP
, sysenter_esp
); /* 22.2.3 */
281 static void vmx_vcpu_put(struct kvm_vcpu
*vcpu
)
286 static void vmx_vcpu_decache(struct kvm_vcpu
*vcpu
)
291 static unsigned long vmx_get_rflags(struct kvm_vcpu
*vcpu
)
293 return vmcs_readl(GUEST_RFLAGS
);
296 static void vmx_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
298 vmcs_writel(GUEST_RFLAGS
, rflags
);
301 static void skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
304 u32 interruptibility
;
306 rip
= vmcs_readl(GUEST_RIP
);
307 rip
+= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
308 vmcs_writel(GUEST_RIP
, rip
);
311 * We emulated an instruction, so temporary interrupt blocking
312 * should be removed, if set.
314 interruptibility
= vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
);
315 if (interruptibility
& 3)
316 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
,
317 interruptibility
& ~3);
318 vcpu
->interrupt_window_open
= 1;
321 static void vmx_inject_gp(struct kvm_vcpu
*vcpu
, unsigned error_code
)
323 printk(KERN_DEBUG
"inject_general_protection: rip 0x%lx\n",
324 vmcs_readl(GUEST_RIP
));
325 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, error_code
);
326 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
328 INTR_TYPE_EXCEPTION
|
329 INTR_INFO_DELIEVER_CODE_MASK
|
330 INTR_INFO_VALID_MASK
);
334 * Set up the vmcs to automatically save and restore system
335 * msrs. Don't touch the 64-bit msrs if the guest is in legacy
336 * mode, as fiddling with msrs is very expensive.
338 static void setup_msrs(struct kvm_vcpu
*vcpu
)
340 int nr_skip
, nr_good_msrs
;
342 if (is_long_mode(vcpu
))
343 nr_skip
= NR_BAD_MSRS
;
345 nr_skip
= NR_64BIT_MSRS
;
346 nr_good_msrs
= vcpu
->nmsrs
- nr_skip
;
349 * MSR_K6_STAR is only needed on long mode guests, and only
350 * if efer.sce is enabled.
352 if (find_msr_entry(vcpu
, MSR_K6_STAR
)) {
355 if (is_long_mode(vcpu
) && (vcpu
->shadow_efer
& EFER_SCE
))
360 vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR
,
361 virt_to_phys(vcpu
->guest_msrs
+ nr_skip
));
362 vmcs_writel(VM_EXIT_MSR_STORE_ADDR
,
363 virt_to_phys(vcpu
->guest_msrs
+ nr_skip
));
364 vmcs_writel(VM_EXIT_MSR_LOAD_ADDR
,
365 virt_to_phys(vcpu
->host_msrs
+ nr_skip
));
366 vmcs_write32(VM_EXIT_MSR_STORE_COUNT
, nr_good_msrs
); /* 22.2.2 */
367 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT
, nr_good_msrs
); /* 22.2.2 */
368 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT
, nr_good_msrs
); /* 22.2.2 */
372 * reads and returns guest's timestamp counter "register"
373 * guest_tsc = host_tsc + tsc_offset -- 21.3
375 static u64
guest_read_tsc(void)
377 u64 host_tsc
, tsc_offset
;
380 tsc_offset
= vmcs_read64(TSC_OFFSET
);
381 return host_tsc
+ tsc_offset
;
385 * writes 'guest_tsc' into guest's timestamp counter "register"
386 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
388 static void guest_write_tsc(u64 guest_tsc
)
393 vmcs_write64(TSC_OFFSET
, guest_tsc
- host_tsc
);
396 static void reload_tss(void)
398 #ifndef CONFIG_X86_64
401 * VT restores TR but not its size. Useless.
403 struct descriptor_table gdt
;
404 struct segment_descriptor
*descs
;
407 descs
= (void *)gdt
.base
;
408 descs
[GDT_ENTRY_TSS
].type
= 9; /* available TSS */
414 * Reads an msr value (of 'msr_index') into 'pdata'.
415 * Returns 0 on success, non-0 otherwise.
416 * Assumes vcpu_load() was already called.
418 static int vmx_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
421 struct vmx_msr_entry
*msr
;
424 printk(KERN_ERR
"BUG: get_msr called with NULL pdata\n");
431 data
= vmcs_readl(GUEST_FS_BASE
);
434 data
= vmcs_readl(GUEST_GS_BASE
);
437 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
439 case MSR_IA32_TIME_STAMP_COUNTER
:
440 data
= guest_read_tsc();
442 case MSR_IA32_SYSENTER_CS
:
443 data
= vmcs_read32(GUEST_SYSENTER_CS
);
445 case MSR_IA32_SYSENTER_EIP
:
446 data
= vmcs_readl(GUEST_SYSENTER_EIP
);
448 case MSR_IA32_SYSENTER_ESP
:
449 data
= vmcs_readl(GUEST_SYSENTER_ESP
);
452 msr
= find_msr_entry(vcpu
, msr_index
);
457 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
465 * Writes msr value into into the appropriate "register".
466 * Returns 0 on success, non-0 otherwise.
467 * Assumes vcpu_load() was already called.
469 static int vmx_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
471 struct vmx_msr_entry
*msr
;
475 return kvm_set_msr_common(vcpu
, msr_index
, data
);
477 vmcs_writel(GUEST_FS_BASE
, data
);
480 vmcs_writel(GUEST_GS_BASE
, data
);
483 case MSR_IA32_SYSENTER_CS
:
484 vmcs_write32(GUEST_SYSENTER_CS
, data
);
486 case MSR_IA32_SYSENTER_EIP
:
487 vmcs_writel(GUEST_SYSENTER_EIP
, data
);
489 case MSR_IA32_SYSENTER_ESP
:
490 vmcs_writel(GUEST_SYSENTER_ESP
, data
);
492 case MSR_IA32_TIME_STAMP_COUNTER
:
493 guest_write_tsc(data
);
496 msr
= find_msr_entry(vcpu
, msr_index
);
501 return kvm_set_msr_common(vcpu
, msr_index
, data
);
510 * Sync the rsp and rip registers into the vcpu structure. This allows
511 * registers to be accessed by indexing vcpu->regs.
513 static void vcpu_load_rsp_rip(struct kvm_vcpu
*vcpu
)
515 vcpu
->regs
[VCPU_REGS_RSP
] = vmcs_readl(GUEST_RSP
);
516 vcpu
->rip
= vmcs_readl(GUEST_RIP
);
520 * Syncs rsp and rip back into the vmcs. Should be called after possible
523 static void vcpu_put_rsp_rip(struct kvm_vcpu
*vcpu
)
525 vmcs_writel(GUEST_RSP
, vcpu
->regs
[VCPU_REGS_RSP
]);
526 vmcs_writel(GUEST_RIP
, vcpu
->rip
);
529 static int set_guest_debug(struct kvm_vcpu
*vcpu
, struct kvm_debug_guest
*dbg
)
531 unsigned long dr7
= 0x400;
532 u32 exception_bitmap
;
535 exception_bitmap
= vmcs_read32(EXCEPTION_BITMAP
);
536 old_singlestep
= vcpu
->guest_debug
.singlestep
;
538 vcpu
->guest_debug
.enabled
= dbg
->enabled
;
539 if (vcpu
->guest_debug
.enabled
) {
542 dr7
|= 0x200; /* exact */
543 for (i
= 0; i
< 4; ++i
) {
544 if (!dbg
->breakpoints
[i
].enabled
)
546 vcpu
->guest_debug
.bp
[i
] = dbg
->breakpoints
[i
].address
;
547 dr7
|= 2 << (i
*2); /* global enable */
548 dr7
|= 0 << (i
*4+16); /* execution breakpoint */
551 exception_bitmap
|= (1u << 1); /* Trap debug exceptions */
553 vcpu
->guest_debug
.singlestep
= dbg
->singlestep
;
555 exception_bitmap
&= ~(1u << 1); /* Ignore debug exceptions */
556 vcpu
->guest_debug
.singlestep
= 0;
559 if (old_singlestep
&& !vcpu
->guest_debug
.singlestep
) {
562 flags
= vmcs_readl(GUEST_RFLAGS
);
563 flags
&= ~(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
564 vmcs_writel(GUEST_RFLAGS
, flags
);
567 vmcs_write32(EXCEPTION_BITMAP
, exception_bitmap
);
568 vmcs_writel(GUEST_DR7
, dr7
);
573 static __init
int cpu_has_kvm_support(void)
575 unsigned long ecx
= cpuid_ecx(1);
576 return test_bit(5, &ecx
); /* CPUID.1:ECX.VMX[bit 5] -> VT */
579 static __init
int vmx_disabled_by_bios(void)
583 rdmsrl(MSR_IA32_FEATURE_CONTROL
, msr
);
584 return (msr
& 5) == 1; /* locked but not enabled */
587 static void hardware_enable(void *garbage
)
589 int cpu
= raw_smp_processor_id();
590 u64 phys_addr
= __pa(per_cpu(vmxarea
, cpu
));
593 rdmsrl(MSR_IA32_FEATURE_CONTROL
, old
);
595 /* enable and lock */
596 wrmsrl(MSR_IA32_FEATURE_CONTROL
, old
| 5);
597 write_cr4(read_cr4() | CR4_VMXE
); /* FIXME: not cpu hotplug safe */
598 asm volatile (ASM_VMX_VMXON_RAX
: : "a"(&phys_addr
), "m"(phys_addr
)
602 static void hardware_disable(void *garbage
)
604 asm volatile (ASM_VMX_VMXOFF
: : : "cc");
607 static __init
void setup_vmcs_descriptor(void)
609 u32 vmx_msr_low
, vmx_msr_high
;
611 rdmsr(MSR_IA32_VMX_BASIC
, vmx_msr_low
, vmx_msr_high
);
612 vmcs_descriptor
.size
= vmx_msr_high
& 0x1fff;
613 vmcs_descriptor
.order
= get_order(vmcs_descriptor
.size
);
614 vmcs_descriptor
.revision_id
= vmx_msr_low
;
617 static struct vmcs
*alloc_vmcs_cpu(int cpu
)
619 int node
= cpu_to_node(cpu
);
623 pages
= alloc_pages_node(node
, GFP_KERNEL
, vmcs_descriptor
.order
);
626 vmcs
= page_address(pages
);
627 memset(vmcs
, 0, vmcs_descriptor
.size
);
628 vmcs
->revision_id
= vmcs_descriptor
.revision_id
; /* vmcs revision id */
632 static struct vmcs
*alloc_vmcs(void)
634 return alloc_vmcs_cpu(raw_smp_processor_id());
637 static void free_vmcs(struct vmcs
*vmcs
)
639 free_pages((unsigned long)vmcs
, vmcs_descriptor
.order
);
642 static __exit
void free_kvm_area(void)
646 for_each_online_cpu(cpu
)
647 free_vmcs(per_cpu(vmxarea
, cpu
));
650 extern struct vmcs
*alloc_vmcs_cpu(int cpu
);
652 static __init
int alloc_kvm_area(void)
656 for_each_online_cpu(cpu
) {
659 vmcs
= alloc_vmcs_cpu(cpu
);
665 per_cpu(vmxarea
, cpu
) = vmcs
;
670 static __init
int hardware_setup(void)
672 setup_vmcs_descriptor();
673 return alloc_kvm_area();
676 static __exit
void hardware_unsetup(void)
681 static void update_exception_bitmap(struct kvm_vcpu
*vcpu
)
683 if (vcpu
->rmode
.active
)
684 vmcs_write32(EXCEPTION_BITMAP
, ~0);
686 vmcs_write32(EXCEPTION_BITMAP
, 1 << PF_VECTOR
);
689 static void fix_pmode_dataseg(int seg
, struct kvm_save_segment
*save
)
691 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
693 if (vmcs_readl(sf
->base
) == save
->base
&& (save
->base
& AR_S_MASK
)) {
694 vmcs_write16(sf
->selector
, save
->selector
);
695 vmcs_writel(sf
->base
, save
->base
);
696 vmcs_write32(sf
->limit
, save
->limit
);
697 vmcs_write32(sf
->ar_bytes
, save
->ar
);
699 u32 dpl
= (vmcs_read16(sf
->selector
) & SELECTOR_RPL_MASK
)
701 vmcs_write32(sf
->ar_bytes
, 0x93 | dpl
);
705 static void enter_pmode(struct kvm_vcpu
*vcpu
)
709 vcpu
->rmode
.active
= 0;
711 vmcs_writel(GUEST_TR_BASE
, vcpu
->rmode
.tr
.base
);
712 vmcs_write32(GUEST_TR_LIMIT
, vcpu
->rmode
.tr
.limit
);
713 vmcs_write32(GUEST_TR_AR_BYTES
, vcpu
->rmode
.tr
.ar
);
715 flags
= vmcs_readl(GUEST_RFLAGS
);
716 flags
&= ~(IOPL_MASK
| X86_EFLAGS_VM
);
717 flags
|= (vcpu
->rmode
.save_iopl
<< IOPL_SHIFT
);
718 vmcs_writel(GUEST_RFLAGS
, flags
);
720 vmcs_writel(GUEST_CR4
, (vmcs_readl(GUEST_CR4
) & ~CR4_VME_MASK
) |
721 (vmcs_readl(CR4_READ_SHADOW
) & CR4_VME_MASK
));
723 update_exception_bitmap(vcpu
);
725 fix_pmode_dataseg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
726 fix_pmode_dataseg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
727 fix_pmode_dataseg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
728 fix_pmode_dataseg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
730 vmcs_write16(GUEST_SS_SELECTOR
, 0);
731 vmcs_write32(GUEST_SS_AR_BYTES
, 0x93);
733 vmcs_write16(GUEST_CS_SELECTOR
,
734 vmcs_read16(GUEST_CS_SELECTOR
) & ~SELECTOR_RPL_MASK
);
735 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
738 static int rmode_tss_base(struct kvm
* kvm
)
740 gfn_t base_gfn
= kvm
->memslots
[0].base_gfn
+ kvm
->memslots
[0].npages
- 3;
741 return base_gfn
<< PAGE_SHIFT
;
744 static void fix_rmode_seg(int seg
, struct kvm_save_segment
*save
)
746 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
748 save
->selector
= vmcs_read16(sf
->selector
);
749 save
->base
= vmcs_readl(sf
->base
);
750 save
->limit
= vmcs_read32(sf
->limit
);
751 save
->ar
= vmcs_read32(sf
->ar_bytes
);
752 vmcs_write16(sf
->selector
, vmcs_readl(sf
->base
) >> 4);
753 vmcs_write32(sf
->limit
, 0xffff);
754 vmcs_write32(sf
->ar_bytes
, 0xf3);
757 static void enter_rmode(struct kvm_vcpu
*vcpu
)
761 vcpu
->rmode
.active
= 1;
763 vcpu
->rmode
.tr
.base
= vmcs_readl(GUEST_TR_BASE
);
764 vmcs_writel(GUEST_TR_BASE
, rmode_tss_base(vcpu
->kvm
));
766 vcpu
->rmode
.tr
.limit
= vmcs_read32(GUEST_TR_LIMIT
);
767 vmcs_write32(GUEST_TR_LIMIT
, RMODE_TSS_SIZE
- 1);
769 vcpu
->rmode
.tr
.ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
770 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
772 flags
= vmcs_readl(GUEST_RFLAGS
);
773 vcpu
->rmode
.save_iopl
= (flags
& IOPL_MASK
) >> IOPL_SHIFT
;
775 flags
|= IOPL_MASK
| X86_EFLAGS_VM
;
777 vmcs_writel(GUEST_RFLAGS
, flags
);
778 vmcs_writel(GUEST_CR4
, vmcs_readl(GUEST_CR4
) | CR4_VME_MASK
);
779 update_exception_bitmap(vcpu
);
781 vmcs_write16(GUEST_SS_SELECTOR
, vmcs_readl(GUEST_SS_BASE
) >> 4);
782 vmcs_write32(GUEST_SS_LIMIT
, 0xffff);
783 vmcs_write32(GUEST_SS_AR_BYTES
, 0xf3);
785 vmcs_write32(GUEST_CS_AR_BYTES
, 0xf3);
786 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
787 if (vmcs_readl(GUEST_CS_BASE
) == 0xffff0000)
788 vmcs_writel(GUEST_CS_BASE
, 0xf0000);
789 vmcs_write16(GUEST_CS_SELECTOR
, vmcs_readl(GUEST_CS_BASE
) >> 4);
791 fix_rmode_seg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
792 fix_rmode_seg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
793 fix_rmode_seg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
794 fix_rmode_seg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
799 static void enter_lmode(struct kvm_vcpu
*vcpu
)
803 guest_tr_ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
804 if ((guest_tr_ar
& AR_TYPE_MASK
) != AR_TYPE_BUSY_64_TSS
) {
805 printk(KERN_DEBUG
"%s: tss fixup for long mode. \n",
807 vmcs_write32(GUEST_TR_AR_BYTES
,
808 (guest_tr_ar
& ~AR_TYPE_MASK
)
809 | AR_TYPE_BUSY_64_TSS
);
812 vcpu
->shadow_efer
|= EFER_LMA
;
814 find_msr_entry(vcpu
, MSR_EFER
)->data
|= EFER_LMA
| EFER_LME
;
815 vmcs_write32(VM_ENTRY_CONTROLS
,
816 vmcs_read32(VM_ENTRY_CONTROLS
)
817 | VM_ENTRY_CONTROLS_IA32E_MASK
);
820 static void exit_lmode(struct kvm_vcpu
*vcpu
)
822 vcpu
->shadow_efer
&= ~EFER_LMA
;
824 vmcs_write32(VM_ENTRY_CONTROLS
,
825 vmcs_read32(VM_ENTRY_CONTROLS
)
826 & ~VM_ENTRY_CONTROLS_IA32E_MASK
);
831 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu
*vcpu
)
833 vcpu
->cr4
&= KVM_GUEST_CR4_MASK
;
834 vcpu
->cr4
|= vmcs_readl(GUEST_CR4
) & ~KVM_GUEST_CR4_MASK
;
837 static void vmx_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
839 if (vcpu
->rmode
.active
&& (cr0
& CR0_PE_MASK
))
842 if (!vcpu
->rmode
.active
&& !(cr0
& CR0_PE_MASK
))
846 if (vcpu
->shadow_efer
& EFER_LME
) {
847 if (!is_paging(vcpu
) && (cr0
& CR0_PG_MASK
))
849 if (is_paging(vcpu
) && !(cr0
& CR0_PG_MASK
))
854 if (!(cr0
& CR0_TS_MASK
)) {
855 vcpu
->fpu_active
= 1;
856 vmcs_clear_bits(EXCEPTION_BITMAP
, CR0_TS_MASK
);
859 vmcs_writel(CR0_READ_SHADOW
, cr0
);
860 vmcs_writel(GUEST_CR0
,
861 (cr0
& ~KVM_GUEST_CR0_MASK
) | KVM_VM_CR0_ALWAYS_ON
);
865 static void vmx_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
867 vmcs_writel(GUEST_CR3
, cr3
);
869 if (!(vcpu
->cr0
& CR0_TS_MASK
)) {
870 vcpu
->fpu_active
= 0;
871 vmcs_set_bits(GUEST_CR0
, CR0_TS_MASK
);
872 vmcs_set_bits(EXCEPTION_BITMAP
, 1 << NM_VECTOR
);
876 static void vmx_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
878 vmcs_writel(CR4_READ_SHADOW
, cr4
);
879 vmcs_writel(GUEST_CR4
, cr4
| (vcpu
->rmode
.active
?
880 KVM_RMODE_VM_CR4_ALWAYS_ON
: KVM_PMODE_VM_CR4_ALWAYS_ON
));
886 static void vmx_set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
888 struct vmx_msr_entry
*msr
= find_msr_entry(vcpu
, MSR_EFER
);
890 vcpu
->shadow_efer
= efer
;
891 if (efer
& EFER_LMA
) {
892 vmcs_write32(VM_ENTRY_CONTROLS
,
893 vmcs_read32(VM_ENTRY_CONTROLS
) |
894 VM_ENTRY_CONTROLS_IA32E_MASK
);
898 vmcs_write32(VM_ENTRY_CONTROLS
,
899 vmcs_read32(VM_ENTRY_CONTROLS
) &
900 ~VM_ENTRY_CONTROLS_IA32E_MASK
);
902 msr
->data
= efer
& ~EFER_LME
;
909 static u64
vmx_get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
911 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
913 return vmcs_readl(sf
->base
);
916 static void vmx_get_segment(struct kvm_vcpu
*vcpu
,
917 struct kvm_segment
*var
, int seg
)
919 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
922 var
->base
= vmcs_readl(sf
->base
);
923 var
->limit
= vmcs_read32(sf
->limit
);
924 var
->selector
= vmcs_read16(sf
->selector
);
925 ar
= vmcs_read32(sf
->ar_bytes
);
926 if (ar
& AR_UNUSABLE_MASK
)
929 var
->s
= (ar
>> 4) & 1;
930 var
->dpl
= (ar
>> 5) & 3;
931 var
->present
= (ar
>> 7) & 1;
932 var
->avl
= (ar
>> 12) & 1;
933 var
->l
= (ar
>> 13) & 1;
934 var
->db
= (ar
>> 14) & 1;
935 var
->g
= (ar
>> 15) & 1;
936 var
->unusable
= (ar
>> 16) & 1;
939 static void vmx_set_segment(struct kvm_vcpu
*vcpu
,
940 struct kvm_segment
*var
, int seg
)
942 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
945 vmcs_writel(sf
->base
, var
->base
);
946 vmcs_write32(sf
->limit
, var
->limit
);
947 vmcs_write16(sf
->selector
, var
->selector
);
948 if (vcpu
->rmode
.active
&& var
->s
) {
950 * Hack real-mode segments into vm86 compatibility.
952 if (var
->base
== 0xffff0000 && var
->selector
== 0xf000)
953 vmcs_writel(sf
->base
, 0xf0000);
955 } else if (var
->unusable
)
959 ar
|= (var
->s
& 1) << 4;
960 ar
|= (var
->dpl
& 3) << 5;
961 ar
|= (var
->present
& 1) << 7;
962 ar
|= (var
->avl
& 1) << 12;
963 ar
|= (var
->l
& 1) << 13;
964 ar
|= (var
->db
& 1) << 14;
965 ar
|= (var
->g
& 1) << 15;
967 if (ar
== 0) /* a 0 value means unusable */
968 ar
= AR_UNUSABLE_MASK
;
969 vmcs_write32(sf
->ar_bytes
, ar
);
972 static void vmx_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
974 u32 ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
976 *db
= (ar
>> 14) & 1;
980 static void vmx_get_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
982 dt
->limit
= vmcs_read32(GUEST_IDTR_LIMIT
);
983 dt
->base
= vmcs_readl(GUEST_IDTR_BASE
);
986 static void vmx_set_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
988 vmcs_write32(GUEST_IDTR_LIMIT
, dt
->limit
);
989 vmcs_writel(GUEST_IDTR_BASE
, dt
->base
);
992 static void vmx_get_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
994 dt
->limit
= vmcs_read32(GUEST_GDTR_LIMIT
);
995 dt
->base
= vmcs_readl(GUEST_GDTR_BASE
);
998 static void vmx_set_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1000 vmcs_write32(GUEST_GDTR_LIMIT
, dt
->limit
);
1001 vmcs_writel(GUEST_GDTR_BASE
, dt
->base
);
1004 static int init_rmode_tss(struct kvm
* kvm
)
1006 struct page
*p1
, *p2
, *p3
;
1007 gfn_t fn
= rmode_tss_base(kvm
) >> PAGE_SHIFT
;
1010 p1
= gfn_to_page(kvm
, fn
++);
1011 p2
= gfn_to_page(kvm
, fn
++);
1012 p3
= gfn_to_page(kvm
, fn
);
1014 if (!p1
|| !p2
|| !p3
) {
1015 kvm_printf(kvm
,"%s: gfn_to_page failed\n", __FUNCTION__
);
1019 page
= kmap_atomic(p1
, KM_USER0
);
1020 memset(page
, 0, PAGE_SIZE
);
1021 *(u16
*)(page
+ 0x66) = TSS_BASE_SIZE
+ TSS_REDIRECTION_SIZE
;
1022 kunmap_atomic(page
, KM_USER0
);
1024 page
= kmap_atomic(p2
, KM_USER0
);
1025 memset(page
, 0, PAGE_SIZE
);
1026 kunmap_atomic(page
, KM_USER0
);
1028 page
= kmap_atomic(p3
, KM_USER0
);
1029 memset(page
, 0, PAGE_SIZE
);
1030 *(page
+ RMODE_TSS_SIZE
- 2 * PAGE_SIZE
- 1) = ~0;
1031 kunmap_atomic(page
, KM_USER0
);
1036 static void vmcs_write32_fixedbits(u32 msr
, u32 vmcs_field
, u32 val
)
1038 u32 msr_high
, msr_low
;
1040 rdmsr(msr
, msr_low
, msr_high
);
1044 vmcs_write32(vmcs_field
, val
);
1047 static void seg_setup(int seg
)
1049 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1051 vmcs_write16(sf
->selector
, 0);
1052 vmcs_writel(sf
->base
, 0);
1053 vmcs_write32(sf
->limit
, 0xffff);
1054 vmcs_write32(sf
->ar_bytes
, 0x93);
1058 * Sets up the vmcs for emulated real mode.
1060 static int vmx_vcpu_setup(struct kvm_vcpu
*vcpu
)
1062 u32 host_sysenter_cs
;
1065 struct descriptor_table dt
;
1068 extern asmlinkage
void kvm_vmx_return(void);
1070 if (!init_rmode_tss(vcpu
->kvm
)) {
1075 memset(vcpu
->regs
, 0, sizeof(vcpu
->regs
));
1076 vcpu
->regs
[VCPU_REGS_RDX
] = get_rdx_init_val();
1078 vcpu
->apic_base
= 0xfee00000 |
1079 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP
|
1080 MSR_IA32_APICBASE_ENABLE
;
1085 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1086 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1088 vmcs_write16(GUEST_CS_SELECTOR
, 0xf000);
1089 vmcs_writel(GUEST_CS_BASE
, 0x000f0000);
1090 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
1091 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
1093 seg_setup(VCPU_SREG_DS
);
1094 seg_setup(VCPU_SREG_ES
);
1095 seg_setup(VCPU_SREG_FS
);
1096 seg_setup(VCPU_SREG_GS
);
1097 seg_setup(VCPU_SREG_SS
);
1099 vmcs_write16(GUEST_TR_SELECTOR
, 0);
1100 vmcs_writel(GUEST_TR_BASE
, 0);
1101 vmcs_write32(GUEST_TR_LIMIT
, 0xffff);
1102 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
1104 vmcs_write16(GUEST_LDTR_SELECTOR
, 0);
1105 vmcs_writel(GUEST_LDTR_BASE
, 0);
1106 vmcs_write32(GUEST_LDTR_LIMIT
, 0xffff);
1107 vmcs_write32(GUEST_LDTR_AR_BYTES
, 0x00082);
1109 vmcs_write32(GUEST_SYSENTER_CS
, 0);
1110 vmcs_writel(GUEST_SYSENTER_ESP
, 0);
1111 vmcs_writel(GUEST_SYSENTER_EIP
, 0);
1113 vmcs_writel(GUEST_RFLAGS
, 0x02);
1114 vmcs_writel(GUEST_RIP
, 0xfff0);
1115 vmcs_writel(GUEST_RSP
, 0);
1117 //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1118 vmcs_writel(GUEST_DR7
, 0x400);
1120 vmcs_writel(GUEST_GDTR_BASE
, 0);
1121 vmcs_write32(GUEST_GDTR_LIMIT
, 0xffff);
1123 vmcs_writel(GUEST_IDTR_BASE
, 0);
1124 vmcs_write32(GUEST_IDTR_LIMIT
, 0xffff);
1126 vmcs_write32(GUEST_ACTIVITY_STATE
, 0);
1127 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
, 0);
1128 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS
, 0);
1131 vmcs_write64(IO_BITMAP_A
, 0);
1132 vmcs_write64(IO_BITMAP_B
, 0);
1136 vmcs_write64(VMCS_LINK_POINTER
, -1ull); /* 22.3.1.5 */
1138 /* Special registers */
1139 vmcs_write64(GUEST_IA32_DEBUGCTL
, 0);
1142 vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS
,
1143 PIN_BASED_VM_EXEC_CONTROL
,
1144 PIN_BASED_EXT_INTR_MASK
/* 20.6.1 */
1145 | PIN_BASED_NMI_EXITING
/* 20.6.1 */
1147 vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS
,
1148 CPU_BASED_VM_EXEC_CONTROL
,
1149 CPU_BASED_HLT_EXITING
/* 20.6.2 */
1150 | CPU_BASED_CR8_LOAD_EXITING
/* 20.6.2 */
1151 | CPU_BASED_CR8_STORE_EXITING
/* 20.6.2 */
1152 | CPU_BASED_UNCOND_IO_EXITING
/* 20.6.2 */
1153 | CPU_BASED_MOV_DR_EXITING
1154 | CPU_BASED_USE_TSC_OFFSETING
/* 21.3 */
1157 vmcs_write32(EXCEPTION_BITMAP
, 1 << PF_VECTOR
);
1158 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK
, 0);
1159 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH
, 0);
1160 vmcs_write32(CR3_TARGET_COUNT
, 0); /* 22.2.1 */
1162 vmcs_writel(HOST_CR0
, read_cr0()); /* 22.2.3 */
1163 vmcs_writel(HOST_CR4
, read_cr4()); /* 22.2.3, 22.2.5 */
1164 vmcs_writel(HOST_CR3
, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1166 vmcs_write16(HOST_CS_SELECTOR
, __KERNEL_CS
); /* 22.2.4 */
1167 vmcs_write16(HOST_DS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1168 vmcs_write16(HOST_ES_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1169 vmcs_write16(HOST_FS_SELECTOR
, read_fs()); /* 22.2.4 */
1170 vmcs_write16(HOST_GS_SELECTOR
, read_gs()); /* 22.2.4 */
1171 vmcs_write16(HOST_SS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1172 #ifdef CONFIG_X86_64
1173 rdmsrl(MSR_FS_BASE
, a
);
1174 vmcs_writel(HOST_FS_BASE
, a
); /* 22.2.4 */
1175 rdmsrl(MSR_GS_BASE
, a
);
1176 vmcs_writel(HOST_GS_BASE
, a
); /* 22.2.4 */
1178 vmcs_writel(HOST_FS_BASE
, 0); /* 22.2.4 */
1179 vmcs_writel(HOST_GS_BASE
, 0); /* 22.2.4 */
1182 vmcs_write16(HOST_TR_SELECTOR
, GDT_ENTRY_TSS
*8); /* 22.2.4 */
1185 vmcs_writel(HOST_IDTR_BASE
, dt
.base
); /* 22.2.4 */
1188 vmcs_writel(HOST_RIP
, (unsigned long)kvm_vmx_return
); /* 22.2.5 */
1190 rdmsr(MSR_IA32_SYSENTER_CS
, host_sysenter_cs
, junk
);
1191 vmcs_write32(HOST_IA32_SYSENTER_CS
, host_sysenter_cs
);
1192 rdmsrl(MSR_IA32_SYSENTER_ESP
, a
);
1193 vmcs_writel(HOST_IA32_SYSENTER_ESP
, a
); /* 22.2.3 */
1194 rdmsrl(MSR_IA32_SYSENTER_EIP
, a
);
1195 vmcs_writel(HOST_IA32_SYSENTER_EIP
, a
); /* 22.2.3 */
1197 for (i
= 0; i
< NR_VMX_MSR
; ++i
) {
1198 u32 index
= vmx_msr_index
[i
];
1199 u32 data_low
, data_high
;
1201 int j
= vcpu
->nmsrs
;
1203 if (rdmsr_safe(index
, &data_low
, &data_high
) < 0)
1205 if (wrmsr_safe(index
, data_low
, data_high
) < 0)
1207 data
= data_low
| ((u64
)data_high
<< 32);
1208 vcpu
->host_msrs
[j
].index
= index
;
1209 vcpu
->host_msrs
[j
].reserved
= 0;
1210 vcpu
->host_msrs
[j
].data
= data
;
1211 vcpu
->guest_msrs
[j
] = vcpu
->host_msrs
[j
];
1212 #ifdef CONFIG_X86_64
1213 if (index
== MSR_KERNEL_GS_BASE
)
1214 msr_offset_kernel_gs_base
= j
;
1221 vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS
, VM_EXIT_CONTROLS
,
1222 (HOST_IS_64
<< 9)); /* 22.2,1, 20.7.1 */
1224 /* 22.2.1, 20.8.1 */
1225 vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS
,
1226 VM_ENTRY_CONTROLS
, 0);
1227 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
, 0); /* 22.2.1 */
1229 #ifdef CONFIG_X86_64
1230 vmcs_writel(VIRTUAL_APIC_PAGE_ADDR
, 0);
1231 vmcs_writel(TPR_THRESHOLD
, 0);
1234 vmcs_writel(CR0_GUEST_HOST_MASK
, ~0UL);
1235 vmcs_writel(CR4_GUEST_HOST_MASK
, KVM_GUEST_CR4_MASK
);
1237 vcpu
->cr0
= 0x60000010;
1238 vmx_set_cr0(vcpu
, vcpu
->cr0
); // enter rmode
1239 vmx_set_cr4(vcpu
, 0);
1240 #ifdef CONFIG_X86_64
1241 vmx_set_efer(vcpu
, 0);
1250 static void inject_rmode_irq(struct kvm_vcpu
*vcpu
, int irq
)
1255 unsigned long flags
;
1256 unsigned long ss_base
= vmcs_readl(GUEST_SS_BASE
);
1257 u16 sp
= vmcs_readl(GUEST_RSP
);
1258 u32 ss_limit
= vmcs_read32(GUEST_SS_LIMIT
);
1260 if (sp
> ss_limit
|| sp
< 6 ) {
1261 vcpu_printf(vcpu
, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1263 vmcs_readl(GUEST_RSP
),
1264 vmcs_readl(GUEST_SS_BASE
),
1265 vmcs_read32(GUEST_SS_LIMIT
));
1269 if (kvm_read_guest(vcpu
, irq
* sizeof(ent
), sizeof(ent
), &ent
) !=
1271 vcpu_printf(vcpu
, "%s: read guest err\n", __FUNCTION__
);
1275 flags
= vmcs_readl(GUEST_RFLAGS
);
1276 cs
= vmcs_readl(GUEST_CS_BASE
) >> 4;
1277 ip
= vmcs_readl(GUEST_RIP
);
1280 if (kvm_write_guest(vcpu
, ss_base
+ sp
- 2, 2, &flags
) != 2 ||
1281 kvm_write_guest(vcpu
, ss_base
+ sp
- 4, 2, &cs
) != 2 ||
1282 kvm_write_guest(vcpu
, ss_base
+ sp
- 6, 2, &ip
) != 2) {
1283 vcpu_printf(vcpu
, "%s: write guest err\n", __FUNCTION__
);
1287 vmcs_writel(GUEST_RFLAGS
, flags
&
1288 ~( X86_EFLAGS_IF
| X86_EFLAGS_AC
| X86_EFLAGS_TF
));
1289 vmcs_write16(GUEST_CS_SELECTOR
, ent
[1]) ;
1290 vmcs_writel(GUEST_CS_BASE
, ent
[1] << 4);
1291 vmcs_writel(GUEST_RIP
, ent
[0]);
1292 vmcs_writel(GUEST_RSP
, (vmcs_readl(GUEST_RSP
) & ~0xffff) | (sp
- 6));
1295 static void kvm_do_inject_irq(struct kvm_vcpu
*vcpu
)
1297 int word_index
= __ffs(vcpu
->irq_summary
);
1298 int bit_index
= __ffs(vcpu
->irq_pending
[word_index
]);
1299 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
1301 clear_bit(bit_index
, &vcpu
->irq_pending
[word_index
]);
1302 if (!vcpu
->irq_pending
[word_index
])
1303 clear_bit(word_index
, &vcpu
->irq_summary
);
1305 if (vcpu
->rmode
.active
) {
1306 inject_rmode_irq(vcpu
, irq
);
1309 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1310 irq
| INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
1314 static void do_interrupt_requests(struct kvm_vcpu
*vcpu
,
1315 struct kvm_run
*kvm_run
)
1317 u32 cpu_based_vm_exec_control
;
1319 vcpu
->interrupt_window_open
=
1320 ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) &&
1321 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0);
1323 if (vcpu
->interrupt_window_open
&&
1324 vcpu
->irq_summary
&&
1325 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD
) & INTR_INFO_VALID_MASK
))
1327 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1329 kvm_do_inject_irq(vcpu
);
1331 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
1332 if (!vcpu
->interrupt_window_open
&&
1333 (vcpu
->irq_summary
|| kvm_run
->request_interrupt_window
))
1335 * Interrupts blocked. Wait for unblock.
1337 cpu_based_vm_exec_control
|= CPU_BASED_VIRTUAL_INTR_PENDING
;
1339 cpu_based_vm_exec_control
&= ~CPU_BASED_VIRTUAL_INTR_PENDING
;
1340 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
1343 static void kvm_guest_debug_pre(struct kvm_vcpu
*vcpu
)
1345 struct kvm_guest_debug
*dbg
= &vcpu
->guest_debug
;
1347 set_debugreg(dbg
->bp
[0], 0);
1348 set_debugreg(dbg
->bp
[1], 1);
1349 set_debugreg(dbg
->bp
[2], 2);
1350 set_debugreg(dbg
->bp
[3], 3);
1352 if (dbg
->singlestep
) {
1353 unsigned long flags
;
1355 flags
= vmcs_readl(GUEST_RFLAGS
);
1356 flags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
1357 vmcs_writel(GUEST_RFLAGS
, flags
);
1361 static int handle_rmode_exception(struct kvm_vcpu
*vcpu
,
1362 int vec
, u32 err_code
)
1364 if (!vcpu
->rmode
.active
)
1367 if (vec
== GP_VECTOR
&& err_code
== 0)
1368 if (emulate_instruction(vcpu
, NULL
, 0, 0) == EMULATE_DONE
)
1373 static int handle_exception(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1375 u32 intr_info
, error_code
;
1376 unsigned long cr2
, rip
;
1378 enum emulation_result er
;
1381 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1382 intr_info
= vmcs_read32(VM_EXIT_INTR_INFO
);
1384 if ((vect_info
& VECTORING_INFO_VALID_MASK
) &&
1385 !is_page_fault(intr_info
)) {
1386 printk(KERN_ERR
"%s: unexpected, vectoring info 0x%x "
1387 "intr info 0x%x\n", __FUNCTION__
, vect_info
, intr_info
);
1390 if (is_external_interrupt(vect_info
)) {
1391 int irq
= vect_info
& VECTORING_INFO_VECTOR_MASK
;
1392 set_bit(irq
, vcpu
->irq_pending
);
1393 set_bit(irq
/ BITS_PER_LONG
, &vcpu
->irq_summary
);
1396 if ((intr_info
& INTR_INFO_INTR_TYPE_MASK
) == 0x200) { /* nmi */
1401 if (is_no_device(intr_info
)) {
1402 vcpu
->fpu_active
= 1;
1403 vmcs_clear_bits(EXCEPTION_BITMAP
, 1 << NM_VECTOR
);
1404 if (!(vcpu
->cr0
& CR0_TS_MASK
))
1405 vmcs_clear_bits(GUEST_CR0
, CR0_TS_MASK
);
1410 rip
= vmcs_readl(GUEST_RIP
);
1411 if (intr_info
& INTR_INFO_DELIEVER_CODE_MASK
)
1412 error_code
= vmcs_read32(VM_EXIT_INTR_ERROR_CODE
);
1413 if (is_page_fault(intr_info
)) {
1414 cr2
= vmcs_readl(EXIT_QUALIFICATION
);
1416 spin_lock(&vcpu
->kvm
->lock
);
1417 r
= kvm_mmu_page_fault(vcpu
, cr2
, error_code
);
1419 spin_unlock(&vcpu
->kvm
->lock
);
1423 spin_unlock(&vcpu
->kvm
->lock
);
1427 er
= emulate_instruction(vcpu
, kvm_run
, cr2
, error_code
);
1428 spin_unlock(&vcpu
->kvm
->lock
);
1433 case EMULATE_DO_MMIO
:
1434 ++vcpu
->stat
.mmio_exits
;
1435 kvm_run
->exit_reason
= KVM_EXIT_MMIO
;
1438 vcpu_printf(vcpu
, "%s: emulate fail\n", __FUNCTION__
);
1445 if (vcpu
->rmode
.active
&&
1446 handle_rmode_exception(vcpu
, intr_info
& INTR_INFO_VECTOR_MASK
,
1450 if ((intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
)) == (INTR_TYPE_EXCEPTION
| 1)) {
1451 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
1454 kvm_run
->exit_reason
= KVM_EXIT_EXCEPTION
;
1455 kvm_run
->ex
.exception
= intr_info
& INTR_INFO_VECTOR_MASK
;
1456 kvm_run
->ex
.error_code
= error_code
;
1460 static int handle_external_interrupt(struct kvm_vcpu
*vcpu
,
1461 struct kvm_run
*kvm_run
)
1463 ++vcpu
->stat
.irq_exits
;
1467 static int handle_triple_fault(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1469 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
1473 static int get_io_count(struct kvm_vcpu
*vcpu
, unsigned long *count
)
1480 if ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_VM
)) {
1483 u32 cs_ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
1485 countr_size
= (cs_ar
& AR_L_MASK
) ? 8:
1486 (cs_ar
& AR_DB_MASK
) ? 4: 2;
1489 rip
= vmcs_readl(GUEST_RIP
);
1490 if (countr_size
!= 8)
1491 rip
+= vmcs_readl(GUEST_CS_BASE
);
1493 n
= kvm_read_guest(vcpu
, rip
, sizeof(inst
), &inst
);
1495 for (i
= 0; i
< n
; i
++) {
1496 switch (((u8
*)&inst
)[i
]) {
1509 countr_size
= (countr_size
== 2) ? 4: (countr_size
>> 1);
1517 *count
= vcpu
->regs
[VCPU_REGS_RCX
] & (~0ULL >> (64 - countr_size
));
1518 //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1522 static int handle_io(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1524 u64 exit_qualification
;
1525 int size
, down
, in
, string
, rep
;
1527 unsigned long count
;
1530 ++vcpu
->stat
.io_exits
;
1531 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1532 in
= (exit_qualification
& 8) != 0;
1533 size
= (exit_qualification
& 7) + 1;
1534 string
= (exit_qualification
& 16) != 0;
1535 down
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_DF
) != 0;
1537 rep
= (exit_qualification
& 32) != 0;
1538 port
= exit_qualification
>> 16;
1541 if (rep
&& !get_io_count(vcpu
, &count
))
1543 address
= vmcs_readl(GUEST_LINEAR_ADDRESS
);
1545 return kvm_setup_pio(vcpu
, kvm_run
, in
, size
, count
, string
, down
,
1546 address
, rep
, port
);
1550 vmx_patch_hypercall(struct kvm_vcpu
*vcpu
, unsigned char *hypercall
)
1553 * Patch in the VMCALL instruction:
1555 hypercall
[0] = 0x0f;
1556 hypercall
[1] = 0x01;
1557 hypercall
[2] = 0xc1;
1558 hypercall
[3] = 0xc3;
1561 static int handle_cr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1563 u64 exit_qualification
;
1567 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1568 cr
= exit_qualification
& 15;
1569 reg
= (exit_qualification
>> 8) & 15;
1570 switch ((exit_qualification
>> 4) & 3) {
1571 case 0: /* mov to cr */
1574 vcpu_load_rsp_rip(vcpu
);
1575 set_cr0(vcpu
, vcpu
->regs
[reg
]);
1576 skip_emulated_instruction(vcpu
);
1579 vcpu_load_rsp_rip(vcpu
);
1580 set_cr3(vcpu
, vcpu
->regs
[reg
]);
1581 skip_emulated_instruction(vcpu
);
1584 vcpu_load_rsp_rip(vcpu
);
1585 set_cr4(vcpu
, vcpu
->regs
[reg
]);
1586 skip_emulated_instruction(vcpu
);
1589 vcpu_load_rsp_rip(vcpu
);
1590 set_cr8(vcpu
, vcpu
->regs
[reg
]);
1591 skip_emulated_instruction(vcpu
);
1596 vcpu_load_rsp_rip(vcpu
);
1597 vcpu
->fpu_active
= 1;
1598 vmcs_clear_bits(EXCEPTION_BITMAP
, 1 << NM_VECTOR
);
1599 vmcs_clear_bits(GUEST_CR0
, CR0_TS_MASK
);
1600 vcpu
->cr0
&= ~CR0_TS_MASK
;
1601 vmcs_writel(CR0_READ_SHADOW
, vcpu
->cr0
);
1602 skip_emulated_instruction(vcpu
);
1604 case 1: /*mov from cr*/
1607 vcpu_load_rsp_rip(vcpu
);
1608 vcpu
->regs
[reg
] = vcpu
->cr3
;
1609 vcpu_put_rsp_rip(vcpu
);
1610 skip_emulated_instruction(vcpu
);
1613 vcpu_load_rsp_rip(vcpu
);
1614 vcpu
->regs
[reg
] = vcpu
->cr8
;
1615 vcpu_put_rsp_rip(vcpu
);
1616 skip_emulated_instruction(vcpu
);
1621 lmsw(vcpu
, (exit_qualification
>> LMSW_SOURCE_DATA_SHIFT
) & 0x0f);
1623 skip_emulated_instruction(vcpu
);
1628 kvm_run
->exit_reason
= 0;
1629 printk(KERN_ERR
"kvm: unhandled control register: op %d cr %d\n",
1630 (int)(exit_qualification
>> 4) & 3, cr
);
1634 static int handle_dr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1636 u64 exit_qualification
;
1641 * FIXME: this code assumes the host is debugging the guest.
1642 * need to deal with guest debugging itself too.
1644 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1645 dr
= exit_qualification
& 7;
1646 reg
= (exit_qualification
>> 8) & 15;
1647 vcpu_load_rsp_rip(vcpu
);
1648 if (exit_qualification
& 16) {
1660 vcpu
->regs
[reg
] = val
;
1664 vcpu_put_rsp_rip(vcpu
);
1665 skip_emulated_instruction(vcpu
);
1669 static int handle_cpuid(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1671 kvm_emulate_cpuid(vcpu
);
1675 static int handle_rdmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1677 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1680 if (vmx_get_msr(vcpu
, ecx
, &data
)) {
1681 vmx_inject_gp(vcpu
, 0);
1685 /* FIXME: handling of bits 32:63 of rax, rdx */
1686 vcpu
->regs
[VCPU_REGS_RAX
] = data
& -1u;
1687 vcpu
->regs
[VCPU_REGS_RDX
] = (data
>> 32) & -1u;
1688 skip_emulated_instruction(vcpu
);
1692 static int handle_wrmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1694 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1695 u64 data
= (vcpu
->regs
[VCPU_REGS_RAX
] & -1u)
1696 | ((u64
)(vcpu
->regs
[VCPU_REGS_RDX
] & -1u) << 32);
1698 if (vmx_set_msr(vcpu
, ecx
, data
) != 0) {
1699 vmx_inject_gp(vcpu
, 0);
1703 skip_emulated_instruction(vcpu
);
1707 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
,
1708 struct kvm_run
*kvm_run
)
1710 kvm_run
->if_flag
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) != 0;
1711 kvm_run
->cr8
= vcpu
->cr8
;
1712 kvm_run
->apic_base
= vcpu
->apic_base
;
1713 kvm_run
->ready_for_interrupt_injection
= (vcpu
->interrupt_window_open
&&
1714 vcpu
->irq_summary
== 0);
1717 static int handle_interrupt_window(struct kvm_vcpu
*vcpu
,
1718 struct kvm_run
*kvm_run
)
1721 * If the user space waits to inject interrupts, exit as soon as
1724 if (kvm_run
->request_interrupt_window
&&
1725 !vcpu
->irq_summary
) {
1726 kvm_run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
1727 ++vcpu
->stat
.irq_window_exits
;
1733 static int handle_halt(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1735 skip_emulated_instruction(vcpu
);
1736 if (vcpu
->irq_summary
)
1739 kvm_run
->exit_reason
= KVM_EXIT_HLT
;
1740 ++vcpu
->stat
.halt_exits
;
1744 static int handle_vmcall(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1746 skip_emulated_instruction(vcpu
);
1747 return kvm_hypercall(vcpu
, kvm_run
);
1751 * The exit handlers return 1 if the exit was handled fully and guest execution
1752 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
1753 * to be done to userspace and return 0.
1755 static int (*kvm_vmx_exit_handlers
[])(struct kvm_vcpu
*vcpu
,
1756 struct kvm_run
*kvm_run
) = {
1757 [EXIT_REASON_EXCEPTION_NMI
] = handle_exception
,
1758 [EXIT_REASON_EXTERNAL_INTERRUPT
] = handle_external_interrupt
,
1759 [EXIT_REASON_TRIPLE_FAULT
] = handle_triple_fault
,
1760 [EXIT_REASON_IO_INSTRUCTION
] = handle_io
,
1761 [EXIT_REASON_CR_ACCESS
] = handle_cr
,
1762 [EXIT_REASON_DR_ACCESS
] = handle_dr
,
1763 [EXIT_REASON_CPUID
] = handle_cpuid
,
1764 [EXIT_REASON_MSR_READ
] = handle_rdmsr
,
1765 [EXIT_REASON_MSR_WRITE
] = handle_wrmsr
,
1766 [EXIT_REASON_PENDING_INTERRUPT
] = handle_interrupt_window
,
1767 [EXIT_REASON_HLT
] = handle_halt
,
1768 [EXIT_REASON_VMCALL
] = handle_vmcall
,
1771 static const int kvm_vmx_max_exit_handlers
=
1772 sizeof(kvm_vmx_exit_handlers
) / sizeof(*kvm_vmx_exit_handlers
);
1775 * The guest has exited. See if we can fix it or if we need userspace
1778 static int kvm_handle_exit(struct kvm_run
*kvm_run
, struct kvm_vcpu
*vcpu
)
1780 u32 vectoring_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1781 u32 exit_reason
= vmcs_read32(VM_EXIT_REASON
);
1783 if ( (vectoring_info
& VECTORING_INFO_VALID_MASK
) &&
1784 exit_reason
!= EXIT_REASON_EXCEPTION_NMI
)
1785 printk(KERN_WARNING
"%s: unexpected, valid vectoring info and "
1786 "exit reason is 0x%x\n", __FUNCTION__
, exit_reason
);
1787 if (exit_reason
< kvm_vmx_max_exit_handlers
1788 && kvm_vmx_exit_handlers
[exit_reason
])
1789 return kvm_vmx_exit_handlers
[exit_reason
](vcpu
, kvm_run
);
1791 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
1792 kvm_run
->hw
.hardware_exit_reason
= exit_reason
;
1798 * Check if userspace requested an interrupt window, and that the
1799 * interrupt window is open.
1801 * No need to exit to userspace if we already have an interrupt queued.
1803 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
,
1804 struct kvm_run
*kvm_run
)
1806 return (!vcpu
->irq_summary
&&
1807 kvm_run
->request_interrupt_window
&&
1808 vcpu
->interrupt_window_open
&&
1809 (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
));
1812 static int vmx_vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1815 u16 fs_sel
, gs_sel
, ldt_sel
;
1816 int fs_gs_ldt_reload_needed
;
1821 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
1822 * allow segment selectors with cpl > 0 or ti == 1.
1826 ldt_sel
= read_ldt();
1827 fs_gs_ldt_reload_needed
= (fs_sel
& 7) | (gs_sel
& 7) | ldt_sel
;
1828 if (!fs_gs_ldt_reload_needed
) {
1829 vmcs_write16(HOST_FS_SELECTOR
, fs_sel
);
1830 vmcs_write16(HOST_GS_SELECTOR
, gs_sel
);
1832 vmcs_write16(HOST_FS_SELECTOR
, 0);
1833 vmcs_write16(HOST_GS_SELECTOR
, 0);
1836 #ifdef CONFIG_X86_64
1837 vmcs_writel(HOST_FS_BASE
, read_msr(MSR_FS_BASE
));
1838 vmcs_writel(HOST_GS_BASE
, read_msr(MSR_GS_BASE
));
1840 vmcs_writel(HOST_FS_BASE
, segment_base(fs_sel
));
1841 vmcs_writel(HOST_GS_BASE
, segment_base(gs_sel
));
1844 if (!vcpu
->mmio_read_completed
)
1845 do_interrupt_requests(vcpu
, kvm_run
);
1847 if (vcpu
->guest_debug
.enabled
)
1848 kvm_guest_debug_pre(vcpu
);
1850 if (vcpu
->fpu_active
) {
1851 fx_save(vcpu
->host_fx_image
);
1852 fx_restore(vcpu
->guest_fx_image
);
1855 * Loading guest fpu may have cleared host cr0.ts
1857 vmcs_writel(HOST_CR0
, read_cr0());
1859 #ifdef CONFIG_X86_64
1860 if (is_long_mode(vcpu
)) {
1861 save_msrs(vcpu
->host_msrs
+ msr_offset_kernel_gs_base
, 1);
1862 load_msrs(vcpu
->guest_msrs
, NR_BAD_MSRS
);
1867 /* Store host registers */
1869 #ifdef CONFIG_X86_64
1870 "push %%rax; push %%rbx; push %%rdx;"
1871 "push %%rsi; push %%rdi; push %%rbp;"
1872 "push %%r8; push %%r9; push %%r10; push %%r11;"
1873 "push %%r12; push %%r13; push %%r14; push %%r15;"
1875 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
1877 "pusha; push %%ecx \n\t"
1878 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
1880 /* Check if vmlaunch of vmresume is needed */
1882 /* Load guest registers. Don't clobber flags. */
1883 #ifdef CONFIG_X86_64
1884 "mov %c[cr2](%3), %%rax \n\t"
1885 "mov %%rax, %%cr2 \n\t"
1886 "mov %c[rax](%3), %%rax \n\t"
1887 "mov %c[rbx](%3), %%rbx \n\t"
1888 "mov %c[rdx](%3), %%rdx \n\t"
1889 "mov %c[rsi](%3), %%rsi \n\t"
1890 "mov %c[rdi](%3), %%rdi \n\t"
1891 "mov %c[rbp](%3), %%rbp \n\t"
1892 "mov %c[r8](%3), %%r8 \n\t"
1893 "mov %c[r9](%3), %%r9 \n\t"
1894 "mov %c[r10](%3), %%r10 \n\t"
1895 "mov %c[r11](%3), %%r11 \n\t"
1896 "mov %c[r12](%3), %%r12 \n\t"
1897 "mov %c[r13](%3), %%r13 \n\t"
1898 "mov %c[r14](%3), %%r14 \n\t"
1899 "mov %c[r15](%3), %%r15 \n\t"
1900 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1902 "mov %c[cr2](%3), %%eax \n\t"
1903 "mov %%eax, %%cr2 \n\t"
1904 "mov %c[rax](%3), %%eax \n\t"
1905 "mov %c[rbx](%3), %%ebx \n\t"
1906 "mov %c[rdx](%3), %%edx \n\t"
1907 "mov %c[rsi](%3), %%esi \n\t"
1908 "mov %c[rdi](%3), %%edi \n\t"
1909 "mov %c[rbp](%3), %%ebp \n\t"
1910 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1912 /* Enter guest mode */
1914 ASM_VMX_VMLAUNCH
"\n\t"
1915 "jmp kvm_vmx_return \n\t"
1916 "launched: " ASM_VMX_VMRESUME
"\n\t"
1917 ".globl kvm_vmx_return \n\t"
1919 /* Save guest registers, load host registers, keep flags */
1920 #ifdef CONFIG_X86_64
1921 "xchg %3, (%%rsp) \n\t"
1922 "mov %%rax, %c[rax](%3) \n\t"
1923 "mov %%rbx, %c[rbx](%3) \n\t"
1924 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
1925 "mov %%rdx, %c[rdx](%3) \n\t"
1926 "mov %%rsi, %c[rsi](%3) \n\t"
1927 "mov %%rdi, %c[rdi](%3) \n\t"
1928 "mov %%rbp, %c[rbp](%3) \n\t"
1929 "mov %%r8, %c[r8](%3) \n\t"
1930 "mov %%r9, %c[r9](%3) \n\t"
1931 "mov %%r10, %c[r10](%3) \n\t"
1932 "mov %%r11, %c[r11](%3) \n\t"
1933 "mov %%r12, %c[r12](%3) \n\t"
1934 "mov %%r13, %c[r13](%3) \n\t"
1935 "mov %%r14, %c[r14](%3) \n\t"
1936 "mov %%r15, %c[r15](%3) \n\t"
1937 "mov %%cr2, %%rax \n\t"
1938 "mov %%rax, %c[cr2](%3) \n\t"
1939 "mov (%%rsp), %3 \n\t"
1941 "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1942 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1943 "pop %%rbp; pop %%rdi; pop %%rsi;"
1944 "pop %%rdx; pop %%rbx; pop %%rax \n\t"
1946 "xchg %3, (%%esp) \n\t"
1947 "mov %%eax, %c[rax](%3) \n\t"
1948 "mov %%ebx, %c[rbx](%3) \n\t"
1949 "pushl (%%esp); popl %c[rcx](%3) \n\t"
1950 "mov %%edx, %c[rdx](%3) \n\t"
1951 "mov %%esi, %c[rsi](%3) \n\t"
1952 "mov %%edi, %c[rdi](%3) \n\t"
1953 "mov %%ebp, %c[rbp](%3) \n\t"
1954 "mov %%cr2, %%eax \n\t"
1955 "mov %%eax, %c[cr2](%3) \n\t"
1956 "mov (%%esp), %3 \n\t"
1958 "pop %%ecx; popa \n\t"
1963 : "r"(vcpu
->launched
), "d"((unsigned long)HOST_RSP
),
1965 [rax
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RAX
])),
1966 [rbx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBX
])),
1967 [rcx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RCX
])),
1968 [rdx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDX
])),
1969 [rsi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RSI
])),
1970 [rdi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDI
])),
1971 [rbp
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBP
])),
1972 #ifdef CONFIG_X86_64
1973 [r8
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R8
])),
1974 [r9
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R9
])),
1975 [r10
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R10
])),
1976 [r11
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R11
])),
1977 [r12
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R12
])),
1978 [r13
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R13
])),
1979 [r14
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R14
])),
1980 [r15
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R15
])),
1982 [cr2
]"i"(offsetof(struct kvm_vcpu
, cr2
))
1986 * Reload segment selectors ASAP. (it's needed for a functional
1987 * kernel: x86 relies on having __KERNEL_PDA in %fs and x86_64
1988 * relies on having 0 in %gs for the CPU PDA to work.)
1990 if (fs_gs_ldt_reload_needed
) {
1994 * If we have to reload gs, we must take care to
1995 * preserve our gs base.
1997 local_irq_disable();
1999 #ifdef CONFIG_X86_64
2000 wrmsrl(MSR_GS_BASE
, vmcs_readl(HOST_GS_BASE
));
2008 #ifdef CONFIG_X86_64
2009 if (is_long_mode(vcpu
)) {
2010 save_msrs(vcpu
->guest_msrs
, NR_BAD_MSRS
);
2011 load_msrs(vcpu
->host_msrs
, NR_BAD_MSRS
);
2015 if (vcpu
->fpu_active
) {
2016 fx_save(vcpu
->guest_fx_image
);
2017 fx_restore(vcpu
->host_fx_image
);
2020 vcpu
->interrupt_window_open
= (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0;
2022 asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS
));
2025 kvm_run
->exit_reason
= KVM_EXIT_FAIL_ENTRY
;
2026 kvm_run
->fail_entry
.hardware_entry_failure_reason
2027 = vmcs_read32(VM_INSTRUCTION_ERROR
);
2031 * Profile KVM exit RIPs:
2033 if (unlikely(prof_on
== KVM_PROFILING
))
2034 profile_hit(KVM_PROFILING
, (void *)vmcs_readl(GUEST_RIP
));
2037 r
= kvm_handle_exit(kvm_run
, vcpu
);
2039 /* Give scheduler a change to reschedule. */
2040 if (signal_pending(current
)) {
2041 ++vcpu
->stat
.signal_exits
;
2042 post_kvm_run_save(vcpu
, kvm_run
);
2043 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
2047 if (dm_request_for_irq_injection(vcpu
, kvm_run
)) {
2048 ++vcpu
->stat
.request_irq_exits
;
2049 post_kvm_run_save(vcpu
, kvm_run
);
2050 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
2059 post_kvm_run_save(vcpu
, kvm_run
);
2063 static void vmx_flush_tlb(struct kvm_vcpu
*vcpu
)
2065 vmcs_writel(GUEST_CR3
, vmcs_readl(GUEST_CR3
));
2068 static void vmx_inject_page_fault(struct kvm_vcpu
*vcpu
,
2072 u32 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
2074 ++vcpu
->stat
.pf_guest
;
2076 if (is_page_fault(vect_info
)) {
2077 printk(KERN_DEBUG
"inject_page_fault: "
2078 "double fault 0x%lx @ 0x%lx\n",
2079 addr
, vmcs_readl(GUEST_RIP
));
2080 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, 0);
2081 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
2083 INTR_TYPE_EXCEPTION
|
2084 INTR_INFO_DELIEVER_CODE_MASK
|
2085 INTR_INFO_VALID_MASK
);
2089 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, err_code
);
2090 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
2092 INTR_TYPE_EXCEPTION
|
2093 INTR_INFO_DELIEVER_CODE_MASK
|
2094 INTR_INFO_VALID_MASK
);
2098 static void vmx_free_vmcs(struct kvm_vcpu
*vcpu
)
2101 on_each_cpu(__vcpu_clear
, vcpu
, 0, 1);
2102 free_vmcs(vcpu
->vmcs
);
2107 static void vmx_free_vcpu(struct kvm_vcpu
*vcpu
)
2109 vmx_free_vmcs(vcpu
);
2112 static int vmx_create_vcpu(struct kvm_vcpu
*vcpu
)
2116 vcpu
->guest_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2117 if (!vcpu
->guest_msrs
)
2120 vcpu
->host_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2121 if (!vcpu
->host_msrs
)
2122 goto out_free_guest_msrs
;
2124 vmcs
= alloc_vmcs();
2131 vcpu
->fpu_active
= 1;
2136 kfree(vcpu
->host_msrs
);
2137 vcpu
->host_msrs
= NULL
;
2139 out_free_guest_msrs
:
2140 kfree(vcpu
->guest_msrs
);
2141 vcpu
->guest_msrs
= NULL
;
2146 static struct kvm_arch_ops vmx_arch_ops
= {
2147 .cpu_has_kvm_support
= cpu_has_kvm_support
,
2148 .disabled_by_bios
= vmx_disabled_by_bios
,
2149 .hardware_setup
= hardware_setup
,
2150 .hardware_unsetup
= hardware_unsetup
,
2151 .hardware_enable
= hardware_enable
,
2152 .hardware_disable
= hardware_disable
,
2154 .vcpu_create
= vmx_create_vcpu
,
2155 .vcpu_free
= vmx_free_vcpu
,
2157 .vcpu_load
= vmx_vcpu_load
,
2158 .vcpu_put
= vmx_vcpu_put
,
2159 .vcpu_decache
= vmx_vcpu_decache
,
2161 .set_guest_debug
= set_guest_debug
,
2162 .get_msr
= vmx_get_msr
,
2163 .set_msr
= vmx_set_msr
,
2164 .get_segment_base
= vmx_get_segment_base
,
2165 .get_segment
= vmx_get_segment
,
2166 .set_segment
= vmx_set_segment
,
2167 .get_cs_db_l_bits
= vmx_get_cs_db_l_bits
,
2168 .decache_cr4_guest_bits
= vmx_decache_cr4_guest_bits
,
2169 .set_cr0
= vmx_set_cr0
,
2170 .set_cr3
= vmx_set_cr3
,
2171 .set_cr4
= vmx_set_cr4
,
2172 #ifdef CONFIG_X86_64
2173 .set_efer
= vmx_set_efer
,
2175 .get_idt
= vmx_get_idt
,
2176 .set_idt
= vmx_set_idt
,
2177 .get_gdt
= vmx_get_gdt
,
2178 .set_gdt
= vmx_set_gdt
,
2179 .cache_regs
= vcpu_load_rsp_rip
,
2180 .decache_regs
= vcpu_put_rsp_rip
,
2181 .get_rflags
= vmx_get_rflags
,
2182 .set_rflags
= vmx_set_rflags
,
2184 .tlb_flush
= vmx_flush_tlb
,
2185 .inject_page_fault
= vmx_inject_page_fault
,
2187 .inject_gp
= vmx_inject_gp
,
2189 .run
= vmx_vcpu_run
,
2190 .skip_emulated_instruction
= skip_emulated_instruction
,
2191 .vcpu_setup
= vmx_vcpu_setup
,
2192 .patch_hypercall
= vmx_patch_hypercall
,
2195 static int __init
vmx_init(void)
2197 return kvm_init_arch(&vmx_arch_ops
, THIS_MODULE
);
2200 static void __exit
vmx_exit(void)
2205 module_init(vmx_init
)
2206 module_exit(vmx_exit
)