1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for ISSI IS31FL32xx family of I2C LED controllers
5 * Copyright 2015 Allworx Corp.
8 * http://www.issi.com/US/product-analog-fxled-driver.shtml
9 * http://www.si-en.com/product.asp?parentid=890
12 #include <linux/device.h>
13 #include <linux/i2c.h>
14 #include <linux/kernel.h>
15 #include <linux/leds.h>
16 #include <linux/module.h>
18 #include <linux/of_device.h>
20 /* Used to indicate a device has no such register */
21 #define IS31FL32XX_REG_NONE 0xFF
23 /* Software Shutdown bit in Shutdown Register */
24 #define IS31FL32XX_SHUTDOWN_SSD_ENABLE 0
25 #define IS31FL32XX_SHUTDOWN_SSD_DISABLE BIT(0)
27 /* IS31FL3216 has a number of unique registers */
28 #define IS31FL3216_CONFIG_REG 0x00
29 #define IS31FL3216_LIGHTING_EFFECT_REG 0x03
30 #define IS31FL3216_CHANNEL_CONFIG_REG 0x04
32 /* Software Shutdown bit in 3216 Config Register */
33 #define IS31FL3216_CONFIG_SSD_ENABLE BIT(7)
34 #define IS31FL3216_CONFIG_SSD_DISABLE 0
36 struct is31fl32xx_priv
;
37 struct is31fl32xx_led_data
{
38 struct led_classdev cdev
;
39 u8 channel
; /* 1-based, max priv->cdef->channels */
40 struct is31fl32xx_priv
*priv
;
43 struct is31fl32xx_priv
{
44 const struct is31fl32xx_chipdef
*cdef
;
45 struct i2c_client
*client
;
46 unsigned int num_leds
;
47 struct is31fl32xx_led_data leds
[];
51 * struct is31fl32xx_chipdef - chip-specific attributes
52 * @channels : Number of LED channels
53 * @shutdown_reg : address of Shutdown register (optional)
54 * @pwm_update_reg : address of PWM Update register
55 * @global_control_reg : address of Global Control register (optional)
56 * @reset_reg : address of Reset register (optional)
57 * @pwm_register_base : address of first PWM register
58 * @pwm_registers_reversed: : true if PWM registers count down instead of up
59 * @led_control_register_base : address of first LED control register (optional)
60 * @enable_bits_per_led_control_register: number of LEDs enable bits in each
61 * @reset_func : pointer to reset function
62 * @sw_shutdown_func : pointer to software shutdown function
64 * For all optional register addresses, the sentinel value %IS31FL32XX_REG_NONE
65 * indicates that this chip has no such register.
67 * If non-NULL, @reset_func will be called during probing to set all
68 * necessary registers to a known initialization state. This is needed
69 * for chips that do not have a @reset_reg.
71 * @enable_bits_per_led_control_register must be >=1 if
72 * @led_control_register_base != %IS31FL32XX_REG_NONE.
74 struct is31fl32xx_chipdef
{
78 u8 global_control_reg
;
81 bool pwm_registers_reversed
;
82 u8 led_control_register_base
;
83 u8 enable_bits_per_led_control_register
;
84 int (*reset_func
)(struct is31fl32xx_priv
*priv
);
85 int (*sw_shutdown_func
)(struct is31fl32xx_priv
*priv
, bool enable
);
88 static const struct is31fl32xx_chipdef is31fl3236_cdef
= {
91 .pwm_update_reg
= 0x25,
92 .global_control_reg
= 0x4a,
94 .pwm_register_base
= 0x01,
95 .led_control_register_base
= 0x26,
96 .enable_bits_per_led_control_register
= 1,
99 static const struct is31fl32xx_chipdef is31fl3235_cdef
= {
101 .shutdown_reg
= 0x00,
102 .pwm_update_reg
= 0x25,
103 .global_control_reg
= 0x4a,
105 .pwm_register_base
= 0x05,
106 .led_control_register_base
= 0x2a,
107 .enable_bits_per_led_control_register
= 1,
110 static const struct is31fl32xx_chipdef is31fl3218_cdef
= {
112 .shutdown_reg
= 0x00,
113 .pwm_update_reg
= 0x16,
114 .global_control_reg
= IS31FL32XX_REG_NONE
,
116 .pwm_register_base
= 0x01,
117 .led_control_register_base
= 0x13,
118 .enable_bits_per_led_control_register
= 6,
121 static int is31fl3216_reset(struct is31fl32xx_priv
*priv
);
122 static int is31fl3216_software_shutdown(struct is31fl32xx_priv
*priv
,
124 static const struct is31fl32xx_chipdef is31fl3216_cdef
= {
126 .shutdown_reg
= IS31FL32XX_REG_NONE
,
127 .pwm_update_reg
= 0xB0,
128 .global_control_reg
= IS31FL32XX_REG_NONE
,
129 .reset_reg
= IS31FL32XX_REG_NONE
,
130 .pwm_register_base
= 0x10,
131 .pwm_registers_reversed
= true,
132 .led_control_register_base
= 0x01,
133 .enable_bits_per_led_control_register
= 8,
134 .reset_func
= is31fl3216_reset
,
135 .sw_shutdown_func
= is31fl3216_software_shutdown
,
138 static int is31fl32xx_write(struct is31fl32xx_priv
*priv
, u8 reg
, u8 val
)
142 dev_dbg(&priv
->client
->dev
, "writing register 0x%02X=0x%02X", reg
, val
);
144 ret
= i2c_smbus_write_byte_data(priv
->client
, reg
, val
);
146 dev_err(&priv
->client
->dev
,
147 "register write to 0x%02X failed (error %d)",
154 * Custom reset function for IS31FL3216 because it does not have a RESET
155 * register the way that the other IS31FL32xx chips do. We don't bother
156 * writing the GPIO and animation registers, because the registers we
157 * do write ensure those will have no effect.
159 static int is31fl3216_reset(struct is31fl32xx_priv
*priv
)
164 ret
= is31fl32xx_write(priv
, IS31FL3216_CONFIG_REG
,
165 IS31FL3216_CONFIG_SSD_ENABLE
);
168 for (i
= 0; i
< priv
->cdef
->channels
; i
++) {
169 ret
= is31fl32xx_write(priv
, priv
->cdef
->pwm_register_base
+i
,
174 ret
= is31fl32xx_write(priv
, priv
->cdef
->pwm_update_reg
, 0);
177 ret
= is31fl32xx_write(priv
, IS31FL3216_LIGHTING_EFFECT_REG
, 0x00);
180 ret
= is31fl32xx_write(priv
, IS31FL3216_CHANNEL_CONFIG_REG
, 0x00);
188 * Custom Software-Shutdown function for IS31FL3216 because it does not have
189 * a SHUTDOWN register the way that the other IS31FL32xx chips do.
190 * We don't bother doing a read/modify/write on the CONFIG register because
191 * we only ever use a value of '0' for the other fields in that register.
193 static int is31fl3216_software_shutdown(struct is31fl32xx_priv
*priv
,
196 u8 value
= enable
? IS31FL3216_CONFIG_SSD_ENABLE
:
197 IS31FL3216_CONFIG_SSD_DISABLE
;
199 return is31fl32xx_write(priv
, IS31FL3216_CONFIG_REG
, value
);
203 * NOTE: A mutex is not needed in this function because:
204 * - All referenced data is read-only after probe()
205 * - The I2C core has a mutex on to protect the bus
206 * - There are no read/modify/write operations
207 * - Intervening operations between the write of the PWM register
208 * and the Update register are harmless.
213 * PWM_REG_2 write 128
217 * PWM_REG_2 write 128
220 * are equivalent. Poking the Update register merely applies all PWM
221 * register writes up to that point.
223 static int is31fl32xx_brightness_set(struct led_classdev
*led_cdev
,
224 enum led_brightness brightness
)
226 const struct is31fl32xx_led_data
*led_data
=
227 container_of(led_cdev
, struct is31fl32xx_led_data
, cdev
);
228 const struct is31fl32xx_chipdef
*cdef
= led_data
->priv
->cdef
;
229 u8 pwm_register_offset
;
232 dev_dbg(led_cdev
->dev
, "%s: %d\n", __func__
, brightness
);
234 /* NOTE: led_data->channel is 1-based */
235 if (cdef
->pwm_registers_reversed
)
236 pwm_register_offset
= cdef
->channels
- led_data
->channel
;
238 pwm_register_offset
= led_data
->channel
- 1;
240 ret
= is31fl32xx_write(led_data
->priv
,
241 cdef
->pwm_register_base
+ pwm_register_offset
,
246 return is31fl32xx_write(led_data
->priv
, cdef
->pwm_update_reg
, 0);
249 static int is31fl32xx_reset_regs(struct is31fl32xx_priv
*priv
)
251 const struct is31fl32xx_chipdef
*cdef
= priv
->cdef
;
254 if (cdef
->reset_reg
!= IS31FL32XX_REG_NONE
) {
255 ret
= is31fl32xx_write(priv
, cdef
->reset_reg
, 0);
260 if (cdef
->reset_func
)
261 return cdef
->reset_func(priv
);
266 static int is31fl32xx_software_shutdown(struct is31fl32xx_priv
*priv
,
269 const struct is31fl32xx_chipdef
*cdef
= priv
->cdef
;
272 if (cdef
->shutdown_reg
!= IS31FL32XX_REG_NONE
) {
273 u8 value
= enable
? IS31FL32XX_SHUTDOWN_SSD_ENABLE
:
274 IS31FL32XX_SHUTDOWN_SSD_DISABLE
;
275 ret
= is31fl32xx_write(priv
, cdef
->shutdown_reg
, value
);
280 if (cdef
->sw_shutdown_func
)
281 return cdef
->sw_shutdown_func(priv
, enable
);
286 static int is31fl32xx_init_regs(struct is31fl32xx_priv
*priv
)
288 const struct is31fl32xx_chipdef
*cdef
= priv
->cdef
;
291 ret
= is31fl32xx_reset_regs(priv
);
296 * Set enable bit for all channels.
297 * We will control state with PWM registers alone.
299 if (cdef
->led_control_register_base
!= IS31FL32XX_REG_NONE
) {
301 GENMASK(cdef
->enable_bits_per_led_control_register
-1, 0);
302 u8 num_regs
= cdef
->channels
/
303 cdef
->enable_bits_per_led_control_register
;
306 for (i
= 0; i
< num_regs
; i
++) {
307 ret
= is31fl32xx_write(priv
,
308 cdef
->led_control_register_base
+i
,
315 ret
= is31fl32xx_software_shutdown(priv
, false);
319 if (cdef
->global_control_reg
!= IS31FL32XX_REG_NONE
) {
320 ret
= is31fl32xx_write(priv
, cdef
->global_control_reg
, 0x00);
328 static int is31fl32xx_parse_child_dt(const struct device
*dev
,
329 const struct device_node
*child
,
330 struct is31fl32xx_led_data
*led_data
)
332 struct led_classdev
*cdev
= &led_data
->cdev
;
336 ret
= of_property_read_u32(child
, "reg", ®
);
337 if (ret
|| reg
< 1 || reg
> led_data
->priv
->cdef
->channels
) {
339 "Child node %pOF does not have a valid reg property\n",
343 led_data
->channel
= reg
;
345 cdev
->brightness_set_blocking
= is31fl32xx_brightness_set
;
350 static struct is31fl32xx_led_data
*is31fl32xx_find_led_data(
351 struct is31fl32xx_priv
*priv
,
356 for (i
= 0; i
< priv
->num_leds
; i
++) {
357 if (priv
->leds
[i
].channel
== channel
)
358 return &priv
->leds
[i
];
364 static int is31fl32xx_parse_dt(struct device
*dev
,
365 struct is31fl32xx_priv
*priv
)
367 struct device_node
*child
;
370 for_each_available_child_of_node(dev_of_node(dev
), child
) {
371 struct led_init_data init_data
= {};
372 struct is31fl32xx_led_data
*led_data
=
373 &priv
->leds
[priv
->num_leds
];
374 const struct is31fl32xx_led_data
*other_led_data
;
376 led_data
->priv
= priv
;
378 ret
= is31fl32xx_parse_child_dt(dev
, child
, led_data
);
382 /* Detect if channel is already in use by another child */
383 other_led_data
= is31fl32xx_find_led_data(priv
,
385 if (other_led_data
) {
387 "Node %pOF 'reg' conflicts with another LED\n",
393 init_data
.fwnode
= of_fwnode_handle(child
);
395 ret
= devm_led_classdev_register_ext(dev
, &led_data
->cdev
,
398 dev_err(dev
, "Failed to register LED for %pOF: %d\n",
413 static const struct of_device_id of_is31fl32xx_match
[] = {
414 { .compatible
= "issi,is31fl3236", .data
= &is31fl3236_cdef
, },
415 { .compatible
= "issi,is31fl3235", .data
= &is31fl3235_cdef
, },
416 { .compatible
= "issi,is31fl3218", .data
= &is31fl3218_cdef
, },
417 { .compatible
= "si-en,sn3218", .data
= &is31fl3218_cdef
, },
418 { .compatible
= "issi,is31fl3216", .data
= &is31fl3216_cdef
, },
419 { .compatible
= "si-en,sn3216", .data
= &is31fl3216_cdef
, },
423 MODULE_DEVICE_TABLE(of
, of_is31fl32xx_match
);
425 static int is31fl32xx_probe(struct i2c_client
*client
,
426 const struct i2c_device_id
*id
)
428 const struct is31fl32xx_chipdef
*cdef
;
429 struct device
*dev
= &client
->dev
;
430 struct is31fl32xx_priv
*priv
;
434 cdef
= device_get_match_data(dev
);
436 count
= of_get_available_child_count(dev_of_node(dev
));
440 priv
= devm_kzalloc(dev
, struct_size(priv
, leds
, count
),
445 priv
->client
= client
;
447 i2c_set_clientdata(client
, priv
);
449 ret
= is31fl32xx_init_regs(priv
);
453 ret
= is31fl32xx_parse_dt(dev
, priv
);
460 static int is31fl32xx_remove(struct i2c_client
*client
)
462 struct is31fl32xx_priv
*priv
= i2c_get_clientdata(client
);
464 return is31fl32xx_reset_regs(priv
);
468 * i2c-core (and modalias) requires that id_table be properly filled,
469 * even though it is not used for DeviceTree based instantiation.
471 static const struct i2c_device_id is31fl32xx_id
[] = {
481 MODULE_DEVICE_TABLE(i2c
, is31fl32xx_id
);
483 static struct i2c_driver is31fl32xx_driver
= {
485 .name
= "is31fl32xx",
486 .of_match_table
= of_is31fl32xx_match
,
488 .probe
= is31fl32xx_probe
,
489 .remove
= is31fl32xx_remove
,
490 .id_table
= is31fl32xx_id
,
493 module_i2c_driver(is31fl32xx_driver
);
495 MODULE_AUTHOR("David Rivshin <drivshin@allworx.com>");
496 MODULE_DESCRIPTION("ISSI IS31FL32xx LED driver");
497 MODULE_LICENSE("GPL v2");