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1 /*
2 * Driver for Microtune MT2131 "QAM/8VSB single chip tuner"
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@hauppauge.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/module.h>
23 #include <linux/delay.h>
24 #include <linux/dvb/frontend.h>
25 #include <linux/i2c.h>
26
27 #include "dvb_frontend.h"
28
29 #include "mt2131.h"
30 #include "mt2131_priv.h"
31
32 static int debug;
33 module_param(debug, int, 0644);
34 MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
35
36 #define dprintk(level,fmt, arg...) if (debug >= level) \
37 printk(KERN_INFO "%s: " fmt, "mt2131", ## arg)
38
39 static u8 mt2131_config1[] = {
40 0x01,
41 0x50, 0x00, 0x50, 0x80, 0x00, 0x49, 0xfa, 0x88,
42 0x08, 0x77, 0x41, 0x04, 0x00, 0x00, 0x00, 0x32,
43 0x7f, 0xda, 0x4c, 0x00, 0x10, 0xaa, 0x78, 0x80,
44 0xff, 0x68, 0xa0, 0xff, 0xdd, 0x00, 0x00
45 };
46
47 static u8 mt2131_config2[] = {
48 0x10,
49 0x7f, 0xc8, 0x0a, 0x5f, 0x00, 0x04
50 };
51
52 static int mt2131_readreg(struct mt2131_priv *priv, u8 reg, u8 *val)
53 {
54 struct i2c_msg msg[2] = {
55 { .addr = priv->cfg->i2c_address, .flags = 0,
56 .buf = &reg, .len = 1 },
57 { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD,
58 .buf = val, .len = 1 },
59 };
60
61 if (i2c_transfer(priv->i2c, msg, 2) != 2) {
62 printk(KERN_WARNING "mt2131 I2C read failed\n");
63 return -EREMOTEIO;
64 }
65 return 0;
66 }
67
68 static int mt2131_writereg(struct mt2131_priv *priv, u8 reg, u8 val)
69 {
70 u8 buf[2] = { reg, val };
71 struct i2c_msg msg = { .addr = priv->cfg->i2c_address, .flags = 0,
72 .buf = buf, .len = 2 };
73
74 if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
75 printk(KERN_WARNING "mt2131 I2C write failed\n");
76 return -EREMOTEIO;
77 }
78 return 0;
79 }
80
81 static int mt2131_writeregs(struct mt2131_priv *priv,u8 *buf, u8 len)
82 {
83 struct i2c_msg msg = { .addr = priv->cfg->i2c_address,
84 .flags = 0, .buf = buf, .len = len };
85
86 if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
87 printk(KERN_WARNING "mt2131 I2C write failed (len=%i)\n",
88 (int)len);
89 return -EREMOTEIO;
90 }
91 return 0;
92 }
93
94 static int mt2131_set_gpo(struct dvb_frontend *fe, u8 val)
95 {
96 struct mt2131_priv *priv = fe->tuner_priv;
97 u8 v;
98
99 mt2131_readreg(priv, 0x07, &v);
100 mt2131_writereg(priv, 0x07, (v & 0xfe) | (val & 0x01));
101
102 return 0;
103 }
104
105 static int mt2131_set_params(struct dvb_frontend *fe,
106 struct dvb_frontend_parameters *params)
107 {
108 struct mt2131_priv *priv;
109 int ret=0, i;
110 u32 freq;
111 u8 if_band_center;
112 u32 f_lo1, f_lo2;
113 u32 div1, num1, div2, num2;
114 u8 b[8];
115 u8 lockval = 0;
116
117 priv = fe->tuner_priv;
118 if (fe->ops.info.type == FE_OFDM)
119 priv->bandwidth = params->u.ofdm.bandwidth;
120 else
121 priv->bandwidth = 0;
122
123 freq = params->frequency / 1000; // Hz -> kHz
124 dprintk(1, "%s() freq=%d\n", __FUNCTION__, freq);
125
126 f_lo1 = freq + MT2131_IF1 * 1000;
127 f_lo1 = (f_lo1 / 250) * 250;
128 f_lo2 = f_lo1 - freq - MT2131_IF2;
129
130 priv->frequency = (f_lo1 - f_lo2 - MT2131_IF2) * 1000,
131
132 /* Frequency LO1 = 16MHz * (DIV1 + NUM1/8192 ) */
133 num1 = f_lo1 * 64 / (MT2131_FREF / 128);
134 div1 = num1 / 8192;
135 num1 &= 0x1fff;
136
137 /* Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 ) */
138 num2 = f_lo2 * 64 / (MT2131_FREF / 128);
139 div2 = num2 / 8192;
140 num2 &= 0x1fff;
141
142 if (freq <= 82500) if_band_center = 0x00; else
143 if (freq <= 137500) if_band_center = 0x01; else
144 if (freq <= 192500) if_band_center = 0x02; else
145 if (freq <= 247500) if_band_center = 0x03; else
146 if (freq <= 302500) if_band_center = 0x04; else
147 if (freq <= 357500) if_band_center = 0x05; else
148 if (freq <= 412500) if_band_center = 0x06; else
149 if (freq <= 467500) if_band_center = 0x07; else
150 if (freq <= 522500) if_band_center = 0x08; else
151 if (freq <= 577500) if_band_center = 0x09; else
152 if (freq <= 632500) if_band_center = 0x0A; else
153 if (freq <= 687500) if_band_center = 0x0B; else
154 if (freq <= 742500) if_band_center = 0x0C; else
155 if (freq <= 797500) if_band_center = 0x0D; else
156 if (freq <= 852500) if_band_center = 0x0E; else
157 if (freq <= 907500) if_band_center = 0x0F; else
158 if (freq <= 962500) if_band_center = 0x10; else
159 if (freq <= 1017500) if_band_center = 0x11; else
160 if (freq <= 1072500) if_band_center = 0x12; else if_band_center = 0x13;
161
162 b[0] = 1;
163 b[1] = (num1 >> 5) & 0xFF;
164 b[2] = (num1 & 0x1F);
165 b[3] = div1;
166 b[4] = (num2 >> 5) & 0xFF;
167 b[5] = num2 & 0x1F;
168 b[6] = div2;
169
170 dprintk(1, "IF1: %dMHz IF2: %dMHz\n", MT2131_IF1, MT2131_IF2);
171 dprintk(1, "PLL freq=%dkHz band=%d\n", (int)freq, (int)if_band_center);
172 dprintk(1, "PLL f_lo1=%dkHz f_lo2=%dkHz\n", (int)f_lo1, (int)f_lo2);
173 dprintk(1, "PLL div1=%d num1=%d div2=%d num2=%d\n",
174 (int)div1, (int)num1, (int)div2, (int)num2);
175 dprintk(1, "PLL [1..6]: %2x %2x %2x %2x %2x %2x\n",
176 (int)b[1], (int)b[2], (int)b[3], (int)b[4], (int)b[5],
177 (int)b[6]);
178
179 ret = mt2131_writeregs(priv,b,7);
180 if (ret < 0)
181 return ret;
182
183 mt2131_writereg(priv, 0x0b, if_band_center);
184
185 /* Wait for lock */
186 i = 0;
187 do {
188 mt2131_readreg(priv, 0x08, &lockval);
189 if ((lockval & 0x88) == 0x88)
190 break;
191 msleep(4);
192 i++;
193 } while (i < 10);
194
195 return ret;
196 }
197
198 static int mt2131_get_frequency(struct dvb_frontend *fe, u32 *frequency)
199 {
200 struct mt2131_priv *priv = fe->tuner_priv;
201 dprintk(1, "%s()\n", __FUNCTION__);
202 *frequency = priv->frequency;
203 return 0;
204 }
205
206 static int mt2131_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
207 {
208 struct mt2131_priv *priv = fe->tuner_priv;
209 dprintk(1, "%s()\n", __FUNCTION__);
210 *bandwidth = priv->bandwidth;
211 return 0;
212 }
213
214 static int mt2131_get_status(struct dvb_frontend *fe, u32 *status)
215 {
216 struct mt2131_priv *priv = fe->tuner_priv;
217 u8 lock_status = 0;
218 u8 afc_status = 0;
219
220 *status = 0;
221
222 mt2131_readreg(priv, 0x08, &lock_status);
223 if ((lock_status & 0x88) == 0x88)
224 *status = TUNER_STATUS_LOCKED;
225
226 mt2131_readreg(priv, 0x09, &afc_status);
227 dprintk(1, "%s() - LO Status = 0x%x, AFC Status = 0x%x\n",
228 __FUNCTION__, lock_status, afc_status);
229
230 return 0;
231 }
232
233 static int mt2131_init(struct dvb_frontend *fe)
234 {
235 struct mt2131_priv *priv = fe->tuner_priv;
236 int ret;
237 dprintk(1, "%s()\n", __FUNCTION__);
238
239 if ((ret = mt2131_writeregs(priv, mt2131_config1,
240 sizeof(mt2131_config1))) < 0)
241 return ret;
242
243 mt2131_writereg(priv, 0x0b, 0x09);
244 mt2131_writereg(priv, 0x15, 0x47);
245 mt2131_writereg(priv, 0x07, 0xf2);
246 mt2131_writereg(priv, 0x0b, 0x01);
247
248 if ((ret = mt2131_writeregs(priv, mt2131_config2,
249 sizeof(mt2131_config2))) < 0)
250 return ret;
251
252 return ret;
253 }
254
255 static int mt2131_release(struct dvb_frontend *fe)
256 {
257 dprintk(1, "%s()\n", __FUNCTION__);
258 kfree(fe->tuner_priv);
259 fe->tuner_priv = NULL;
260 return 0;
261 }
262
263 static const struct dvb_tuner_ops mt2131_tuner_ops = {
264 .info = {
265 .name = "Microtune MT2131",
266 .frequency_min = 48000000,
267 .frequency_max = 860000000,
268 .frequency_step = 50000,
269 },
270
271 .release = mt2131_release,
272 .init = mt2131_init,
273
274 .set_params = mt2131_set_params,
275 .get_frequency = mt2131_get_frequency,
276 .get_bandwidth = mt2131_get_bandwidth,
277 .get_status = mt2131_get_status
278 };
279
280 struct dvb_frontend * mt2131_attach(struct dvb_frontend *fe,
281 struct i2c_adapter *i2c,
282 struct mt2131_config *cfg, u16 if1)
283 {
284 struct mt2131_priv *priv = NULL;
285 u8 id = 0;
286
287 dprintk(1, "%s()\n", __FUNCTION__);
288
289 priv = kzalloc(sizeof(struct mt2131_priv), GFP_KERNEL);
290 if (priv == NULL)
291 return NULL;
292
293 priv->cfg = cfg;
294 priv->bandwidth = 6000000; /* 6MHz */
295 priv->i2c = i2c;
296
297 if (mt2131_readreg(priv, 0, &id) != 0) {
298 kfree(priv);
299 return NULL;
300 }
301 if ( (id != 0x3E) && (id != 0x3F) ) {
302 printk(KERN_ERR "MT2131: Device not found at addr 0x%02x\n",
303 cfg->i2c_address);
304 kfree(priv);
305 return NULL;
306 }
307
308 printk(KERN_INFO "MT2131: successfully identified at address 0x%02x\n",
309 cfg->i2c_address);
310 memcpy(&fe->ops.tuner_ops, &mt2131_tuner_ops,
311 sizeof(struct dvb_tuner_ops));
312
313 fe->tuner_priv = priv;
314 return fe;
315 }
316 EXPORT_SYMBOL(mt2131_attach);
317
318 MODULE_AUTHOR("Steven Toth");
319 MODULE_DESCRIPTION("Microtune MT2131 silicon tuner driver");
320 MODULE_LICENSE("GPL");
321
322 /*
323 * Local variables:
324 * c-basic-offset: 8
325 */