drivers/media/dvb/frontends/sp887x.c

   1 /*
   2    Driver for the Spase sp887x demodulator
   3 */
   4
   5 /*
   6  * This driver needs external firmware. Please use the command
   7  * "<kerneldir>/Documentation/dvb/get_dvb_firmware sp887x" to
   8  * download/extract it, and then copy it to /usr/lib/hotplug/firmware.
   9  */
  10 #define SP887X_DEFAULT_FIRMWARE "dvb-fe-sp887x.fw"
  11
  12 #include <linux/init.h>
  13 #include <linux/module.h>
  14 #include <linux/moduleparam.h>
  15 #include <linux/device.h>
  16 #include <linux/firmware.h>
  17 #include <linux/string.h>
  18 #include <linux/slab.h>
  19
  20 #include "dvb_frontend.h"
  21 #include "sp887x.h"
  22
  23
  24 struct sp887x_state {
  25         struct i2c_adapter* i2c;
  26         struct dvb_frontend_ops ops;
  27         const struct sp887x_config* config;
  28         struct dvb_frontend frontend;
  29
  30         /* demodulator private data */
  31         u8 initialised:1;
  32 };
  33
  34 static int debug;
  35 #define dprintk(args...) \
  36         do { \
  37                 if (debug) printk(KERN_DEBUG "sp887x: " args); \
  38         } while (0)
  39
  40 static int i2c_writebytes (struct sp887x_state* state, u8 *buf, u8 len)
  41 {
  42         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = len };
  43         int err;
  44
  45         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  46                 printk ("%s: i2c write error (addr %02x, err == %i)\n",
  47                         __FUNCTION__, state->config->demod_address, err);
  48                 return -EREMOTEIO;
  49         }
  50
  51         return 0;
  52 }
  53
  54 static int sp887x_writereg (struct sp887x_state* state, u16 reg, u16 data)
  55 {
  56         u8 b0 [] = { reg >> 8 , reg & 0xff, data >> 8, data & 0xff };
  57         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 4 };
  58         int ret;
  59
  60         if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  61                 /**
  62                  *  in case of soft reset we ignore ACK errors...
  63                  */
  64                 if (!(reg == 0xf1a && data == 0x000 &&
  65                         (ret == -EREMOTEIO || ret == -EFAULT)))
  66                 {
  67                         printk("%s: writereg error "
  68                                "(reg %03x, data %03x, ret == %i)\n",
  69                                __FUNCTION__, reg & 0xffff, data & 0xffff, ret);
  70                         return ret;
  71                 }
  72         }
  73
  74         return 0;
  75 }
  76
  77 static int sp887x_readreg (struct sp887x_state* state, u16 reg)
  78 {
  79         u8 b0 [] = { reg >> 8 , reg & 0xff };
  80         u8 b1 [2];
  81         int ret;
  82         struct i2c_msg msg[] = {{ .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 2 },
  83                          { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 2 }};
  84
  85         if ((ret = i2c_transfer(state->i2c, msg, 2)) != 2) {
  86                 printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
  87                 return -1;
  88         }
  89
  90         return (((b1[0] << 8) | b1[1]) & 0xfff);
  91 }
  92
  93 static void sp887x_microcontroller_stop (struct sp887x_state* state)
  94 {
  95         dprintk("%s\n", __FUNCTION__);
  96         sp887x_writereg(state, 0xf08, 0x000);
  97         sp887x_writereg(state, 0xf09, 0x000);
  98
  99         /* microcontroller STOP */
 100         sp887x_writereg(state, 0xf00, 0x000);
 101 }
 102
 103 static void sp887x_microcontroller_start (struct sp887x_state* state)
 104 {
 105         dprintk("%s\n", __FUNCTION__);
 106         sp887x_writereg(state, 0xf08, 0x000);
 107         sp887x_writereg(state, 0xf09, 0x000);
 108
 109         /* microcontroller START */
 110         sp887x_writereg(state, 0xf00, 0x001);
 111 }
 112
 113 static void sp887x_setup_agc (struct sp887x_state* state)
 114 {
 115         /* setup AGC parameters */
 116         dprintk("%s\n", __FUNCTION__);
 117         sp887x_writereg(state, 0x33c, 0x054);
 118         sp887x_writereg(state, 0x33b, 0x04c);
 119         sp887x_writereg(state, 0x328, 0x000);
 120         sp887x_writereg(state, 0x327, 0x005);
 121         sp887x_writereg(state, 0x326, 0x001);
 122         sp887x_writereg(state, 0x325, 0x001);
 123         sp887x_writereg(state, 0x324, 0x001);
 124         sp887x_writereg(state, 0x318, 0x050);
 125         sp887x_writereg(state, 0x317, 0x3fe);
 126         sp887x_writereg(state, 0x316, 0x001);
 127         sp887x_writereg(state, 0x313, 0x005);
 128         sp887x_writereg(state, 0x312, 0x002);
 129         sp887x_writereg(state, 0x306, 0x000);
 130         sp887x_writereg(state, 0x303, 0x000);
 131 }
 132
 133 #define BLOCKSIZE 30
 134 #define FW_SIZE 0x4000
 135 /**
 136  *  load firmware and setup MPEG interface...
 137  */
 138 static int sp887x_initial_setup (struct dvb_frontend* fe, const struct firmware *fw)
 139 {
 140         struct sp887x_state* state = fe->demodulator_priv;
 141         u8 buf [BLOCKSIZE+2];
 142         int i;
 143         int fw_size = fw->size;
 144         unsigned char *mem = fw->data;
 145
 146         dprintk("%s\n", __FUNCTION__);
 147
 148         /* ignore the first 10 bytes, then we expect 0x4000 bytes of firmware */
 149         if (fw_size < FW_SIZE+10)
 150                 return -ENODEV;
 151
 152         mem = fw->data + 10;
 153
 154         /* soft reset */
 155         sp887x_writereg(state, 0xf1a, 0x000);
 156
 157         sp887x_microcontroller_stop (state);
 158
 159         printk ("%s: firmware upload... ", __FUNCTION__);
 160
 161         /* setup write pointer to -1 (end of memory) */
 162         /* bit 0x8000 in address is set to enable 13bit mode */
 163         sp887x_writereg(state, 0x8f08, 0x1fff);
 164
 165         /* dummy write (wrap around to start of memory) */
 166         sp887x_writereg(state, 0x8f0a, 0x0000);
 167
 168         for (i = 0; i < FW_SIZE; i += BLOCKSIZE) {
 169                 int c = BLOCKSIZE;
 170                 int err;
 171
 172                 if (i+c > FW_SIZE)
 173                         c = FW_SIZE - i;
 174
 175                 /* bit 0x8000 in address is set to enable 13bit mode */
 176                 /* bit 0x4000 enables multibyte read/write transfers */
 177                 /* write register is 0xf0a */
 178                 buf[0] = 0xcf;
 179                 buf[1] = 0x0a;
 180
 181                 memcpy(&buf[2], mem + i, c);
 182
 183                 if ((err = i2c_writebytes (state, buf, c+2)) < 0) {
 184                         printk ("failed.\n");
 185                         printk ("%s: i2c error (err == %i)\n", __FUNCTION__, err);
 186                         return err;
 187                 }
 188         }
 189
 190         /* don't write RS bytes between packets */
 191         sp887x_writereg(state, 0xc13, 0x001);
 192
 193         /* suppress clock if (!data_valid) */
 194         sp887x_writereg(state, 0xc14, 0x000);
 195
 196         /* setup MPEG interface... */
 197         sp887x_writereg(state, 0xc1a, 0x872);
 198         sp887x_writereg(state, 0xc1b, 0x001);
 199         sp887x_writereg(state, 0xc1c, 0x000); /* parallel mode (serial mode == 1) */
 200         sp887x_writereg(state, 0xc1a, 0x871);
 201
 202         /* ADC mode, 2 for MT8872, 3 for SP8870/SP8871 */
 203         sp887x_writereg(state, 0x301, 0x002);
 204
 205         sp887x_setup_agc(state);
 206
 207         /* bit 0x010: enable data valid signal */
 208         sp887x_writereg(state, 0xd00, 0x010);
 209         sp887x_writereg(state, 0x0d1, 0x000);
 210
 211         /* setup the PLL */
 212         if (state->config->pll_init) {
 213                 sp887x_writereg(state, 0x206, 0x001);
 214                 state->config->pll_init(fe);
 215                 sp887x_writereg(state, 0x206, 0x000);
 216         }
 217
 218         printk ("done.\n");
 219         return 0;
 220 };
 221
 222 static int configure_reg0xc05 (struct dvb_frontend_parameters *p, u16 *reg0xc05)
 223 {
 224         int known_parameters = 1;
 225
 226         *reg0xc05 = 0x000;
 227
 228         switch (p->u.ofdm.constellation) {
 229         case QPSK:
 230                 break;
 231         case QAM_16:
 232                 *reg0xc05 |= (1 << 10);
 233                 break;
 234         case QAM_64:
 235                 *reg0xc05 |= (2 << 10);
 236                 break;
 237         case QAM_AUTO:
 238                 known_parameters = 0;
 239                 break;
 240         default:
 241                 return -EINVAL;
 242         };
 243
 244         switch (p->u.ofdm.hierarchy_information) {
 245         case HIERARCHY_NONE:
 246                 break;
 247         case HIERARCHY_1:
 248                 *reg0xc05 |= (1 << 7);
 249                 break;
 250         case HIERARCHY_2:
 251                 *reg0xc05 |= (2 << 7);
 252                 break;
 253         case HIERARCHY_4:
 254                 *reg0xc05 |= (3 << 7);
 255                 break;
 256         case HIERARCHY_AUTO:
 257                 known_parameters = 0;
 258                 break;
 259         default:
 260                 return -EINVAL;
 261         };
 262
 263         switch (p->u.ofdm.code_rate_HP) {
 264         case FEC_1_2:
 265                 break;
 266         case FEC_2_3:
 267                 *reg0xc05 |= (1 << 3);
 268                 break;
 269         case FEC_3_4:
 270                 *reg0xc05 |= (2 << 3);
 271                 break;
 272         case FEC_5_6:
 273                 *reg0xc05 |= (3 << 3);
 274                 break;
 275         case FEC_7_8:
 276                 *reg0xc05 |= (4 << 3);
 277                 break;
 278         case FEC_AUTO:
 279                 known_parameters = 0;
 280                 break;
 281         default:
 282                 return -EINVAL;
 283         };
 284
 285         if (known_parameters)
 286                 *reg0xc05 |= (2 << 1);  /* use specified parameters */
 287         else
 288                 *reg0xc05 |= (1 << 1);  /* enable autoprobing */
 289
 290         return 0;
 291 }
 292
 293 /**
 294  *  estimates division of two 24bit numbers,
 295  *  derived from the ves1820/stv0299 driver code
 296  */
 297 static void divide (int n, int d, int *quotient_i, int *quotient_f)
 298 {
 299         unsigned int q, r;
 300
 301         r = (n % d) << 8;
 302         q = (r / d);
 303
 304         if (quotient_i)
 305                 *quotient_i = q;
 306
 307         if (quotient_f) {
 308                 r = (r % d) << 8;
 309                 q = (q << 8) | (r / d);
 310                 r = (r % d) << 8;
 311                 *quotient_f = (q << 8) | (r / d);
 312         }
 313 }
 314
 315 static void sp887x_correct_offsets (struct sp887x_state* state,
 316                                     struct dvb_frontend_parameters *p,
 317                                     int actual_freq)
 318 {
 319         static const u32 srate_correction [] = { 1879617, 4544878, 8098561 };
 320         int bw_index = p->u.ofdm.bandwidth - BANDWIDTH_8_MHZ;
 321         int freq_offset = actual_freq - p->frequency;
 322         int sysclock = 61003; //[kHz]
 323         int ifreq = 36000000;
 324         int freq;
 325         int frequency_shift;
 326
 327         if (p->inversion == INVERSION_ON)
 328                 freq = ifreq - freq_offset;
 329         else
 330                 freq = ifreq + freq_offset;
 331
 332         divide(freq / 333, sysclock, NULL, &frequency_shift);
 333
 334         if (p->inversion == INVERSION_ON)
 335                 frequency_shift = -frequency_shift;
 336
 337         /* sample rate correction */
 338         sp887x_writereg(state, 0x319, srate_correction[bw_index] >> 12);
 339         sp887x_writereg(state, 0x31a, srate_correction[bw_index] & 0xfff);
 340
 341         /* carrier offset correction */
 342         sp887x_writereg(state, 0x309, frequency_shift >> 12);
 343         sp887x_writereg(state, 0x30a, frequency_shift & 0xfff);
 344 }
 345
 346 static int sp887x_setup_frontend_parameters (struct dvb_frontend* fe,
 347                                              struct dvb_frontend_parameters *p)
 348 {
 349         struct sp887x_state* state = fe->demodulator_priv;
 350         int actual_freq, err;
 351         u16 val, reg0xc05;
 352
 353         if (p->u.ofdm.bandwidth != BANDWIDTH_8_MHZ &&
 354             p->u.ofdm.bandwidth != BANDWIDTH_7_MHZ &&
 355             p->u.ofdm.bandwidth != BANDWIDTH_6_MHZ)
 356                 return -EINVAL;
 357
 358         if ((err = configure_reg0xc05(p, &reg0xc05)))
 359                 return err;
 360
 361         sp887x_microcontroller_stop(state);
 362
 363         /* setup the PLL */
 364         sp887x_writereg(state, 0x206, 0x001);
 365         actual_freq = state->config->pll_set(fe, p);
 366         sp887x_writereg(state, 0x206, 0x000);
 367
 368         /* read status reg in order to clear <pending irqs */
 369         sp887x_readreg(state, 0x200);
 370
 371         sp887x_correct_offsets(state, p, actual_freq);
 372
 373         /* filter for 6/7/8 Mhz channel */
 374         if (p->u.ofdm.bandwidth == BANDWIDTH_6_MHZ)
 375                 val = 2;
 376         else if (p->u.ofdm.bandwidth == BANDWIDTH_7_MHZ)
 377                 val = 1;
 378         else
 379                 val = 0;
 380
 381         sp887x_writereg(state, 0x311, val);
 382
 383         /* scan order: 2k first = 0, 8k first = 1 */
 384         if (p->u.ofdm.transmission_mode == TRANSMISSION_MODE_2K)
 385                 sp887x_writereg(state, 0x338, 0x000);
 386         else
 387                 sp887x_writereg(state, 0x338, 0x001);
 388
 389         sp887x_writereg(state, 0xc05, reg0xc05);
 390
 391         if (p->u.ofdm.bandwidth == BANDWIDTH_6_MHZ)
 392                 val = 2 << 3;
 393         else if (p->u.ofdm.bandwidth == BANDWIDTH_7_MHZ)
 394                 val = 3 << 3;
 395         else
 396                 val = 0 << 3;
 397
 398         /* enable OFDM and SAW bits as lock indicators in sync register 0xf17,
 399          * optimize algorithm for given bandwidth...
 400          */
 401         sp887x_writereg(state, 0xf14, 0x160 | val);
 402         sp887x_writereg(state, 0xf15, 0x000);
 403
 404         sp887x_microcontroller_start(state);
 405         return 0;
 406 }
 407
 408 static int sp887x_read_status(struct dvb_frontend* fe, fe_status_t* status)
 409 {
 410         struct sp887x_state* state = fe->demodulator_priv;
 411         u16 snr12 = sp887x_readreg(state, 0xf16);
 412         u16 sync0x200 = sp887x_readreg(state, 0x200);
 413         u16 sync0xf17 = sp887x_readreg(state, 0xf17);
 414
 415         *status = 0;
 416
 417         if (snr12 > 0x00f)
 418                 *status |= FE_HAS_SIGNAL;
 419
 420         //if (sync0x200 & 0x004)
 421         //      *status |= FE_HAS_SYNC | FE_HAS_CARRIER;
 422
 423         //if (sync0x200 & 0x008)
 424         //      *status |= FE_HAS_VITERBI;
 425
 426         if ((sync0xf17 & 0x00f) == 0x002) {
 427                 *status |= FE_HAS_LOCK;
 428                 *status |= FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_CARRIER;
 429         }
 430
 431         if (sync0x200 & 0x001) {        /* tuner adjustment requested...*/
 432                 int steps = (sync0x200 >> 4) & 0x00f;
 433                 if (steps & 0x008)
 434                         steps = -steps;
 435                 dprintk("sp887x: implement tuner adjustment (%+i steps)!!\n",
 436                        steps);
 437         }
 438
 439         return 0;
 440 }
 441
 442 static int sp887x_read_ber(struct dvb_frontend* fe, u32* ber)
 443 {
 444         struct sp887x_state* state = fe->demodulator_priv;
 445
 446         *ber = (sp887x_readreg(state, 0xc08) & 0x3f) |
 447                (sp887x_readreg(state, 0xc07) << 6);
 448         sp887x_writereg(state, 0xc08, 0x000);
 449         sp887x_writereg(state, 0xc07, 0x000);
 450         if (*ber >= 0x3fff0)
 451                 *ber = ~0;
 452
 453         return 0;
 454 }
 455
 456 static int sp887x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 457 {
 458         struct sp887x_state* state = fe->demodulator_priv;
 459
 460         u16 snr12 = sp887x_readreg(state, 0xf16);
 461         u32 signal = 3 * (snr12 << 4);
 462         *strength = (signal < 0xffff) ? signal : 0xffff;
 463
 464         return 0;
 465 }
 466
 467 static int sp887x_read_snr(struct dvb_frontend* fe, u16* snr)
 468 {
 469         struct sp887x_state* state = fe->demodulator_priv;
 470
 471         u16 snr12 = sp887x_readreg(state, 0xf16);
 472         *snr = (snr12 << 4) | (snr12 >> 8);
 473
 474         return 0;
 475 }
 476
 477 static int sp887x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 478 {
 479         struct sp887x_state* state = fe->demodulator_priv;
 480
 481         *ucblocks = sp887x_readreg(state, 0xc0c);
 482         if (*ucblocks == 0xfff)
 483                 *ucblocks = ~0;
 484
 485         return 0;
 486 }
 487
 488 static int sp887x_sleep(struct dvb_frontend* fe)
 489 {
 490         struct sp887x_state* state = fe->demodulator_priv;
 491
 492         /* tristate TS output and disable interface pins */
 493         sp887x_writereg(state, 0xc18, 0x000);
 494
 495         return 0;
 496 }
 497
 498 static int sp887x_init(struct dvb_frontend* fe)
 499 {
 500         struct sp887x_state* state = fe->demodulator_priv;
 501         const struct firmware *fw = NULL;
 502         int ret;
 503
 504         if (!state->initialised) {
 505                 /* request the firmware, this will block until someone uploads it */
 506                 printk("sp887x: waiting for firmware upload (%s)...\n", SP887X_DEFAULT_FIRMWARE);
 507                 ret = state->config->request_firmware(fe, &fw, SP887X_DEFAULT_FIRMWARE);
 508                 if (ret) {
 509                         printk("sp887x: no firmware upload (timeout or file not found?)\n");
 510                         return ret;
 511                 }
 512
 513                 ret = sp887x_initial_setup(fe, fw);
 514                 if (ret) {
 515                         printk("sp887x: writing firmware to device failed\n");
 516                         release_firmware(fw);
 517                         return ret;
 518                 }
 519                 printk("sp887x: firmware upload complete\n");
 520                 state->initialised = 1;
 521         }
 522
 523         /* enable TS output and interface pins */
 524         sp887x_writereg(state, 0xc18, 0x00d);
 525
 526         return 0;
 527 }
 528
 529 static int sp887x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
 530 {
 531         fesettings->min_delay_ms = 350;
 532         fesettings->step_size = 166666*2;
 533         fesettings->max_drift = (166666*2)+1;
 534         return 0;
 535 }
 536
 537 static void sp887x_release(struct dvb_frontend* fe)
 538 {
 539         struct sp887x_state* state = fe->demodulator_priv;
 540         kfree(state);
 541 }
 542
 543 static struct dvb_frontend_ops sp887x_ops;
 544
 545 struct dvb_frontend* sp887x_attach(const struct sp887x_config* config,
 546                                    struct i2c_adapter* i2c)
 547 {
 548         struct sp887x_state* state = NULL;
 549
 550         /* allocate memory for the internal state */
 551         state = kmalloc(sizeof(struct sp887x_state), GFP_KERNEL);
 552         if (state == NULL) goto error;
 553
 554         /* setup the state */
 555         state->config = config;
 556         state->i2c = i2c;
 557         memcpy(&state->ops, &sp887x_ops, sizeof(struct dvb_frontend_ops));
 558         state->initialised = 0;
 559
 560         /* check if the demod is there */
 561         if (sp887x_readreg(state, 0x0200) < 0) goto error;
 562
 563         /* create dvb_frontend */
 564         state->frontend.ops = &state->ops;
 565         state->frontend.demodulator_priv = state;
 566         return &state->frontend;
 567
 568 error:
 569         kfree(state);
 570         return NULL;
 571 }
 572
 573 static struct dvb_frontend_ops sp887x_ops = {
 574
 575         .info = {
 576                 .name = "Spase SP887x DVB-T",
 577                 .type = FE_OFDM,
 578                 .frequency_min =  50500000,
 579                 .frequency_max = 858000000,
 580                 .frequency_stepsize = 166666,
 581                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
 582                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
 583                         FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
 584                         FE_CAN_RECOVER
 585         },
 586
 587         .release = sp887x_release,
 588
 589         .init = sp887x_init,
 590         .sleep = sp887x_sleep,
 591
 592         .set_frontend = sp887x_setup_frontend_parameters,
 593         .get_tune_settings = sp887x_get_tune_settings,
 594
 595         .read_status = sp887x_read_status,
 596         .read_ber = sp887x_read_ber,
 597         .read_signal_strength = sp887x_read_signal_strength,
 598         .read_snr = sp887x_read_snr,
 599         .read_ucblocks = sp887x_read_ucblocks,
 600 };
 601
 602 module_param(debug, int, 0644);
 603 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
 604
 605 MODULE_DESCRIPTION("Spase sp887x DVB-T demodulator driver");
 606 MODULE_LICENSE("GPL");
 607
 608 EXPORT_SYMBOL(sp887x_attach);