drivers/media/dvb/frontends/sp887x.c

   1 /*
   2    Driver for the Spase sp887x demodulator
   3 */
   4
   5 /*
   6  * This driver needs external firmware. Please use the command
   7  * "<kerneldir>/Documentation/dvb/get_dvb_firmware sp887x" to
   8  * download/extract it, and then copy it to /usr/lib/hotplug/firmware
   9  * or /lib/firmware (depending on configuration of firmware hotplug).
  10  */
  11 #define SP887X_DEFAULT_FIRMWARE "dvb-fe-sp887x.fw"
  12
  13 #include <linux/init.h>
  14 #include <linux/module.h>
  15 #include <linux/moduleparam.h>
  16 #include <linux/device.h>
  17 #include <linux/firmware.h>
  18 #include <linux/string.h>
  19 #include <linux/slab.h>
  20
  21 #include "dvb_frontend.h"
  22 #include "sp887x.h"
  23
  24
  25 struct sp887x_state {
  26         struct i2c_adapter* i2c;
  27         struct dvb_frontend_ops ops;
  28         const struct sp887x_config* config;
  29         struct dvb_frontend frontend;
  30
  31         /* demodulator private data */
  32         u8 initialised:1;
  33 };
  34
  35 static int debug;
  36 #define dprintk(args...) \
  37         do { \
  38                 if (debug) printk(KERN_DEBUG "sp887x: " args); \
  39         } while (0)
  40
  41 static int i2c_writebytes (struct sp887x_state* state, u8 *buf, u8 len)
  42 {
  43         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = len };
  44         int err;
  45
  46         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  47                 printk ("%s: i2c write error (addr %02x, err == %i)\n",
  48                         __FUNCTION__, state->config->demod_address, err);
  49                 return -EREMOTEIO;
  50         }
  51
  52         return 0;
  53 }
  54
  55 static int sp887x_writereg (struct sp887x_state* state, u16 reg, u16 data)
  56 {
  57         u8 b0 [] = { reg >> 8 , reg & 0xff, data >> 8, data & 0xff };
  58         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 4 };
  59         int ret;
  60
  61         if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  62                 /**
  63                  *  in case of soft reset we ignore ACK errors...
  64                  */
  65                 if (!(reg == 0xf1a && data == 0x000 &&
  66                         (ret == -EREMOTEIO || ret == -EFAULT)))
  67                 {
  68                         printk("%s: writereg error "
  69                                "(reg %03x, data %03x, ret == %i)\n",
  70                                __FUNCTION__, reg & 0xffff, data & 0xffff, ret);
  71                         return ret;
  72                 }
  73         }
  74
  75         return 0;
  76 }
  77
  78 static int sp887x_readreg (struct sp887x_state* state, u16 reg)
  79 {
  80         u8 b0 [] = { reg >> 8 , reg & 0xff };
  81         u8 b1 [2];
  82         int ret;
  83         struct i2c_msg msg[] = {{ .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 2 },
  84                          { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 2 }};
  85
  86         if ((ret = i2c_transfer(state->i2c, msg, 2)) != 2) {
  87                 printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
  88                 return -1;
  89         }
  90
  91         return (((b1[0] << 8) | b1[1]) & 0xfff);
  92 }
  93
  94 static void sp887x_microcontroller_stop (struct sp887x_state* state)
  95 {
  96         dprintk("%s\n", __FUNCTION__);
  97         sp887x_writereg(state, 0xf08, 0x000);
  98         sp887x_writereg(state, 0xf09, 0x000);
  99
 100         /* microcontroller STOP */
 101         sp887x_writereg(state, 0xf00, 0x000);
 102 }
 103
 104 static void sp887x_microcontroller_start (struct sp887x_state* state)
 105 {
 106         dprintk("%s\n", __FUNCTION__);
 107         sp887x_writereg(state, 0xf08, 0x000);
 108         sp887x_writereg(state, 0xf09, 0x000);
 109
 110         /* microcontroller START */
 111         sp887x_writereg(state, 0xf00, 0x001);
 112 }
 113
 114 static void sp887x_setup_agc (struct sp887x_state* state)
 115 {
 116         /* setup AGC parameters */
 117         dprintk("%s\n", __FUNCTION__);
 118         sp887x_writereg(state, 0x33c, 0x054);
 119         sp887x_writereg(state, 0x33b, 0x04c);
 120         sp887x_writereg(state, 0x328, 0x000);
 121         sp887x_writereg(state, 0x327, 0x005);
 122         sp887x_writereg(state, 0x326, 0x001);
 123         sp887x_writereg(state, 0x325, 0x001);
 124         sp887x_writereg(state, 0x324, 0x001);
 125         sp887x_writereg(state, 0x318, 0x050);
 126         sp887x_writereg(state, 0x317, 0x3fe);
 127         sp887x_writereg(state, 0x316, 0x001);
 128         sp887x_writereg(state, 0x313, 0x005);
 129         sp887x_writereg(state, 0x312, 0x002);
 130         sp887x_writereg(state, 0x306, 0x000);
 131         sp887x_writereg(state, 0x303, 0x000);
 132 }
 133
 134 #define BLOCKSIZE 30
 135 #define FW_SIZE 0x4000
 136 /**
 137  *  load firmware and setup MPEG interface...
 138  */
 139 static int sp887x_initial_setup (struct dvb_frontend* fe, const struct firmware *fw)
 140 {
 141         struct sp887x_state* state = fe->demodulator_priv;
 142         u8 buf [BLOCKSIZE+2];
 143         int i;
 144         int fw_size = fw->size;
 145         unsigned char *mem = fw->data;
 146
 147         dprintk("%s\n", __FUNCTION__);
 148
 149         /* ignore the first 10 bytes, then we expect 0x4000 bytes of firmware */
 150         if (fw_size < FW_SIZE+10)
 151                 return -ENODEV;
 152
 153         mem = fw->data + 10;
 154
 155         /* soft reset */
 156         sp887x_writereg(state, 0xf1a, 0x000);
 157
 158         sp887x_microcontroller_stop (state);
 159
 160         printk ("%s: firmware upload... ", __FUNCTION__);
 161
 162         /* setup write pointer to -1 (end of memory) */
 163         /* bit 0x8000 in address is set to enable 13bit mode */
 164         sp887x_writereg(state, 0x8f08, 0x1fff);
 165
 166         /* dummy write (wrap around to start of memory) */
 167         sp887x_writereg(state, 0x8f0a, 0x0000);
 168
 169         for (i = 0; i < FW_SIZE; i += BLOCKSIZE) {
 170                 int c = BLOCKSIZE;
 171                 int err;
 172
 173                 if (i+c > FW_SIZE)
 174                         c = FW_SIZE - i;
 175
 176                 /* bit 0x8000 in address is set to enable 13bit mode */
 177                 /* bit 0x4000 enables multibyte read/write transfers */
 178                 /* write register is 0xf0a */
 179                 buf[0] = 0xcf;
 180                 buf[1] = 0x0a;
 181
 182                 memcpy(&buf[2], mem + i, c);
 183
 184                 if ((err = i2c_writebytes (state, buf, c+2)) < 0) {
 185                         printk ("failed.\n");
 186                         printk ("%s: i2c error (err == %i)\n", __FUNCTION__, err);
 187                         return err;
 188                 }
 189         }
 190
 191         /* don't write RS bytes between packets */
 192         sp887x_writereg(state, 0xc13, 0x001);
 193
 194         /* suppress clock if (!data_valid) */
 195         sp887x_writereg(state, 0xc14, 0x000);
 196
 197         /* setup MPEG interface... */
 198         sp887x_writereg(state, 0xc1a, 0x872);
 199         sp887x_writereg(state, 0xc1b, 0x001);
 200         sp887x_writereg(state, 0xc1c, 0x000); /* parallel mode (serial mode == 1) */
 201         sp887x_writereg(state, 0xc1a, 0x871);
 202
 203         /* ADC mode, 2 for MT8872, 3 for SP8870/SP8871 */
 204         sp887x_writereg(state, 0x301, 0x002);
 205
 206         sp887x_setup_agc(state);
 207
 208         /* bit 0x010: enable data valid signal */
 209         sp887x_writereg(state, 0xd00, 0x010);
 210         sp887x_writereg(state, 0x0d1, 0x000);
 211
 212         /* setup the PLL */
 213         if (state->config->pll_init) {
 214                 sp887x_writereg(state, 0x206, 0x001);
 215                 state->config->pll_init(fe);
 216                 sp887x_writereg(state, 0x206, 0x000);
 217         }
 218
 219         printk ("done.\n");
 220         return 0;
 221 };
 222
 223 static int configure_reg0xc05 (struct dvb_frontend_parameters *p, u16 *reg0xc05)
 224 {
 225         int known_parameters = 1;
 226
 227         *reg0xc05 = 0x000;
 228
 229         switch (p->u.ofdm.constellation) {
 230         case QPSK:
 231                 break;
 232         case QAM_16:
 233                 *reg0xc05 |= (1 << 10);
 234                 break;
 235         case QAM_64:
 236                 *reg0xc05 |= (2 << 10);
 237                 break;
 238         case QAM_AUTO:
 239                 known_parameters = 0;
 240                 break;
 241         default:
 242                 return -EINVAL;
 243         };
 244
 245         switch (p->u.ofdm.hierarchy_information) {
 246         case HIERARCHY_NONE:
 247                 break;
 248         case HIERARCHY_1:
 249                 *reg0xc05 |= (1 << 7);
 250                 break;
 251         case HIERARCHY_2:
 252                 *reg0xc05 |= (2 << 7);
 253                 break;
 254         case HIERARCHY_4:
 255                 *reg0xc05 |= (3 << 7);
 256                 break;
 257         case HIERARCHY_AUTO:
 258                 known_parameters = 0;
 259                 break;
 260         default:
 261                 return -EINVAL;
 262         };
 263
 264         switch (p->u.ofdm.code_rate_HP) {
 265         case FEC_1_2:
 266                 break;
 267         case FEC_2_3:
 268                 *reg0xc05 |= (1 << 3);
 269                 break;
 270         case FEC_3_4:
 271                 *reg0xc05 |= (2 << 3);
 272                 break;
 273         case FEC_5_6:
 274                 *reg0xc05 |= (3 << 3);
 275                 break;
 276         case FEC_7_8:
 277                 *reg0xc05 |= (4 << 3);
 278                 break;
 279         case FEC_AUTO:
 280                 known_parameters = 0;
 281                 break;
 282         default:
 283                 return -EINVAL;
 284         };
 285
 286         if (known_parameters)
 287                 *reg0xc05 |= (2 << 1);  /* use specified parameters */
 288         else
 289                 *reg0xc05 |= (1 << 1);  /* enable autoprobing */
 290
 291         return 0;
 292 }
 293
 294 /**
 295  *  estimates division of two 24bit numbers,
 296  *  derived from the ves1820/stv0299 driver code
 297  */
 298 static void divide (int n, int d, int *quotient_i, int *quotient_f)
 299 {
 300         unsigned int q, r;
 301
 302         r = (n % d) << 8;
 303         q = (r / d);
 304
 305         if (quotient_i)
 306                 *quotient_i = q;
 307
 308         if (quotient_f) {
 309                 r = (r % d) << 8;
 310                 q = (q << 8) | (r / d);
 311                 r = (r % d) << 8;
 312                 *quotient_f = (q << 8) | (r / d);
 313         }
 314 }
 315
 316 static void sp887x_correct_offsets (struct sp887x_state* state,
 317                                     struct dvb_frontend_parameters *p,
 318                                     int actual_freq)
 319 {
 320         static const u32 srate_correction [] = { 1879617, 4544878, 8098561 };
 321         int bw_index = p->u.ofdm.bandwidth - BANDWIDTH_8_MHZ;
 322         int freq_offset = actual_freq - p->frequency;
 323         int sysclock = 61003; //[kHz]
 324         int ifreq = 36000000;
 325         int freq;
 326         int frequency_shift;
 327
 328         if (p->inversion == INVERSION_ON)
 329                 freq = ifreq - freq_offset;
 330         else
 331                 freq = ifreq + freq_offset;
 332
 333         divide(freq / 333, sysclock, NULL, &frequency_shift);
 334
 335         if (p->inversion == INVERSION_ON)
 336                 frequency_shift = -frequency_shift;
 337
 338         /* sample rate correction */
 339         sp887x_writereg(state, 0x319, srate_correction[bw_index] >> 12);
 340         sp887x_writereg(state, 0x31a, srate_correction[bw_index] & 0xfff);
 341
 342         /* carrier offset correction */
 343         sp887x_writereg(state, 0x309, frequency_shift >> 12);
 344         sp887x_writereg(state, 0x30a, frequency_shift & 0xfff);
 345 }
 346
 347 static int sp887x_setup_frontend_parameters (struct dvb_frontend* fe,
 348                                              struct dvb_frontend_parameters *p)
 349 {
 350         struct sp887x_state* state = fe->demodulator_priv;
 351         int actual_freq, err;
 352         u16 val, reg0xc05;
 353
 354         if (p->u.ofdm.bandwidth != BANDWIDTH_8_MHZ &&
 355             p->u.ofdm.bandwidth != BANDWIDTH_7_MHZ &&
 356             p->u.ofdm.bandwidth != BANDWIDTH_6_MHZ)
 357                 return -EINVAL;
 358
 359         if ((err = configure_reg0xc05(p, &reg0xc05)))
 360                 return err;
 361
 362         sp887x_microcontroller_stop(state);
 363
 364         /* setup the PLL */
 365         sp887x_writereg(state, 0x206, 0x001);
 366         actual_freq = state->config->pll_set(fe, p);
 367         sp887x_writereg(state, 0x206, 0x000);
 368
 369         /* read status reg in order to clear <pending irqs */
 370         sp887x_readreg(state, 0x200);
 371
 372         sp887x_correct_offsets(state, p, actual_freq);
 373
 374         /* filter for 6/7/8 Mhz channel */
 375         if (p->u.ofdm.bandwidth == BANDWIDTH_6_MHZ)
 376                 val = 2;
 377         else if (p->u.ofdm.bandwidth == BANDWIDTH_7_MHZ)
 378                 val = 1;
 379         else
 380                 val = 0;
 381
 382         sp887x_writereg(state, 0x311, val);
 383
 384         /* scan order: 2k first = 0, 8k first = 1 */
 385         if (p->u.ofdm.transmission_mode == TRANSMISSION_MODE_2K)
 386                 sp887x_writereg(state, 0x338, 0x000);
 387         else
 388                 sp887x_writereg(state, 0x338, 0x001);
 389
 390         sp887x_writereg(state, 0xc05, reg0xc05);
 391
 392         if (p->u.ofdm.bandwidth == BANDWIDTH_6_MHZ)
 393                 val = 2 << 3;
 394         else if (p->u.ofdm.bandwidth == BANDWIDTH_7_MHZ)
 395                 val = 3 << 3;
 396         else
 397                 val = 0 << 3;
 398
 399         /* enable OFDM and SAW bits as lock indicators in sync register 0xf17,
 400          * optimize algorithm for given bandwidth...
 401          */
 402         sp887x_writereg(state, 0xf14, 0x160 | val);
 403         sp887x_writereg(state, 0xf15, 0x000);
 404
 405         sp887x_microcontroller_start(state);
 406         return 0;
 407 }
 408
 409 static int sp887x_read_status(struct dvb_frontend* fe, fe_status_t* status)
 410 {
 411         struct sp887x_state* state = fe->demodulator_priv;
 412         u16 snr12 = sp887x_readreg(state, 0xf16);
 413         u16 sync0x200 = sp887x_readreg(state, 0x200);
 414         u16 sync0xf17 = sp887x_readreg(state, 0xf17);
 415
 416         *status = 0;
 417
 418         if (snr12 > 0x00f)
 419                 *status |= FE_HAS_SIGNAL;
 420
 421         //if (sync0x200 & 0x004)
 422         //      *status |= FE_HAS_SYNC | FE_HAS_CARRIER;
 423
 424         //if (sync0x200 & 0x008)
 425         //      *status |= FE_HAS_VITERBI;
 426
 427         if ((sync0xf17 & 0x00f) == 0x002) {
 428                 *status |= FE_HAS_LOCK;
 429                 *status |= FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_CARRIER;
 430         }
 431
 432         if (sync0x200 & 0x001) {        /* tuner adjustment requested...*/
 433                 int steps = (sync0x200 >> 4) & 0x00f;
 434                 if (steps & 0x008)
 435                         steps = -steps;
 436                 dprintk("sp887x: implement tuner adjustment (%+i steps)!!\n",
 437                        steps);
 438         }
 439
 440         return 0;
 441 }
 442
 443 static int sp887x_read_ber(struct dvb_frontend* fe, u32* ber)
 444 {
 445         struct sp887x_state* state = fe->demodulator_priv;
 446
 447         *ber = (sp887x_readreg(state, 0xc08) & 0x3f) |
 448                (sp887x_readreg(state, 0xc07) << 6);
 449         sp887x_writereg(state, 0xc08, 0x000);
 450         sp887x_writereg(state, 0xc07, 0x000);
 451         if (*ber >= 0x3fff0)
 452                 *ber = ~0;
 453
 454         return 0;
 455 }
 456
 457 static int sp887x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 458 {
 459         struct sp887x_state* state = fe->demodulator_priv;
 460
 461         u16 snr12 = sp887x_readreg(state, 0xf16);
 462         u32 signal = 3 * (snr12 << 4);
 463         *strength = (signal < 0xffff) ? signal : 0xffff;
 464
 465         return 0;
 466 }
 467
 468 static int sp887x_read_snr(struct dvb_frontend* fe, u16* snr)
 469 {
 470         struct sp887x_state* state = fe->demodulator_priv;
 471
 472         u16 snr12 = sp887x_readreg(state, 0xf16);
 473         *snr = (snr12 << 4) | (snr12 >> 8);
 474
 475         return 0;
 476 }
 477
 478 static int sp887x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 479 {
 480         struct sp887x_state* state = fe->demodulator_priv;
 481
 482         *ucblocks = sp887x_readreg(state, 0xc0c);
 483         if (*ucblocks == 0xfff)
 484                 *ucblocks = ~0;
 485
 486         return 0;
 487 }
 488
 489 static int sp887x_sleep(struct dvb_frontend* fe)
 490 {
 491         struct sp887x_state* state = fe->demodulator_priv;
 492
 493         /* tristate TS output and disable interface pins */
 494         sp887x_writereg(state, 0xc18, 0x000);
 495
 496         return 0;
 497 }
 498
 499 static int sp887x_init(struct dvb_frontend* fe)
 500 {
 501         struct sp887x_state* state = fe->demodulator_priv;
 502         const struct firmware *fw = NULL;
 503         int ret;
 504
 505         if (!state->initialised) {
 506                 /* request the firmware, this will block until someone uploads it */
 507                 printk("sp887x: waiting for firmware upload (%s)...\n", SP887X_DEFAULT_FIRMWARE);
 508                 ret = state->config->request_firmware(fe, &fw, SP887X_DEFAULT_FIRMWARE);
 509                 if (ret) {
 510                         printk("sp887x: no firmware upload (timeout or file not found?)\n");
 511                         return ret;
 512                 }
 513
 514                 ret = sp887x_initial_setup(fe, fw);
 515                 if (ret) {
 516                         printk("sp887x: writing firmware to device failed\n");
 517                         release_firmware(fw);
 518                         return ret;
 519                 }
 520                 printk("sp887x: firmware upload complete\n");
 521                 state->initialised = 1;
 522         }
 523
 524         /* enable TS output and interface pins */
 525         sp887x_writereg(state, 0xc18, 0x00d);
 526
 527         return 0;
 528 }
 529
 530 static int sp887x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
 531 {
 532         fesettings->min_delay_ms = 350;
 533         fesettings->step_size = 166666*2;
 534         fesettings->max_drift = (166666*2)+1;
 535         return 0;
 536 }
 537
 538 static void sp887x_release(struct dvb_frontend* fe)
 539 {
 540         struct sp887x_state* state = fe->demodulator_priv;
 541         kfree(state);
 542 }
 543
 544 static struct dvb_frontend_ops sp887x_ops;
 545
 546 struct dvb_frontend* sp887x_attach(const struct sp887x_config* config,
 547                                    struct i2c_adapter* i2c)
 548 {
 549         struct sp887x_state* state = NULL;
 550
 551         /* allocate memory for the internal state */
 552         state = kmalloc(sizeof(struct sp887x_state), GFP_KERNEL);
 553         if (state == NULL) goto error;
 554
 555         /* setup the state */
 556         state->config = config;
 557         state->i2c = i2c;
 558         memcpy(&state->ops, &sp887x_ops, sizeof(struct dvb_frontend_ops));
 559         state->initialised = 0;
 560
 561         /* check if the demod is there */
 562         if (sp887x_readreg(state, 0x0200) < 0) goto error;
 563
 564         /* create dvb_frontend */
 565         state->frontend.ops = &state->ops;
 566         state->frontend.demodulator_priv = state;
 567         return &state->frontend;
 568
 569 error:
 570         kfree(state);
 571         return NULL;
 572 }
 573
 574 static struct dvb_frontend_ops sp887x_ops = {
 575
 576         .info = {
 577                 .name = "Spase SP887x DVB-T",
 578                 .type = FE_OFDM,
 579                 .frequency_min =  50500000,
 580                 .frequency_max = 858000000,
 581                 .frequency_stepsize = 166666,
 582                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
 583                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
 584                         FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
 585                         FE_CAN_RECOVER
 586         },
 587
 588         .release = sp887x_release,
 589
 590         .init = sp887x_init,
 591         .sleep = sp887x_sleep,
 592
 593         .set_frontend = sp887x_setup_frontend_parameters,
 594         .get_tune_settings = sp887x_get_tune_settings,
 595
 596         .read_status = sp887x_read_status,
 597         .read_ber = sp887x_read_ber,
 598         .read_signal_strength = sp887x_read_signal_strength,
 599         .read_snr = sp887x_read_snr,
 600         .read_ucblocks = sp887x_read_ucblocks,
 601 };
 602
 603 module_param(debug, int, 0644);
 604 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
 605
 606 MODULE_DESCRIPTION("Spase sp887x DVB-T demodulator driver");
 607 MODULE_LICENSE("GPL");
 608
 609 EXPORT_SYMBOL(sp887x_attach);