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1 /*
2 * pluto2.c - Satelco Easywatch Mobile Terrestrial Receiver [DVB-T]
3 *
4 * Copyright (C) 2005 Andreas Oberritter <obi@linuxtv.org>
5 *
6 * based on pluto2.c 1.10 - http://instinct-wp8.no-ip.org/pluto/
7 * by Dany Salman <salmandany@yahoo.fr>
8 * Copyright (c) 2004 TDF
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 *
24 */
25
26 #include <linux/i2c.h>
27 #include <linux/i2c-algo-bit.h>
28 #include <linux/init.h>
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33
34 #include "demux.h"
35 #include "dmxdev.h"
36 #include "dvb_demux.h"
37 #include "dvb_frontend.h"
38 #include "dvb_net.h"
39 #include "dvbdev.h"
40 #include "tda1004x.h"
41
42 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
43
44 #define DRIVER_NAME "pluto2"
45
46 #define REG_PIDn(n) ((n) << 2) /* PID n pattern registers */
47 #define REG_PCAR 0x0020 /* PC address register */
48 #define REG_TSCR 0x0024 /* TS ctrl & status */
49 #define REG_MISC 0x0028 /* miscellaneous */
50 #define REG_MMAC 0x002c /* MSB MAC address */
51 #define REG_IMAC 0x0030 /* ISB MAC address */
52 #define REG_LMAC 0x0034 /* LSB MAC address */
53 #define REG_SPID 0x0038 /* SPI data */
54 #define REG_SLCS 0x003c /* serial links ctrl/status */
55
56 #define PID0_NOFIL (0x0001 << 16)
57 #define PIDn_ENP (0x0001 << 15)
58 #define PID0_END (0x0001 << 14)
59 #define PID0_AFIL (0x0001 << 13)
60 #define PIDn_PID (0x1fff << 0)
61
62 #define TSCR_NBPACKETS (0x00ff << 24)
63 #define TSCR_DEM (0x0001 << 17)
64 #define TSCR_DE (0x0001 << 16)
65 #define TSCR_RSTN (0x0001 << 15)
66 #define TSCR_MSKO (0x0001 << 14)
67 #define TSCR_MSKA (0x0001 << 13)
68 #define TSCR_MSKL (0x0001 << 12)
69 #define TSCR_OVR (0x0001 << 11)
70 #define TSCR_AFUL (0x0001 << 10)
71 #define TSCR_LOCK (0x0001 << 9)
72 #define TSCR_IACK (0x0001 << 8)
73 #define TSCR_ADEF (0x007f << 0)
74
75 #define MISC_DVR (0x0fff << 4)
76 #define MISC_ALED (0x0001 << 3)
77 #define MISC_FRST (0x0001 << 2)
78 #define MISC_LED1 (0x0001 << 1)
79 #define MISC_LED0 (0x0001 << 0)
80
81 #define SPID_SPIDR (0x00ff << 0)
82
83 #define SLCS_SCL (0x0001 << 7)
84 #define SLCS_SDA (0x0001 << 6)
85 #define SLCS_CSN (0x0001 << 2)
86 #define SLCS_OVR (0x0001 << 1)
87 #define SLCS_SWC (0x0001 << 0)
88
89 #define TS_DMA_PACKETS (8)
90 #define TS_DMA_BYTES (188 * TS_DMA_PACKETS)
91
92 #define I2C_ADDR_TDA10046 0x10
93 #define I2C_ADDR_TUA6034 0xc2
94 #define NHWFILTERS 8
95
96 struct pluto {
97 /* pci */
98 struct pci_dev *pdev;
99 u8 __iomem *io_mem;
100
101 /* dvb */
102 struct dmx_frontend hw_frontend;
103 struct dmx_frontend mem_frontend;
104 struct dmxdev dmxdev;
105 struct dvb_adapter dvb_adapter;
106 struct dvb_demux demux;
107 struct dvb_frontend *fe;
108 struct dvb_net dvbnet;
109 unsigned int full_ts_users;
110 unsigned int users;
111
112 /* i2c */
113 struct i2c_algo_bit_data i2c_bit;
114 struct i2c_adapter i2c_adap;
115 unsigned int i2cbug;
116
117 /* irq */
118 unsigned int overflow;
119 unsigned int dead;
120
121 /* dma */
122 dma_addr_t dma_addr;
123 u8 dma_buf[TS_DMA_BYTES];
124 u8 dummy[4096];
125 };
126
127 static inline struct pluto *feed_to_pluto(struct dvb_demux_feed *feed)
128 {
129 return container_of(feed->demux, struct pluto, demux);
130 }
131
132 static inline struct pluto *frontend_to_pluto(struct dvb_frontend *fe)
133 {
134 return container_of(fe->dvb, struct pluto, dvb_adapter);
135 }
136
137 static inline u32 pluto_readreg(struct pluto *pluto, u32 reg)
138 {
139 return readl(&pluto->io_mem[reg]);
140 }
141
142 static inline void pluto_writereg(struct pluto *pluto, u32 reg, u32 val)
143 {
144 writel(val, &pluto->io_mem[reg]);
145 }
146
147 static inline void pluto_rw(struct pluto *pluto, u32 reg, u32 mask, u32 bits)
148 {
149 u32 val = readl(&pluto->io_mem[reg]);
150 val &= ~mask;
151 val |= bits;
152 writel(val, &pluto->io_mem[reg]);
153 }
154
155 static void pluto_write_tscr(struct pluto *pluto, u32 val)
156 {
157 /* set the number of packets */
158 val &= ~TSCR_ADEF;
159 val |= TS_DMA_PACKETS / 2;
160
161 pluto_writereg(pluto, REG_TSCR, val);
162 }
163
164 static void pluto_setsda(void *data, int state)
165 {
166 struct pluto *pluto = data;
167
168 if (state)
169 pluto_rw(pluto, REG_SLCS, SLCS_SDA, SLCS_SDA);
170 else
171 pluto_rw(pluto, REG_SLCS, SLCS_SDA, 0);
172 }
173
174 static void pluto_setscl(void *data, int state)
175 {
176 struct pluto *pluto = data;
177
178 if (state)
179 pluto_rw(pluto, REG_SLCS, SLCS_SCL, SLCS_SCL);
180 else
181 pluto_rw(pluto, REG_SLCS, SLCS_SCL, 0);
182
183 /* try to detect i2c_inb() to workaround hardware bug:
184 * reset SDA to high after SCL has been set to low */
185 if ((state) && (pluto->i2cbug == 0)) {
186 pluto->i2cbug = 1;
187 } else {
188 if ((!state) && (pluto->i2cbug == 1))
189 pluto_setsda(pluto, 1);
190 pluto->i2cbug = 0;
191 }
192 }
193
194 static int pluto_getsda(void *data)
195 {
196 struct pluto *pluto = data;
197
198 return pluto_readreg(pluto, REG_SLCS) & SLCS_SDA;
199 }
200
201 static int pluto_getscl(void *data)
202 {
203 struct pluto *pluto = data;
204
205 return pluto_readreg(pluto, REG_SLCS) & SLCS_SCL;
206 }
207
208 static void pluto_reset_frontend(struct pluto *pluto, int reenable)
209 {
210 u32 val = pluto_readreg(pluto, REG_MISC);
211
212 if (val & MISC_FRST) {
213 val &= ~MISC_FRST;
214 pluto_writereg(pluto, REG_MISC, val);
215 }
216 if (reenable) {
217 val |= MISC_FRST;
218 pluto_writereg(pluto, REG_MISC, val);
219 }
220 }
221
222 static void pluto_reset_ts(struct pluto *pluto, int reenable)
223 {
224 u32 val = pluto_readreg(pluto, REG_TSCR);
225
226 if (val & TSCR_RSTN) {
227 val &= ~TSCR_RSTN;
228 pluto_write_tscr(pluto, val);
229 }
230 if (reenable) {
231 val |= TSCR_RSTN;
232 pluto_write_tscr(pluto, val);
233 }
234 }
235
236 static void pluto_set_dma_addr(struct pluto *pluto)
237 {
238 pluto_writereg(pluto, REG_PCAR, pluto->dma_addr);
239 }
240
241 static int __devinit pluto_dma_map(struct pluto *pluto)
242 {
243 pluto->dma_addr = pci_map_single(pluto->pdev, pluto->dma_buf,
244 TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
245
246 return pci_dma_mapping_error(pluto->pdev, pluto->dma_addr);
247 }
248
249 static void pluto_dma_unmap(struct pluto *pluto)
250 {
251 pci_unmap_single(pluto->pdev, pluto->dma_addr,
252 TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
253 }
254
255 static int pluto_start_feed(struct dvb_demux_feed *f)
256 {
257 struct pluto *pluto = feed_to_pluto(f);
258
259 /* enable PID filtering */
260 if (pluto->users++ == 0)
261 pluto_rw(pluto, REG_PIDn(0), PID0_AFIL | PID0_NOFIL, 0);
262
263 if ((f->pid < 0x2000) && (f->index < NHWFILTERS))
264 pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, PIDn_ENP | f->pid);
265 else if (pluto->full_ts_users++ == 0)
266 pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, PID0_NOFIL);
267
268 return 0;
269 }
270
271 static int pluto_stop_feed(struct dvb_demux_feed *f)
272 {
273 struct pluto *pluto = feed_to_pluto(f);
274
275 /* disable PID filtering */
276 if (--pluto->users == 0)
277 pluto_rw(pluto, REG_PIDn(0), PID0_AFIL, PID0_AFIL);
278
279 if ((f->pid < 0x2000) && (f->index < NHWFILTERS))
280 pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, 0x1fff);
281 else if (--pluto->full_ts_users == 0)
282 pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, 0);
283
284 return 0;
285 }
286
287 static void pluto_dma_end(struct pluto *pluto, unsigned int nbpackets)
288 {
289 /* synchronize the DMA transfer with the CPU
290 * first so that we see updated contents. */
291 pci_dma_sync_single_for_cpu(pluto->pdev, pluto->dma_addr,
292 TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
293
294 /* Workaround for broken hardware:
295 * [1] On startup NBPACKETS seems to contain an uninitialized value,
296 * but no packets have been transfered.
297 * [2] Sometimes (actually very often) NBPACKETS stays at zero
298 * although one packet has been transfered.
299 * [3] Sometimes (actually rarely), the card gets into an erroneous
300 * mode where it continuously generates interrupts, claiming it
301 * has recieved nbpackets>TS_DMA_PACKETS packets, but no packet
302 * has been transfered. Only a reset seems to solve this
303 */
304 if ((nbpackets == 0) || (nbpackets > TS_DMA_PACKETS)) {
305 unsigned int i = 0;
306 while (pluto->dma_buf[i] == 0x47)
307 i += 188;
308 nbpackets = i / 188;
309 if (i == 0) {
310 pluto_reset_ts(pluto, 1);
311 dev_printk(KERN_DEBUG, &pluto->pdev->dev, "resetting TS because of invalid packet counter\n");
312 }
313 }
314
315 dvb_dmx_swfilter_packets(&pluto->demux, pluto->dma_buf, nbpackets);
316
317 /* clear the dma buffer. this is needed to be able to identify
318 * new valid ts packets above */
319 memset(pluto->dma_buf, 0, nbpackets * 188);
320
321 /* reset the dma address */
322 pluto_set_dma_addr(pluto);
323
324 /* sync the buffer and give it back to the card */
325 pci_dma_sync_single_for_device(pluto->pdev, pluto->dma_addr,
326 TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
327 }
328
329 static irqreturn_t pluto_irq(int irq, void *dev_id)
330 {
331 struct pluto *pluto = dev_id;
332 u32 tscr;
333
334 /* check whether an interrupt occured on this device */
335 tscr = pluto_readreg(pluto, REG_TSCR);
336 if (!(tscr & (TSCR_DE | TSCR_OVR)))
337 return IRQ_NONE;
338
339 if (tscr == 0xffffffff) {
340 if (pluto->dead == 0)
341 dev_err(&pluto->pdev->dev, "card has hung or been ejected.\n");
342 /* It's dead Jim */
343 pluto->dead = 1;
344 return IRQ_HANDLED;
345 }
346
347 /* dma end interrupt */
348 if (tscr & TSCR_DE) {
349 pluto_dma_end(pluto, (tscr & TSCR_NBPACKETS) >> 24);
350 /* overflow interrupt */
351 if (tscr & TSCR_OVR)
352 pluto->overflow++;
353 if (pluto->overflow) {
354 dev_err(&pluto->pdev->dev, "overflow irq (%d)\n",
355 pluto->overflow);
356 pluto_reset_ts(pluto, 1);
357 pluto->overflow = 0;
358 }
359 } else if (tscr & TSCR_OVR) {
360 pluto->overflow++;
361 }
362
363 /* ACK the interrupt */
364 pluto_write_tscr(pluto, tscr | TSCR_IACK);
365
366 return IRQ_HANDLED;
367 }
368
369 static void __devinit pluto_enable_irqs(struct pluto *pluto)
370 {
371 u32 val = pluto_readreg(pluto, REG_TSCR);
372
373 /* disable AFUL and LOCK interrupts */
374 val |= (TSCR_MSKA | TSCR_MSKL);
375 /* enable DMA and OVERFLOW interrupts */
376 val &= ~(TSCR_DEM | TSCR_MSKO);
377 /* clear pending interrupts */
378 val |= TSCR_IACK;
379
380 pluto_write_tscr(pluto, val);
381 }
382
383 static void pluto_disable_irqs(struct pluto *pluto)
384 {
385 u32 val = pluto_readreg(pluto, REG_TSCR);
386
387 /* disable all interrupts */
388 val |= (TSCR_DEM | TSCR_MSKO | TSCR_MSKA | TSCR_MSKL);
389 /* clear pending interrupts */
390 val |= TSCR_IACK;
391
392 pluto_write_tscr(pluto, val);
393 }
394
395 static int __devinit pluto_hw_init(struct pluto *pluto)
396 {
397 pluto_reset_frontend(pluto, 1);
398
399 /* set automatic LED control by FPGA */
400 pluto_rw(pluto, REG_MISC, MISC_ALED, MISC_ALED);
401
402 /* set data endianess */
403 #ifdef __LITTLE_ENDIAN
404 pluto_rw(pluto, REG_PIDn(0), PID0_END, PID0_END);
405 #else
406 pluto_rw(pluto, REG_PIDn(0), PID0_END, 0);
407 #endif
408 /* map DMA and set address */
409 pluto_dma_map(pluto);
410 pluto_set_dma_addr(pluto);
411
412 /* enable interrupts */
413 pluto_enable_irqs(pluto);
414
415 /* reset TS logic */
416 pluto_reset_ts(pluto, 1);
417
418 return 0;
419 }
420
421 static void pluto_hw_exit(struct pluto *pluto)
422 {
423 /* disable interrupts */
424 pluto_disable_irqs(pluto);
425
426 pluto_reset_ts(pluto, 0);
427
428 /* LED: disable automatic control, enable yellow, disable green */
429 pluto_rw(pluto, REG_MISC, MISC_ALED | MISC_LED1 | MISC_LED0, MISC_LED1);
430
431 /* unmap DMA */
432 pluto_dma_unmap(pluto);
433
434 pluto_reset_frontend(pluto, 0);
435 }
436
437 static inline u32 divide(u32 numerator, u32 denominator)
438 {
439 if (denominator == 0)
440 return ~0;
441
442 return (numerator + denominator / 2) / denominator;
443 }
444
445 /* LG Innotek TDTE-E001P (Infineon TUA6034) */
446 static int lg_tdtpe001p_tuner_set_params(struct dvb_frontend *fe,
447 struct dvb_frontend_parameters *p)
448 {
449 struct pluto *pluto = frontend_to_pluto(fe);
450 struct i2c_msg msg;
451 int ret;
452 u8 buf[4];
453 u32 div;
454
455 // Fref = 166.667 Hz
456 // Fref * 3 = 500.000 Hz
457 // IF = 36166667
458 // IF / Fref = 217
459 //div = divide(p->frequency + 36166667, 166667);
460 div = divide(p->frequency * 3, 500000) + 217;
461 buf[0] = (div >> 8) & 0x7f;
462 buf[1] = (div >> 0) & 0xff;
463
464 if (p->frequency < 611000000)
465 buf[2] = 0xb4;
466 else if (p->frequency < 811000000)
467 buf[2] = 0xbc;
468 else
469 buf[2] = 0xf4;
470
471 // VHF: 174-230 MHz
472 // center: 350 MHz
473 // UHF: 470-862 MHz
474 if (p->frequency < 350000000)
475 buf[3] = 0x02;
476 else
477 buf[3] = 0x04;
478
479 if (p->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
480 buf[3] |= 0x08;
481
482 if (sizeof(buf) == 6) {
483 buf[4] = buf[2];
484 buf[4] &= ~0x1c;
485 buf[4] |= 0x18;
486
487 buf[5] = (0 << 7) | (2 << 4);
488 }
489
490 msg.addr = I2C_ADDR_TUA6034 >> 1;
491 msg.flags = 0;
492 msg.buf = buf;
493 msg.len = sizeof(buf);
494
495 if (fe->ops.i2c_gate_ctrl)
496 fe->ops.i2c_gate_ctrl(fe, 1);
497 ret = i2c_transfer(&pluto->i2c_adap, &msg, 1);
498 if (ret < 0)
499 return ret;
500 else if (ret == 0)
501 return -EREMOTEIO;
502
503 return 0;
504 }
505
506 static int pluto2_request_firmware(struct dvb_frontend *fe,
507 const struct firmware **fw, char *name)
508 {
509 struct pluto *pluto = frontend_to_pluto(fe);
510
511 return request_firmware(fw, name, &pluto->pdev->dev);
512 }
513
514 static struct tda1004x_config pluto2_fe_config __devinitdata = {
515 .demod_address = I2C_ADDR_TDA10046 >> 1,
516 .invert = 1,
517 .invert_oclk = 0,
518 .xtal_freq = TDA10046_XTAL_16M,
519 .agc_config = TDA10046_AGC_DEFAULT,
520 .if_freq = TDA10046_FREQ_3617,
521 .request_firmware = pluto2_request_firmware,
522 };
523
524 static int __devinit frontend_init(struct pluto *pluto)
525 {
526 int ret;
527
528 pluto->fe = tda10046_attach(&pluto2_fe_config, &pluto->i2c_adap);
529 if (!pluto->fe) {
530 dev_err(&pluto->pdev->dev, "could not attach frontend\n");
531 return -ENODEV;
532 }
533 pluto->fe->ops.tuner_ops.set_params = lg_tdtpe001p_tuner_set_params;
534
535 ret = dvb_register_frontend(&pluto->dvb_adapter, pluto->fe);
536 if (ret < 0) {
537 if (pluto->fe->ops.release)
538 pluto->fe->ops.release(pluto->fe);
539 return ret;
540 }
541
542 return 0;
543 }
544
545 static void __devinit pluto_read_rev(struct pluto *pluto)
546 {
547 u32 val = pluto_readreg(pluto, REG_MISC) & MISC_DVR;
548 dev_info(&pluto->pdev->dev, "board revision %d.%d\n",
549 (val >> 12) & 0x0f, (val >> 4) & 0xff);
550 }
551
552 static void __devinit pluto_read_mac(struct pluto *pluto, u8 *mac)
553 {
554 u32 val = pluto_readreg(pluto, REG_MMAC);
555 mac[0] = (val >> 8) & 0xff;
556 mac[1] = (val >> 0) & 0xff;
557
558 val = pluto_readreg(pluto, REG_IMAC);
559 mac[2] = (val >> 8) & 0xff;
560 mac[3] = (val >> 0) & 0xff;
561
562 val = pluto_readreg(pluto, REG_LMAC);
563 mac[4] = (val >> 8) & 0xff;
564 mac[5] = (val >> 0) & 0xff;
565
566 dev_info(&pluto->pdev->dev, "MAC %pM\n", mac);
567 }
568
569 static int __devinit pluto_read_serial(struct pluto *pluto)
570 {
571 struct pci_dev *pdev = pluto->pdev;
572 unsigned int i, j;
573 u8 __iomem *cis;
574
575 cis = pci_iomap(pdev, 1, 0);
576 if (!cis)
577 return -EIO;
578
579 dev_info(&pdev->dev, "S/N ");
580
581 for (i = 0xe0; i < 0x100; i += 4) {
582 u32 val = readl(&cis[i]);
583 for (j = 0; j < 32; j += 8) {
584 if ((val & 0xff) == 0xff)
585 goto out;
586 printk("%c", val & 0xff);
587 val >>= 8;
588 }
589 }
590 out:
591 printk("\n");
592 pci_iounmap(pdev, cis);
593
594 return 0;
595 }
596
597 static int __devinit pluto2_probe(struct pci_dev *pdev,
598 const struct pci_device_id *ent)
599 {
600 struct pluto *pluto;
601 struct dvb_adapter *dvb_adapter;
602 struct dvb_demux *dvbdemux;
603 struct dmx_demux *dmx;
604 int ret = -ENOMEM;
605
606 pluto = kzalloc(sizeof(struct pluto), GFP_KERNEL);
607 if (!pluto)
608 goto out;
609
610 pluto->pdev = pdev;
611
612 ret = pci_enable_device(pdev);
613 if (ret < 0)
614 goto err_kfree;
615
616 /* enable interrupts */
617 pci_write_config_dword(pdev, 0x6c, 0x8000);
618
619 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
620 if (ret < 0)
621 goto err_pci_disable_device;
622
623 pci_set_master(pdev);
624
625 ret = pci_request_regions(pdev, DRIVER_NAME);
626 if (ret < 0)
627 goto err_pci_disable_device;
628
629 pluto->io_mem = pci_iomap(pdev, 0, 0x40);
630 if (!pluto->io_mem) {
631 ret = -EIO;
632 goto err_pci_release_regions;
633 }
634
635 pci_set_drvdata(pdev, pluto);
636
637 ret = request_irq(pdev->irq, pluto_irq, IRQF_SHARED, DRIVER_NAME, pluto);
638 if (ret < 0)
639 goto err_pci_iounmap;
640
641 ret = pluto_hw_init(pluto);
642 if (ret < 0)
643 goto err_free_irq;
644
645 /* i2c */
646 i2c_set_adapdata(&pluto->i2c_adap, pluto);
647 strcpy(pluto->i2c_adap.name, DRIVER_NAME);
648 pluto->i2c_adap.owner = THIS_MODULE;
649 pluto->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
650 pluto->i2c_adap.dev.parent = &pdev->dev;
651 pluto->i2c_adap.algo_data = &pluto->i2c_bit;
652 pluto->i2c_bit.data = pluto;
653 pluto->i2c_bit.setsda = pluto_setsda;
654 pluto->i2c_bit.setscl = pluto_setscl;
655 pluto->i2c_bit.getsda = pluto_getsda;
656 pluto->i2c_bit.getscl = pluto_getscl;
657 pluto->i2c_bit.udelay = 10;
658 pluto->i2c_bit.timeout = 10;
659
660 /* Raise SCL and SDA */
661 pluto_setsda(pluto, 1);
662 pluto_setscl(pluto, 1);
663
664 ret = i2c_bit_add_bus(&pluto->i2c_adap);
665 if (ret < 0)
666 goto err_pluto_hw_exit;
667
668 /* dvb */
669 ret = dvb_register_adapter(&pluto->dvb_adapter, DRIVER_NAME,
670 THIS_MODULE, &pdev->dev, adapter_nr);
671 if (ret < 0)
672 goto err_i2c_del_adapter;
673
674 dvb_adapter = &pluto->dvb_adapter;
675
676 pluto_read_rev(pluto);
677 pluto_read_serial(pluto);
678 pluto_read_mac(pluto, dvb_adapter->proposed_mac);
679
680 dvbdemux = &pluto->demux;
681 dvbdemux->filternum = 256;
682 dvbdemux->feednum = 256;
683 dvbdemux->start_feed = pluto_start_feed;
684 dvbdemux->stop_feed = pluto_stop_feed;
685 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
686 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
687 ret = dvb_dmx_init(dvbdemux);
688 if (ret < 0)
689 goto err_dvb_unregister_adapter;
690
691 dmx = &dvbdemux->dmx;
692
693 pluto->hw_frontend.source = DMX_FRONTEND_0;
694 pluto->mem_frontend.source = DMX_MEMORY_FE;
695 pluto->dmxdev.filternum = NHWFILTERS;
696 pluto->dmxdev.demux = dmx;
697
698 ret = dvb_dmxdev_init(&pluto->dmxdev, dvb_adapter);
699 if (ret < 0)
700 goto err_dvb_dmx_release;
701
702 ret = dmx->add_frontend(dmx, &pluto->hw_frontend);
703 if (ret < 0)
704 goto err_dvb_dmxdev_release;
705
706 ret = dmx->add_frontend(dmx, &pluto->mem_frontend);
707 if (ret < 0)
708 goto err_remove_hw_frontend;
709
710 ret = dmx->connect_frontend(dmx, &pluto->hw_frontend);
711 if (ret < 0)
712 goto err_remove_mem_frontend;
713
714 ret = frontend_init(pluto);
715 if (ret < 0)
716 goto err_disconnect_frontend;
717
718 dvb_net_init(dvb_adapter, &pluto->dvbnet, dmx);
719 out:
720 return ret;
721
722 err_disconnect_frontend:
723 dmx->disconnect_frontend(dmx);
724 err_remove_mem_frontend:
725 dmx->remove_frontend(dmx, &pluto->mem_frontend);
726 err_remove_hw_frontend:
727 dmx->remove_frontend(dmx, &pluto->hw_frontend);
728 err_dvb_dmxdev_release:
729 dvb_dmxdev_release(&pluto->dmxdev);
730 err_dvb_dmx_release:
731 dvb_dmx_release(dvbdemux);
732 err_dvb_unregister_adapter:
733 dvb_unregister_adapter(dvb_adapter);
734 err_i2c_del_adapter:
735 i2c_del_adapter(&pluto->i2c_adap);
736 err_pluto_hw_exit:
737 pluto_hw_exit(pluto);
738 err_free_irq:
739 free_irq(pdev->irq, pluto);
740 err_pci_iounmap:
741 pci_iounmap(pdev, pluto->io_mem);
742 err_pci_release_regions:
743 pci_release_regions(pdev);
744 err_pci_disable_device:
745 pci_disable_device(pdev);
746 err_kfree:
747 pci_set_drvdata(pdev, NULL);
748 kfree(pluto);
749 goto out;
750 }
751
752 static void __devexit pluto2_remove(struct pci_dev *pdev)
753 {
754 struct pluto *pluto = pci_get_drvdata(pdev);
755 struct dvb_adapter *dvb_adapter = &pluto->dvb_adapter;
756 struct dvb_demux *dvbdemux = &pluto->demux;
757 struct dmx_demux *dmx = &dvbdemux->dmx;
758
759 dmx->close(dmx);
760 dvb_net_release(&pluto->dvbnet);
761 if (pluto->fe)
762 dvb_unregister_frontend(pluto->fe);
763
764 dmx->disconnect_frontend(dmx);
765 dmx->remove_frontend(dmx, &pluto->mem_frontend);
766 dmx->remove_frontend(dmx, &pluto->hw_frontend);
767 dvb_dmxdev_release(&pluto->dmxdev);
768 dvb_dmx_release(dvbdemux);
769 dvb_unregister_adapter(dvb_adapter);
770 i2c_del_adapter(&pluto->i2c_adap);
771 pluto_hw_exit(pluto);
772 free_irq(pdev->irq, pluto);
773 pci_iounmap(pdev, pluto->io_mem);
774 pci_release_regions(pdev);
775 pci_disable_device(pdev);
776 pci_set_drvdata(pdev, NULL);
777 kfree(pluto);
778 }
779
780 #ifndef PCI_VENDOR_ID_SCM
781 #define PCI_VENDOR_ID_SCM 0x0432
782 #endif
783 #ifndef PCI_DEVICE_ID_PLUTO2
784 #define PCI_DEVICE_ID_PLUTO2 0x0001
785 #endif
786
787 static struct pci_device_id pluto2_id_table[] __devinitdata = {
788 {
789 .vendor = PCI_VENDOR_ID_SCM,
790 .device = PCI_DEVICE_ID_PLUTO2,
791 .subvendor = PCI_ANY_ID,
792 .subdevice = PCI_ANY_ID,
793 }, {
794 /* empty */
795 },
796 };
797
798 MODULE_DEVICE_TABLE(pci, pluto2_id_table);
799
800 static struct pci_driver pluto2_driver = {
801 .name = DRIVER_NAME,
802 .id_table = pluto2_id_table,
803 .probe = pluto2_probe,
804 .remove = __devexit_p(pluto2_remove),
805 };
806
807 static int __init pluto2_init(void)
808 {
809 return pci_register_driver(&pluto2_driver);
810 }
811
812 static void __exit pluto2_exit(void)
813 {
814 pci_unregister_driver(&pluto2_driver);
815 }
816
817 module_init(pluto2_init);
818 module_exit(pluto2_exit);
819
820 MODULE_AUTHOR("Andreas Oberritter <obi@linuxtv.org>");
821 MODULE_DESCRIPTION("Pluto2 driver");
822 MODULE_LICENSE("GPL");