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[media] af9033: convert to regmap api
[mirror_ubuntu-artful-kernel.git] / drivers / media / dvb-frontends / af9033.c
1 /*
2 * Afatech AF9033 demodulator driver
3 *
4 * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
5 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
22 #include "af9033_priv.h"
23
24 struct af9033_dev {
25 struct i2c_client *client;
26 struct regmap *regmap;
27 struct dvb_frontend fe;
28 struct af9033_config cfg;
29 bool is_af9035;
30 bool is_it9135;
31
32 u32 bandwidth_hz;
33 bool ts_mode_parallel;
34 bool ts_mode_serial;
35
36 enum fe_status fe_status;
37 u64 post_bit_error_prev; /* for old read_ber we return (curr - prev) */
38 u64 post_bit_error;
39 u64 post_bit_count;
40 u64 error_block_count;
41 u64 total_block_count;
42 };
43
44 /* write reg val table using reg addr auto increment */
45 static int af9033_wr_reg_val_tab(struct af9033_dev *dev,
46 const struct reg_val *tab, int tab_len)
47 {
48 #define MAX_TAB_LEN 212
49 int ret, i, j;
50 u8 buf[1 + MAX_TAB_LEN];
51
52 dev_dbg(&dev->client->dev, "tab_len=%d\n", tab_len);
53
54 if (tab_len > sizeof(buf)) {
55 dev_warn(&dev->client->dev, "tab len %d is too big\n", tab_len);
56 return -EINVAL;
57 }
58
59 for (i = 0, j = 0; i < tab_len; i++) {
60 buf[j] = tab[i].val;
61
62 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1) {
63 ret = regmap_bulk_write(dev->regmap, tab[i].reg - j,
64 buf, j + 1);
65 if (ret)
66 goto err;
67
68 j = 0;
69 } else {
70 j++;
71 }
72 }
73
74 return 0;
75
76 err:
77 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
78
79 return ret;
80 }
81
82 static u32 af9033_div(struct af9033_dev *dev, u32 a, u32 b, u32 x)
83 {
84 u32 r = 0, c = 0, i;
85
86 dev_dbg(&dev->client->dev, "a=%d b=%d x=%d\n", a, b, x);
87
88 if (a > b) {
89 c = a / b;
90 a = a - c * b;
91 }
92
93 for (i = 0; i < x; i++) {
94 if (a >= b) {
95 r += 1;
96 a -= b;
97 }
98 a <<= 1;
99 r <<= 1;
100 }
101 r = (c << (u32)x) + r;
102
103 dev_dbg(&dev->client->dev, "a=%d b=%d x=%d r=%d r=%x\n", a, b, x, r, r);
104
105 return r;
106 }
107
108 static int af9033_init(struct dvb_frontend *fe)
109 {
110 struct af9033_dev *dev = fe->demodulator_priv;
111 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
112 int ret, i, len;
113 const struct reg_val *init;
114 u8 buf[4];
115 u32 adc_cw, clock_cw;
116 struct reg_val_mask tab[] = {
117 { 0x80fb24, 0x00, 0x08 },
118 { 0x80004c, 0x00, 0xff },
119 { 0x00f641, dev->cfg.tuner, 0xff },
120 { 0x80f5ca, 0x01, 0x01 },
121 { 0x80f715, 0x01, 0x01 },
122 { 0x00f41f, 0x04, 0x04 },
123 { 0x00f41a, 0x01, 0x01 },
124 { 0x80f731, 0x00, 0x01 },
125 { 0x00d91e, 0x00, 0x01 },
126 { 0x00d919, 0x00, 0x01 },
127 { 0x80f732, 0x00, 0x01 },
128 { 0x00d91f, 0x00, 0x01 },
129 { 0x00d91a, 0x00, 0x01 },
130 { 0x80f730, 0x00, 0x01 },
131 { 0x80f778, 0x00, 0xff },
132 { 0x80f73c, 0x01, 0x01 },
133 { 0x80f776, 0x00, 0x01 },
134 { 0x00d8fd, 0x01, 0xff },
135 { 0x00d830, 0x01, 0xff },
136 { 0x00d831, 0x00, 0xff },
137 { 0x00d832, 0x00, 0xff },
138 { 0x80f985, dev->ts_mode_serial, 0x01 },
139 { 0x80f986, dev->ts_mode_parallel, 0x01 },
140 { 0x00d827, 0x00, 0xff },
141 { 0x00d829, 0x00, 0xff },
142 { 0x800045, dev->cfg.adc_multiplier, 0xff },
143 };
144
145 /* program clock control */
146 clock_cw = af9033_div(dev, dev->cfg.clock, 1000000ul, 19ul);
147 buf[0] = (clock_cw >> 0) & 0xff;
148 buf[1] = (clock_cw >> 8) & 0xff;
149 buf[2] = (clock_cw >> 16) & 0xff;
150 buf[3] = (clock_cw >> 24) & 0xff;
151
152 dev_dbg(&dev->client->dev, "clock=%d clock_cw=%08x\n",
153 dev->cfg.clock, clock_cw);
154
155 ret = regmap_bulk_write(dev->regmap, 0x800025, buf, 4);
156 if (ret)
157 goto err;
158
159 /* program ADC control */
160 for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
161 if (clock_adc_lut[i].clock == dev->cfg.clock)
162 break;
163 }
164 if (i == ARRAY_SIZE(clock_adc_lut)) {
165 dev_err(&dev->client->dev,
166 "Couldn't find ADC config for clock=%d\n",
167 dev->cfg.clock);
168 goto err;
169 }
170
171 adc_cw = af9033_div(dev, clock_adc_lut[i].adc, 1000000ul, 19ul);
172 buf[0] = (adc_cw >> 0) & 0xff;
173 buf[1] = (adc_cw >> 8) & 0xff;
174 buf[2] = (adc_cw >> 16) & 0xff;
175
176 dev_dbg(&dev->client->dev, "adc=%d adc_cw=%06x\n",
177 clock_adc_lut[i].adc, adc_cw);
178
179 ret = regmap_bulk_write(dev->regmap, 0x80f1cd, buf, 3);
180 if (ret)
181 goto err;
182
183 /* program register table */
184 for (i = 0; i < ARRAY_SIZE(tab); i++) {
185 ret = regmap_update_bits(dev->regmap, tab[i].reg, tab[i].mask,
186 tab[i].val);
187 if (ret)
188 goto err;
189 }
190
191 /* clock output */
192 if (dev->cfg.dyn0_clk) {
193 ret = regmap_write(dev->regmap, 0x80fba8, 0x00);
194 if (ret)
195 goto err;
196 }
197
198 /* settings for TS interface */
199 if (dev->cfg.ts_mode == AF9033_TS_MODE_USB) {
200 ret = regmap_update_bits(dev->regmap, 0x80f9a5, 0x01, 0x00);
201 if (ret)
202 goto err;
203 ret = regmap_update_bits(dev->regmap, 0x80f9b5, 0x01, 0x01);
204 if (ret)
205 goto err;
206 } else {
207 ret = regmap_update_bits(dev->regmap, 0x80f990, 0x01, 0x00);
208 if (ret)
209 goto err;
210 ret = regmap_update_bits(dev->regmap, 0x80f9b5, 0x01, 0x00);
211 if (ret)
212 goto err;
213 }
214
215 /* load OFSM settings */
216 dev_dbg(&dev->client->dev, "load ofsm settings\n");
217 switch (dev->cfg.tuner) {
218 case AF9033_TUNER_IT9135_38:
219 case AF9033_TUNER_IT9135_51:
220 case AF9033_TUNER_IT9135_52:
221 len = ARRAY_SIZE(ofsm_init_it9135_v1);
222 init = ofsm_init_it9135_v1;
223 break;
224 case AF9033_TUNER_IT9135_60:
225 case AF9033_TUNER_IT9135_61:
226 case AF9033_TUNER_IT9135_62:
227 len = ARRAY_SIZE(ofsm_init_it9135_v2);
228 init = ofsm_init_it9135_v2;
229 break;
230 default:
231 len = ARRAY_SIZE(ofsm_init);
232 init = ofsm_init;
233 break;
234 }
235
236 ret = af9033_wr_reg_val_tab(dev, init, len);
237 if (ret)
238 goto err;
239
240 /* load tuner specific settings */
241 dev_dbg(&dev->client->dev, "load tuner specific settings\n");
242 switch (dev->cfg.tuner) {
243 case AF9033_TUNER_TUA9001:
244 len = ARRAY_SIZE(tuner_init_tua9001);
245 init = tuner_init_tua9001;
246 break;
247 case AF9033_TUNER_FC0011:
248 len = ARRAY_SIZE(tuner_init_fc0011);
249 init = tuner_init_fc0011;
250 break;
251 case AF9033_TUNER_MXL5007T:
252 len = ARRAY_SIZE(tuner_init_mxl5007t);
253 init = tuner_init_mxl5007t;
254 break;
255 case AF9033_TUNER_TDA18218:
256 len = ARRAY_SIZE(tuner_init_tda18218);
257 init = tuner_init_tda18218;
258 break;
259 case AF9033_TUNER_FC2580:
260 len = ARRAY_SIZE(tuner_init_fc2580);
261 init = tuner_init_fc2580;
262 break;
263 case AF9033_TUNER_FC0012:
264 len = ARRAY_SIZE(tuner_init_fc0012);
265 init = tuner_init_fc0012;
266 break;
267 case AF9033_TUNER_IT9135_38:
268 len = ARRAY_SIZE(tuner_init_it9135_38);
269 init = tuner_init_it9135_38;
270 break;
271 case AF9033_TUNER_IT9135_51:
272 len = ARRAY_SIZE(tuner_init_it9135_51);
273 init = tuner_init_it9135_51;
274 break;
275 case AF9033_TUNER_IT9135_52:
276 len = ARRAY_SIZE(tuner_init_it9135_52);
277 init = tuner_init_it9135_52;
278 break;
279 case AF9033_TUNER_IT9135_60:
280 len = ARRAY_SIZE(tuner_init_it9135_60);
281 init = tuner_init_it9135_60;
282 break;
283 case AF9033_TUNER_IT9135_61:
284 len = ARRAY_SIZE(tuner_init_it9135_61);
285 init = tuner_init_it9135_61;
286 break;
287 case AF9033_TUNER_IT9135_62:
288 len = ARRAY_SIZE(tuner_init_it9135_62);
289 init = tuner_init_it9135_62;
290 break;
291 default:
292 dev_dbg(&dev->client->dev, "unsupported tuner ID=%d\n",
293 dev->cfg.tuner);
294 ret = -ENODEV;
295 goto err;
296 }
297
298 ret = af9033_wr_reg_val_tab(dev, init, len);
299 if (ret)
300 goto err;
301
302 if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
303 ret = regmap_update_bits(dev->regmap, 0x00d91c, 0x01, 0x01);
304 if (ret)
305 goto err;
306 ret = regmap_update_bits(dev->regmap, 0x00d917, 0x01, 0x00);
307 if (ret)
308 goto err;
309 ret = regmap_update_bits(dev->regmap, 0x00d916, 0x01, 0x00);
310 if (ret)
311 goto err;
312 }
313
314 switch (dev->cfg.tuner) {
315 case AF9033_TUNER_IT9135_60:
316 case AF9033_TUNER_IT9135_61:
317 case AF9033_TUNER_IT9135_62:
318 ret = regmap_write(dev->regmap, 0x800000, 0x01);
319 if (ret)
320 goto err;
321 }
322
323 dev->bandwidth_hz = 0; /* force to program all parameters */
324 /* init stats here in order signal app which stats are supported */
325 c->strength.len = 1;
326 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
327 c->cnr.len = 1;
328 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
329 c->block_count.len = 1;
330 c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
331 c->block_error.len = 1;
332 c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
333 c->post_bit_count.len = 1;
334 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
335 c->post_bit_error.len = 1;
336 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
337
338 return 0;
339
340 err:
341 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
342
343 return ret;
344 }
345
346 static int af9033_sleep(struct dvb_frontend *fe)
347 {
348 struct af9033_dev *dev = fe->demodulator_priv;
349 int ret;
350 unsigned int utmp;
351
352 ret = regmap_write(dev->regmap, 0x80004c, 0x01);
353 if (ret)
354 goto err;
355 ret = regmap_write(dev->regmap, 0x800000, 0x00);
356 if (ret)
357 goto err;
358 ret = regmap_read_poll_timeout(dev->regmap, 0x80004c, utmp, utmp == 0,
359 5000, 1000000);
360 if (ret)
361 goto err;
362 ret = regmap_update_bits(dev->regmap, 0x80fb24, 0x08, 0x08);
363 if (ret)
364 goto err;
365
366 /* prevent current leak (?) */
367 if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
368 /* enable parallel TS */
369 ret = regmap_update_bits(dev->regmap, 0x00d917, 0x01, 0x00);
370 if (ret)
371 goto err;
372 ret = regmap_update_bits(dev->regmap, 0x00d916, 0x01, 0x01);
373 if (ret)
374 goto err;
375 }
376
377 return 0;
378
379 err:
380 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
381
382 return ret;
383 }
384
385 static int af9033_get_tune_settings(struct dvb_frontend *fe,
386 struct dvb_frontend_tune_settings *fesettings)
387 {
388 /* 800 => 2000 because IT9135 v2 is slow to gain lock */
389 fesettings->min_delay_ms = 2000;
390 fesettings->step_size = 0;
391 fesettings->max_drift = 0;
392
393 return 0;
394 }
395
396 static int af9033_set_frontend(struct dvb_frontend *fe)
397 {
398 struct af9033_dev *dev = fe->demodulator_priv;
399 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
400 int ret, i, spec_inv, sampling_freq;
401 u8 tmp, buf[3], bandwidth_reg_val;
402 u32 if_frequency, freq_cw, adc_freq;
403
404 dev_dbg(&dev->client->dev, "frequency=%d bandwidth_hz=%d\n",
405 c->frequency, c->bandwidth_hz);
406
407 /* check bandwidth */
408 switch (c->bandwidth_hz) {
409 case 6000000:
410 bandwidth_reg_val = 0x00;
411 break;
412 case 7000000:
413 bandwidth_reg_val = 0x01;
414 break;
415 case 8000000:
416 bandwidth_reg_val = 0x02;
417 break;
418 default:
419 dev_dbg(&dev->client->dev, "invalid bandwidth_hz\n");
420 ret = -EINVAL;
421 goto err;
422 }
423
424 /* program tuner */
425 if (fe->ops.tuner_ops.set_params)
426 fe->ops.tuner_ops.set_params(fe);
427
428 /* program CFOE coefficients */
429 if (c->bandwidth_hz != dev->bandwidth_hz) {
430 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
431 if (coeff_lut[i].clock == dev->cfg.clock &&
432 coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
433 break;
434 }
435 }
436 if (i == ARRAY_SIZE(coeff_lut)) {
437 dev_err(&dev->client->dev,
438 "Couldn't find LUT config for clock=%d\n",
439 dev->cfg.clock);
440 ret = -EINVAL;
441 goto err;
442 }
443
444 ret = regmap_bulk_write(dev->regmap, 0x800001, coeff_lut[i].val,
445 sizeof(coeff_lut[i].val));
446 if (ret)
447 goto err;
448 }
449
450 /* program frequency control */
451 if (c->bandwidth_hz != dev->bandwidth_hz) {
452 spec_inv = dev->cfg.spec_inv ? -1 : 1;
453
454 for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
455 if (clock_adc_lut[i].clock == dev->cfg.clock)
456 break;
457 }
458 if (i == ARRAY_SIZE(clock_adc_lut)) {
459 dev_err(&dev->client->dev,
460 "Couldn't find ADC clock for clock=%d\n",
461 dev->cfg.clock);
462 ret = -EINVAL;
463 goto err;
464 }
465 adc_freq = clock_adc_lut[i].adc;
466
467 /* get used IF frequency */
468 if (fe->ops.tuner_ops.get_if_frequency)
469 fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
470 else
471 if_frequency = 0;
472
473 sampling_freq = if_frequency;
474
475 while (sampling_freq > (adc_freq / 2))
476 sampling_freq -= adc_freq;
477
478 if (sampling_freq >= 0)
479 spec_inv *= -1;
480 else
481 sampling_freq *= -1;
482
483 freq_cw = af9033_div(dev, sampling_freq, adc_freq, 23ul);
484
485 if (spec_inv == -1)
486 freq_cw = 0x800000 - freq_cw;
487
488 if (dev->cfg.adc_multiplier == AF9033_ADC_MULTIPLIER_2X)
489 freq_cw /= 2;
490
491 buf[0] = (freq_cw >> 0) & 0xff;
492 buf[1] = (freq_cw >> 8) & 0xff;
493 buf[2] = (freq_cw >> 16) & 0x7f;
494
495 /* FIXME: there seems to be calculation error here... */
496 if (if_frequency == 0)
497 buf[2] = 0;
498
499 ret = regmap_bulk_write(dev->regmap, 0x800029, buf, 3);
500 if (ret)
501 goto err;
502
503 dev->bandwidth_hz = c->bandwidth_hz;
504 }
505
506 ret = regmap_update_bits(dev->regmap, 0x80f904, 0x03,
507 bandwidth_reg_val);
508 if (ret)
509 goto err;
510 ret = regmap_write(dev->regmap, 0x800040, 0x00);
511 if (ret)
512 goto err;
513 ret = regmap_write(dev->regmap, 0x800047, 0x00);
514 if (ret)
515 goto err;
516 ret = regmap_update_bits(dev->regmap, 0x80f999, 0x01, 0x00);
517 if (ret)
518 goto err;
519
520 if (c->frequency <= 230000000)
521 tmp = 0x00; /* VHF */
522 else
523 tmp = 0x01; /* UHF */
524
525 ret = regmap_write(dev->regmap, 0x80004b, tmp);
526 if (ret)
527 goto err;
528 ret = regmap_write(dev->regmap, 0x800000, 0x00);
529 if (ret)
530 goto err;
531
532 return 0;
533
534 err:
535 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
536
537 return ret;
538 }
539
540 static int af9033_get_frontend(struct dvb_frontend *fe,
541 struct dtv_frontend_properties *c)
542 {
543 struct af9033_dev *dev = fe->demodulator_priv;
544 int ret;
545 u8 buf[8];
546
547 dev_dbg(&dev->client->dev, "\n");
548
549 /* read all needed registers */
550 ret = regmap_bulk_read(dev->regmap, 0x80f900, buf, 8);
551 if (ret)
552 goto err;
553
554 switch ((buf[0] >> 0) & 3) {
555 case 0:
556 c->transmission_mode = TRANSMISSION_MODE_2K;
557 break;
558 case 1:
559 c->transmission_mode = TRANSMISSION_MODE_8K;
560 break;
561 }
562
563 switch ((buf[1] >> 0) & 3) {
564 case 0:
565 c->guard_interval = GUARD_INTERVAL_1_32;
566 break;
567 case 1:
568 c->guard_interval = GUARD_INTERVAL_1_16;
569 break;
570 case 2:
571 c->guard_interval = GUARD_INTERVAL_1_8;
572 break;
573 case 3:
574 c->guard_interval = GUARD_INTERVAL_1_4;
575 break;
576 }
577
578 switch ((buf[2] >> 0) & 7) {
579 case 0:
580 c->hierarchy = HIERARCHY_NONE;
581 break;
582 case 1:
583 c->hierarchy = HIERARCHY_1;
584 break;
585 case 2:
586 c->hierarchy = HIERARCHY_2;
587 break;
588 case 3:
589 c->hierarchy = HIERARCHY_4;
590 break;
591 }
592
593 switch ((buf[3] >> 0) & 3) {
594 case 0:
595 c->modulation = QPSK;
596 break;
597 case 1:
598 c->modulation = QAM_16;
599 break;
600 case 2:
601 c->modulation = QAM_64;
602 break;
603 }
604
605 switch ((buf[4] >> 0) & 3) {
606 case 0:
607 c->bandwidth_hz = 6000000;
608 break;
609 case 1:
610 c->bandwidth_hz = 7000000;
611 break;
612 case 2:
613 c->bandwidth_hz = 8000000;
614 break;
615 }
616
617 switch ((buf[6] >> 0) & 7) {
618 case 0:
619 c->code_rate_HP = FEC_1_2;
620 break;
621 case 1:
622 c->code_rate_HP = FEC_2_3;
623 break;
624 case 2:
625 c->code_rate_HP = FEC_3_4;
626 break;
627 case 3:
628 c->code_rate_HP = FEC_5_6;
629 break;
630 case 4:
631 c->code_rate_HP = FEC_7_8;
632 break;
633 case 5:
634 c->code_rate_HP = FEC_NONE;
635 break;
636 }
637
638 switch ((buf[7] >> 0) & 7) {
639 case 0:
640 c->code_rate_LP = FEC_1_2;
641 break;
642 case 1:
643 c->code_rate_LP = FEC_2_3;
644 break;
645 case 2:
646 c->code_rate_LP = FEC_3_4;
647 break;
648 case 3:
649 c->code_rate_LP = FEC_5_6;
650 break;
651 case 4:
652 c->code_rate_LP = FEC_7_8;
653 break;
654 case 5:
655 c->code_rate_LP = FEC_NONE;
656 break;
657 }
658
659 return 0;
660
661 err:
662 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
663
664 return ret;
665 }
666
667 static int af9033_read_status(struct dvb_frontend *fe, enum fe_status *status)
668 {
669 struct af9033_dev *dev = fe->demodulator_priv;
670 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
671 int ret, i, tmp = 0;
672 u8 buf[7];
673 unsigned int utmp;
674
675 dev_dbg(&dev->client->dev, "\n");
676
677 *status = 0;
678
679 /* radio channel status, 0=no result, 1=has signal, 2=no signal */
680 ret = regmap_read(dev->regmap, 0x800047, &utmp);
681 if (ret)
682 goto err;
683
684 /* has signal */
685 if (utmp == 0x01)
686 *status |= FE_HAS_SIGNAL;
687
688 if (utmp != 0x02) {
689 /* TPS lock */
690 ret = regmap_read(dev->regmap, 0x80f5a9, &utmp);
691 if (ret)
692 goto err;
693
694 if ((utmp >> 0) & 0x01)
695 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
696 FE_HAS_VITERBI;
697
698 /* full lock */
699 ret = regmap_read(dev->regmap, 0x80f999, &utmp);
700 if (ret)
701 goto err;
702
703 if ((utmp >> 0) & 0x01)
704 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
705 FE_HAS_VITERBI | FE_HAS_SYNC |
706 FE_HAS_LOCK;
707 }
708
709 dev->fe_status = *status;
710
711 /* signal strength */
712 if (dev->fe_status & FE_HAS_SIGNAL) {
713 if (dev->is_af9035) {
714 ret = regmap_read(dev->regmap, 0x80004a, &utmp);
715 if (ret)
716 goto err;
717 tmp = -utmp * 1000;
718 } else {
719 ret = regmap_read(dev->regmap, 0x8000f7, &utmp);
720 if (ret)
721 goto err;
722 tmp = (utmp - 100) * 1000;
723 }
724
725 c->strength.len = 1;
726 c->strength.stat[0].scale = FE_SCALE_DECIBEL;
727 c->strength.stat[0].svalue = tmp;
728 } else {
729 c->strength.len = 1;
730 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
731 }
732
733 /* CNR */
734 if (dev->fe_status & FE_HAS_VITERBI) {
735 u32 snr_val, snr_lut_size;
736 const struct val_snr *snr_lut = NULL;
737
738 /* read value */
739 ret = regmap_bulk_read(dev->regmap, 0x80002c, buf, 3);
740 if (ret)
741 goto err;
742
743 snr_val = (buf[2] << 16) | (buf[1] << 8) | (buf[0] << 0);
744
745 /* read superframe number */
746 ret = regmap_read(dev->regmap, 0x80f78b, &utmp);
747 if (ret)
748 goto err;
749
750 if (utmp)
751 snr_val /= utmp;
752
753 /* read current transmission mode */
754 ret = regmap_read(dev->regmap, 0x80f900, &utmp);
755 if (ret)
756 goto err;
757
758 switch ((utmp >> 0) & 3) {
759 case 0:
760 snr_val *= 4;
761 break;
762 case 1:
763 snr_val *= 1;
764 break;
765 case 2:
766 snr_val *= 2;
767 break;
768 default:
769 snr_val *= 0;
770 break;
771 }
772
773 /* read current modulation */
774 ret = regmap_read(dev->regmap, 0x80f903, &utmp);
775 if (ret)
776 goto err;
777
778 switch ((utmp >> 0) & 3) {
779 case 0:
780 snr_lut_size = ARRAY_SIZE(qpsk_snr_lut);
781 snr_lut = qpsk_snr_lut;
782 break;
783 case 1:
784 snr_lut_size = ARRAY_SIZE(qam16_snr_lut);
785 snr_lut = qam16_snr_lut;
786 break;
787 case 2:
788 snr_lut_size = ARRAY_SIZE(qam64_snr_lut);
789 snr_lut = qam64_snr_lut;
790 break;
791 default:
792 snr_lut_size = 0;
793 tmp = 0;
794 break;
795 }
796
797 for (i = 0; i < snr_lut_size; i++) {
798 tmp = snr_lut[i].snr * 1000;
799 if (snr_val < snr_lut[i].val)
800 break;
801 }
802
803 c->cnr.len = 1;
804 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
805 c->cnr.stat[0].svalue = tmp;
806 } else {
807 c->cnr.len = 1;
808 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
809 }
810
811 /* UCB/PER/BER */
812 if (dev->fe_status & FE_HAS_LOCK) {
813 /* outer FEC, 204 byte packets */
814 u16 abort_packet_count, rsd_packet_count;
815 /* inner FEC, bits */
816 u32 rsd_bit_err_count;
817
818 /*
819 * Packet count used for measurement is 10000
820 * (rsd_packet_count). Maybe it should be increased?
821 */
822
823 ret = regmap_bulk_read(dev->regmap, 0x800032, buf, 7);
824 if (ret)
825 goto err;
826
827 abort_packet_count = (buf[1] << 8) | (buf[0] << 0);
828 rsd_bit_err_count = (buf[4] << 16) | (buf[3] << 8) | buf[2];
829 rsd_packet_count = (buf[6] << 8) | (buf[5] << 0);
830
831 dev->error_block_count += abort_packet_count;
832 dev->total_block_count += rsd_packet_count;
833 dev->post_bit_error += rsd_bit_err_count;
834 dev->post_bit_count += rsd_packet_count * 204 * 8;
835
836 c->block_count.len = 1;
837 c->block_count.stat[0].scale = FE_SCALE_COUNTER;
838 c->block_count.stat[0].uvalue = dev->total_block_count;
839
840 c->block_error.len = 1;
841 c->block_error.stat[0].scale = FE_SCALE_COUNTER;
842 c->block_error.stat[0].uvalue = dev->error_block_count;
843
844 c->post_bit_count.len = 1;
845 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
846 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
847
848 c->post_bit_error.len = 1;
849 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
850 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
851 }
852
853 return 0;
854
855 err:
856 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
857
858 return ret;
859 }
860
861 static int af9033_read_snr(struct dvb_frontend *fe, u16 *snr)
862 {
863 struct af9033_dev *dev = fe->demodulator_priv;
864 struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
865 int ret;
866 unsigned int utmp;
867
868 /* use DVBv5 CNR */
869 if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL) {
870 /* Return 0.1 dB for AF9030 and 0-0xffff for IT9130. */
871 if (dev->is_af9035) {
872 /* 1000x => 10x (0.1 dB) */
873 *snr = div_s64(c->cnr.stat[0].svalue, 100);
874 } else {
875 /* 1000x => 1x (1 dB) */
876 *snr = div_s64(c->cnr.stat[0].svalue, 1000);
877
878 /* read current modulation */
879 ret = regmap_read(dev->regmap, 0x80f903, &utmp);
880 if (ret)
881 goto err;
882
883 /* scale value to 0x0000-0xffff */
884 switch ((utmp >> 0) & 3) {
885 case 0:
886 *snr = *snr * 0xffff / 23;
887 break;
888 case 1:
889 *snr = *snr * 0xffff / 26;
890 break;
891 case 2:
892 *snr = *snr * 0xffff / 32;
893 break;
894 default:
895 goto err;
896 }
897 }
898 } else {
899 *snr = 0;
900 }
901
902 return 0;
903
904 err:
905 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
906
907 return ret;
908 }
909
910 static int af9033_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
911 {
912 struct af9033_dev *dev = fe->demodulator_priv;
913 struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
914 int ret, tmp, power_real;
915 unsigned int utmp;
916 u8 gain_offset, buf[7];
917
918 if (dev->is_af9035) {
919 /* read signal strength of 0-100 scale */
920 ret = regmap_read(dev->regmap, 0x800048, &utmp);
921 if (ret)
922 goto err;
923
924 /* scale value to 0x0000-0xffff */
925 *strength = utmp * 0xffff / 100;
926 } else {
927 ret = regmap_read(dev->regmap, 0x8000f7, &utmp);
928 if (ret)
929 goto err;
930
931 ret = regmap_bulk_read(dev->regmap, 0x80f900, buf, 7);
932 if (ret)
933 goto err;
934
935 if (c->frequency <= 300000000)
936 gain_offset = 7; /* VHF */
937 else
938 gain_offset = 4; /* UHF */
939
940 power_real = (utmp - 100 - gain_offset) -
941 power_reference[((buf[3] >> 0) & 3)][((buf[6] >> 0) & 7)];
942
943 if (power_real < -15)
944 tmp = 0;
945 else if ((power_real >= -15) && (power_real < 0))
946 tmp = (2 * (power_real + 15)) / 3;
947 else if ((power_real >= 0) && (power_real < 20))
948 tmp = 4 * power_real + 10;
949 else if ((power_real >= 20) && (power_real < 35))
950 tmp = (2 * (power_real - 20)) / 3 + 90;
951 else
952 tmp = 100;
953
954 /* scale value to 0x0000-0xffff */
955 *strength = tmp * 0xffff / 100;
956 }
957
958 return 0;
959
960 err:
961 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
962
963 return ret;
964 }
965
966 static int af9033_read_ber(struct dvb_frontend *fe, u32 *ber)
967 {
968 struct af9033_dev *dev = fe->demodulator_priv;
969
970 *ber = (dev->post_bit_error - dev->post_bit_error_prev);
971 dev->post_bit_error_prev = dev->post_bit_error;
972
973 return 0;
974 }
975
976 static int af9033_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
977 {
978 struct af9033_dev *dev = fe->demodulator_priv;
979
980 *ucblocks = dev->error_block_count;
981 return 0;
982 }
983
984 static int af9033_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
985 {
986 struct af9033_dev *dev = fe->demodulator_priv;
987 int ret;
988
989 dev_dbg(&dev->client->dev, "enable=%d\n", enable);
990
991 ret = regmap_update_bits(dev->regmap, 0x00fa04, 0x01, enable);
992 if (ret)
993 goto err;
994
995 return 0;
996
997 err:
998 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
999
1000 return ret;
1001 }
1002
1003 static int af9033_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
1004 {
1005 struct af9033_dev *dev = fe->demodulator_priv;
1006 int ret;
1007
1008 dev_dbg(&dev->client->dev, "onoff=%d\n", onoff);
1009
1010 ret = regmap_update_bits(dev->regmap, 0x80f993, 0x01, onoff);
1011 if (ret)
1012 goto err;
1013
1014 return 0;
1015
1016 err:
1017 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1018
1019 return ret;
1020 }
1021
1022 static int af9033_pid_filter(struct dvb_frontend *fe, int index, u16 pid,
1023 int onoff)
1024 {
1025 struct af9033_dev *dev = fe->demodulator_priv;
1026 int ret;
1027 u8 wbuf[2] = {(pid >> 0) & 0xff, (pid >> 8) & 0xff};
1028
1029 dev_dbg(&dev->client->dev, "index=%d pid=%04x onoff=%d\n",
1030 index, pid, onoff);
1031
1032 if (pid > 0x1fff)
1033 return 0;
1034
1035 ret = regmap_bulk_write(dev->regmap, 0x80f996, wbuf, 2);
1036 if (ret)
1037 goto err;
1038 ret = regmap_write(dev->regmap, 0x80f994, onoff);
1039 if (ret)
1040 goto err;
1041 ret = regmap_write(dev->regmap, 0x80f995, index);
1042 if (ret)
1043 goto err;
1044
1045 return 0;
1046
1047 err:
1048 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1049
1050 return ret;
1051 }
1052
1053 static const struct dvb_frontend_ops af9033_ops = {
1054 .delsys = { SYS_DVBT },
1055 .info = {
1056 .name = "Afatech AF9033 (DVB-T)",
1057 .frequency_min = 174000000,
1058 .frequency_max = 862000000,
1059 .frequency_stepsize = 250000,
1060 .frequency_tolerance = 0,
1061 .caps = FE_CAN_FEC_1_2 |
1062 FE_CAN_FEC_2_3 |
1063 FE_CAN_FEC_3_4 |
1064 FE_CAN_FEC_5_6 |
1065 FE_CAN_FEC_7_8 |
1066 FE_CAN_FEC_AUTO |
1067 FE_CAN_QPSK |
1068 FE_CAN_QAM_16 |
1069 FE_CAN_QAM_64 |
1070 FE_CAN_QAM_AUTO |
1071 FE_CAN_TRANSMISSION_MODE_AUTO |
1072 FE_CAN_GUARD_INTERVAL_AUTO |
1073 FE_CAN_HIERARCHY_AUTO |
1074 FE_CAN_RECOVER |
1075 FE_CAN_MUTE_TS
1076 },
1077
1078 .init = af9033_init,
1079 .sleep = af9033_sleep,
1080
1081 .get_tune_settings = af9033_get_tune_settings,
1082 .set_frontend = af9033_set_frontend,
1083 .get_frontend = af9033_get_frontend,
1084
1085 .read_status = af9033_read_status,
1086 .read_snr = af9033_read_snr,
1087 .read_signal_strength = af9033_read_signal_strength,
1088 .read_ber = af9033_read_ber,
1089 .read_ucblocks = af9033_read_ucblocks,
1090
1091 .i2c_gate_ctrl = af9033_i2c_gate_ctrl,
1092 };
1093
1094 static int af9033_probe(struct i2c_client *client,
1095 const struct i2c_device_id *id)
1096 {
1097 struct af9033_config *cfg = client->dev.platform_data;
1098 struct af9033_dev *dev;
1099 int ret;
1100 u8 buf[8];
1101 u32 reg;
1102 static const struct regmap_config regmap_config = {
1103 .reg_bits = 24,
1104 .val_bits = 8,
1105 };
1106
1107
1108 /* allocate memory for the internal state */
1109 dev = kzalloc(sizeof(struct af9033_dev), GFP_KERNEL);
1110 if (dev == NULL) {
1111 ret = -ENOMEM;
1112 dev_err(&client->dev, "Could not allocate memory for state\n");
1113 goto err;
1114 }
1115
1116 /* setup the state */
1117 dev->client = client;
1118 memcpy(&dev->cfg, cfg, sizeof(struct af9033_config));
1119
1120 if (dev->cfg.clock != 12000000) {
1121 ret = -ENODEV;
1122 dev_err(&dev->client->dev,
1123 "unsupported clock %d Hz, only 12000000 Hz is supported currently\n",
1124 dev->cfg.clock);
1125 goto err_kfree;
1126 }
1127
1128 /* Create regmap */
1129 dev->regmap = regmap_init_i2c(client, &regmap_config);
1130 if (IS_ERR(dev->regmap)) {
1131 ret = PTR_ERR(dev->regmap);
1132 goto err_kfree;
1133 }
1134
1135 /* firmware version */
1136 switch (dev->cfg.tuner) {
1137 case AF9033_TUNER_IT9135_38:
1138 case AF9033_TUNER_IT9135_51:
1139 case AF9033_TUNER_IT9135_52:
1140 case AF9033_TUNER_IT9135_60:
1141 case AF9033_TUNER_IT9135_61:
1142 case AF9033_TUNER_IT9135_62:
1143 dev->is_it9135 = true;
1144 reg = 0x004bfc;
1145 break;
1146 default:
1147 dev->is_af9035 = true;
1148 reg = 0x0083e9;
1149 break;
1150 }
1151
1152 ret = regmap_bulk_read(dev->regmap, reg, &buf[0], 4);
1153 if (ret)
1154 goto err_regmap_exit;
1155 ret = regmap_bulk_read(dev->regmap, 0x804191, &buf[4], 4);
1156 if (ret)
1157 goto err_regmap_exit;
1158
1159 dev_info(&dev->client->dev,
1160 "firmware version: LINK %d.%d.%d.%d - OFDM %d.%d.%d.%d\n",
1161 buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6],
1162 buf[7]);
1163
1164 /* sleep */
1165 switch (dev->cfg.tuner) {
1166 case AF9033_TUNER_IT9135_38:
1167 case AF9033_TUNER_IT9135_51:
1168 case AF9033_TUNER_IT9135_52:
1169 case AF9033_TUNER_IT9135_60:
1170 case AF9033_TUNER_IT9135_61:
1171 case AF9033_TUNER_IT9135_62:
1172 /* IT9135 did not like to sleep at that early */
1173 break;
1174 default:
1175 ret = regmap_write(dev->regmap, 0x80004c, 0x01);
1176 if (ret)
1177 goto err_regmap_exit;
1178 ret = regmap_write(dev->regmap, 0x800000, 0x00);
1179 if (ret)
1180 goto err_regmap_exit;
1181 }
1182
1183 /* configure internal TS mode */
1184 switch (dev->cfg.ts_mode) {
1185 case AF9033_TS_MODE_PARALLEL:
1186 dev->ts_mode_parallel = true;
1187 break;
1188 case AF9033_TS_MODE_SERIAL:
1189 dev->ts_mode_serial = true;
1190 break;
1191 case AF9033_TS_MODE_USB:
1192 /* usb mode for AF9035 */
1193 default:
1194 break;
1195 }
1196
1197 /* create dvb_frontend */
1198 memcpy(&dev->fe.ops, &af9033_ops, sizeof(struct dvb_frontend_ops));
1199 dev->fe.demodulator_priv = dev;
1200 *cfg->fe = &dev->fe;
1201 if (cfg->ops) {
1202 cfg->ops->pid_filter = af9033_pid_filter;
1203 cfg->ops->pid_filter_ctrl = af9033_pid_filter_ctrl;
1204 }
1205 i2c_set_clientdata(client, dev);
1206
1207 dev_info(&dev->client->dev, "Afatech AF9033 successfully attached\n");
1208 return 0;
1209 err_regmap_exit:
1210 regmap_exit(dev->regmap);
1211 err_kfree:
1212 kfree(dev);
1213 err:
1214 dev_dbg(&client->dev, "failed=%d\n", ret);
1215 return ret;
1216 }
1217
1218 static int af9033_remove(struct i2c_client *client)
1219 {
1220 struct af9033_dev *dev = i2c_get_clientdata(client);
1221
1222 dev_dbg(&dev->client->dev, "\n");
1223
1224 regmap_exit(dev->regmap);
1225
1226 dev->fe.ops.release = NULL;
1227 dev->fe.demodulator_priv = NULL;
1228 kfree(dev);
1229
1230 return 0;
1231 }
1232
1233 static const struct i2c_device_id af9033_id_table[] = {
1234 {"af9033", 0},
1235 {}
1236 };
1237 MODULE_DEVICE_TABLE(i2c, af9033_id_table);
1238
1239 static struct i2c_driver af9033_driver = {
1240 .driver = {
1241 .name = "af9033",
1242 .suppress_bind_attrs = true,
1243 },
1244 .probe = af9033_probe,
1245 .remove = af9033_remove,
1246 .id_table = af9033_id_table,
1247 };
1248
1249 module_i2c_driver(af9033_driver);
1250
1251 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1252 MODULE_DESCRIPTION("Afatech AF9033 DVB-T demodulator driver");
1253 MODULE_LICENSE("GPL");
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