2 * Fujitu mb86a20s ISDB-T/ISDB-Tsb Module driver
4 * Copyright (C) 2010-2013 Mauro Carvalho Chehab <mchehab@redhat.com>
5 * Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation version 2.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
17 #include <linux/kernel.h>
18 #include <asm/div64.h>
20 #include "dvb_frontend.h"
24 module_param(debug
, int, 0644);
25 MODULE_PARM_DESC(debug
, "Activates frontend debugging (default:0)");
27 struct mb86a20s_state
{
28 struct i2c_adapter
*i2c
;
29 const struct mb86a20s_config
*config
;
31 struct dvb_frontend frontend
;
42 * Initialization sequence: Use whatevere default values that PV SBTVD
43 * does on its initialisation, obtained via USB snoop
45 static struct regdata mb86a20s_init
[] = {
50 { 0x50, 0xd1 }, { 0x51, 0x22 },
53 { 0x28, 0x2a }, { 0x29, 0x00 }, { 0x2a, 0xff }, { 0x2b, 0x80 },
54 { 0x28, 0x20 }, { 0x29, 0x33 }, { 0x2a, 0xdf }, { 0x2b, 0xa9 },
55 { 0x28, 0x22 }, { 0x29, 0x00 }, { 0x2a, 0x1f }, { 0x2b, 0xf0 },
59 { 0x04, 0x08 }, { 0x05, 0x05 },
60 { 0x04, 0x0e }, { 0x05, 0x00 },
61 { 0x04, 0x0f }, { 0x05, 0x14 },
62 { 0x04, 0x0b }, { 0x05, 0x8c },
63 { 0x04, 0x00 }, { 0x05, 0x00 },
64 { 0x04, 0x01 }, { 0x05, 0x07 },
65 { 0x04, 0x02 }, { 0x05, 0x0f },
66 { 0x04, 0x03 }, { 0x05, 0xa0 },
67 { 0x04, 0x09 }, { 0x05, 0x00 },
68 { 0x04, 0x0a }, { 0x05, 0xff },
69 { 0x04, 0x27 }, { 0x05, 0x64 },
70 { 0x04, 0x28 }, { 0x05, 0x00 },
71 { 0x04, 0x1e }, { 0x05, 0xff },
72 { 0x04, 0x29 }, { 0x05, 0x0a },
73 { 0x04, 0x32 }, { 0x05, 0x0a },
74 { 0x04, 0x14 }, { 0x05, 0x02 },
75 { 0x04, 0x04 }, { 0x05, 0x00 },
76 { 0x04, 0x05 }, { 0x05, 0x22 },
77 { 0x04, 0x06 }, { 0x05, 0x0e },
78 { 0x04, 0x07 }, { 0x05, 0xd8 },
79 { 0x04, 0x12 }, { 0x05, 0x00 },
80 { 0x04, 0x13 }, { 0x05, 0xff },
81 { 0x04, 0x15 }, { 0x05, 0x4e },
82 { 0x04, 0x16 }, { 0x05, 0x20 },
84 { 0x50, 0xa7 }, { 0x51, 0xff },
85 { 0x50, 0xa8 }, { 0x51, 0xff },
86 { 0x50, 0xa9 }, { 0x51, 0xff },
87 { 0x50, 0xaa }, { 0x51, 0xff },
88 { 0x50, 0xab }, { 0x51, 0xff },
89 { 0x50, 0xac }, { 0x51, 0xff },
90 { 0x50, 0xad }, { 0x51, 0xff },
91 { 0x50, 0xae }, { 0x51, 0xff },
92 { 0x50, 0xaf }, { 0x51, 0xff },
94 { 0x50, 0xdc }, { 0x51, 0x01 },
95 { 0x50, 0xdd }, { 0x51, 0xf4 },
96 { 0x50, 0xde }, { 0x51, 0x01 },
97 { 0x50, 0xdf }, { 0x51, 0xf4 },
98 { 0x50, 0xe0 }, { 0x51, 0x01 },
99 { 0x50, 0xe1 }, { 0x51, 0xf4 },
100 { 0x50, 0xb0 }, { 0x51, 0x07 },
101 { 0x50, 0xb2 }, { 0x51, 0xff },
102 { 0x50, 0xb3 }, { 0x51, 0xff },
103 { 0x50, 0xb4 }, { 0x51, 0xff },
104 { 0x50, 0xb5 }, { 0x51, 0xff },
105 { 0x50, 0xb6 }, { 0x51, 0xff },
106 { 0x50, 0xb7 }, { 0x51, 0xff },
107 { 0x50, 0x50 }, { 0x51, 0x02 },
108 { 0x50, 0x51 }, { 0x51, 0x04 },
111 { 0x50, 0xd5 }, { 0x51, 0x01 }, /* Serial */
112 { 0x50, 0xd6 }, { 0x51, 0x1f },
113 { 0x50, 0xd2 }, { 0x51, 0x03 },
114 { 0x50, 0xd7 }, { 0x51, 0x3f },
115 { 0x28, 0x74 }, { 0x29, 0x00 }, { 0x28, 0x74 }, { 0x29, 0x40 },
116 { 0x28, 0x46 }, { 0x29, 0x2c }, { 0x28, 0x46 }, { 0x29, 0x0c },
118 { 0x04, 0x40 }, { 0x05, 0x00 },
119 { 0x28, 0x00 }, { 0x29, 0x10 },
120 { 0x28, 0x05 }, { 0x29, 0x02 },
122 { 0x28, 0x06 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x03 },
123 { 0x28, 0x07 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0d },
124 { 0x28, 0x08 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x02 },
125 { 0x28, 0x09 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x01 },
126 { 0x28, 0x0a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x21 },
127 { 0x28, 0x0b }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x29 },
128 { 0x28, 0x0c }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x16 },
129 { 0x28, 0x0d }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x31 },
130 { 0x28, 0x0e }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0e },
131 { 0x28, 0x0f }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x4e },
132 { 0x28, 0x10 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x46 },
133 { 0x28, 0x11 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0f },
134 { 0x28, 0x12 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x56 },
135 { 0x28, 0x13 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x35 },
136 { 0x28, 0x14 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbe },
137 { 0x28, 0x15 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0x84 },
138 { 0x28, 0x16 }, { 0x29, 0x00 }, { 0x2a, 0x03 }, { 0x2b, 0xee },
139 { 0x28, 0x17 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x98 },
140 { 0x28, 0x18 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x9f },
141 { 0x28, 0x19 }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0xb2 },
142 { 0x28, 0x1a }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0xc2 },
143 { 0x28, 0x1b }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0x4a },
144 { 0x28, 0x1c }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbc },
145 { 0x28, 0x1d }, { 0x29, 0x00 }, { 0x2a, 0x04 }, { 0x2b, 0xba },
146 { 0x28, 0x1e }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0x14 },
147 { 0x50, 0x1e }, { 0x51, 0x5d },
148 { 0x50, 0x22 }, { 0x51, 0x00 },
149 { 0x50, 0x23 }, { 0x51, 0xc8 },
150 { 0x50, 0x24 }, { 0x51, 0x00 },
151 { 0x50, 0x25 }, { 0x51, 0xf0 },
152 { 0x50, 0x26 }, { 0x51, 0x00 },
153 { 0x50, 0x27 }, { 0x51, 0xc3 },
154 { 0x50, 0x39 }, { 0x51, 0x02 },
155 { 0x28, 0x6a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x00 },
159 static struct regdata mb86a20s_reset_reception
[] = {
167 * I2C read/write functions and macros
170 static int mb86a20s_i2c_writereg(struct mb86a20s_state
*state
,
171 u8 i2c_addr
, int reg
, int data
)
173 u8 buf
[] = { reg
, data
};
174 struct i2c_msg msg
= {
175 .addr
= i2c_addr
, .flags
= 0, .buf
= buf
, .len
= 2
179 rc
= i2c_transfer(state
->i2c
, &msg
, 1);
181 dev_err(&state
->i2c
->dev
,
182 "%s: writereg error (rc == %i, reg == 0x%02x, data == 0x%02x)\n",
183 __func__
, rc
, reg
, data
);
190 static int mb86a20s_i2c_writeregdata(struct mb86a20s_state
*state
,
191 u8 i2c_addr
, struct regdata
*rd
, int size
)
195 for (i
= 0; i
< size
; i
++) {
196 rc
= mb86a20s_i2c_writereg(state
, i2c_addr
, rd
[i
].reg
,
204 static int mb86a20s_i2c_readreg(struct mb86a20s_state
*state
,
209 struct i2c_msg msg
[] = {
210 { .addr
= i2c_addr
, .flags
= 0, .buf
= ®
, .len
= 1 },
211 { .addr
= i2c_addr
, .flags
= I2C_M_RD
, .buf
= &val
, .len
= 1 }
214 rc
= i2c_transfer(state
->i2c
, msg
, 2);
217 dev_err(&state
->i2c
->dev
, "%s: reg=0x%x (error=%d)\n",
219 return (rc
< 0) ? rc
: -EIO
;
225 #define mb86a20s_readreg(state, reg) \
226 mb86a20s_i2c_readreg(state, state->config->demod_address, reg)
227 #define mb86a20s_writereg(state, reg, val) \
228 mb86a20s_i2c_writereg(state, state->config->demod_address, reg, val)
229 #define mb86a20s_writeregdata(state, regdata) \
230 mb86a20s_i2c_writeregdata(state, state->config->demod_address, \
231 regdata, ARRAY_SIZE(regdata))
233 static int mb86a20s_read_status(struct dvb_frontend
*fe
, fe_status_t
*status
)
235 struct mb86a20s_state
*state
= fe
->demodulator_priv
;
240 val
= mb86a20s_readreg(state
, 0x0a) & 0xf;
245 *status
|= FE_HAS_SIGNAL
;
248 *status
|= FE_HAS_CARRIER
;
251 *status
|= FE_HAS_VITERBI
;
254 *status
|= FE_HAS_SYNC
;
256 if (val
>= 8) /* Maybe 9? */
257 *status
|= FE_HAS_LOCK
;
259 dev_dbg(&state
->i2c
->dev
, "%s: Status = 0x%02x (state = %d)\n",
260 __func__
, *status
, val
);
265 static int mb86a20s_read_signal_strength(struct dvb_frontend
*fe
, u16
*strength
)
267 struct mb86a20s_state
*state
= fe
->demodulator_priv
;
268 unsigned rf_max
, rf_min
, rf
;
271 if (fe
->ops
.i2c_gate_ctrl
)
272 fe
->ops
.i2c_gate_ctrl(fe
, 0);
274 /* Does a binary search to get RF strength */
278 rf
= (rf_max
+ rf_min
) / 2;
279 mb86a20s_writereg(state
, 0x04, 0x1f);
280 mb86a20s_writereg(state
, 0x05, rf
>> 8);
281 mb86a20s_writereg(state
, 0x04, 0x20);
282 mb86a20s_writereg(state
, 0x04, rf
);
284 val
= mb86a20s_readreg(state
, 0x02);
286 rf_min
= (rf_max
+ rf_min
) / 2;
288 rf_max
= (rf_max
+ rf_min
) / 2;
289 if (rf_max
- rf_min
< 4) {
290 *strength
= (((rf_max
+ rf_min
) / 2) * 65535) / 4095;
291 dev_dbg(&state
->i2c
->dev
,
292 "%s: signal strength = %d (%d < RF=%d < %d)\n",
293 __func__
, rf
, rf_min
, rf
>> 4, rf_max
);
298 if (fe
->ops
.i2c_gate_ctrl
)
299 fe
->ops
.i2c_gate_ctrl(fe
, 1);
304 static int mb86a20s_get_modulation(struct mb86a20s_state
*state
,
308 static unsigned char reg
[] = {
309 [0] = 0x86, /* Layer A */
310 [1] = 0x8a, /* Layer B */
311 [2] = 0x8e, /* Layer C */
314 if (layer
>= ARRAY_SIZE(reg
))
316 rc
= mb86a20s_writereg(state
, 0x6d, reg
[layer
]);
319 rc
= mb86a20s_readreg(state
, 0x6e);
322 switch ((rc
>> 4) & 0x07) {
336 static int mb86a20s_get_fec(struct mb86a20s_state
*state
,
341 static unsigned char reg
[] = {
342 [0] = 0x87, /* Layer A */
343 [1] = 0x8b, /* Layer B */
344 [2] = 0x8f, /* Layer C */
347 if (layer
>= ARRAY_SIZE(reg
))
349 rc
= mb86a20s_writereg(state
, 0x6d, reg
[layer
]);
352 rc
= mb86a20s_readreg(state
, 0x6e);
355 switch ((rc
>> 4) & 0x07) {
371 static int mb86a20s_get_interleaving(struct mb86a20s_state
*state
,
376 static unsigned char reg
[] = {
377 [0] = 0x88, /* Layer A */
378 [1] = 0x8c, /* Layer B */
379 [2] = 0x90, /* Layer C */
382 if (layer
>= ARRAY_SIZE(reg
))
384 rc
= mb86a20s_writereg(state
, 0x6d, reg
[layer
]);
387 rc
= mb86a20s_readreg(state
, 0x6e);
391 switch ((rc
>> 4) & 0x07) {
393 return GUARD_INTERVAL_1_4
;
395 return GUARD_INTERVAL_1_8
;
397 return GUARD_INTERVAL_1_16
;
399 return GUARD_INTERVAL_1_32
;
403 return GUARD_INTERVAL_AUTO
;
407 static int mb86a20s_get_segment_count(struct mb86a20s_state
*state
,
411 static unsigned char reg
[] = {
412 [0] = 0x89, /* Layer A */
413 [1] = 0x8d, /* Layer B */
414 [2] = 0x91, /* Layer C */
417 dev_dbg(&state
->i2c
->dev
, "%s called.\n", __func__
);
419 if (layer
>= ARRAY_SIZE(reg
))
422 rc
= mb86a20s_writereg(state
, 0x6d, reg
[layer
]);
425 rc
= mb86a20s_readreg(state
, 0x6e);
428 count
= (rc
>> 4) & 0x0f;
430 dev_dbg(&state
->i2c
->dev
, "%s: segments: %d.\n", __func__
, count
);
435 static void mb86a20s_reset_frontend_cache(struct dvb_frontend
*fe
)
437 struct mb86a20s_state
*state
= fe
->demodulator_priv
;
438 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
440 dev_dbg(&state
->i2c
->dev
, "%s called.\n", __func__
);
442 /* Fixed parameters */
443 c
->delivery_system
= SYS_ISDBT
;
444 c
->bandwidth_hz
= 6000000;
446 /* Initialize values that will be later autodetected */
447 c
->isdbt_layer_enabled
= 0;
448 c
->transmission_mode
= TRANSMISSION_MODE_AUTO
;
449 c
->guard_interval
= GUARD_INTERVAL_AUTO
;
450 c
->isdbt_sb_mode
= 0;
451 c
->isdbt_sb_segment_count
= 0;
454 static int mb86a20s_get_frontend(struct dvb_frontend
*fe
)
456 struct mb86a20s_state
*state
= fe
->demodulator_priv
;
457 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
460 dev_dbg(&state
->i2c
->dev
, "%s called.\n", __func__
);
462 /* Reset frontend cache to default values */
463 mb86a20s_reset_frontend_cache(fe
);
465 if (fe
->ops
.i2c_gate_ctrl
)
466 fe
->ops
.i2c_gate_ctrl(fe
, 0);
468 /* Check for partial reception */
469 rc
= mb86a20s_writereg(state
, 0x6d, 0x85);
472 rc
= mb86a20s_readreg(state
, 0x6e);
475 c
->isdbt_partial_reception
= (rc
& 0x10) ? 1 : 0;
477 /* Get per-layer data */
479 for (i
= 0; i
< 3; i
++) {
480 dev_dbg(&state
->i2c
->dev
, "%s: getting data for layer %c.\n",
483 rc
= mb86a20s_get_segment_count(state
, i
);
485 goto noperlayer_error
;
486 if (rc
>= 0 && rc
< 14)
487 c
->layer
[i
].segment_count
= rc
;
489 c
->layer
[i
].segment_count
= 0;
492 c
->isdbt_layer_enabled
|= 1 << i
;
493 rc
= mb86a20s_get_modulation(state
, i
);
495 goto noperlayer_error
;
496 dev_dbg(&state
->i2c
->dev
, "%s: modulation %d.\n",
498 c
->layer
[i
].modulation
= rc
;
499 rc
= mb86a20s_get_fec(state
, i
);
501 goto noperlayer_error
;
502 dev_dbg(&state
->i2c
->dev
, "%s: FEC %d.\n",
504 c
->layer
[i
].fec
= rc
;
505 rc
= mb86a20s_get_interleaving(state
, i
);
507 goto noperlayer_error
;
508 dev_dbg(&state
->i2c
->dev
, "%s: interleaving %d.\n",
510 c
->layer
[i
].interleaving
= rc
;
513 rc
= mb86a20s_writereg(state
, 0x6d, 0x84);
516 if ((rc
& 0x60) == 0x20) {
517 c
->isdbt_sb_mode
= 1;
518 /* At least, one segment should exist */
519 if (!c
->isdbt_sb_segment_count
)
520 c
->isdbt_sb_segment_count
= 1;
523 /* Get transmission mode and guard interval */
524 rc
= mb86a20s_readreg(state
, 0x07);
527 if ((rc
& 0x60) == 0x20) {
528 switch (rc
& 0x0c >> 2) {
530 c
->transmission_mode
= TRANSMISSION_MODE_2K
;
533 c
->transmission_mode
= TRANSMISSION_MODE_4K
;
536 c
->transmission_mode
= TRANSMISSION_MODE_8K
;
543 c
->guard_interval
= GUARD_INTERVAL_1_4
;
546 c
->guard_interval
= GUARD_INTERVAL_1_8
;
549 c
->guard_interval
= GUARD_INTERVAL_1_16
;
555 if (fe
->ops
.i2c_gate_ctrl
)
556 fe
->ops
.i2c_gate_ctrl(fe
, 1);
562 static int mb86a20s_initfe(struct dvb_frontend
*fe
)
564 struct mb86a20s_state
*state
= fe
->demodulator_priv
;
568 dev_dbg(&state
->i2c
->dev
, "%s called.\n", __func__
);
570 if (fe
->ops
.i2c_gate_ctrl
)
571 fe
->ops
.i2c_gate_ctrl(fe
, 0);
573 /* Initialize the frontend */
574 rc
= mb86a20s_writeregdata(state
, mb86a20s_init
);
578 if (!state
->config
->is_serial
) {
581 rc
= mb86a20s_writereg(state
, 0x50, 0xd5);
584 rc
= mb86a20s_writereg(state
, 0x51, regD5
);
590 if (fe
->ops
.i2c_gate_ctrl
)
591 fe
->ops
.i2c_gate_ctrl(fe
, 1);
594 state
->need_init
= true;
595 dev_info(&state
->i2c
->dev
,
596 "mb86a20s: Init failed. Will try again later\n");
598 state
->need_init
= false;
599 dev_dbg(&state
->i2c
->dev
, "Initialization succeeded.\n");
604 static int mb86a20s_set_frontend(struct dvb_frontend
*fe
)
606 struct mb86a20s_state
*state
= fe
->demodulator_priv
;
610 * FIXME: Properly implement the set frontend properties
612 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
614 dev_dbg(&state
->i2c
->dev
, "%s called.\n", __func__
);
617 * Gate should already be opened, but it doesn't hurt to
620 if (fe
->ops
.i2c_gate_ctrl
)
621 fe
->ops
.i2c_gate_ctrl(fe
, 1);
622 fe
->ops
.tuner_ops
.set_params(fe
);
625 * Make it more reliable: if, for some reason, the initial
626 * device initialization doesn't happen, initialize it when
627 * a SBTVD parameters are adjusted.
629 * Unfortunately, due to a hard to track bug at tda829x/tda18271,
630 * the agc callback logic is not called during DVB attach time,
631 * causing mb86a20s to not be initialized with Kworld SBTVD.
632 * So, this hack is needed, in order to make Kworld SBTVD to work.
634 if (state
->need_init
)
637 if (fe
->ops
.i2c_gate_ctrl
)
638 fe
->ops
.i2c_gate_ctrl(fe
, 0);
639 rc
= mb86a20s_writeregdata(state
, mb86a20s_reset_reception
);
640 if (fe
->ops
.i2c_gate_ctrl
)
641 fe
->ops
.i2c_gate_ctrl(fe
, 1);
646 static int mb86a20s_read_status_gate(struct dvb_frontend
*fe
,
653 if (fe
->ops
.i2c_gate_ctrl
)
654 fe
->ops
.i2c_gate_ctrl(fe
, 0);
656 ret
= mb86a20s_read_status(fe
, status
);
658 if (fe
->ops
.i2c_gate_ctrl
)
659 fe
->ops
.i2c_gate_ctrl(fe
, 1);
664 static int mb86a20s_tune(struct dvb_frontend
*fe
,
666 unsigned int mode_flags
,
670 struct mb86a20s_state
*state
= fe
->demodulator_priv
;
673 dev_dbg(&state
->i2c
->dev
, "%s called.\n", __func__
);
676 rc
= mb86a20s_set_frontend(fe
);
678 if (!(mode_flags
& FE_TUNE_MODE_ONESHOT
))
679 mb86a20s_read_status_gate(fe
, status
);
684 static void mb86a20s_release(struct dvb_frontend
*fe
)
686 struct mb86a20s_state
*state
= fe
->demodulator_priv
;
688 dev_dbg(&state
->i2c
->dev
, "%s called.\n", __func__
);
693 static struct dvb_frontend_ops mb86a20s_ops
;
695 struct dvb_frontend
*mb86a20s_attach(const struct mb86a20s_config
*config
,
696 struct i2c_adapter
*i2c
)
698 struct mb86a20s_state
*state
;
701 dev_dbg(&i2c
->dev
, "%s called.\n", __func__
);
703 /* allocate memory for the internal state */
704 state
= kzalloc(sizeof(struct mb86a20s_state
), GFP_KERNEL
);
707 "%s: unable to allocate memory for state\n", __func__
);
711 /* setup the state */
712 state
->config
= config
;
715 /* create dvb_frontend */
716 memcpy(&state
->frontend
.ops
, &mb86a20s_ops
,
717 sizeof(struct dvb_frontend_ops
));
718 state
->frontend
.demodulator_priv
= state
;
720 /* Check if it is a mb86a20s frontend */
721 rev
= mb86a20s_readreg(state
, 0);
725 "Detected a Fujitsu mb86a20s frontend\n");
728 "Frontend revision %d is unknown - aborting.\n",
733 return &state
->frontend
;
739 EXPORT_SYMBOL(mb86a20s_attach
);
741 static struct dvb_frontend_ops mb86a20s_ops
= {
742 .delsys
= { SYS_ISDBT
},
743 /* Use dib8000 values per default */
745 .name
= "Fujitsu mb86A20s",
746 .caps
= FE_CAN_INVERSION_AUTO
| FE_CAN_RECOVER
|
747 FE_CAN_FEC_1_2
| FE_CAN_FEC_2_3
| FE_CAN_FEC_3_4
|
748 FE_CAN_FEC_5_6
| FE_CAN_FEC_7_8
| FE_CAN_FEC_AUTO
|
749 FE_CAN_QPSK
| FE_CAN_QAM_16
| FE_CAN_QAM_64
|
750 FE_CAN_TRANSMISSION_MODE_AUTO
| FE_CAN_QAM_AUTO
|
751 FE_CAN_GUARD_INTERVAL_AUTO
| FE_CAN_HIERARCHY_AUTO
,
752 /* Actually, those values depend on the used tuner */
753 .frequency_min
= 45000000,
754 .frequency_max
= 864000000,
755 .frequency_stepsize
= 62500,
758 .release
= mb86a20s_release
,
760 .init
= mb86a20s_initfe
,
761 .set_frontend
= mb86a20s_set_frontend
,
762 .get_frontend
= mb86a20s_get_frontend
,
763 .read_status
= mb86a20s_read_status_gate
,
764 .read_signal_strength
= mb86a20s_read_signal_strength
,
765 .tune
= mb86a20s_tune
,
768 MODULE_DESCRIPTION("DVB Frontend module for Fujitsu mb86A20s hardware");
769 MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
770 MODULE_LICENSE("GPL");