drivers/media/dvb-frontends/mb86a20s.c

   1 /*
   2  *   Fujitu mb86a20s ISDB-T/ISDB-Tsb Module driver
   3  *
   4  *   Copyright (C) 2010-2013 Mauro Carvalho Chehab <mchehab@redhat.com>
   5  *   Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
   6  *
   7  *   This program is free software; you can redistribute it and/or
   8  *   modify it under the terms of the GNU General Public License as
   9  *   published by the Free Software Foundation version 2.
  10  *
  11  *   This program is distributed in the hope that it will be useful,
  12  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  *   General Public License for more details.
  15  */
  16
  17 #include <linux/kernel.h>
  18 #include <asm/div64.h>
  19
  20 #include "dvb_frontend.h"
  21 #include "mb86a20s.h"
  22
  23 static int debug = 1;
  24 module_param(debug, int, 0644);
  25 MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
  26
  27 #define rc(args...)  do {                                               \
  28         printk(KERN_ERR  "mb86a20s: " args);                            \
  29 } while (0)
  30
  31 #define dprintk(args...)                                                \
  32         do {                                                            \
  33                 if (debug) {                                            \
  34                         printk(KERN_DEBUG "mb86a20s: %s: ", __func__);  \
  35                         printk(args);                                   \
  36                 }                                                       \
  37         } while (0)
  38
  39 struct mb86a20s_state {
  40         struct i2c_adapter *i2c;
  41         const struct mb86a20s_config *config;
  42
  43         struct dvb_frontend frontend;
  44
  45         bool need_init;
  46 };
  47
  48 struct regdata {
  49         u8 reg;
  50         u8 data;
  51 };
  52
  53 /*
  54  * Initialization sequence: Use whatevere default values that PV SBTVD
  55  * does on its initialisation, obtained via USB snoop
  56  */
  57 static struct regdata mb86a20s_init[] = {
  58         { 0x70, 0x0f },
  59         { 0x70, 0xff },
  60         { 0x08, 0x01 },
  61         { 0x09, 0x3e },
  62         { 0x50, 0xd1 }, { 0x51, 0x22 },
  63         { 0x39, 0x01 },
  64         { 0x71, 0x00 },
  65         { 0x28, 0x2a }, { 0x29, 0x00 }, { 0x2a, 0xff }, { 0x2b, 0x80 },
  66         { 0x28, 0x20 }, { 0x29, 0x33 }, { 0x2a, 0xdf }, { 0x2b, 0xa9 },
  67         { 0x28, 0x22 }, { 0x29, 0x00 }, { 0x2a, 0x1f }, { 0x2b, 0xf0 },
  68         { 0x3b, 0x21 },
  69         { 0x3c, 0x3a },
  70         { 0x01, 0x0d },
  71         { 0x04, 0x08 }, { 0x05, 0x05 },
  72         { 0x04, 0x0e }, { 0x05, 0x00 },
  73         { 0x04, 0x0f }, { 0x05, 0x14 },
  74         { 0x04, 0x0b }, { 0x05, 0x8c },
  75         { 0x04, 0x00 }, { 0x05, 0x00 },
  76         { 0x04, 0x01 }, { 0x05, 0x07 },
  77         { 0x04, 0x02 }, { 0x05, 0x0f },
  78         { 0x04, 0x03 }, { 0x05, 0xa0 },
  79         { 0x04, 0x09 }, { 0x05, 0x00 },
  80         { 0x04, 0x0a }, { 0x05, 0xff },
  81         { 0x04, 0x27 }, { 0x05, 0x64 },
  82         { 0x04, 0x28 }, { 0x05, 0x00 },
  83         { 0x04, 0x1e }, { 0x05, 0xff },
  84         { 0x04, 0x29 }, { 0x05, 0x0a },
  85         { 0x04, 0x32 }, { 0x05, 0x0a },
  86         { 0x04, 0x14 }, { 0x05, 0x02 },
  87         { 0x04, 0x04 }, { 0x05, 0x00 },
  88         { 0x04, 0x05 }, { 0x05, 0x22 },
  89         { 0x04, 0x06 }, { 0x05, 0x0e },
  90         { 0x04, 0x07 }, { 0x05, 0xd8 },
  91         { 0x04, 0x12 }, { 0x05, 0x00 },
  92         { 0x04, 0x13 }, { 0x05, 0xff },
  93         { 0x04, 0x15 }, { 0x05, 0x4e },
  94         { 0x04, 0x16 }, { 0x05, 0x20 },
  95         { 0x52, 0x01 },
  96         { 0x50, 0xa7 }, { 0x51, 0xff },
  97         { 0x50, 0xa8 }, { 0x51, 0xff },
  98         { 0x50, 0xa9 }, { 0x51, 0xff },
  99         { 0x50, 0xaa }, { 0x51, 0xff },
 100         { 0x50, 0xab }, { 0x51, 0xff },
 101         { 0x50, 0xac }, { 0x51, 0xff },
 102         { 0x50, 0xad }, { 0x51, 0xff },
 103         { 0x50, 0xae }, { 0x51, 0xff },
 104         { 0x50, 0xaf }, { 0x51, 0xff },
 105         { 0x5e, 0x07 },
 106         { 0x50, 0xdc }, { 0x51, 0x01 },
 107         { 0x50, 0xdd }, { 0x51, 0xf4 },
 108         { 0x50, 0xde }, { 0x51, 0x01 },
 109         { 0x50, 0xdf }, { 0x51, 0xf4 },
 110         { 0x50, 0xe0 }, { 0x51, 0x01 },
 111         { 0x50, 0xe1 }, { 0x51, 0xf4 },
 112         { 0x50, 0xb0 }, { 0x51, 0x07 },
 113         { 0x50, 0xb2 }, { 0x51, 0xff },
 114         { 0x50, 0xb3 }, { 0x51, 0xff },
 115         { 0x50, 0xb4 }, { 0x51, 0xff },
 116         { 0x50, 0xb5 }, { 0x51, 0xff },
 117         { 0x50, 0xb6 }, { 0x51, 0xff },
 118         { 0x50, 0xb7 }, { 0x51, 0xff },
 119         { 0x50, 0x50 }, { 0x51, 0x02 },
 120         { 0x50, 0x51 }, { 0x51, 0x04 },
 121         { 0x45, 0x04 },
 122         { 0x48, 0x04 },
 123         { 0x50, 0xd5 }, { 0x51, 0x01 },         /* Serial */
 124         { 0x50, 0xd6 }, { 0x51, 0x1f },
 125         { 0x50, 0xd2 }, { 0x51, 0x03 },
 126         { 0x50, 0xd7 }, { 0x51, 0x3f },
 127         { 0x28, 0x74 }, { 0x29, 0x00 }, { 0x28, 0x74 }, { 0x29, 0x40 },
 128         { 0x28, 0x46 }, { 0x29, 0x2c }, { 0x28, 0x46 }, { 0x29, 0x0c },
 129
 130         { 0x04, 0x40 }, { 0x05, 0x00 },
 131         { 0x28, 0x00 }, { 0x29, 0x10 },
 132         { 0x28, 0x05 }, { 0x29, 0x02 },
 133         { 0x1c, 0x01 },
 134         { 0x28, 0x06 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x03 },
 135         { 0x28, 0x07 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0d },
 136         { 0x28, 0x08 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x02 },
 137         { 0x28, 0x09 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x01 },
 138         { 0x28, 0x0a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x21 },
 139         { 0x28, 0x0b }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x29 },
 140         { 0x28, 0x0c }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x16 },
 141         { 0x28, 0x0d }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x31 },
 142         { 0x28, 0x0e }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0e },
 143         { 0x28, 0x0f }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x4e },
 144         { 0x28, 0x10 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x46 },
 145         { 0x28, 0x11 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0f },
 146         { 0x28, 0x12 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x56 },
 147         { 0x28, 0x13 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x35 },
 148         { 0x28, 0x14 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbe },
 149         { 0x28, 0x15 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0x84 },
 150         { 0x28, 0x16 }, { 0x29, 0x00 }, { 0x2a, 0x03 }, { 0x2b, 0xee },
 151         { 0x28, 0x17 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x98 },
 152         { 0x28, 0x18 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x9f },
 153         { 0x28, 0x19 }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0xb2 },
 154         { 0x28, 0x1a }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0xc2 },
 155         { 0x28, 0x1b }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0x4a },
 156         { 0x28, 0x1c }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbc },
 157         { 0x28, 0x1d }, { 0x29, 0x00 }, { 0x2a, 0x04 }, { 0x2b, 0xba },
 158         { 0x28, 0x1e }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0x14 },
 159         { 0x50, 0x1e }, { 0x51, 0x5d },
 160         { 0x50, 0x22 }, { 0x51, 0x00 },
 161         { 0x50, 0x23 }, { 0x51, 0xc8 },
 162         { 0x50, 0x24 }, { 0x51, 0x00 },
 163         { 0x50, 0x25 }, { 0x51, 0xf0 },
 164         { 0x50, 0x26 }, { 0x51, 0x00 },
 165         { 0x50, 0x27 }, { 0x51, 0xc3 },
 166         { 0x50, 0x39 }, { 0x51, 0x02 },
 167         { 0x28, 0x6a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x00 },
 168         { 0xd0, 0x00 },
 169 };
 170
 171 static struct regdata mb86a20s_reset_reception[] = {
 172         { 0x70, 0xf0 },
 173         { 0x70, 0xff },
 174         { 0x08, 0x01 },
 175         { 0x08, 0x00 },
 176 };
 177
 178 static int mb86a20s_i2c_writereg(struct mb86a20s_state *state,
 179                              u8 i2c_addr, int reg, int data)
 180 {
 181         u8 buf[] = { reg, data };
 182         struct i2c_msg msg = {
 183                 .addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
 184         };
 185         int rc;
 186
 187         rc = i2c_transfer(state->i2c, &msg, 1);
 188         if (rc != 1) {
 189                 printk("%s: writereg error (rc == %i, reg == 0x%02x,"
 190                          " data == 0x%02x)\n", __func__, rc, reg, data);
 191                 return rc;
 192         }
 193
 194         return 0;
 195 }
 196
 197 static int mb86a20s_i2c_writeregdata(struct mb86a20s_state *state,
 198                                      u8 i2c_addr, struct regdata *rd, int size)
 199 {
 200         int i, rc;
 201
 202         for (i = 0; i < size; i++) {
 203                 rc = mb86a20s_i2c_writereg(state, i2c_addr, rd[i].reg,
 204                                            rd[i].data);
 205                 if (rc < 0)
 206                         return rc;
 207         }
 208         return 0;
 209 }
 210
 211 static int mb86a20s_i2c_readreg(struct mb86a20s_state *state,
 212                                 u8 i2c_addr, u8 reg)
 213 {
 214         u8 val;
 215         int rc;
 216         struct i2c_msg msg[] = {
 217                 { .addr = i2c_addr, .flags = 0, .buf = &reg, .len = 1 },
 218                 { .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }
 219         };
 220
 221         rc = i2c_transfer(state->i2c, msg, 2);
 222
 223         if (rc != 2) {
 224                 rc("%s: reg=0x%x (error=%d)\n", __func__, reg, rc);
 225                 return rc;
 226         }
 227
 228         return val;
 229 }
 230
 231 #define mb86a20s_readreg(state, reg) \
 232         mb86a20s_i2c_readreg(state, state->config->demod_address, reg)
 233 #define mb86a20s_writereg(state, reg, val) \
 234         mb86a20s_i2c_writereg(state, state->config->demod_address, reg, val)
 235 #define mb86a20s_writeregdata(state, regdata) \
 236         mb86a20s_i2c_writeregdata(state, state->config->demod_address, \
 237         regdata, ARRAY_SIZE(regdata))
 238
 239 static int mb86a20s_initfe(struct dvb_frontend *fe)
 240 {
 241         struct mb86a20s_state *state = fe->demodulator_priv;
 242         int rc;
 243         u8  regD5 = 1;
 244
 245         dprintk("\n");
 246
 247         if (fe->ops.i2c_gate_ctrl)
 248                 fe->ops.i2c_gate_ctrl(fe, 0);
 249
 250         /* Initialize the frontend */
 251         rc = mb86a20s_writeregdata(state, mb86a20s_init);
 252         if (rc < 0)
 253                 goto err;
 254
 255         if (!state->config->is_serial) {
 256                 regD5 &= ~1;
 257
 258                 rc = mb86a20s_writereg(state, 0x50, 0xd5);
 259                 if (rc < 0)
 260                         goto err;
 261                 rc = mb86a20s_writereg(state, 0x51, regD5);
 262                 if (rc < 0)
 263                         goto err;
 264         }
 265
 266 err:
 267         if (fe->ops.i2c_gate_ctrl)
 268                 fe->ops.i2c_gate_ctrl(fe, 1);
 269
 270         if (rc < 0) {
 271                 state->need_init = true;
 272                 printk(KERN_INFO "mb86a20s: Init failed. Will try again later\n");
 273         } else {
 274                 state->need_init = false;
 275                 dprintk("Initialization succeeded.\n");
 276         }
 277         return rc;
 278 }
 279
 280 static int mb86a20s_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
 281 {
 282         struct mb86a20s_state *state = fe->demodulator_priv;
 283         unsigned rf_max, rf_min, rf;
 284         u8       val;
 285
 286         dprintk("\n");
 287
 288         if (fe->ops.i2c_gate_ctrl)
 289                 fe->ops.i2c_gate_ctrl(fe, 0);
 290
 291         /* Does a binary search to get RF strength */
 292         rf_max = 0xfff;
 293         rf_min = 0;
 294         do {
 295                 rf = (rf_max + rf_min) / 2;
 296                 mb86a20s_writereg(state, 0x04, 0x1f);
 297                 mb86a20s_writereg(state, 0x05, rf >> 8);
 298                 mb86a20s_writereg(state, 0x04, 0x20);
 299                 mb86a20s_writereg(state, 0x04, rf);
 300
 301                 val = mb86a20s_readreg(state, 0x02);
 302                 if (val & 0x08)
 303                         rf_min = (rf_max + rf_min) / 2;
 304                 else
 305                         rf_max = (rf_max + rf_min) / 2;
 306                 if (rf_max - rf_min < 4) {
 307                         *strength = (((rf_max + rf_min) / 2) * 65535) / 4095;
 308                         break;
 309                 }
 310         } while (1);
 311
 312         dprintk("signal strength = %d\n", *strength);
 313
 314         if (fe->ops.i2c_gate_ctrl)
 315                 fe->ops.i2c_gate_ctrl(fe, 1);
 316
 317         return 0;
 318 }
 319
 320 static int mb86a20s_read_status(struct dvb_frontend *fe, fe_status_t *status)
 321 {
 322         struct mb86a20s_state *state = fe->demodulator_priv;
 323         u8 val;
 324
 325         dprintk("\n");
 326         *status = 0;
 327
 328         if (fe->ops.i2c_gate_ctrl)
 329                 fe->ops.i2c_gate_ctrl(fe, 0);
 330         val = mb86a20s_readreg(state, 0x0a) & 0xf;
 331         if (fe->ops.i2c_gate_ctrl)
 332                 fe->ops.i2c_gate_ctrl(fe, 1);
 333
 334         if (val >= 2)
 335                 *status |= FE_HAS_SIGNAL;
 336
 337         if (val >= 4)
 338                 *status |= FE_HAS_CARRIER;
 339
 340         if (val >= 5)
 341                 *status |= FE_HAS_VITERBI;
 342
 343         if (val >= 7)
 344                 *status |= FE_HAS_SYNC;
 345
 346         if (val >= 8)                           /* Maybe 9? */
 347                 *status |= FE_HAS_LOCK;
 348
 349         dprintk("val = %d, status = 0x%02x\n", val, *status);
 350
 351         return 0;
 352 }
 353
 354 static int mb86a20s_set_frontend(struct dvb_frontend *fe)
 355 {
 356         struct mb86a20s_state *state = fe->demodulator_priv;
 357         int rc;
 358 #if 0
 359         /*
 360          * FIXME: Properly implement the set frontend properties
 361          */
 362         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 363 #endif
 364
 365         dprintk("\n");
 366
 367         /*
 368          * Gate should already be opened, but it doesn't hurt to
 369          * double-check
 370          */
 371         if (fe->ops.i2c_gate_ctrl)
 372                 fe->ops.i2c_gate_ctrl(fe, 1);
 373         dprintk("Calling tuner set parameters\n");
 374         fe->ops.tuner_ops.set_params(fe);
 375
 376         /*
 377          * Make it more reliable: if, for some reason, the initial
 378          * device initialization doesn't happen, initialize it when
 379          * a SBTVD parameters are adjusted.
 380          *
 381          * Unfortunately, due to a hard to track bug at tda829x/tda18271,
 382          * the agc callback logic is not called during DVB attach time,
 383          * causing mb86a20s to not be initialized with Kworld SBTVD.
 384          * So, this hack is needed, in order to make Kworld SBTVD to work.
 385          */
 386         if (state->need_init)
 387                 mb86a20s_initfe(fe);
 388
 389         if (fe->ops.i2c_gate_ctrl)
 390                 fe->ops.i2c_gate_ctrl(fe, 0);
 391         rc = mb86a20s_writeregdata(state, mb86a20s_reset_reception);
 392         if (fe->ops.i2c_gate_ctrl)
 393                 fe->ops.i2c_gate_ctrl(fe, 1);
 394
 395         return rc;
 396 }
 397
 398 static int mb86a20s_get_modulation(struct mb86a20s_state *state,
 399                                    unsigned layer)
 400 {
 401         int rc;
 402         static unsigned char reg[] = {
 403                 [0] = 0x86,     /* Layer A */
 404                 [1] = 0x8a,     /* Layer B */
 405                 [2] = 0x8e,     /* Layer C */
 406         };
 407
 408         if (layer >= ARRAY_SIZE(reg))
 409                 return -EINVAL;
 410         rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
 411         if (rc < 0)
 412                 return rc;
 413         rc = mb86a20s_readreg(state, 0x6e);
 414         if (rc < 0)
 415                 return rc;
 416         switch ((rc & 0x70) >> 4) {
 417         case 0:
 418                 return DQPSK;
 419         case 1:
 420                 return QPSK;
 421         case 2:
 422                 return QAM_16;
 423         case 3:
 424                 return QAM_64;
 425         default:
 426                 return QAM_AUTO;
 427         }
 428 }
 429
 430 static int mb86a20s_get_fec(struct mb86a20s_state *state,
 431                             unsigned layer)
 432 {
 433         int rc;
 434
 435         static unsigned char reg[] = {
 436                 [0] = 0x87,     /* Layer A */
 437                 [1] = 0x8b,     /* Layer B */
 438                 [2] = 0x8f,     /* Layer C */
 439         };
 440
 441         if (layer >= ARRAY_SIZE(reg))
 442                 return -EINVAL;
 443         rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
 444         if (rc < 0)
 445                 return rc;
 446         rc = mb86a20s_readreg(state, 0x6e);
 447         if (rc < 0)
 448                 return rc;
 449         switch (rc) {
 450         case 0:
 451                 return FEC_1_2;
 452         case 1:
 453                 return FEC_2_3;
 454         case 2:
 455                 return FEC_3_4;
 456         case 3:
 457                 return FEC_5_6;
 458         case 4:
 459                 return FEC_7_8;
 460         default:
 461                 return FEC_AUTO;
 462         }
 463 }
 464
 465 static int mb86a20s_get_interleaving(struct mb86a20s_state *state,
 466                                      unsigned layer)
 467 {
 468         int rc;
 469
 470         static unsigned char reg[] = {
 471                 [0] = 0x88,     /* Layer A */
 472                 [1] = 0x8c,     /* Layer B */
 473                 [2] = 0x90,     /* Layer C */
 474         };
 475
 476         if (layer >= ARRAY_SIZE(reg))
 477                 return -EINVAL;
 478         rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
 479         if (rc < 0)
 480                 return rc;
 481         rc = mb86a20s_readreg(state, 0x6e);
 482         if (rc < 0)
 483                 return rc;
 484         if (rc > 3)
 485                 return -EINVAL; /* Not used */
 486         return rc;
 487 }
 488
 489 static int mb86a20s_get_segment_count(struct mb86a20s_state *state,
 490                                       unsigned layer)
 491 {
 492         int rc, count;
 493
 494         static unsigned char reg[] = {
 495                 [0] = 0x89,     /* Layer A */
 496                 [1] = 0x8d,     /* Layer B */
 497                 [2] = 0x91,     /* Layer C */
 498         };
 499
 500         if (layer >= ARRAY_SIZE(reg))
 501                 return -EINVAL;
 502         rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
 503         if (rc < 0)
 504                 return rc;
 505         rc = mb86a20s_readreg(state, 0x6e);
 506         if (rc < 0)
 507                 return rc;
 508         count = (rc >> 4) & 0x0f;
 509
 510         return count;
 511 }
 512
 513 static void mb86a20s_reset_frontend_cache(struct dvb_frontend *fe)
 514 {
 515         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 516
 517         /* Fixed parameters */
 518         c->delivery_system = SYS_ISDBT;
 519         c->bandwidth_hz = 6000000;
 520
 521         /* Initialize values that will be later autodetected */
 522         c->isdbt_layer_enabled = 0;
 523         c->transmission_mode = TRANSMISSION_MODE_AUTO;
 524         c->guard_interval = GUARD_INTERVAL_AUTO;
 525         c->isdbt_sb_mode = 0;
 526         c->isdbt_sb_segment_count = 0;
 527 }
 528
 529 static int mb86a20s_get_frontend(struct dvb_frontend *fe)
 530 {
 531         struct mb86a20s_state *state = fe->demodulator_priv;
 532         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 533         int i, rc;
 534
 535         /* Reset frontend cache to default values */
 536         mb86a20s_reset_frontend_cache(fe);
 537
 538         if (fe->ops.i2c_gate_ctrl)
 539                 fe->ops.i2c_gate_ctrl(fe, 0);
 540
 541         /* Check for partial reception */
 542         rc = mb86a20s_writereg(state, 0x6d, 0x85);
 543         if (rc < 0)
 544                 return rc;
 545         rc = mb86a20s_readreg(state, 0x6e);
 546         if (rc < 0)
 547                 return rc;
 548         c->isdbt_partial_reception = (rc & 0x10) ? 1 : 0;
 549
 550         /* Get per-layer data */
 551
 552         for (i = 0; i < 3; i++) {
 553                 rc = mb86a20s_get_segment_count(state, i);
 554                 if (rc < 0)
 555                         goto error;
 556                 if (rc >= 0 && rc < 14)
 557                         c->layer[i].segment_count = rc;
 558                 else {
 559                         c->layer[i].segment_count = 0;
 560                         continue;
 561                 }
 562                 c->isdbt_layer_enabled |= 1 << i;
 563                 rc = mb86a20s_get_modulation(state, i);
 564                 if (rc < 0)
 565                         goto error;
 566                 c->layer[i].modulation = rc;
 567                 rc = mb86a20s_get_fec(state, i);
 568                 if (rc < 0)
 569                         goto error;
 570                 c->layer[i].fec = rc;
 571                 rc = mb86a20s_get_interleaving(state, i);
 572                 if (rc < 0)
 573                         goto error;
 574                 c->layer[i].interleaving = rc;
 575         }
 576
 577         rc = mb86a20s_writereg(state, 0x6d, 0x84);
 578         if (rc < 0)
 579                 return rc;
 580         if ((rc & 0x60) == 0x20) {
 581                 c->isdbt_sb_mode = 1;
 582                 /* At least, one segment should exist */
 583                 if (!c->isdbt_sb_segment_count)
 584                         c->isdbt_sb_segment_count = 1;
 585         }
 586
 587         /* Get transmission mode and guard interval */
 588         rc = mb86a20s_readreg(state, 0x07);
 589         if (rc < 0)
 590                 return rc;
 591         if ((rc & 0x60) == 0x20) {
 592                 switch (rc & 0x0c >> 2) {
 593                 case 0:
 594                         c->transmission_mode = TRANSMISSION_MODE_2K;
 595                         break;
 596                 case 1:
 597                         c->transmission_mode = TRANSMISSION_MODE_4K;
 598                         break;
 599                 case 2:
 600                         c->transmission_mode = TRANSMISSION_MODE_8K;
 601                         break;
 602                 }
 603         }
 604         if (!(rc & 0x10)) {
 605                 switch (rc & 0x3) {
 606                 case 0:
 607                         c->guard_interval = GUARD_INTERVAL_1_4;
 608                         break;
 609                 case 1:
 610                         c->guard_interval = GUARD_INTERVAL_1_8;
 611                         break;
 612                 case 2:
 613                         c->guard_interval = GUARD_INTERVAL_1_16;
 614                         break;
 615                 }
 616         }
 617
 618 error:
 619         if (fe->ops.i2c_gate_ctrl)
 620                 fe->ops.i2c_gate_ctrl(fe, 1);
 621
 622         return rc;
 623
 624 }
 625
 626 static int mb86a20s_tune(struct dvb_frontend *fe,
 627                         bool re_tune,
 628                         unsigned int mode_flags,
 629                         unsigned int *delay,
 630                         fe_status_t *status)
 631 {
 632         int rc = 0;
 633
 634         dprintk("\n");
 635
 636         if (re_tune)
 637                 rc = mb86a20s_set_frontend(fe);
 638
 639         if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
 640                 mb86a20s_read_status(fe, status);
 641
 642         return rc;
 643 }
 644
 645 static void mb86a20s_release(struct dvb_frontend *fe)
 646 {
 647         struct mb86a20s_state *state = fe->demodulator_priv;
 648
 649         dprintk("\n");
 650
 651         kfree(state);
 652 }
 653
 654 static struct dvb_frontend_ops mb86a20s_ops;
 655
 656 struct dvb_frontend *mb86a20s_attach(const struct mb86a20s_config *config,
 657                                     struct i2c_adapter *i2c)
 658 {
 659         u8      rev;
 660
 661         /* allocate memory for the internal state */
 662         struct mb86a20s_state *state =
 663                 kzalloc(sizeof(struct mb86a20s_state), GFP_KERNEL);
 664
 665         dprintk("\n");
 666         if (state == NULL) {
 667                 rc("Unable to kzalloc\n");
 668                 goto error;
 669         }
 670
 671         /* setup the state */
 672         state->config = config;
 673         state->i2c = i2c;
 674
 675         /* create dvb_frontend */
 676         memcpy(&state->frontend.ops, &mb86a20s_ops,
 677                 sizeof(struct dvb_frontend_ops));
 678         state->frontend.demodulator_priv = state;
 679
 680         /* Check if it is a mb86a20s frontend */
 681         rev = mb86a20s_readreg(state, 0);
 682
 683         if (rev == 0x13) {
 684                 printk(KERN_INFO "Detected a Fujitsu mb86a20s frontend\n");
 685         } else {
 686                 printk(KERN_ERR "Frontend revision %d is unknown - aborting.\n",
 687                        rev);
 688                 goto error;
 689         }
 690
 691         return &state->frontend;
 692
 693 error:
 694         kfree(state);
 695         return NULL;
 696 }
 697 EXPORT_SYMBOL(mb86a20s_attach);
 698
 699 static struct dvb_frontend_ops mb86a20s_ops = {
 700         .delsys = { SYS_ISDBT },
 701         /* Use dib8000 values per default */
 702         .info = {
 703                 .name = "Fujitsu mb86A20s",
 704                 .caps = FE_CAN_INVERSION_AUTO | FE_CAN_RECOVER |
 705                         FE_CAN_FEC_1_2  | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
 706                         FE_CAN_FEC_5_6  | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
 707                         FE_CAN_QPSK     | FE_CAN_QAM_16  | FE_CAN_QAM_64 |
 708                         FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_QAM_AUTO |
 709                         FE_CAN_GUARD_INTERVAL_AUTO    | FE_CAN_HIERARCHY_AUTO,
 710                 /* Actually, those values depend on the used tuner */
 711                 .frequency_min = 45000000,
 712                 .frequency_max = 864000000,
 713                 .frequency_stepsize = 62500,
 714         },
 715
 716         .release = mb86a20s_release,
 717
 718         .init = mb86a20s_initfe,
 719         .set_frontend = mb86a20s_set_frontend,
 720         .get_frontend = mb86a20s_get_frontend,
 721         .read_status = mb86a20s_read_status,
 722         .read_signal_strength = mb86a20s_read_signal_strength,
 723         .tune = mb86a20s_tune,
 724 };
 725
 726 MODULE_DESCRIPTION("DVB Frontend module for Fujitsu mb86A20s hardware");
 727 MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
 728 MODULE_LICENSE("GPL");