drivers/media/dvb-frontends/mb86a20s.c

   1 /*
   2  *   Fujitu mb86a20s ISDB-T/ISDB-Tsb Module driver
   3  *
   4  *   Copyright (C) 2010-2013 Mauro Carvalho Chehab <mchehab@redhat.com>
   5  *   Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
   6  *
   7  *   This program is free software; you can redistribute it and/or
   8  *   modify it under the terms of the GNU General Public License as
   9  *   published by the Free Software Foundation version 2.
  10  *
  11  *   This program is distributed in the hope that it will be useful,
  12  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  *   General Public License for more details.
  15  */
  16
  17 #include <linux/kernel.h>
  18 #include <asm/div64.h>
  19
  20 #include "dvb_frontend.h"
  21 #include "mb86a20s.h"
  22
  23 static int debug = 1;
  24 module_param(debug, int, 0644);
  25 MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
  26
  27 #define rc(args...)  do {                                               \
  28         printk(KERN_ERR  "mb86a20s: " args);                            \
  29 } while (0)
  30
  31 #define dprintk(args...)                                                \
  32         do {                                                            \
  33                 if (debug) {                                            \
  34                         printk(KERN_DEBUG "mb86a20s: %s: ", __func__);  \
  35                         printk(args);                                   \
  36                 }                                                       \
  37         } while (0)
  38
  39 struct mb86a20s_state {
  40         struct i2c_adapter *i2c;
  41         const struct mb86a20s_config *config;
  42
  43         struct dvb_frontend frontend;
  44
  45         bool need_init;
  46 };
  47
  48 struct regdata {
  49         u8 reg;
  50         u8 data;
  51 };
  52
  53 /*
  54  * Initialization sequence: Use whatevere default values that PV SBTVD
  55  * does on its initialisation, obtained via USB snoop
  56  */
  57 static struct regdata mb86a20s_init[] = {
  58         { 0x70, 0x0f },
  59         { 0x70, 0xff },
  60         { 0x08, 0x01 },
  61         { 0x09, 0x3e },
  62         { 0x50, 0xd1 }, { 0x51, 0x22 },
  63         { 0x39, 0x01 },
  64         { 0x71, 0x00 },
  65         { 0x28, 0x2a }, { 0x29, 0x00 }, { 0x2a, 0xff }, { 0x2b, 0x80 },
  66         { 0x28, 0x20 }, { 0x29, 0x33 }, { 0x2a, 0xdf }, { 0x2b, 0xa9 },
  67         { 0x28, 0x22 }, { 0x29, 0x00 }, { 0x2a, 0x1f }, { 0x2b, 0xf0 },
  68         { 0x3b, 0x21 },
  69         { 0x3c, 0x3a },
  70         { 0x01, 0x0d },
  71         { 0x04, 0x08 }, { 0x05, 0x05 },
  72         { 0x04, 0x0e }, { 0x05, 0x00 },
  73         { 0x04, 0x0f }, { 0x05, 0x14 },
  74         { 0x04, 0x0b }, { 0x05, 0x8c },
  75         { 0x04, 0x00 }, { 0x05, 0x00 },
  76         { 0x04, 0x01 }, { 0x05, 0x07 },
  77         { 0x04, 0x02 }, { 0x05, 0x0f },
  78         { 0x04, 0x03 }, { 0x05, 0xa0 },
  79         { 0x04, 0x09 }, { 0x05, 0x00 },
  80         { 0x04, 0x0a }, { 0x05, 0xff },
  81         { 0x04, 0x27 }, { 0x05, 0x64 },
  82         { 0x04, 0x28 }, { 0x05, 0x00 },
  83         { 0x04, 0x1e }, { 0x05, 0xff },
  84         { 0x04, 0x29 }, { 0x05, 0x0a },
  85         { 0x04, 0x32 }, { 0x05, 0x0a },
  86         { 0x04, 0x14 }, { 0x05, 0x02 },
  87         { 0x04, 0x04 }, { 0x05, 0x00 },
  88         { 0x04, 0x05 }, { 0x05, 0x22 },
  89         { 0x04, 0x06 }, { 0x05, 0x0e },
  90         { 0x04, 0x07 }, { 0x05, 0xd8 },
  91         { 0x04, 0x12 }, { 0x05, 0x00 },
  92         { 0x04, 0x13 }, { 0x05, 0xff },
  93         { 0x04, 0x15 }, { 0x05, 0x4e },
  94         { 0x04, 0x16 }, { 0x05, 0x20 },
  95         { 0x52, 0x01 },
  96         { 0x50, 0xa7 }, { 0x51, 0xff },
  97         { 0x50, 0xa8 }, { 0x51, 0xff },
  98         { 0x50, 0xa9 }, { 0x51, 0xff },
  99         { 0x50, 0xaa }, { 0x51, 0xff },
 100         { 0x50, 0xab }, { 0x51, 0xff },
 101         { 0x50, 0xac }, { 0x51, 0xff },
 102         { 0x50, 0xad }, { 0x51, 0xff },
 103         { 0x50, 0xae }, { 0x51, 0xff },
 104         { 0x50, 0xaf }, { 0x51, 0xff },
 105         { 0x5e, 0x07 },
 106         { 0x50, 0xdc }, { 0x51, 0x01 },
 107         { 0x50, 0xdd }, { 0x51, 0xf4 },
 108         { 0x50, 0xde }, { 0x51, 0x01 },
 109         { 0x50, 0xdf }, { 0x51, 0xf4 },
 110         { 0x50, 0xe0 }, { 0x51, 0x01 },
 111         { 0x50, 0xe1 }, { 0x51, 0xf4 },
 112         { 0x50, 0xb0 }, { 0x51, 0x07 },
 113         { 0x50, 0xb2 }, { 0x51, 0xff },
 114         { 0x50, 0xb3 }, { 0x51, 0xff },
 115         { 0x50, 0xb4 }, { 0x51, 0xff },
 116         { 0x50, 0xb5 }, { 0x51, 0xff },
 117         { 0x50, 0xb6 }, { 0x51, 0xff },
 118         { 0x50, 0xb7 }, { 0x51, 0xff },
 119         { 0x50, 0x50 }, { 0x51, 0x02 },
 120         { 0x50, 0x51 }, { 0x51, 0x04 },
 121         { 0x45, 0x04 },
 122         { 0x48, 0x04 },
 123         { 0x50, 0xd5 }, { 0x51, 0x01 },         /* Serial */
 124         { 0x50, 0xd6 }, { 0x51, 0x1f },
 125         { 0x50, 0xd2 }, { 0x51, 0x03 },
 126         { 0x50, 0xd7 }, { 0x51, 0x3f },
 127         { 0x28, 0x74 }, { 0x29, 0x00 }, { 0x28, 0x74 }, { 0x29, 0x40 },
 128         { 0x28, 0x46 }, { 0x29, 0x2c }, { 0x28, 0x46 }, { 0x29, 0x0c },
 129
 130         { 0x04, 0x40 }, { 0x05, 0x00 },
 131         { 0x28, 0x00 }, { 0x29, 0x10 },
 132         { 0x28, 0x05 }, { 0x29, 0x02 },
 133         { 0x1c, 0x01 },
 134         { 0x28, 0x06 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x03 },
 135         { 0x28, 0x07 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0d },
 136         { 0x28, 0x08 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x02 },
 137         { 0x28, 0x09 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x01 },
 138         { 0x28, 0x0a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x21 },
 139         { 0x28, 0x0b }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x29 },
 140         { 0x28, 0x0c }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x16 },
 141         { 0x28, 0x0d }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x31 },
 142         { 0x28, 0x0e }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0e },
 143         { 0x28, 0x0f }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x4e },
 144         { 0x28, 0x10 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x46 },
 145         { 0x28, 0x11 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0f },
 146         { 0x28, 0x12 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x56 },
 147         { 0x28, 0x13 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x35 },
 148         { 0x28, 0x14 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbe },
 149         { 0x28, 0x15 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0x84 },
 150         { 0x28, 0x16 }, { 0x29, 0x00 }, { 0x2a, 0x03 }, { 0x2b, 0xee },
 151         { 0x28, 0x17 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x98 },
 152         { 0x28, 0x18 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x9f },
 153         { 0x28, 0x19 }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0xb2 },
 154         { 0x28, 0x1a }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0xc2 },
 155         { 0x28, 0x1b }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0x4a },
 156         { 0x28, 0x1c }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbc },
 157         { 0x28, 0x1d }, { 0x29, 0x00 }, { 0x2a, 0x04 }, { 0x2b, 0xba },
 158         { 0x28, 0x1e }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0x14 },
 159         { 0x50, 0x1e }, { 0x51, 0x5d },
 160         { 0x50, 0x22 }, { 0x51, 0x00 },
 161         { 0x50, 0x23 }, { 0x51, 0xc8 },
 162         { 0x50, 0x24 }, { 0x51, 0x00 },
 163         { 0x50, 0x25 }, { 0x51, 0xf0 },
 164         { 0x50, 0x26 }, { 0x51, 0x00 },
 165         { 0x50, 0x27 }, { 0x51, 0xc3 },
 166         { 0x50, 0x39 }, { 0x51, 0x02 },
 167         { 0x28, 0x6a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x00 },
 168         { 0xd0, 0x00 },
 169 };
 170
 171 static struct regdata mb86a20s_reset_reception[] = {
 172         { 0x70, 0xf0 },
 173         { 0x70, 0xff },
 174         { 0x08, 0x01 },
 175         { 0x08, 0x00 },
 176 };
 177
 178 /*
 179  * I2C read/write functions and macros
 180  */
 181
 182 static int mb86a20s_i2c_writereg(struct mb86a20s_state *state,
 183                              u8 i2c_addr, int reg, int data)
 184 {
 185         u8 buf[] = { reg, data };
 186         struct i2c_msg msg = {
 187                 .addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
 188         };
 189         int rc;
 190
 191         rc = i2c_transfer(state->i2c, &msg, 1);
 192         if (rc != 1) {
 193                 printk("%s: writereg error (rc == %i, reg == 0x%02x,"
 194                          " data == 0x%02x)\n", __func__, rc, reg, data);
 195                 return rc;
 196         }
 197
 198         return 0;
 199 }
 200
 201 static int mb86a20s_i2c_writeregdata(struct mb86a20s_state *state,
 202                                      u8 i2c_addr, struct regdata *rd, int size)
 203 {
 204         int i, rc;
 205
 206         for (i = 0; i < size; i++) {
 207                 rc = mb86a20s_i2c_writereg(state, i2c_addr, rd[i].reg,
 208                                            rd[i].data);
 209                 if (rc < 0)
 210                         return rc;
 211         }
 212         return 0;
 213 }
 214
 215 static int mb86a20s_i2c_readreg(struct mb86a20s_state *state,
 216                                 u8 i2c_addr, u8 reg)
 217 {
 218         u8 val;
 219         int rc;
 220         struct i2c_msg msg[] = {
 221                 { .addr = i2c_addr, .flags = 0, .buf = &reg, .len = 1 },
 222                 { .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }
 223         };
 224
 225         rc = i2c_transfer(state->i2c, msg, 2);
 226
 227         if (rc != 2) {
 228                 rc("%s: reg=0x%x (error=%d)\n", __func__, reg, rc);
 229                 return rc;
 230         }
 231
 232         return val;
 233 }
 234
 235 #define mb86a20s_readreg(state, reg) \
 236         mb86a20s_i2c_readreg(state, state->config->demod_address, reg)
 237 #define mb86a20s_writereg(state, reg, val) \
 238         mb86a20s_i2c_writereg(state, state->config->demod_address, reg, val)
 239 #define mb86a20s_writeregdata(state, regdata) \
 240         mb86a20s_i2c_writeregdata(state, state->config->demod_address, \
 241         regdata, ARRAY_SIZE(regdata))
 242
 243 static int mb86a20s_read_status(struct dvb_frontend *fe, fe_status_t *status)
 244 {
 245         struct mb86a20s_state *state = fe->demodulator_priv;
 246         int val;
 247
 248         dprintk("\n");
 249         *status = 0;
 250
 251         val = mb86a20s_readreg(state, 0x0a) & 0xf;
 252         if (val < 0)
 253                 return val;
 254
 255         if (val >= 2)
 256                 *status |= FE_HAS_SIGNAL;
 257
 258         if (val >= 4)
 259                 *status |= FE_HAS_CARRIER;
 260
 261         if (val >= 5)
 262                 *status |= FE_HAS_VITERBI;
 263
 264         if (val >= 7)
 265                 *status |= FE_HAS_SYNC;
 266
 267         if (val >= 8)                           /* Maybe 9? */
 268                 *status |= FE_HAS_LOCK;
 269
 270         dprintk("val = %d, status = 0x%02x\n", val, *status);
 271
 272         return 0;
 273 }
 274
 275 static int mb86a20s_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
 276 {
 277         struct mb86a20s_state *state = fe->demodulator_priv;
 278         unsigned rf_max, rf_min, rf;
 279         u8       val;
 280
 281         dprintk("\n");
 282
 283         if (fe->ops.i2c_gate_ctrl)
 284                 fe->ops.i2c_gate_ctrl(fe, 0);
 285
 286         /* Does a binary search to get RF strength */
 287         rf_max = 0xfff;
 288         rf_min = 0;
 289         do {
 290                 rf = (rf_max + rf_min) / 2;
 291                 mb86a20s_writereg(state, 0x04, 0x1f);
 292                 mb86a20s_writereg(state, 0x05, rf >> 8);
 293                 mb86a20s_writereg(state, 0x04, 0x20);
 294                 mb86a20s_writereg(state, 0x04, rf);
 295
 296                 val = mb86a20s_readreg(state, 0x02);
 297                 if (val & 0x08)
 298                         rf_min = (rf_max + rf_min) / 2;
 299                 else
 300                         rf_max = (rf_max + rf_min) / 2;
 301                 if (rf_max - rf_min < 4) {
 302                         *strength = (((rf_max + rf_min) / 2) * 65535) / 4095;
 303                         break;
 304                 }
 305         } while (1);
 306
 307         dprintk("signal strength = %d\n", *strength);
 308
 309         if (fe->ops.i2c_gate_ctrl)
 310                 fe->ops.i2c_gate_ctrl(fe, 1);
 311
 312         return 0;
 313 }
 314
 315 static int mb86a20s_get_modulation(struct mb86a20s_state *state,
 316                                    unsigned layer)
 317 {
 318         int rc;
 319         static unsigned char reg[] = {
 320                 [0] = 0x86,     /* Layer A */
 321                 [1] = 0x8a,     /* Layer B */
 322                 [2] = 0x8e,     /* Layer C */
 323         };
 324
 325         if (layer >= ARRAY_SIZE(reg))
 326                 return -EINVAL;
 327         rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
 328         if (rc < 0)
 329                 return rc;
 330         rc = mb86a20s_readreg(state, 0x6e);
 331         if (rc < 0)
 332                 return rc;
 333         switch ((rc >> 4) & 0x07) {
 334         case 0:
 335                 return DQPSK;
 336         case 1:
 337                 return QPSK;
 338         case 2:
 339                 return QAM_16;
 340         case 3:
 341                 return QAM_64;
 342         default:
 343                 return QAM_AUTO;
 344         }
 345 }
 346
 347 static int mb86a20s_get_fec(struct mb86a20s_state *state,
 348                             unsigned layer)
 349 {
 350         int rc;
 351
 352         static unsigned char reg[] = {
 353                 [0] = 0x87,     /* Layer A */
 354                 [1] = 0x8b,     /* Layer B */
 355                 [2] = 0x8f,     /* Layer C */
 356         };
 357
 358         if (layer >= ARRAY_SIZE(reg))
 359                 return -EINVAL;
 360         rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
 361         if (rc < 0)
 362                 return rc;
 363         rc = mb86a20s_readreg(state, 0x6e);
 364         if (rc < 0)
 365                 return rc;
 366         switch ((rc >> 4) & 0x07) {
 367         case 0:
 368                 return FEC_1_2;
 369         case 1:
 370                 return FEC_2_3;
 371         case 2:
 372                 return FEC_3_4;
 373         case 3:
 374                 return FEC_5_6;
 375         case 4:
 376                 return FEC_7_8;
 377         default:
 378                 return FEC_AUTO;
 379         }
 380 }
 381
 382 static int mb86a20s_get_interleaving(struct mb86a20s_state *state,
 383                                      unsigned layer)
 384 {
 385         int rc;
 386
 387         static unsigned char reg[] = {
 388                 [0] = 0x88,     /* Layer A */
 389                 [1] = 0x8c,     /* Layer B */
 390                 [2] = 0x90,     /* Layer C */
 391         };
 392
 393         if (layer >= ARRAY_SIZE(reg))
 394                 return -EINVAL;
 395         rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
 396         if (rc < 0)
 397                 return rc;
 398         rc = mb86a20s_readreg(state, 0x6e);
 399         if (rc < 0)
 400                 return rc;
 401
 402         switch ((rc >> 4) & 0x07) {
 403         case 1:
 404                 return GUARD_INTERVAL_1_4;
 405         case 2:
 406                 return GUARD_INTERVAL_1_8;
 407         case 3:
 408                 return GUARD_INTERVAL_1_16;
 409         case 4:
 410                 return GUARD_INTERVAL_1_32;
 411
 412         default:
 413         case 0:
 414                 return GUARD_INTERVAL_AUTO;
 415         }
 416 }
 417
 418 static int mb86a20s_get_segment_count(struct mb86a20s_state *state,
 419                                       unsigned layer)
 420 {
 421         int rc, count;
 422
 423         static unsigned char reg[] = {
 424                 [0] = 0x89,     /* Layer A */
 425                 [1] = 0x8d,     /* Layer B */
 426                 [2] = 0x91,     /* Layer C */
 427         };
 428
 429         if (layer >= ARRAY_SIZE(reg))
 430                 return -EINVAL;
 431         rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
 432         if (rc < 0)
 433                 return rc;
 434         rc = mb86a20s_readreg(state, 0x6e);
 435         if (rc < 0)
 436                 return rc;
 437         count = (rc >> 4) & 0x0f;
 438
 439         return count;
 440 }
 441
 442 static void mb86a20s_reset_frontend_cache(struct dvb_frontend *fe)
 443 {
 444         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 445
 446         /* Fixed parameters */
 447         c->delivery_system = SYS_ISDBT;
 448         c->bandwidth_hz = 6000000;
 449
 450         /* Initialize values that will be later autodetected */
 451         c->isdbt_layer_enabled = 0;
 452         c->transmission_mode = TRANSMISSION_MODE_AUTO;
 453         c->guard_interval = GUARD_INTERVAL_AUTO;
 454         c->isdbt_sb_mode = 0;
 455         c->isdbt_sb_segment_count = 0;
 456 }
 457
 458 static int mb86a20s_get_frontend(struct dvb_frontend *fe)
 459 {
 460         struct mb86a20s_state *state = fe->demodulator_priv;
 461         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 462         int i, rc;
 463
 464         /* Reset frontend cache to default values */
 465         mb86a20s_reset_frontend_cache(fe);
 466
 467         if (fe->ops.i2c_gate_ctrl)
 468                 fe->ops.i2c_gate_ctrl(fe, 0);
 469
 470         /* Check for partial reception */
 471         rc = mb86a20s_writereg(state, 0x6d, 0x85);
 472         if (rc < 0)
 473                 return rc;
 474         rc = mb86a20s_readreg(state, 0x6e);
 475         if (rc < 0)
 476                 return rc;
 477         c->isdbt_partial_reception = (rc & 0x10) ? 1 : 0;
 478
 479         /* Get per-layer data */
 480
 481         for (i = 0; i < 3; i++) {
 482                 rc = mb86a20s_get_segment_count(state, i);
 483                 if (rc < 0)
 484                         goto error;
 485                 if (rc >= 0 && rc < 14)
 486                         c->layer[i].segment_count = rc;
 487                 else {
 488                         c->layer[i].segment_count = 0;
 489                         continue;
 490                 }
 491                 c->isdbt_layer_enabled |= 1 << i;
 492                 rc = mb86a20s_get_modulation(state, i);
 493                 if (rc < 0)
 494                         goto error;
 495                 c->layer[i].modulation = rc;
 496                 rc = mb86a20s_get_fec(state, i);
 497                 if (rc < 0)
 498                         goto error;
 499                 c->layer[i].fec = rc;
 500                 rc = mb86a20s_get_interleaving(state, i);
 501                 if (rc < 0)
 502                         goto error;
 503                 c->layer[i].interleaving = rc;
 504         }
 505
 506         rc = mb86a20s_writereg(state, 0x6d, 0x84);
 507         if (rc < 0)
 508                 return rc;
 509         if ((rc & 0x60) == 0x20) {
 510                 c->isdbt_sb_mode = 1;
 511                 /* At least, one segment should exist */
 512                 if (!c->isdbt_sb_segment_count)
 513                         c->isdbt_sb_segment_count = 1;
 514         }
 515
 516         /* Get transmission mode and guard interval */
 517         rc = mb86a20s_readreg(state, 0x07);
 518         if (rc < 0)
 519                 return rc;
 520         if ((rc & 0x60) == 0x20) {
 521                 switch (rc & 0x0c >> 2) {
 522                 case 0:
 523                         c->transmission_mode = TRANSMISSION_MODE_2K;
 524                         break;
 525                 case 1:
 526                         c->transmission_mode = TRANSMISSION_MODE_4K;
 527                         break;
 528                 case 2:
 529                         c->transmission_mode = TRANSMISSION_MODE_8K;
 530                         break;
 531                 }
 532         }
 533         if (!(rc & 0x10)) {
 534                 switch (rc & 0x3) {
 535                 case 0:
 536                         c->guard_interval = GUARD_INTERVAL_1_4;
 537                         break;
 538                 case 1:
 539                         c->guard_interval = GUARD_INTERVAL_1_8;
 540                         break;
 541                 case 2:
 542                         c->guard_interval = GUARD_INTERVAL_1_16;
 543                         break;
 544                 }
 545         }
 546
 547 error:
 548         if (fe->ops.i2c_gate_ctrl)
 549                 fe->ops.i2c_gate_ctrl(fe, 1);
 550
 551         return rc;
 552
 553 }
 554
 555 static int mb86a20s_initfe(struct dvb_frontend *fe)
 556 {
 557         struct mb86a20s_state *state = fe->demodulator_priv;
 558         int rc;
 559         u8  regD5 = 1;
 560
 561         dprintk("\n");
 562
 563         if (fe->ops.i2c_gate_ctrl)
 564                 fe->ops.i2c_gate_ctrl(fe, 0);
 565
 566         /* Initialize the frontend */
 567         rc = mb86a20s_writeregdata(state, mb86a20s_init);
 568         if (rc < 0)
 569                 goto err;
 570
 571         if (!state->config->is_serial) {
 572                 regD5 &= ~1;
 573
 574                 rc = mb86a20s_writereg(state, 0x50, 0xd5);
 575                 if (rc < 0)
 576                         goto err;
 577                 rc = mb86a20s_writereg(state, 0x51, regD5);
 578                 if (rc < 0)
 579                         goto err;
 580         }
 581
 582 err:
 583         if (fe->ops.i2c_gate_ctrl)
 584                 fe->ops.i2c_gate_ctrl(fe, 1);
 585
 586         if (rc < 0) {
 587                 state->need_init = true;
 588                 printk(KERN_INFO "mb86a20s: Init failed. Will try again later\n");
 589         } else {
 590                 state->need_init = false;
 591                 dprintk("Initialization succeeded.\n");
 592         }
 593         return rc;
 594 }
 595
 596 static int mb86a20s_set_frontend(struct dvb_frontend *fe)
 597 {
 598         struct mb86a20s_state *state = fe->demodulator_priv;
 599         int rc;
 600 #if 0
 601         /*
 602          * FIXME: Properly implement the set frontend properties
 603          */
 604         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 605 #endif
 606
 607         dprintk("\n");
 608
 609         /*
 610          * Gate should already be opened, but it doesn't hurt to
 611          * double-check
 612          */
 613         if (fe->ops.i2c_gate_ctrl)
 614                 fe->ops.i2c_gate_ctrl(fe, 1);
 615         dprintk("Calling tuner set parameters\n");
 616         fe->ops.tuner_ops.set_params(fe);
 617
 618         /*
 619          * Make it more reliable: if, for some reason, the initial
 620          * device initialization doesn't happen, initialize it when
 621          * a SBTVD parameters are adjusted.
 622          *
 623          * Unfortunately, due to a hard to track bug at tda829x/tda18271,
 624          * the agc callback logic is not called during DVB attach time,
 625          * causing mb86a20s to not be initialized with Kworld SBTVD.
 626          * So, this hack is needed, in order to make Kworld SBTVD to work.
 627          */
 628         if (state->need_init)
 629                 mb86a20s_initfe(fe);
 630
 631         if (fe->ops.i2c_gate_ctrl)
 632                 fe->ops.i2c_gate_ctrl(fe, 0);
 633         rc = mb86a20s_writeregdata(state, mb86a20s_reset_reception);
 634         if (fe->ops.i2c_gate_ctrl)
 635                 fe->ops.i2c_gate_ctrl(fe, 1);
 636
 637         return rc;
 638 }
 639
 640
 641 static int mb86a20s_read_status_gate(struct dvb_frontend *fe,
 642                                      fe_status_t *status)
 643 {
 644         int ret;
 645
 646         dprintk("\n");
 647         *status = 0;
 648
 649         if (fe->ops.i2c_gate_ctrl)
 650                 fe->ops.i2c_gate_ctrl(fe, 0);
 651
 652         ret = mb86a20s_read_status(fe, status);
 653
 654         if (fe->ops.i2c_gate_ctrl)
 655                 fe->ops.i2c_gate_ctrl(fe, 1);
 656
 657         return ret;
 658 }
 659
 660 static int mb86a20s_tune(struct dvb_frontend *fe,
 661                         bool re_tune,
 662                         unsigned int mode_flags,
 663                         unsigned int *delay,
 664                         fe_status_t *status)
 665 {
 666         int rc = 0;
 667
 668         dprintk("\n");
 669
 670         if (re_tune)
 671                 rc = mb86a20s_set_frontend(fe);
 672
 673         if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
 674                 mb86a20s_read_status_gate(fe, status);
 675
 676         return rc;
 677 }
 678
 679 static void mb86a20s_release(struct dvb_frontend *fe)
 680 {
 681         struct mb86a20s_state *state = fe->demodulator_priv;
 682
 683         dprintk("\n");
 684
 685         kfree(state);
 686 }
 687
 688 static struct dvb_frontend_ops mb86a20s_ops;
 689
 690 struct dvb_frontend *mb86a20s_attach(const struct mb86a20s_config *config,
 691                                     struct i2c_adapter *i2c)
 692 {
 693         u8      rev;
 694
 695         /* allocate memory for the internal state */
 696         struct mb86a20s_state *state =
 697                 kzalloc(sizeof(struct mb86a20s_state), GFP_KERNEL);
 698
 699         dprintk("\n");
 700         if (state == NULL) {
 701                 rc("Unable to kzalloc\n");
 702                 goto error;
 703         }
 704
 705         /* setup the state */
 706         state->config = config;
 707         state->i2c = i2c;
 708
 709         /* create dvb_frontend */
 710         memcpy(&state->frontend.ops, &mb86a20s_ops,
 711                 sizeof(struct dvb_frontend_ops));
 712         state->frontend.demodulator_priv = state;
 713
 714         /* Check if it is a mb86a20s frontend */
 715         rev = mb86a20s_readreg(state, 0);
 716
 717         if (rev == 0x13) {
 718                 printk(KERN_INFO "Detected a Fujitsu mb86a20s frontend\n");
 719         } else {
 720                 printk(KERN_ERR "Frontend revision %d is unknown - aborting.\n",
 721                        rev);
 722                 goto error;
 723         }
 724
 725         return &state->frontend;
 726
 727 error:
 728         kfree(state);
 729         return NULL;
 730 }
 731 EXPORT_SYMBOL(mb86a20s_attach);
 732
 733 static struct dvb_frontend_ops mb86a20s_ops = {
 734         .delsys = { SYS_ISDBT },
 735         /* Use dib8000 values per default */
 736         .info = {
 737                 .name = "Fujitsu mb86A20s",
 738                 .caps = FE_CAN_INVERSION_AUTO | FE_CAN_RECOVER |
 739                         FE_CAN_FEC_1_2  | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
 740                         FE_CAN_FEC_5_6  | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
 741                         FE_CAN_QPSK     | FE_CAN_QAM_16  | FE_CAN_QAM_64 |
 742                         FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_QAM_AUTO |
 743                         FE_CAN_GUARD_INTERVAL_AUTO    | FE_CAN_HIERARCHY_AUTO,
 744                 /* Actually, those values depend on the used tuner */
 745                 .frequency_min = 45000000,
 746                 .frequency_max = 864000000,
 747                 .frequency_stepsize = 62500,
 748         },
 749
 750         .release = mb86a20s_release,
 751
 752         .init = mb86a20s_initfe,
 753         .set_frontend = mb86a20s_set_frontend,
 754         .get_frontend = mb86a20s_get_frontend,
 755         .read_status = mb86a20s_read_status_gate,
 756         .read_signal_strength = mb86a20s_read_signal_strength,
 757         .tune = mb86a20s_tune,
 758 };
 759
 760 MODULE_DESCRIPTION("DVB Frontend module for Fujitsu mb86A20s hardware");
 761 MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
 762 MODULE_LICENSE("GPL");