drivers/media/dvb-frontends/mb86a20s.c

   1 /*
   2  *   Fujitu mb86a20s ISDB-T/ISDB-Tsb Module driver
   3  *
   4  *   Copyright (C) 2010-2013 Mauro Carvalho Chehab <mchehab@redhat.com>
   5  *   Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
   6  *
   7  *   This program is free software; you can redistribute it and/or
   8  *   modify it under the terms of the GNU General Public License as
   9  *   published by the Free Software Foundation version 2.
  10  *
  11  *   This program is distributed in the hope that it will be useful,
  12  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  *   General Public License for more details.
  15  */
  16
  17 #include <linux/kernel.h>
  18 #include <asm/div64.h>
  19
  20 #include "dvb_frontend.h"
  21 #include "mb86a20s.h"
  22
  23 static int debug = 1;
  24 module_param(debug, int, 0644);
  25 MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
  26
  27 struct mb86a20s_state {
  28         struct i2c_adapter *i2c;
  29         const struct mb86a20s_config *config;
  30
  31         struct dvb_frontend frontend;
  32
  33         bool need_init;
  34 };
  35
  36 struct regdata {
  37         u8 reg;
  38         u8 data;
  39 };
  40
  41 /*
  42  * Initialization sequence: Use whatevere default values that PV SBTVD
  43  * does on its initialisation, obtained via USB snoop
  44  */
  45 static struct regdata mb86a20s_init[] = {
  46         { 0x70, 0x0f },
  47         { 0x70, 0xff },
  48         { 0x08, 0x01 },
  49         { 0x09, 0x3e },
  50         { 0x50, 0xd1 }, { 0x51, 0x22 },
  51         { 0x39, 0x01 },
  52         { 0x71, 0x00 },
  53         { 0x28, 0x2a }, { 0x29, 0x00 }, { 0x2a, 0xff }, { 0x2b, 0x80 },
  54         { 0x28, 0x20 }, { 0x29, 0x33 }, { 0x2a, 0xdf }, { 0x2b, 0xa9 },
  55         { 0x28, 0x22 }, { 0x29, 0x00 }, { 0x2a, 0x1f }, { 0x2b, 0xf0 },
  56         { 0x3b, 0x21 },
  57         { 0x3c, 0x3a },
  58         { 0x01, 0x0d },
  59         { 0x04, 0x08 }, { 0x05, 0x05 },
  60         { 0x04, 0x0e }, { 0x05, 0x00 },
  61         { 0x04, 0x0f }, { 0x05, 0x14 },
  62         { 0x04, 0x0b }, { 0x05, 0x8c },
  63         { 0x04, 0x00 }, { 0x05, 0x00 },
  64         { 0x04, 0x01 }, { 0x05, 0x07 },
  65         { 0x04, 0x02 }, { 0x05, 0x0f },
  66         { 0x04, 0x03 }, { 0x05, 0xa0 },
  67         { 0x04, 0x09 }, { 0x05, 0x00 },
  68         { 0x04, 0x0a }, { 0x05, 0xff },
  69         { 0x04, 0x27 }, { 0x05, 0x64 },
  70         { 0x04, 0x28 }, { 0x05, 0x00 },
  71         { 0x04, 0x1e }, { 0x05, 0xff },
  72         { 0x04, 0x29 }, { 0x05, 0x0a },
  73         { 0x04, 0x32 }, { 0x05, 0x0a },
  74         { 0x04, 0x14 }, { 0x05, 0x02 },
  75         { 0x04, 0x04 }, { 0x05, 0x00 },
  76         { 0x04, 0x05 }, { 0x05, 0x22 },
  77         { 0x04, 0x06 }, { 0x05, 0x0e },
  78         { 0x04, 0x07 }, { 0x05, 0xd8 },
  79         { 0x04, 0x12 }, { 0x05, 0x00 },
  80         { 0x04, 0x13 }, { 0x05, 0xff },
  81         { 0x04, 0x15 }, { 0x05, 0x4e },
  82         { 0x04, 0x16 }, { 0x05, 0x20 },
  83         { 0x52, 0x01 },
  84         { 0x50, 0xa7 }, { 0x51, 0xff },
  85         { 0x50, 0xa8 }, { 0x51, 0xff },
  86         { 0x50, 0xa9 }, { 0x51, 0xff },
  87         { 0x50, 0xaa }, { 0x51, 0xff },
  88         { 0x50, 0xab }, { 0x51, 0xff },
  89         { 0x50, 0xac }, { 0x51, 0xff },
  90         { 0x50, 0xad }, { 0x51, 0xff },
  91         { 0x50, 0xae }, { 0x51, 0xff },
  92         { 0x50, 0xaf }, { 0x51, 0xff },
  93         { 0x5e, 0x07 },
  94         { 0x50, 0xdc }, { 0x51, 0x01 },
  95         { 0x50, 0xdd }, { 0x51, 0xf4 },
  96         { 0x50, 0xde }, { 0x51, 0x01 },
  97         { 0x50, 0xdf }, { 0x51, 0xf4 },
  98         { 0x50, 0xe0 }, { 0x51, 0x01 },
  99         { 0x50, 0xe1 }, { 0x51, 0xf4 },
 100         { 0x50, 0xb0 }, { 0x51, 0x07 },
 101         { 0x50, 0xb2 }, { 0x51, 0xff },
 102         { 0x50, 0xb3 }, { 0x51, 0xff },
 103         { 0x50, 0xb4 }, { 0x51, 0xff },
 104         { 0x50, 0xb5 }, { 0x51, 0xff },
 105         { 0x50, 0xb6 }, { 0x51, 0xff },
 106         { 0x50, 0xb7 }, { 0x51, 0xff },
 107         { 0x50, 0x50 }, { 0x51, 0x02 },
 108         { 0x50, 0x51 }, { 0x51, 0x04 },
 109         { 0x45, 0x04 },
 110         { 0x48, 0x04 },
 111         { 0x50, 0xd5 }, { 0x51, 0x01 },         /* Serial */
 112         { 0x50, 0xd6 }, { 0x51, 0x1f },
 113         { 0x50, 0xd2 }, { 0x51, 0x03 },
 114         { 0x50, 0xd7 }, { 0x51, 0x3f },
 115         { 0x28, 0x74 }, { 0x29, 0x00 }, { 0x28, 0x74 }, { 0x29, 0x40 },
 116         { 0x28, 0x46 }, { 0x29, 0x2c }, { 0x28, 0x46 }, { 0x29, 0x0c },
 117
 118         { 0x04, 0x40 }, { 0x05, 0x00 },
 119         { 0x28, 0x00 }, { 0x29, 0x10 },
 120         { 0x28, 0x05 }, { 0x29, 0x02 },
 121         { 0x1c, 0x01 },
 122         { 0x28, 0x06 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x03 },
 123         { 0x28, 0x07 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0d },
 124         { 0x28, 0x08 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x02 },
 125         { 0x28, 0x09 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x01 },
 126         { 0x28, 0x0a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x21 },
 127         { 0x28, 0x0b }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x29 },
 128         { 0x28, 0x0c }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x16 },
 129         { 0x28, 0x0d }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x31 },
 130         { 0x28, 0x0e }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0e },
 131         { 0x28, 0x0f }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x4e },
 132         { 0x28, 0x10 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x46 },
 133         { 0x28, 0x11 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0f },
 134         { 0x28, 0x12 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x56 },
 135         { 0x28, 0x13 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x35 },
 136         { 0x28, 0x14 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbe },
 137         { 0x28, 0x15 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0x84 },
 138         { 0x28, 0x16 }, { 0x29, 0x00 }, { 0x2a, 0x03 }, { 0x2b, 0xee },
 139         { 0x28, 0x17 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x98 },
 140         { 0x28, 0x18 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x9f },
 141         { 0x28, 0x19 }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0xb2 },
 142         { 0x28, 0x1a }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0xc2 },
 143         { 0x28, 0x1b }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0x4a },
 144         { 0x28, 0x1c }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbc },
 145         { 0x28, 0x1d }, { 0x29, 0x00 }, { 0x2a, 0x04 }, { 0x2b, 0xba },
 146         { 0x28, 0x1e }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0x14 },
 147         { 0x50, 0x1e }, { 0x51, 0x5d },
 148         { 0x50, 0x22 }, { 0x51, 0x00 },
 149         { 0x50, 0x23 }, { 0x51, 0xc8 },
 150         { 0x50, 0x24 }, { 0x51, 0x00 },
 151         { 0x50, 0x25 }, { 0x51, 0xf0 },
 152         { 0x50, 0x26 }, { 0x51, 0x00 },
 153         { 0x50, 0x27 }, { 0x51, 0xc3 },
 154         { 0x50, 0x39 }, { 0x51, 0x02 },
 155         { 0x28, 0x6a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x00 },
 156         { 0xd0, 0x00 },
 157 };
 158
 159 static struct regdata mb86a20s_reset_reception[] = {
 160         { 0x70, 0xf0 },
 161         { 0x70, 0xff },
 162         { 0x08, 0x01 },
 163         { 0x08, 0x00 },
 164 };
 165
 166 /*
 167  * I2C read/write functions and macros
 168  */
 169
 170 static int mb86a20s_i2c_writereg(struct mb86a20s_state *state,
 171                              u8 i2c_addr, int reg, int data)
 172 {
 173         u8 buf[] = { reg, data };
 174         struct i2c_msg msg = {
 175                 .addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
 176         };
 177         int rc;
 178
 179         rc = i2c_transfer(state->i2c, &msg, 1);
 180         if (rc != 1) {
 181                 dev_err(&state->i2c->dev,
 182                         "%s: writereg error (rc == %i, reg == 0x%02x, data == 0x%02x)\n",
 183                         __func__, rc, reg, data);
 184                 return rc;
 185         }
 186
 187         return 0;
 188 }
 189
 190 static int mb86a20s_i2c_writeregdata(struct mb86a20s_state *state,
 191                                      u8 i2c_addr, struct regdata *rd, int size)
 192 {
 193         int i, rc;
 194
 195         for (i = 0; i < size; i++) {
 196                 rc = mb86a20s_i2c_writereg(state, i2c_addr, rd[i].reg,
 197                                            rd[i].data);
 198                 if (rc < 0)
 199                         return rc;
 200         }
 201         return 0;
 202 }
 203
 204 static int mb86a20s_i2c_readreg(struct mb86a20s_state *state,
 205                                 u8 i2c_addr, u8 reg)
 206 {
 207         u8 val;
 208         int rc;
 209         struct i2c_msg msg[] = {
 210                 { .addr = i2c_addr, .flags = 0, .buf = &reg, .len = 1 },
 211                 { .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }
 212         };
 213
 214         rc = i2c_transfer(state->i2c, msg, 2);
 215
 216         if (rc != 2) {
 217                 dev_err(&state->i2c->dev, "%s: reg=0x%x (error=%d)\n",
 218                         __func__, reg, rc);
 219                 return (rc < 0) ? rc : -EIO;
 220         }
 221
 222         return val;
 223 }
 224
 225 #define mb86a20s_readreg(state, reg) \
 226         mb86a20s_i2c_readreg(state, state->config->demod_address, reg)
 227 #define mb86a20s_writereg(state, reg, val) \
 228         mb86a20s_i2c_writereg(state, state->config->demod_address, reg, val)
 229 #define mb86a20s_writeregdata(state, regdata) \
 230         mb86a20s_i2c_writeregdata(state, state->config->demod_address, \
 231         regdata, ARRAY_SIZE(regdata))
 232
 233 static int mb86a20s_read_status(struct dvb_frontend *fe, fe_status_t *status)
 234 {
 235         struct mb86a20s_state *state = fe->demodulator_priv;
 236         int val;
 237
 238         *status = 0;
 239
 240         val = mb86a20s_readreg(state, 0x0a) & 0xf;
 241         if (val < 0)
 242                 return val;
 243
 244         if (val >= 2)
 245                 *status |= FE_HAS_SIGNAL;
 246
 247         if (val >= 4)
 248                 *status |= FE_HAS_CARRIER;
 249
 250         if (val >= 5)
 251                 *status |= FE_HAS_VITERBI;
 252
 253         if (val >= 7)
 254                 *status |= FE_HAS_SYNC;
 255
 256         if (val >= 8)                           /* Maybe 9? */
 257                 *status |= FE_HAS_LOCK;
 258
 259         dev_dbg(&state->i2c->dev, "%s: Status = 0x%02x (state = %d)\n",
 260                  __func__, *status, val);
 261
 262         return 0;
 263 }
 264
 265 static int mb86a20s_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
 266 {
 267         struct mb86a20s_state *state = fe->demodulator_priv;
 268         unsigned rf_max, rf_min, rf;
 269         u8       val;
 270
 271         if (fe->ops.i2c_gate_ctrl)
 272                 fe->ops.i2c_gate_ctrl(fe, 0);
 273
 274         /* Does a binary search to get RF strength */
 275         rf_max = 0xfff;
 276         rf_min = 0;
 277         do {
 278                 rf = (rf_max + rf_min) / 2;
 279                 mb86a20s_writereg(state, 0x04, 0x1f);
 280                 mb86a20s_writereg(state, 0x05, rf >> 8);
 281                 mb86a20s_writereg(state, 0x04, 0x20);
 282                 mb86a20s_writereg(state, 0x04, rf);
 283
 284                 val = mb86a20s_readreg(state, 0x02);
 285                 if (val & 0x08)
 286                         rf_min = (rf_max + rf_min) / 2;
 287                 else
 288                         rf_max = (rf_max + rf_min) / 2;
 289                 if (rf_max - rf_min < 4) {
 290                         *strength = (((rf_max + rf_min) / 2) * 65535) / 4095;
 291                         dev_dbg(&state->i2c->dev,
 292                                 "%s: signal strength = %d (%d < RF=%d < %d)\n",
 293                                 __func__, rf, rf_min, rf >> 4, rf_max);
 294                         break;
 295                 }
 296         } while (1);
 297
 298         if (fe->ops.i2c_gate_ctrl)
 299                 fe->ops.i2c_gate_ctrl(fe, 1);
 300
 301         return 0;
 302 }
 303
 304 static int mb86a20s_get_modulation(struct mb86a20s_state *state,
 305                                    unsigned layer)
 306 {
 307         int rc;
 308         static unsigned char reg[] = {
 309                 [0] = 0x86,     /* Layer A */
 310                 [1] = 0x8a,     /* Layer B */
 311                 [2] = 0x8e,     /* Layer C */
 312         };
 313
 314         if (layer >= ARRAY_SIZE(reg))
 315                 return -EINVAL;
 316         rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
 317         if (rc < 0)
 318                 return rc;
 319         rc = mb86a20s_readreg(state, 0x6e);
 320         if (rc < 0)
 321                 return rc;
 322         switch ((rc >> 4) & 0x07) {
 323         case 0:
 324                 return DQPSK;
 325         case 1:
 326                 return QPSK;
 327         case 2:
 328                 return QAM_16;
 329         case 3:
 330                 return QAM_64;
 331         default:
 332                 return QAM_AUTO;
 333         }
 334 }
 335
 336 static int mb86a20s_get_fec(struct mb86a20s_state *state,
 337                             unsigned layer)
 338 {
 339         int rc;
 340
 341         static unsigned char reg[] = {
 342                 [0] = 0x87,     /* Layer A */
 343                 [1] = 0x8b,     /* Layer B */
 344                 [2] = 0x8f,     /* Layer C */
 345         };
 346
 347         if (layer >= ARRAY_SIZE(reg))
 348                 return -EINVAL;
 349         rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
 350         if (rc < 0)
 351                 return rc;
 352         rc = mb86a20s_readreg(state, 0x6e);
 353         if (rc < 0)
 354                 return rc;
 355         switch ((rc >> 4) & 0x07) {
 356         case 0:
 357                 return FEC_1_2;
 358         case 1:
 359                 return FEC_2_3;
 360         case 2:
 361                 return FEC_3_4;
 362         case 3:
 363                 return FEC_5_6;
 364         case 4:
 365                 return FEC_7_8;
 366         default:
 367                 return FEC_AUTO;
 368         }
 369 }
 370
 371 static int mb86a20s_get_interleaving(struct mb86a20s_state *state,
 372                                      unsigned layer)
 373 {
 374         int rc;
 375
 376         static unsigned char reg[] = {
 377                 [0] = 0x88,     /* Layer A */
 378                 [1] = 0x8c,     /* Layer B */
 379                 [2] = 0x90,     /* Layer C */
 380         };
 381
 382         if (layer >= ARRAY_SIZE(reg))
 383                 return -EINVAL;
 384         rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
 385         if (rc < 0)
 386                 return rc;
 387         rc = mb86a20s_readreg(state, 0x6e);
 388         if (rc < 0)
 389                 return rc;
 390
 391         switch ((rc >> 4) & 0x07) {
 392         case 1:
 393                 return GUARD_INTERVAL_1_4;
 394         case 2:
 395                 return GUARD_INTERVAL_1_8;
 396         case 3:
 397                 return GUARD_INTERVAL_1_16;
 398         case 4:
 399                 return GUARD_INTERVAL_1_32;
 400
 401         default:
 402         case 0:
 403                 return GUARD_INTERVAL_AUTO;
 404         }
 405 }
 406
 407 static int mb86a20s_get_segment_count(struct mb86a20s_state *state,
 408                                       unsigned layer)
 409 {
 410         int rc, count;
 411         static unsigned char reg[] = {
 412                 [0] = 0x89,     /* Layer A */
 413                 [1] = 0x8d,     /* Layer B */
 414                 [2] = 0x91,     /* Layer C */
 415         };
 416
 417         dev_dbg(&state->i2c->dev, "%s called.\n", __func__);
 418
 419         if (layer >= ARRAY_SIZE(reg))
 420                 return -EINVAL;
 421
 422         rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
 423         if (rc < 0)
 424                 return rc;
 425         rc = mb86a20s_readreg(state, 0x6e);
 426         if (rc < 0)
 427                 return rc;
 428         count = (rc >> 4) & 0x0f;
 429
 430         dev_dbg(&state->i2c->dev, "%s: segments: %d.\n", __func__, count);
 431
 432         return count;
 433 }
 434
 435 static void mb86a20s_reset_frontend_cache(struct dvb_frontend *fe)
 436 {
 437         struct mb86a20s_state *state = fe->demodulator_priv;
 438         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 439
 440         dev_dbg(&state->i2c->dev, "%s called.\n", __func__);
 441
 442         /* Fixed parameters */
 443         c->delivery_system = SYS_ISDBT;
 444         c->bandwidth_hz = 6000000;
 445
 446         /* Initialize values that will be later autodetected */
 447         c->isdbt_layer_enabled = 0;
 448         c->transmission_mode = TRANSMISSION_MODE_AUTO;
 449         c->guard_interval = GUARD_INTERVAL_AUTO;
 450         c->isdbt_sb_mode = 0;
 451         c->isdbt_sb_segment_count = 0;
 452 }
 453
 454 static int mb86a20s_get_frontend(struct dvb_frontend *fe)
 455 {
 456         struct mb86a20s_state *state = fe->demodulator_priv;
 457         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 458         int i, rc;
 459
 460         dev_dbg(&state->i2c->dev, "%s called.\n", __func__);
 461
 462         /* Reset frontend cache to default values */
 463         mb86a20s_reset_frontend_cache(fe);
 464
 465         if (fe->ops.i2c_gate_ctrl)
 466                 fe->ops.i2c_gate_ctrl(fe, 0);
 467
 468         /* Check for partial reception */
 469         rc = mb86a20s_writereg(state, 0x6d, 0x85);
 470         if (rc < 0)
 471                 return rc;
 472         rc = mb86a20s_readreg(state, 0x6e);
 473         if (rc < 0)
 474                 return rc;
 475         c->isdbt_partial_reception = (rc & 0x10) ? 1 : 0;
 476
 477         /* Get per-layer data */
 478
 479         for (i = 0; i < 3; i++) {
 480                 dev_dbg(&state->i2c->dev, "%s: getting data for layer %c.\n",
 481                         __func__, 'A' + i);
 482
 483                 rc = mb86a20s_get_segment_count(state, i);
 484                 if (rc < 0)
 485                         goto noperlayer_error;
 486                 if (rc >= 0 && rc < 14)
 487                         c->layer[i].segment_count = rc;
 488                 else {
 489                         c->layer[i].segment_count = 0;
 490                         continue;
 491                 }
 492                 c->isdbt_layer_enabled |= 1 << i;
 493                 rc = mb86a20s_get_modulation(state, i);
 494                 if (rc < 0)
 495                         goto noperlayer_error;
 496                 dev_dbg(&state->i2c->dev, "%s: modulation %d.\n",
 497                         __func__, rc);
 498                 c->layer[i].modulation = rc;
 499                 rc = mb86a20s_get_fec(state, i);
 500                 if (rc < 0)
 501                         goto noperlayer_error;
 502                 dev_dbg(&state->i2c->dev, "%s: FEC %d.\n",
 503                         __func__, rc);
 504                 c->layer[i].fec = rc;
 505                 rc = mb86a20s_get_interleaving(state, i);
 506                 if (rc < 0)
 507                         goto noperlayer_error;
 508                 dev_dbg(&state->i2c->dev, "%s: interleaving %d.\n",
 509                         __func__, rc);
 510                 c->layer[i].interleaving = rc;
 511         }
 512
 513         rc = mb86a20s_writereg(state, 0x6d, 0x84);
 514         if (rc < 0)
 515                 return rc;
 516         if ((rc & 0x60) == 0x20) {
 517                 c->isdbt_sb_mode = 1;
 518                 /* At least, one segment should exist */
 519                 if (!c->isdbt_sb_segment_count)
 520                         c->isdbt_sb_segment_count = 1;
 521         }
 522
 523         /* Get transmission mode and guard interval */
 524         rc = mb86a20s_readreg(state, 0x07);
 525         if (rc < 0)
 526                 return rc;
 527         if ((rc & 0x60) == 0x20) {
 528                 switch (rc & 0x0c >> 2) {
 529                 case 0:
 530                         c->transmission_mode = TRANSMISSION_MODE_2K;
 531                         break;
 532                 case 1:
 533                         c->transmission_mode = TRANSMISSION_MODE_4K;
 534                         break;
 535                 case 2:
 536                         c->transmission_mode = TRANSMISSION_MODE_8K;
 537                         break;
 538                 }
 539         }
 540         if (!(rc & 0x10)) {
 541                 switch (rc & 0x3) {
 542                 case 0:
 543                         c->guard_interval = GUARD_INTERVAL_1_4;
 544                         break;
 545                 case 1:
 546                         c->guard_interval = GUARD_INTERVAL_1_8;
 547                         break;
 548                 case 2:
 549                         c->guard_interval = GUARD_INTERVAL_1_16;
 550                         break;
 551                 }
 552         }
 553
 554 noperlayer_error:
 555         if (fe->ops.i2c_gate_ctrl)
 556                 fe->ops.i2c_gate_ctrl(fe, 1);
 557
 558         return rc;
 559
 560 }
 561
 562 static int mb86a20s_initfe(struct dvb_frontend *fe)
 563 {
 564         struct mb86a20s_state *state = fe->demodulator_priv;
 565         int rc;
 566         u8  regD5 = 1;
 567
 568         dev_dbg(&state->i2c->dev, "%s called.\n", __func__);
 569
 570         if (fe->ops.i2c_gate_ctrl)
 571                 fe->ops.i2c_gate_ctrl(fe, 0);
 572
 573         /* Initialize the frontend */
 574         rc = mb86a20s_writeregdata(state, mb86a20s_init);
 575         if (rc < 0)
 576                 goto err;
 577
 578         if (!state->config->is_serial) {
 579                 regD5 &= ~1;
 580
 581                 rc = mb86a20s_writereg(state, 0x50, 0xd5);
 582                 if (rc < 0)
 583                         goto err;
 584                 rc = mb86a20s_writereg(state, 0x51, regD5);
 585                 if (rc < 0)
 586                         goto err;
 587         }
 588
 589 err:
 590         if (fe->ops.i2c_gate_ctrl)
 591                 fe->ops.i2c_gate_ctrl(fe, 1);
 592
 593         if (rc < 0) {
 594                 state->need_init = true;
 595                 dev_info(&state->i2c->dev,
 596                          "mb86a20s: Init failed. Will try again later\n");
 597         } else {
 598                 state->need_init = false;
 599                 dev_dbg(&state->i2c->dev, "Initialization succeeded.\n");
 600         }
 601         return rc;
 602 }
 603
 604 static int mb86a20s_set_frontend(struct dvb_frontend *fe)
 605 {
 606         struct mb86a20s_state *state = fe->demodulator_priv;
 607         int rc;
 608 #if 0
 609         /*
 610          * FIXME: Properly implement the set frontend properties
 611          */
 612         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 613 #endif
 614         dev_dbg(&state->i2c->dev, "%s called.\n", __func__);
 615
 616         /*
 617          * Gate should already be opened, but it doesn't hurt to
 618          * double-check
 619          */
 620         if (fe->ops.i2c_gate_ctrl)
 621                 fe->ops.i2c_gate_ctrl(fe, 1);
 622         fe->ops.tuner_ops.set_params(fe);
 623
 624         /*
 625          * Make it more reliable: if, for some reason, the initial
 626          * device initialization doesn't happen, initialize it when
 627          * a SBTVD parameters are adjusted.
 628          *
 629          * Unfortunately, due to a hard to track bug at tda829x/tda18271,
 630          * the agc callback logic is not called during DVB attach time,
 631          * causing mb86a20s to not be initialized with Kworld SBTVD.
 632          * So, this hack is needed, in order to make Kworld SBTVD to work.
 633          */
 634         if (state->need_init)
 635                 mb86a20s_initfe(fe);
 636
 637         if (fe->ops.i2c_gate_ctrl)
 638                 fe->ops.i2c_gate_ctrl(fe, 0);
 639         rc = mb86a20s_writeregdata(state, mb86a20s_reset_reception);
 640         if (fe->ops.i2c_gate_ctrl)
 641                 fe->ops.i2c_gate_ctrl(fe, 1);
 642
 643         return rc;
 644 }
 645
 646 static int mb86a20s_read_status_gate(struct dvb_frontend *fe,
 647                                      fe_status_t *status)
 648 {
 649         int ret;
 650
 651         *status = 0;
 652
 653         if (fe->ops.i2c_gate_ctrl)
 654                 fe->ops.i2c_gate_ctrl(fe, 0);
 655
 656         ret = mb86a20s_read_status(fe, status);
 657
 658         if (fe->ops.i2c_gate_ctrl)
 659                 fe->ops.i2c_gate_ctrl(fe, 1);
 660
 661         return ret;
 662 }
 663
 664 static int mb86a20s_tune(struct dvb_frontend *fe,
 665                         bool re_tune,
 666                         unsigned int mode_flags,
 667                         unsigned int *delay,
 668                         fe_status_t *status)
 669 {
 670         struct mb86a20s_state *state = fe->demodulator_priv;
 671         int rc = 0;
 672
 673         dev_dbg(&state->i2c->dev, "%s called.\n", __func__);
 674
 675         if (re_tune)
 676                 rc = mb86a20s_set_frontend(fe);
 677
 678         if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
 679                 mb86a20s_read_status_gate(fe, status);
 680
 681         return rc;
 682 }
 683
 684 static void mb86a20s_release(struct dvb_frontend *fe)
 685 {
 686         struct mb86a20s_state *state = fe->demodulator_priv;
 687
 688         dev_dbg(&state->i2c->dev, "%s called.\n", __func__);
 689
 690         kfree(state);
 691 }
 692
 693 static struct dvb_frontend_ops mb86a20s_ops;
 694
 695 struct dvb_frontend *mb86a20s_attach(const struct mb86a20s_config *config,
 696                                     struct i2c_adapter *i2c)
 697 {
 698         struct mb86a20s_state *state;
 699         u8      rev;
 700
 701         /* allocate memory for the internal state */
 702         state = kzalloc(sizeof(struct mb86a20s_state), GFP_KERNEL);
 703
 704         dev_dbg(&state->i2c->dev, "%s called.\n", __func__);
 705         if (state == NULL) {
 706                 dev_err(&state->i2c->dev,
 707                         "%s: unable to allocate memory for state\n", __func__);
 708                 goto error;
 709         }
 710
 711         /* setup the state */
 712         state->config = config;
 713         state->i2c = i2c;
 714
 715         /* create dvb_frontend */
 716         memcpy(&state->frontend.ops, &mb86a20s_ops,
 717                 sizeof(struct dvb_frontend_ops));
 718         state->frontend.demodulator_priv = state;
 719
 720         /* Check if it is a mb86a20s frontend */
 721         rev = mb86a20s_readreg(state, 0);
 722
 723         if (rev == 0x13) {
 724                 dev_info(&state->i2c->dev,
 725                          "Detected a Fujitsu mb86a20s frontend\n");
 726         } else {
 727                 dev_dbg(&state->i2c->dev,
 728                         "Frontend revision %d is unknown - aborting.\n",
 729                        rev);
 730                 goto error;
 731         }
 732
 733         return &state->frontend;
 734
 735 error:
 736         kfree(state);
 737         return NULL;
 738 }
 739 EXPORT_SYMBOL(mb86a20s_attach);
 740
 741 static struct dvb_frontend_ops mb86a20s_ops = {
 742         .delsys = { SYS_ISDBT },
 743         /* Use dib8000 values per default */
 744         .info = {
 745                 .name = "Fujitsu mb86A20s",
 746                 .caps = FE_CAN_INVERSION_AUTO | FE_CAN_RECOVER |
 747                         FE_CAN_FEC_1_2  | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
 748                         FE_CAN_FEC_5_6  | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
 749                         FE_CAN_QPSK     | FE_CAN_QAM_16  | FE_CAN_QAM_64 |
 750                         FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_QAM_AUTO |
 751                         FE_CAN_GUARD_INTERVAL_AUTO    | FE_CAN_HIERARCHY_AUTO,
 752                 /* Actually, those values depend on the used tuner */
 753                 .frequency_min = 45000000,
 754                 .frequency_max = 864000000,
 755                 .frequency_stepsize = 62500,
 756         },
 757
 758         .release = mb86a20s_release,
 759
 760         .init = mb86a20s_initfe,
 761         .set_frontend = mb86a20s_set_frontend,
 762         .get_frontend = mb86a20s_get_frontend,
 763         .read_status = mb86a20s_read_status_gate,
 764         .read_signal_strength = mb86a20s_read_signal_strength,
 765         .tune = mb86a20s_tune,
 766 };
 767
 768 MODULE_DESCRIPTION("DVB Frontend module for Fujitsu mb86A20s hardware");
 769 MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
 770 MODULE_LICENSE("GPL");