2 * Panasonic MN88473 DVB-T/T2/C demodulator driver
4 * Copyright (C) 2014 Antti Palosaari <crope@iki.fi>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include "mn88473_priv.h"
19 static int mn88473_get_tune_settings(struct dvb_frontend
*fe
,
20 struct dvb_frontend_tune_settings
*s
)
22 s
->min_delay_ms
= 1000;
26 static int mn88473_set_frontend(struct dvb_frontend
*fe
)
28 struct i2c_client
*client
= fe
->demodulator_priv
;
29 struct mn88473_dev
*dev
= i2c_get_clientdata(client
);
30 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
34 u8 delivery_system_val
, if_val
[3], *conf_val_ptr
;
35 u8 reg_bank2_2d_val
, reg_bank0_d2_val
;
38 "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
39 c
->delivery_system
, c
->modulation
, c
->frequency
,
40 c
->bandwidth_hz
, c
->symbol_rate
, c
->inversion
, c
->stream_id
);
47 switch (c
->delivery_system
) {
49 delivery_system_val
= 0x02;
50 reg_bank2_2d_val
= 0x23;
51 reg_bank0_d2_val
= 0x2a;
54 delivery_system_val
= 0x03;
55 reg_bank2_2d_val
= 0x3b;
56 reg_bank0_d2_val
= 0x29;
58 case SYS_DVBC_ANNEX_A
:
59 delivery_system_val
= 0x04;
60 reg_bank2_2d_val
= 0x3b;
61 reg_bank0_d2_val
= 0x29;
68 switch (c
->delivery_system
) {
71 switch (c
->bandwidth_hz
) {
73 conf_val_ptr
= "\xe9\x55\x55\x1c\x29\x1c\x29";
76 conf_val_ptr
= "\xc8\x00\x00\x17\x0a\x17\x0a";
79 conf_val_ptr
= "\xaf\x00\x00\x11\xec\x11\xec";
86 case SYS_DVBC_ANNEX_A
:
87 conf_val_ptr
= "\x10\xab\x0d\xae\x1d\x9d";
94 if (fe
->ops
.tuner_ops
.set_params
) {
95 ret
= fe
->ops
.tuner_ops
.set_params(fe
);
100 if (fe
->ops
.tuner_ops
.get_if_frequency
) {
101 ret
= fe
->ops
.tuner_ops
.get_if_frequency(fe
, &if_frequency
);
105 dev_dbg(&client
->dev
, "get_if_frequency=%u\n", if_frequency
);
111 /* Calculate IF registers */
112 uitmp
= DIV_ROUND_CLOSEST_ULL((u64
) if_frequency
* 0x1000000, dev
->clk
);
113 if_val
[0] = (uitmp
>> 16) & 0xff;
114 if_val
[1] = (uitmp
>> 8) & 0xff;
115 if_val
[2] = (uitmp
>> 0) & 0xff;
117 ret
= regmap_write(dev
->regmap
[2], 0x05, 0x00);
120 ret
= regmap_write(dev
->regmap
[2], 0xfb, 0x13);
123 ret
= regmap_write(dev
->regmap
[2], 0xef, 0x13);
126 ret
= regmap_write(dev
->regmap
[2], 0xf9, 0x13);
129 ret
= regmap_write(dev
->regmap
[2], 0x00, 0x18);
132 ret
= regmap_write(dev
->regmap
[2], 0x01, 0x01);
135 ret
= regmap_write(dev
->regmap
[2], 0x02, 0x21);
138 ret
= regmap_write(dev
->regmap
[2], 0x03, delivery_system_val
);
141 ret
= regmap_write(dev
->regmap
[2], 0x0b, 0x00);
145 for (i
= 0; i
< sizeof(if_val
); i
++) {
146 ret
= regmap_write(dev
->regmap
[2], 0x10 + i
, if_val
[i
]);
151 switch (c
->delivery_system
) {
154 for (i
= 0; i
< 7; i
++) {
155 ret
= regmap_write(dev
->regmap
[2], 0x13 + i
,
161 case SYS_DVBC_ANNEX_A
:
162 ret
= regmap_bulk_write(dev
->regmap
[1], 0x10, conf_val_ptr
, 6);
170 ret
= regmap_write(dev
->regmap
[2], 0x2d, reg_bank2_2d_val
);
173 ret
= regmap_write(dev
->regmap
[2], 0x2e, 0x00);
176 ret
= regmap_write(dev
->regmap
[2], 0x56, 0x0d);
179 ret
= regmap_bulk_write(dev
->regmap
[0], 0x01,
180 "\xba\x13\x80\xba\x91\xdd\xe7\x28", 8);
183 ret
= regmap_write(dev
->regmap
[0], 0x0a, 0x1a);
186 ret
= regmap_write(dev
->regmap
[0], 0x13, 0x1f);
189 ret
= regmap_write(dev
->regmap
[0], 0x19, 0x03);
192 ret
= regmap_write(dev
->regmap
[0], 0x1d, 0xb0);
195 ret
= regmap_write(dev
->regmap
[0], 0x2a, 0x72);
198 ret
= regmap_write(dev
->regmap
[0], 0x2d, 0x00);
201 ret
= regmap_write(dev
->regmap
[0], 0x3c, 0x00);
204 ret
= regmap_write(dev
->regmap
[0], 0x3f, 0xf8);
207 ret
= regmap_bulk_write(dev
->regmap
[0], 0x40, "\xf4\x08", 2);
210 ret
= regmap_write(dev
->regmap
[0], 0xd2, reg_bank0_d2_val
);
213 ret
= regmap_write(dev
->regmap
[0], 0xd4, 0x55);
216 ret
= regmap_write(dev
->regmap
[1], 0xbe, 0x08);
219 ret
= regmap_write(dev
->regmap
[0], 0xb2, 0x37);
222 ret
= regmap_write(dev
->regmap
[0], 0xd7, 0x04);
227 if (c
->delivery_system
== SYS_DVBT2
) {
228 ret
= regmap_write(dev
->regmap
[2], 0x36, c
->stream_id
);
234 ret
= regmap_write(dev
->regmap
[2], 0xf8, 0x9f);
240 dev_dbg(&client
->dev
, "failed=%d\n", ret
);
244 static int mn88473_read_status(struct dvb_frontend
*fe
, enum fe_status
*status
)
246 struct i2c_client
*client
= fe
->demodulator_priv
;
247 struct mn88473_dev
*dev
= i2c_get_clientdata(client
);
248 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
250 unsigned int utmp
, utmp1
, utmp2
;
259 switch (c
->delivery_system
) {
261 ret
= regmap_read(dev
->regmap
[0], 0x62, &utmp
);
265 if (!(utmp
& 0xa0)) {
266 if ((utmp
& 0x0f) >= 0x09)
267 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
|
268 FE_HAS_VITERBI
| FE_HAS_SYNC
|
270 else if ((utmp
& 0x0f) >= 0x03)
271 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
;
277 ret
= regmap_read(dev
->regmap
[2], 0x8b, &utmp
);
281 if (!(utmp
& 0x40)) {
282 if ((utmp
& 0x0f) >= 0x0d)
283 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
|
284 FE_HAS_VITERBI
| FE_HAS_SYNC
|
286 else if ((utmp
& 0x0f) >= 0x0a)
287 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
|
289 else if ((utmp
& 0x0f) >= 0x07)
290 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
;
295 case SYS_DVBC_ANNEX_A
:
296 ret
= regmap_read(dev
->regmap
[1], 0x85, &utmp
);
300 if (!(utmp
& 0x40)) {
301 ret
= regmap_read(dev
->regmap
[1], 0x89, &utmp
);
306 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
|
307 FE_HAS_VITERBI
| FE_HAS_SYNC
|
318 /* Signal strength */
319 if (*status
& FE_HAS_SIGNAL
) {
320 for (i
= 0; i
< 2; i
++) {
321 ret
= regmap_bulk_read(dev
->regmap
[2], 0x86 + i
,
327 /* AGCRD[15:6] gives us a 10bit value ([5:0] are always 0) */
328 utmp1
= buf
[0] << 8 | buf
[1] << 0 | buf
[0] >> 2;
329 dev_dbg(&client
->dev
, "strength=%u\n", utmp1
);
331 c
->strength
.stat
[0].scale
= FE_SCALE_RELATIVE
;
332 c
->strength
.stat
[0].uvalue
= utmp1
;
334 c
->strength
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
338 if (*status
& FE_HAS_VITERBI
&& c
->delivery_system
== SYS_DVBT
) {
340 ret
= regmap_bulk_read(dev
->regmap
[0], 0x8f, buf
, 2);
344 utmp
= buf
[0] << 8 | buf
[1] << 0;
346 /* CNR[dB]: 10 * (log10(65536 / value) + 0.2) */
347 /* log10(65536) = 80807124, 0.2 = 3355443 */
348 stmp
= div_u64(((u64
)80807124 - intlog10(utmp
)
349 + 3355443) * 10000, 1 << 24);
350 dev_dbg(&client
->dev
, "cnr=%d value=%u\n", stmp
, utmp
);
355 c
->cnr
.stat
[0].svalue
= stmp
;
356 c
->cnr
.stat
[0].scale
= FE_SCALE_DECIBEL
;
357 } else if (*status
& FE_HAS_VITERBI
&&
358 c
->delivery_system
== SYS_DVBT2
) {
360 for (i
= 0; i
< 3; i
++) {
361 ret
= regmap_bulk_read(dev
->regmap
[2], 0xb7 + i
,
367 utmp
= buf
[1] << 8 | buf
[2] << 0;
368 utmp1
= (buf
[0] >> 2) & 0x01; /* 0=SISO, 1=MISO */
371 /* CNR[dB]: 10 * (log10(16384 / value) - 0.6) */
372 /* log10(16384) = 70706234, 0.6 = 10066330 */
373 stmp
= div_u64(((u64
)70706234 - intlog10(utmp
)
374 - 10066330) * 10000, 1 << 24);
375 dev_dbg(&client
->dev
, "cnr=%d value=%u MISO\n",
378 /* CNR[dB]: 10 * (log10(65536 / value) + 0.2) */
379 /* log10(65536) = 80807124, 0.2 = 3355443 */
380 stmp
= div_u64(((u64
)80807124 - intlog10(utmp
)
381 + 3355443) * 10000, 1 << 24);
382 dev_dbg(&client
->dev
, "cnr=%d value=%u SISO\n",
389 c
->cnr
.stat
[0].svalue
= stmp
;
390 c
->cnr
.stat
[0].scale
= FE_SCALE_DECIBEL
;
391 } else if (*status
& FE_HAS_VITERBI
&&
392 c
->delivery_system
== SYS_DVBC_ANNEX_A
) {
394 ret
= regmap_bulk_read(dev
->regmap
[1], 0xa1, buf
, 4);
398 utmp1
= buf
[0] << 8 | buf
[1] << 0; /* signal */
399 utmp2
= buf
[2] << 8 | buf
[3] << 0; /* noise */
400 if (utmp1
&& utmp2
) {
401 /* CNR[dB]: 10 * log10(8 * (signal / noise)) */
402 /* log10(8) = 15151336 */
403 stmp
= div_u64(((u64
)15151336 + intlog10(utmp1
)
404 - intlog10(utmp2
)) * 10000, 1 << 24);
405 dev_dbg(&client
->dev
, "cnr=%d signal=%u noise=%u\n",
411 c
->cnr
.stat
[0].svalue
= stmp
;
412 c
->cnr
.stat
[0].scale
= FE_SCALE_DECIBEL
;
414 c
->cnr
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
418 if (*status
& FE_HAS_LOCK
&& (c
->delivery_system
== SYS_DVBT
||
419 c
->delivery_system
== SYS_DVBC_ANNEX_A
)) {
420 /* DVB-T & DVB-C BER */
421 ret
= regmap_bulk_read(dev
->regmap
[0], 0x92, buf
, 5);
425 utmp1
= buf
[0] << 16 | buf
[1] << 8 | buf
[2] << 0;
426 utmp2
= buf
[3] << 8 | buf
[4] << 0;
427 utmp2
= utmp2
* 8 * 204;
428 dev_dbg(&client
->dev
, "post_bit_error=%u post_bit_count=%u\n",
431 c
->post_bit_error
.stat
[0].scale
= FE_SCALE_COUNTER
;
432 c
->post_bit_error
.stat
[0].uvalue
+= utmp1
;
433 c
->post_bit_count
.stat
[0].scale
= FE_SCALE_COUNTER
;
434 c
->post_bit_count
.stat
[0].uvalue
+= utmp2
;
436 c
->post_bit_error
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
437 c
->post_bit_count
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
441 if (*status
& FE_HAS_LOCK
) {
442 ret
= regmap_bulk_read(dev
->regmap
[0], 0xdd, buf
, 4);
446 utmp1
= buf
[0] << 8 | buf
[1] << 0;
447 utmp2
= buf
[2] << 8 | buf
[3] << 0;
448 dev_dbg(&client
->dev
, "block_error=%u block_count=%u\n",
451 c
->block_error
.stat
[0].scale
= FE_SCALE_COUNTER
;
452 c
->block_error
.stat
[0].uvalue
+= utmp1
;
453 c
->block_count
.stat
[0].scale
= FE_SCALE_COUNTER
;
454 c
->block_count
.stat
[0].uvalue
+= utmp2
;
456 c
->block_error
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
457 c
->block_count
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
462 dev_dbg(&client
->dev
, "failed=%d\n", ret
);
466 static int mn88473_init(struct dvb_frontend
*fe
)
468 struct i2c_client
*client
= fe
->demodulator_priv
;
469 struct mn88473_dev
*dev
= i2c_get_clientdata(client
);
470 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
471 int ret
, len
, remain
;
473 const struct firmware
*fw
;
474 const char *name
= MN88473_FIRMWARE
;
476 dev_dbg(&client
->dev
, "\n");
478 /* Check if firmware is already running */
479 ret
= regmap_read(dev
->regmap
[0], 0xf5, &uitmp
);
486 /* Request the firmware, this will block and timeout */
487 ret
= request_firmware(&fw
, name
, &client
->dev
);
489 dev_err(&client
->dev
, "firmware file '%s' not found\n", name
);
493 dev_info(&client
->dev
, "downloading firmware from file '%s'\n", name
);
495 ret
= regmap_write(dev
->regmap
[0], 0xf5, 0x03);
497 goto err_release_firmware
;
499 for (remain
= fw
->size
; remain
> 0; remain
-= (dev
->i2c_wr_max
- 1)) {
500 len
= min(dev
->i2c_wr_max
- 1, remain
);
501 ret
= regmap_bulk_write(dev
->regmap
[0], 0xf6,
502 &fw
->data
[fw
->size
- remain
], len
);
504 dev_err(&client
->dev
, "firmware download failed %d\n",
506 goto err_release_firmware
;
510 release_firmware(fw
);
512 /* Parity check of firmware */
513 ret
= regmap_read(dev
->regmap
[0], 0xf8, &uitmp
);
518 dev_err(&client
->dev
, "firmware parity check failed\n");
523 ret
= regmap_write(dev
->regmap
[0], 0xf5, 0x00);
528 ret
= regmap_write(dev
->regmap
[2], 0x09, 0x08);
531 ret
= regmap_write(dev
->regmap
[2], 0x08, 0x1d);
537 /* init stats here to indicate which stats are supported */
539 c
->strength
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
541 c
->cnr
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
542 c
->post_bit_error
.len
= 1;
543 c
->post_bit_error
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
544 c
->post_bit_count
.len
= 1;
545 c
->post_bit_count
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
546 c
->block_error
.len
= 1;
547 c
->block_error
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
548 c
->block_count
.len
= 1;
549 c
->block_count
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
552 err_release_firmware
:
553 release_firmware(fw
);
555 dev_dbg(&client
->dev
, "failed=%d\n", ret
);
559 static int mn88473_sleep(struct dvb_frontend
*fe
)
561 struct i2c_client
*client
= fe
->demodulator_priv
;
562 struct mn88473_dev
*dev
= i2c_get_clientdata(client
);
565 dev_dbg(&client
->dev
, "\n");
569 ret
= regmap_write(dev
->regmap
[2], 0x05, 0x3e);
575 dev_dbg(&client
->dev
, "failed=%d\n", ret
);
579 static const struct dvb_frontend_ops mn88473_ops
= {
580 .delsys
= {SYS_DVBT
, SYS_DVBT2
, SYS_DVBC_ANNEX_A
},
582 .name
= "Panasonic MN88473",
583 .symbol_rate_min
= 1000000,
584 .symbol_rate_max
= 7200000,
585 .caps
= FE_CAN_FEC_1_2
|
598 FE_CAN_TRANSMISSION_MODE_AUTO
|
599 FE_CAN_GUARD_INTERVAL_AUTO
|
600 FE_CAN_HIERARCHY_AUTO
|
602 FE_CAN_2G_MODULATION
|
606 .get_tune_settings
= mn88473_get_tune_settings
,
608 .init
= mn88473_init
,
609 .sleep
= mn88473_sleep
,
611 .set_frontend
= mn88473_set_frontend
,
613 .read_status
= mn88473_read_status
,
616 static int mn88473_probe(struct i2c_client
*client
,
617 const struct i2c_device_id
*id
)
619 struct mn88473_config
*config
= client
->dev
.platform_data
;
620 struct mn88473_dev
*dev
;
623 static const struct regmap_config regmap_config
= {
628 dev_dbg(&client
->dev
, "\n");
630 /* Caller really need to provide pointer for frontend we create */
631 if (config
->fe
== NULL
) {
632 dev_err(&client
->dev
, "frontend pointer not defined\n");
637 dev
= kzalloc(sizeof(*dev
), GFP_KERNEL
);
643 if (config
->i2c_wr_max
)
644 dev
->i2c_wr_max
= config
->i2c_wr_max
;
646 dev
->i2c_wr_max
= ~0;
649 dev
->clk
= config
->xtal
;
652 dev
->client
[0] = client
;
653 dev
->regmap
[0] = regmap_init_i2c(dev
->client
[0], ®map_config
);
654 if (IS_ERR(dev
->regmap
[0])) {
655 ret
= PTR_ERR(dev
->regmap
[0]);
660 * Chip has three I2C addresses for different register banks. Used
661 * addresses are 0x18, 0x1a and 0x1c. We register two dummy clients,
662 * 0x1a and 0x1c, in order to get own I2C client for each register bank.
664 * Also, register bank 2 do not support sequential I/O. Only single
665 * register write or read is allowed to that bank.
667 dev
->client
[1] = i2c_new_dummy(client
->adapter
, 0x1a);
668 if (dev
->client
[1] == NULL
) {
670 dev_err(&client
->dev
, "I2C registration failed\n");
672 goto err_regmap_0_regmap_exit
;
674 dev
->regmap
[1] = regmap_init_i2c(dev
->client
[1], ®map_config
);
675 if (IS_ERR(dev
->regmap
[1])) {
676 ret
= PTR_ERR(dev
->regmap
[1]);
677 goto err_client_1_i2c_unregister_device
;
679 i2c_set_clientdata(dev
->client
[1], dev
);
681 dev
->client
[2] = i2c_new_dummy(client
->adapter
, 0x1c);
682 if (dev
->client
[2] == NULL
) {
684 dev_err(&client
->dev
, "2nd I2C registration failed\n");
686 goto err_regmap_1_regmap_exit
;
688 dev
->regmap
[2] = regmap_init_i2c(dev
->client
[2], ®map_config
);
689 if (IS_ERR(dev
->regmap
[2])) {
690 ret
= PTR_ERR(dev
->regmap
[2]);
691 goto err_client_2_i2c_unregister_device
;
693 i2c_set_clientdata(dev
->client
[2], dev
);
695 /* Check demod answers with correct chip id */
696 ret
= regmap_read(dev
->regmap
[2], 0xff, &uitmp
);
698 goto err_regmap_2_regmap_exit
;
700 dev_dbg(&client
->dev
, "chip id=%02x\n", uitmp
);
704 goto err_regmap_2_regmap_exit
;
707 /* Sleep because chip is active by default */
708 ret
= regmap_write(dev
->regmap
[2], 0x05, 0x3e);
710 goto err_regmap_2_regmap_exit
;
712 /* Create dvb frontend */
713 memcpy(&dev
->frontend
.ops
, &mn88473_ops
, sizeof(dev
->frontend
.ops
));
714 dev
->frontend
.demodulator_priv
= client
;
715 *config
->fe
= &dev
->frontend
;
716 i2c_set_clientdata(client
, dev
);
718 dev_info(&client
->dev
, "Panasonic MN88473 successfully identified\n");
721 err_regmap_2_regmap_exit
:
722 regmap_exit(dev
->regmap
[2]);
723 err_client_2_i2c_unregister_device
:
724 i2c_unregister_device(dev
->client
[2]);
725 err_regmap_1_regmap_exit
:
726 regmap_exit(dev
->regmap
[1]);
727 err_client_1_i2c_unregister_device
:
728 i2c_unregister_device(dev
->client
[1]);
729 err_regmap_0_regmap_exit
:
730 regmap_exit(dev
->regmap
[0]);
734 dev_dbg(&client
->dev
, "failed=%d\n", ret
);
738 static int mn88473_remove(struct i2c_client
*client
)
740 struct mn88473_dev
*dev
= i2c_get_clientdata(client
);
742 dev_dbg(&client
->dev
, "\n");
744 regmap_exit(dev
->regmap
[2]);
745 i2c_unregister_device(dev
->client
[2]);
747 regmap_exit(dev
->regmap
[1]);
748 i2c_unregister_device(dev
->client
[1]);
750 regmap_exit(dev
->regmap
[0]);
757 static const struct i2c_device_id mn88473_id_table
[] = {
761 MODULE_DEVICE_TABLE(i2c
, mn88473_id_table
);
763 static struct i2c_driver mn88473_driver
= {
766 .suppress_bind_attrs
= true,
768 .probe
= mn88473_probe
,
769 .remove
= mn88473_remove
,
770 .id_table
= mn88473_id_table
,
773 module_i2c_driver(mn88473_driver
);
775 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
776 MODULE_DESCRIPTION("Panasonic MN88473 DVB-T/T2/C demodulator driver");
777 MODULE_LICENSE("GPL");
778 MODULE_FIRMWARE(MN88473_FIRMWARE
);