2 * Support for NXT2002 and NXT2004 - VSB/QAM
4 * Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
5 * Copyright (C) 2006 Michael Krufky <mkrufky@m1k.net>
6 * based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
7 * and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 * NOTES ABOUT THIS DRIVER
28 * This Linux driver supports:
29 * B2C2/BBTI Technisat Air2PC - ATSC (NXT2002)
30 * AverTVHD MCE A180 (NXT2004)
31 * ATI HDTV Wonder (NXT2004)
33 * This driver needs external firmware. Please use the command
34 * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" or
35 * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2004" to
36 * download/extract the appropriate firmware, and then copy it to
37 * /usr/lib/hotplug/firmware/ or /lib/firmware/
38 * (depending on configuration of firmware hotplug).
40 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
42 #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
43 #define NXT2004_DEFAULT_FIRMWARE "dvb-fe-nxt2004.fw"
44 #define CRC_CCIT_MASK 0x1021
46 #include <linux/kernel.h>
47 #include <linux/init.h>
48 #include <linux/module.h>
49 #include <linux/slab.h>
50 #include <linux/string.h>
52 #include "dvb_frontend.h"
55 struct nxt200x_state
{
57 struct i2c_adapter
* i2c
;
58 const struct nxt200x_config
* config
;
59 struct dvb_frontend frontend
;
61 /* demodulator private data */
62 nxt_chip_type demod_chip
;
67 #define dprintk(args...) do { if (debug) pr_debug(args); } while (0)
69 static int i2c_writebytes (struct nxt200x_state
* state
, u8 addr
, u8
*buf
, u8 len
)
72 struct i2c_msg msg
= { .addr
= addr
, .flags
= 0, .buf
= buf
, .len
= len
};
74 if ((err
= i2c_transfer (state
->i2c
, &msg
, 1)) != 1) {
75 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
82 static int i2c_readbytes(struct nxt200x_state
*state
, u8 addr
, u8
*buf
, u8 len
)
85 struct i2c_msg msg
= { .addr
= addr
, .flags
= I2C_M_RD
, .buf
= buf
, .len
= len
};
87 if ((err
= i2c_transfer (state
->i2c
, &msg
, 1)) != 1) {
88 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
95 static int nxt200x_writebytes (struct nxt200x_state
* state
, u8 reg
,
96 const u8
*buf
, u8 len
)
100 struct i2c_msg msg
= { .addr
= state
->config
->demod_address
, .flags
= 0, .buf
= buf2
, .len
= len
+ 1 };
103 memcpy(&buf2
[1], buf
, len
);
105 if ((err
= i2c_transfer (state
->i2c
, &msg
, 1)) != 1) {
106 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
107 __func__
, state
->config
->demod_address
, err
);
113 static int nxt200x_readbytes(struct nxt200x_state
*state
, u8 reg
, u8
*buf
, u8 len
)
115 u8 reg2
[] = { reg
};
117 struct i2c_msg msg
[] = { { .addr
= state
->config
->demod_address
, .flags
= 0, .buf
= reg2
, .len
= 1 },
118 { .addr
= state
->config
->demod_address
, .flags
= I2C_M_RD
, .buf
= buf
, .len
= len
} };
122 if ((err
= i2c_transfer (state
->i2c
, msg
, 2)) != 2) {
123 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
124 __func__
, state
->config
->demod_address
, err
);
130 static u16
nxt200x_crc(u16 crc
, u8 c
)
133 u16 input
= (u16
) c
& 0xFF;
137 if((crc
^input
) & 0x8000)
138 crc
=(crc
<<1)^CRC_CCIT_MASK
;
146 static int nxt200x_writereg_multibyte (struct nxt200x_state
* state
, u8 reg
, u8
* data
, u8 len
)
149 dprintk("%s\n", __func__
);
151 /* set mutli register register */
152 nxt200x_writebytes(state
, 0x35, ®
, 1);
154 /* send the actual data */
155 nxt200x_writebytes(state
, 0x36, data
, len
);
157 switch (state
->demod_chip
) {
163 /* probably not right, but gives correct values */
171 len2
= ((attr
<< 4) | 0x10) | len
;
179 /* set multi register length */
180 nxt200x_writebytes(state
, 0x34, &len2
, 1);
182 /* toggle the multireg write bit */
183 nxt200x_writebytes(state
, 0x21, &buf
, 1);
185 nxt200x_readbytes(state
, 0x21, &buf
, 1);
187 switch (state
->demod_chip
) {
189 if ((buf
& 0x02) == 0)
201 pr_warn("Error writing multireg register 0x%02X\n", reg
);
206 static int nxt200x_readreg_multibyte (struct nxt200x_state
* state
, u8 reg
, u8
* data
, u8 len
)
210 dprintk("%s\n", __func__
);
212 /* set mutli register register */
213 nxt200x_writebytes(state
, 0x35, ®
, 1);
215 switch (state
->demod_chip
) {
217 /* set multi register length */
219 nxt200x_writebytes(state
, 0x34, &len2
, 1);
221 /* read the actual data */
222 nxt200x_readbytes(state
, reg
, data
, len
);
226 /* probably not right, but gives correct values */
234 /* set multi register length */
235 len2
= (attr
<< 4) | len
;
236 nxt200x_writebytes(state
, 0x34, &len2
, 1);
238 /* toggle the multireg bit*/
240 nxt200x_writebytes(state
, 0x21, &buf
, 1);
242 /* read the actual data */
243 for(i
= 0; i
< len
; i
++) {
244 nxt200x_readbytes(state
, 0x36 + i
, &data
[i
], 1);
254 static void nxt200x_microcontroller_stop (struct nxt200x_state
* state
)
256 u8 buf
, stopval
, counter
= 0;
257 dprintk("%s\n", __func__
);
259 /* set correct stop value */
260 switch (state
->demod_chip
) {
273 nxt200x_writebytes(state
, 0x22, &buf
, 1);
275 while (counter
< 20) {
276 nxt200x_readbytes(state
, 0x31, &buf
, 1);
283 pr_warn("Timeout waiting for nxt200x to stop. This is ok after "
284 "firmware upload.\n");
288 static void nxt200x_microcontroller_start (struct nxt200x_state
* state
)
291 dprintk("%s\n", __func__
);
294 nxt200x_writebytes(state
, 0x22, &buf
, 1);
297 static void nxt2004_microcontroller_init (struct nxt200x_state
* state
)
301 dprintk("%s\n", __func__
);
304 nxt200x_writebytes(state
, 0x2b, buf
, 1);
306 nxt200x_writebytes(state
, 0x34, buf
, 1);
308 nxt200x_writebytes(state
, 0x35, buf
, 1);
309 buf
[0] = 0x01; buf
[1] = 0x23; buf
[2] = 0x45; buf
[3] = 0x67; buf
[4] = 0x89;
310 buf
[5] = 0xAB; buf
[6] = 0xCD; buf
[7] = 0xEF; buf
[8] = 0xC0;
311 nxt200x_writebytes(state
, 0x36, buf
, 9);
313 nxt200x_writebytes(state
, 0x21, buf
, 1);
315 while (counter
< 20) {
316 nxt200x_readbytes(state
, 0x21, buf
, 1);
323 pr_warn("Timeout waiting for nxt2004 to init.\n");
328 static int nxt200x_writetuner (struct nxt200x_state
* state
, u8
* data
)
332 dprintk("%s\n", __func__
);
334 dprintk("Tuner Bytes: %*ph\n", 4, data
+ 1);
336 /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
337 * direct write is required for Philips TUV1236D and ALPS TDHU2 */
338 switch (state
->demod_chip
) {
340 if (i2c_writebytes(state
, data
[0], data
+1, 4))
341 pr_warn("error writing to tuner\n");
342 /* wait until we have a lock */
344 i2c_readbytes(state
, data
[0], &buf
, 1);
350 pr_warn("timeout waiting for tuner lock\n");
353 /* set the i2c transfer speed to the tuner */
355 nxt200x_writebytes(state
, 0x20, &buf
, 1);
357 /* setup to transfer 4 bytes via i2c */
359 nxt200x_writebytes(state
, 0x34, &buf
, 1);
361 /* write actual tuner bytes */
362 nxt200x_writebytes(state
, 0x36, data
+1, 4);
364 /* set tuner i2c address */
366 nxt200x_writebytes(state
, 0x35, &buf
, 1);
368 /* write UC Opmode to begin transfer */
370 nxt200x_writebytes(state
, 0x21, &buf
, 1);
373 nxt200x_readbytes(state
, 0x21, &buf
, 1);
374 if ((buf
& 0x80)== 0x00)
379 pr_warn("timeout error writing to tuner\n");
388 static void nxt200x_agc_reset(struct nxt200x_state
* state
)
391 dprintk("%s\n", __func__
);
393 switch (state
->demod_chip
) {
396 nxt200x_writebytes(state
, 0x08, &buf
, 1);
398 nxt200x_writebytes(state
, 0x08, &buf
, 1);
401 nxt200x_readreg_multibyte(state
, 0x08, &buf
, 1);
403 nxt200x_writereg_multibyte(state
, 0x08, &buf
, 1);
405 nxt200x_writereg_multibyte(state
, 0x08, &buf
, 1);
413 static int nxt2002_load_firmware (struct dvb_frontend
* fe
, const struct firmware
*fw
)
416 struct nxt200x_state
* state
= fe
->demodulator_priv
;
417 u8 buf
[3], written
= 0, chunkpos
= 0;
418 u16 rambase
, position
, crc
= 0;
420 dprintk("%s\n", __func__
);
421 dprintk("Firmware is %zu bytes\n", fw
->size
);
423 /* Get the RAM base for this nxt2002 */
424 nxt200x_readbytes(state
, 0x10, buf
, 1);
431 dprintk("rambase on this nxt2002 is %04X\n", rambase
);
433 /* Hold the micro in reset while loading firmware */
435 nxt200x_writebytes(state
, 0x2B, buf
, 1);
437 for (position
= 0; position
< fw
->size
; position
++) {
441 buf
[0] = ((rambase
+ position
) >> 8);
442 buf
[1] = (rambase
+ position
) & 0xFF;
444 /* write starting address */
445 nxt200x_writebytes(state
, 0x29, buf
, 3);
450 if ((written
% 4) == 0)
451 nxt200x_writebytes(state
, chunkpos
, &fw
->data
[position
-3], 4);
453 crc
= nxt200x_crc(crc
, fw
->data
[position
]);
455 if ((written
== 255) || (position
+1 == fw
->size
)) {
456 /* write remaining bytes of firmware */
457 nxt200x_writebytes(state
, chunkpos
+4-(written
%4),
458 &fw
->data
[position
-(written
%4) + 1],
464 nxt200x_writebytes(state
, 0x2C, buf
, 2);
466 /* do a read to stop things */
467 nxt200x_readbytes(state
, 0x2A, buf
, 1);
469 /* set transfer mode to complete */
471 nxt200x_writebytes(state
, 0x2B, buf
, 1);
480 static int nxt2004_load_firmware (struct dvb_frontend
* fe
, const struct firmware
*fw
)
483 struct nxt200x_state
* state
= fe
->demodulator_priv
;
485 u16 rambase
, position
, crc
=0;
487 dprintk("%s\n", __func__
);
488 dprintk("Firmware is %zu bytes\n", fw
->size
);
493 /* hold the micro in reset while loading firmware */
495 nxt200x_writebytes(state
, 0x2B, buf
,1);
497 /* calculate firmware CRC */
498 for (position
= 0; position
< fw
->size
; position
++) {
499 crc
= nxt200x_crc(crc
, fw
->data
[position
]);
502 buf
[0] = rambase
>> 8;
503 buf
[1] = rambase
& 0xFF;
505 /* write starting address */
506 nxt200x_writebytes(state
,0x29,buf
,3);
508 for (position
= 0; position
< fw
->size
;) {
509 nxt200x_writebytes(state
, 0x2C, &fw
->data
[position
],
510 fw
->size
-position
> 255 ? 255 : fw
->size
-position
);
511 position
+= (fw
->size
-position
> 255 ? 255 : fw
->size
-position
);
516 dprintk("firmware crc is 0x%02X 0x%02X\n", buf
[0], buf
[1]);
519 nxt200x_writebytes(state
, 0x2C, buf
,2);
521 /* do a read to stop things */
522 nxt200x_readbytes(state
, 0x2C, buf
, 1);
524 /* set transfer mode to complete */
526 nxt200x_writebytes(state
, 0x2B, buf
,1);
531 static int nxt200x_setup_frontend_parameters(struct dvb_frontend
*fe
)
533 struct dtv_frontend_properties
*p
= &fe
->dtv_property_cache
;
534 struct nxt200x_state
* state
= fe
->demodulator_priv
;
537 /* stop the micro first */
538 nxt200x_microcontroller_stop(state
);
540 if (state
->demod_chip
== NXT2004
) {
541 /* make sure demod is set to digital */
543 nxt200x_writebytes(state
, 0x14, buf
, 1);
545 nxt200x_writebytes(state
, 0x17, buf
, 1);
548 /* set additional params */
549 switch (p
->modulation
) {
552 /* Set punctured clock for QAM */
553 /* This is just a guess since I am unable to test it */
554 if (state
->config
->set_ts_params
)
555 state
->config
->set_ts_params(fe
, 1);
558 /* Set non-punctured clock for VSB */
559 if (state
->config
->set_ts_params
)
560 state
->config
->set_ts_params(fe
, 0);
567 if (fe
->ops
.tuner_ops
.calc_regs
) {
568 /* get tuning information */
569 fe
->ops
.tuner_ops
.calc_regs(fe
, buf
, 5);
571 /* write frequency information */
572 nxt200x_writetuner(state
, buf
);
575 /* reset the agc now that tuning has been completed */
576 nxt200x_agc_reset(state
);
578 /* set target power level */
579 switch (p
->modulation
) {
591 nxt200x_writebytes(state
, 0x42, buf
, 1);
594 switch (state
->demod_chip
) {
605 nxt200x_writebytes(state
, 0x57, buf
, 1);
607 /* write sdm1 input */
610 switch (state
->demod_chip
) {
612 nxt200x_writereg_multibyte(state
, 0x58, buf
, 2);
615 nxt200x_writebytes(state
, 0x58, buf
, 2);
622 /* write sdmx input */
623 switch (p
->modulation
) {
638 switch (state
->demod_chip
) {
640 nxt200x_writereg_multibyte(state
, 0x5C, buf
, 2);
643 nxt200x_writebytes(state
, 0x5C, buf
, 2);
650 /* write adc power lpf fc */
652 nxt200x_writebytes(state
, 0x43, buf
, 1);
654 if (state
->demod_chip
== NXT2004
) {
658 nxt200x_writebytes(state
, 0x46, buf
, 2);
661 /* write accumulator2 input */
664 switch (state
->demod_chip
) {
666 nxt200x_writereg_multibyte(state
, 0x4B, buf
, 2);
669 nxt200x_writebytes(state
, 0x4B, buf
, 2);
678 nxt200x_writebytes(state
, 0x4D, buf
, 1);
680 /* write sdm12 lpf fc */
682 nxt200x_writebytes(state
, 0x55, buf
, 1);
684 /* write agc control reg */
686 nxt200x_writebytes(state
, 0x41, buf
, 1);
688 if (state
->demod_chip
== NXT2004
) {
689 nxt200x_readreg_multibyte(state
, 0x80, buf
, 1);
691 nxt200x_writereg_multibyte(state
, 0x80, buf
, 1);
694 nxt200x_readreg_multibyte(state
, 0x08, buf
, 1);
696 nxt200x_writereg_multibyte(state
, 0x08, buf
, 1);
697 nxt200x_readreg_multibyte(state
, 0x08, buf
, 1);
699 nxt200x_writereg_multibyte(state
, 0x08, buf
, 1);
701 nxt200x_readreg_multibyte(state
, 0x80, buf
, 1);
703 nxt200x_writereg_multibyte(state
, 0x80, buf
, 1);
705 nxt200x_writereg_multibyte(state
, 0x81, buf
, 1);
706 buf
[0] = 0x80; buf
[1] = 0x00; buf
[2] = 0x00;
707 nxt200x_writereg_multibyte(state
, 0x82, buf
, 3);
708 nxt200x_readreg_multibyte(state
, 0x88, buf
, 1);
710 nxt200x_writereg_multibyte(state
, 0x88, buf
, 1);
711 nxt200x_readreg_multibyte(state
, 0x80, buf
, 1);
713 nxt200x_writereg_multibyte(state
, 0x80, buf
, 1);
716 /* write agc ucgp0 */
717 switch (p
->modulation
) {
731 nxt200x_writebytes(state
, 0x30, buf
, 1);
733 /* write agc control reg */
735 nxt200x_writebytes(state
, 0x41, buf
, 1);
737 /* write accumulator2 input */
740 switch (state
->demod_chip
) {
742 nxt200x_writereg_multibyte(state
, 0x49, buf
, 2);
743 nxt200x_writereg_multibyte(state
, 0x4B, buf
, 2);
746 nxt200x_writebytes(state
, 0x49, buf
, 2);
747 nxt200x_writebytes(state
, 0x4B, buf
, 2);
754 /* write agc control reg */
756 nxt200x_writebytes(state
, 0x41, buf
, 1);
758 nxt200x_microcontroller_start(state
);
760 if (state
->demod_chip
== NXT2004
) {
761 nxt2004_microcontroller_init(state
);
766 nxt200x_writebytes(state
, 0x5C, buf
, 2);
769 /* adjacent channel detection should be done here, but I don't
770 have any stations with this need so I cannot test it */
775 static int nxt200x_read_status(struct dvb_frontend
* fe
, fe_status_t
* status
)
777 struct nxt200x_state
* state
= fe
->demodulator_priv
;
779 nxt200x_readbytes(state
, 0x31, &lock
, 1);
783 *status
|= FE_HAS_SIGNAL
;
784 *status
|= FE_HAS_CARRIER
;
785 *status
|= FE_HAS_VITERBI
;
786 *status
|= FE_HAS_SYNC
;
787 *status
|= FE_HAS_LOCK
;
792 static int nxt200x_read_ber(struct dvb_frontend
* fe
, u32
* ber
)
794 struct nxt200x_state
* state
= fe
->demodulator_priv
;
797 nxt200x_readreg_multibyte(state
, 0xE6, b
, 3);
799 *ber
= ((b
[0] << 8) + b
[1]) * 8;
804 static int nxt200x_read_signal_strength(struct dvb_frontend
* fe
, u16
* strength
)
806 struct nxt200x_state
* state
= fe
->demodulator_priv
;
810 /* setup to read cluster variance */
812 nxt200x_writebytes(state
, 0xA1, b
, 1);
814 /* get multreg val */
815 nxt200x_readreg_multibyte(state
, 0xA6, b
, 2);
817 temp
= (b
[0] << 8) | b
[1];
818 *strength
= ((0x7FFF - temp
) & 0x0FFF) * 16;
823 static int nxt200x_read_snr(struct dvb_frontend
* fe
, u16
* snr
)
826 struct nxt200x_state
* state
= fe
->demodulator_priv
;
831 /* setup to read cluster variance */
833 nxt200x_writebytes(state
, 0xA1, b
, 1);
835 /* get multreg val from 0xA6 */
836 nxt200x_readreg_multibyte(state
, 0xA6, b
, 2);
838 temp
= (b
[0] << 8) | b
[1];
839 temp2
= 0x7FFF - temp
;
841 /* snr will be in db */
843 snrdb
= 1000*24 + ( 1000*(30-24) * ( temp2
- 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
844 else if (temp2
> 0x7EC0)
845 snrdb
= 1000*18 + ( 1000*(24-18) * ( temp2
- 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
846 else if (temp2
> 0x7C00)
847 snrdb
= 1000*12 + ( 1000*(18-12) * ( temp2
- 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
849 snrdb
= 1000*0 + ( 1000*(12-0) * ( temp2
- 0 ) / ( 0x7C00 - 0 ) );
851 /* the value reported back from the frontend will be FFFF=32db 0000=0db */
852 *snr
= snrdb
* (0xFFFF/32000);
857 static int nxt200x_read_ucblocks(struct dvb_frontend
* fe
, u32
* ucblocks
)
859 struct nxt200x_state
* state
= fe
->demodulator_priv
;
862 nxt200x_readreg_multibyte(state
, 0xE6, b
, 3);
868 static int nxt200x_sleep(struct dvb_frontend
* fe
)
873 static int nxt2002_init(struct dvb_frontend
* fe
)
875 struct nxt200x_state
* state
= fe
->demodulator_priv
;
876 const struct firmware
*fw
;
880 /* request the firmware, this will block until someone uploads it */
881 pr_debug("%s: Waiting for firmware upload (%s)...\n",
882 __func__
, NXT2002_DEFAULT_FIRMWARE
);
883 ret
= request_firmware(&fw
, NXT2002_DEFAULT_FIRMWARE
,
884 state
->i2c
->dev
.parent
);
885 pr_debug("%s: Waiting for firmware upload(2)...\n", __func__
);
887 pr_err("%s: No firmware uploaded (timeout or file not found?)"
892 ret
= nxt2002_load_firmware(fe
, fw
);
893 release_firmware(fw
);
895 pr_err("%s: Writing firmware to device failed\n", __func__
);
898 pr_info("%s: Firmware upload complete\n", __func__
);
900 /* Put the micro into reset */
901 nxt200x_microcontroller_stop(state
);
903 /* ensure transfer is complete */
905 nxt200x_writebytes(state
, 0x2B, buf
, 1);
907 /* Put the micro into reset for real this time */
908 nxt200x_microcontroller_stop(state
);
910 /* soft reset everything (agc,frontend,eq,fec)*/
912 nxt200x_writebytes(state
, 0x08, buf
, 1);
914 nxt200x_writebytes(state
, 0x08, buf
, 1);
916 /* write agc sdm configure */
918 nxt200x_writebytes(state
, 0x57, buf
, 1);
920 /* write mod output format */
922 nxt200x_writebytes(state
, 0x09, buf
, 1);
924 /* write fec mpeg mode */
927 nxt200x_writebytes(state
, 0xE9, buf
, 2);
929 /* write mux selection */
931 nxt200x_writebytes(state
, 0xCC, buf
, 1);
936 static int nxt2004_init(struct dvb_frontend
* fe
)
938 struct nxt200x_state
* state
= fe
->demodulator_priv
;
939 const struct firmware
*fw
;
945 nxt200x_writebytes(state
, 0x1E, buf
, 1);
947 /* request the firmware, this will block until someone uploads it */
948 pr_debug("%s: Waiting for firmware upload (%s)...\n",
949 __func__
, NXT2004_DEFAULT_FIRMWARE
);
950 ret
= request_firmware(&fw
, NXT2004_DEFAULT_FIRMWARE
,
951 state
->i2c
->dev
.parent
);
952 pr_debug("%s: Waiting for firmware upload(2)...\n", __func__
);
954 pr_err("%s: No firmware uploaded (timeout or file not found?)"
959 ret
= nxt2004_load_firmware(fe
, fw
);
960 release_firmware(fw
);
962 pr_err("%s: Writing firmware to device failed\n", __func__
);
965 pr_info("%s: Firmware upload complete\n", __func__
);
967 /* ensure transfer is complete */
969 nxt200x_writebytes(state
, 0x19, buf
, 1);
971 nxt2004_microcontroller_init(state
);
972 nxt200x_microcontroller_stop(state
);
973 nxt200x_microcontroller_stop(state
);
974 nxt2004_microcontroller_init(state
);
975 nxt200x_microcontroller_stop(state
);
977 /* soft reset everything (agc,frontend,eq,fec)*/
979 nxt200x_writereg_multibyte(state
, 0x08, buf
, 1);
981 nxt200x_writereg_multibyte(state
, 0x08, buf
, 1);
983 /* write agc sdm configure */
985 nxt200x_writebytes(state
, 0x57, buf
, 1);
990 nxt200x_writebytes(state
, 0x35, buf
, 2);
992 nxt200x_writebytes(state
, 0x34, buf
, 1);
994 nxt200x_writebytes(state
, 0x21, buf
, 1);
998 nxt200x_writebytes(state
, 0x0A, buf
, 1);
1002 nxt200x_writereg_multibyte(state
, 0x80, buf
, 1);
1004 /* write fec mpeg mode */
1007 nxt200x_writebytes(state
, 0xE9, buf
, 2);
1009 /* write mux selection */
1011 nxt200x_writebytes(state
, 0xCC, buf
, 1);
1014 nxt200x_readreg_multibyte(state
, 0x80, buf
, 1);
1016 nxt200x_writereg_multibyte(state
, 0x80, buf
, 1);
1019 nxt200x_readreg_multibyte(state
, 0x08, buf
, 1);
1021 nxt200x_writereg_multibyte(state
, 0x08, buf
, 1);
1022 nxt200x_readreg_multibyte(state
, 0x08, buf
, 1);
1024 nxt200x_writereg_multibyte(state
, 0x08, buf
, 1);
1027 nxt200x_readreg_multibyte(state
, 0x80, buf
, 1);
1029 nxt200x_writereg_multibyte(state
, 0x80, buf
, 1);
1031 nxt200x_writereg_multibyte(state
, 0x81, buf
, 1);
1032 buf
[0] = 0x31; buf
[1] = 0x5E; buf
[2] = 0x66;
1033 nxt200x_writereg_multibyte(state
, 0x82, buf
, 3);
1035 nxt200x_readreg_multibyte(state
, 0x88, buf
, 1);
1037 nxt200x_writereg_multibyte(state
, 0x88, buf
, 1);
1038 nxt200x_readreg_multibyte(state
, 0x80, buf
, 1);
1040 nxt200x_writereg_multibyte(state
, 0x80, buf
, 1);
1042 nxt200x_readbytes(state
, 0x10, buf
, 1);
1044 nxt200x_writebytes(state
, 0x10, buf
, 1);
1045 nxt200x_readbytes(state
, 0x0A, buf
, 1);
1047 nxt200x_writebytes(state
, 0x0A, buf
, 1);
1049 nxt2004_microcontroller_init(state
);
1052 nxt200x_writebytes(state
, 0x0A, buf
, 1);
1054 nxt200x_writebytes(state
, 0xE9, buf
, 1);
1056 nxt200x_writebytes(state
, 0xEA, buf
, 1);
1058 nxt200x_readreg_multibyte(state
, 0x80, buf
, 1);
1060 nxt200x_writereg_multibyte(state
, 0x80, buf
, 1);
1061 nxt200x_readreg_multibyte(state
, 0x80, buf
, 1);
1063 nxt200x_writereg_multibyte(state
, 0x80, buf
, 1);
1066 nxt200x_readreg_multibyte(state
, 0x08, buf
, 1);
1068 nxt200x_writereg_multibyte(state
, 0x08, buf
, 1);
1069 nxt200x_readreg_multibyte(state
, 0x08, buf
, 1);
1071 nxt200x_writereg_multibyte(state
, 0x08, buf
, 1);
1073 nxt200x_readreg_multibyte(state
, 0x80, buf
, 1);
1075 nxt200x_writereg_multibyte(state
, 0x80, buf
, 1);
1077 nxt200x_writereg_multibyte(state
, 0x81, buf
, 1);
1078 buf
[0] = 0x80; buf
[1] = 0x00; buf
[2] = 0x00;
1079 nxt200x_writereg_multibyte(state
, 0x82, buf
, 3);
1081 nxt200x_readreg_multibyte(state
, 0x88, buf
, 1);
1083 nxt200x_writereg_multibyte(state
, 0x88, buf
, 1);
1085 nxt200x_readreg_multibyte(state
, 0x80, buf
, 1);
1087 nxt200x_writereg_multibyte(state
, 0x80, buf
, 1);
1089 /* initialize tuner */
1090 nxt200x_readbytes(state
, 0x10, buf
, 1);
1092 nxt200x_writebytes(state
, 0x10, buf
, 1);
1094 nxt200x_writebytes(state
, 0x13, buf
, 1);
1096 nxt200x_writebytes(state
, 0x16, buf
, 1);
1098 nxt200x_writebytes(state
, 0x14, buf
, 1);
1100 nxt200x_writebytes(state
, 0x14, buf
, 1);
1101 nxt200x_writebytes(state
, 0x17, buf
, 1);
1102 nxt200x_writebytes(state
, 0x14, buf
, 1);
1103 nxt200x_writebytes(state
, 0x17, buf
, 1);
1108 static int nxt200x_init(struct dvb_frontend
* fe
)
1110 struct nxt200x_state
* state
= fe
->demodulator_priv
;
1113 if (!state
->initialised
) {
1114 switch (state
->demod_chip
) {
1116 ret
= nxt2002_init(fe
);
1119 ret
= nxt2004_init(fe
);
1125 state
->initialised
= 1;
1130 static int nxt200x_get_tune_settings(struct dvb_frontend
* fe
, struct dvb_frontend_tune_settings
* fesettings
)
1132 fesettings
->min_delay_ms
= 500;
1133 fesettings
->step_size
= 0;
1134 fesettings
->max_drift
= 0;
1138 static void nxt200x_release(struct dvb_frontend
* fe
)
1140 struct nxt200x_state
* state
= fe
->demodulator_priv
;
1144 static struct dvb_frontend_ops nxt200x_ops
;
1146 struct dvb_frontend
* nxt200x_attach(const struct nxt200x_config
* config
,
1147 struct i2c_adapter
* i2c
)
1149 struct nxt200x_state
* state
= NULL
;
1150 u8 buf
[] = {0,0,0,0,0};
1152 /* allocate memory for the internal state */
1153 state
= kzalloc(sizeof(struct nxt200x_state
), GFP_KERNEL
);
1157 /* setup the state */
1158 state
->config
= config
;
1160 state
->initialised
= 0;
1163 nxt200x_readbytes(state
, 0x00, buf
, 5);
1164 dprintk("NXT info: %*ph\n", 5, buf
);
1166 /* set demod chip */
1169 state
->demod_chip
= NXT2002
;
1170 pr_info("NXT2002 Detected\n");
1173 state
->demod_chip
= NXT2004
;
1174 pr_info("NXT2004 Detected\n");
1180 /* make sure demod chip is supported */
1181 switch (state
->demod_chip
) {
1183 if (buf
[0] != 0x04) goto error
; /* device id */
1184 if (buf
[1] != 0x02) goto error
; /* fab id */
1185 if (buf
[2] != 0x11) goto error
; /* month */
1186 if (buf
[3] != 0x20) goto error
; /* year msb */
1187 if (buf
[4] != 0x00) goto error
; /* year lsb */
1190 if (buf
[0] != 0x05) goto error
; /* device id */
1196 /* create dvb_frontend */
1197 memcpy(&state
->frontend
.ops
, &nxt200x_ops
, sizeof(struct dvb_frontend_ops
));
1198 state
->frontend
.demodulator_priv
= state
;
1199 return &state
->frontend
;
1203 pr_err("Unknown/Unsupported NXT chip: %*ph\n", 5, buf
);
1207 static struct dvb_frontend_ops nxt200x_ops
= {
1208 .delsys
= { SYS_ATSC
, SYS_DVBC_ANNEX_B
},
1210 .name
= "Nextwave NXT200X VSB/QAM frontend",
1211 .frequency_min
= 54000000,
1212 .frequency_max
= 860000000,
1213 .frequency_stepsize
= 166666, /* stepsize is just a guess */
1214 .caps
= FE_CAN_FEC_1_2
| FE_CAN_FEC_2_3
| FE_CAN_FEC_3_4
|
1215 FE_CAN_FEC_5_6
| FE_CAN_FEC_7_8
| FE_CAN_FEC_AUTO
|
1216 FE_CAN_8VSB
| FE_CAN_QAM_64
| FE_CAN_QAM_256
1219 .release
= nxt200x_release
,
1221 .init
= nxt200x_init
,
1222 .sleep
= nxt200x_sleep
,
1224 .set_frontend
= nxt200x_setup_frontend_parameters
,
1225 .get_tune_settings
= nxt200x_get_tune_settings
,
1227 .read_status
= nxt200x_read_status
,
1228 .read_ber
= nxt200x_read_ber
,
1229 .read_signal_strength
= nxt200x_read_signal_strength
,
1230 .read_snr
= nxt200x_read_snr
,
1231 .read_ucblocks
= nxt200x_read_ucblocks
,
1234 module_param(debug
, int, 0644);
1235 MODULE_PARM_DESC(debug
, "Turn on/off frontend debugging (default:off).");
1237 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1238 MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1239 MODULE_LICENSE("GPL");
1241 EXPORT_SYMBOL(nxt200x_attach
);