drivers/media/dvb-frontends/zl10353.c

   1 /*
   2  * Driver for Zarlink DVB-T ZL10353 demodulator
   3  *
   4  * Copyright (C) 2006, 2007 Christopher Pascoe <c.pascoe@itee.uq.edu.au>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20  */
  21
  22 #include <linux/kernel.h>
  23 #include <linux/module.h>
  24 #include <linux/init.h>
  25 #include <linux/delay.h>
  26 #include <linux/string.h>
  27 #include <linux/slab.h>
  28 #include <asm/div64.h>
  29
  30 #include "dvb_frontend.h"
  31 #include "zl10353_priv.h"
  32 #include "zl10353.h"
  33
  34 struct zl10353_state {
  35         struct i2c_adapter *i2c;
  36         struct dvb_frontend frontend;
  37
  38         struct zl10353_config config;
  39
  40         u32 bandwidth;
  41         u32 ucblocks;
  42         u32 frequency;
  43 };
  44
  45 static int debug;
  46 #define dprintk(args...) \
  47         do { \
  48                 if (debug) printk(KERN_DEBUG "zl10353: " args); \
  49         } while (0)
  50
  51 static int debug_regs;
  52
  53 static int zl10353_single_write(struct dvb_frontend *fe, u8 reg, u8 val)
  54 {
  55         struct zl10353_state *state = fe->demodulator_priv;
  56         u8 buf[2] = { reg, val };
  57         struct i2c_msg msg = { .addr = state->config.demod_address, .flags = 0,
  58                                .buf = buf, .len = 2 };
  59         int err = i2c_transfer(state->i2c, &msg, 1);
  60         if (err != 1) {
  61                 printk("zl10353: write to reg %x failed (err = %d)!\n", reg, err);
  62                 return err;
  63         }
  64         return 0;
  65 }
  66
  67 static int zl10353_write(struct dvb_frontend *fe, const u8 ibuf[], int ilen)
  68 {
  69         int err, i;
  70         for (i = 0; i < ilen - 1; i++)
  71                 if ((err = zl10353_single_write(fe, ibuf[0] + i, ibuf[i + 1])))
  72                         return err;
  73
  74         return 0;
  75 }
  76
  77 static int zl10353_read_register(struct zl10353_state *state, u8 reg)
  78 {
  79         int ret;
  80         u8 b0[1] = { reg };
  81         u8 b1[1] = { 0 };
  82         struct i2c_msg msg[2] = { { .addr = state->config.demod_address,
  83                                     .flags = 0,
  84                                     .buf = b0, .len = 1 },
  85                                   { .addr = state->config.demod_address,
  86                                     .flags = I2C_M_RD,
  87                                     .buf = b1, .len = 1 } };
  88
  89         ret = i2c_transfer(state->i2c, msg, 2);
  90
  91         if (ret != 2) {
  92                 printk("%s: readreg error (reg=%d, ret==%i)\n",
  93                        __func__, reg, ret);
  94                 return ret;
  95         }
  96
  97         return b1[0];
  98 }
  99
 100 static void zl10353_dump_regs(struct dvb_frontend *fe)
 101 {
 102         struct zl10353_state *state = fe->demodulator_priv;
 103         int ret;
 104         u8 reg;
 105
 106         /* Dump all registers. */
 107         for (reg = 0; ; reg++) {
 108                 if (reg % 16 == 0) {
 109                         if (reg)
 110                                 printk(KERN_CONT "\n");
 111                         printk(KERN_DEBUG "%02x:", reg);
 112                 }
 113                 ret = zl10353_read_register(state, reg);
 114                 if (ret >= 0)
 115                         printk(KERN_CONT " %02x", (u8)ret);
 116                 else
 117                         printk(KERN_CONT " --");
 118                 if (reg == 0xff)
 119                         break;
 120         }
 121         printk(KERN_CONT "\n");
 122 }
 123
 124 static void zl10353_calc_nominal_rate(struct dvb_frontend *fe,
 125                                       u32 bandwidth,
 126                                       u16 *nominal_rate)
 127 {
 128         struct zl10353_state *state = fe->demodulator_priv;
 129         u32 adc_clock = 450560; /* 45.056 MHz */
 130         u64 value;
 131         u8 bw = bandwidth / 1000000;
 132
 133         if (state->config.adc_clock)
 134                 adc_clock = state->config.adc_clock;
 135
 136         value = (u64)10 * (1 << 23) / 7 * 125;
 137         value = (bw * value) + adc_clock / 2;
 138         *nominal_rate = div_u64(value, adc_clock);
 139
 140         dprintk("%s: bw %d, adc_clock %d => 0x%x\n",
 141                 __func__, bw, adc_clock, *nominal_rate);
 142 }
 143
 144 static void zl10353_calc_input_freq(struct dvb_frontend *fe,
 145                                     u16 *input_freq)
 146 {
 147         struct zl10353_state *state = fe->demodulator_priv;
 148         u32 adc_clock = 450560; /* 45.056  MHz */
 149         int if2 = 361667;       /* 36.1667 MHz */
 150         int ife;
 151         u64 value;
 152
 153         if (state->config.adc_clock)
 154                 adc_clock = state->config.adc_clock;
 155         if (state->config.if2)
 156                 if2 = state->config.if2;
 157
 158         if (adc_clock >= if2 * 2)
 159                 ife = if2;
 160         else {
 161                 ife = adc_clock - (if2 % adc_clock);
 162                 if (ife > adc_clock / 2)
 163                         ife = adc_clock - ife;
 164         }
 165         value = div_u64((u64)65536 * ife + adc_clock / 2, adc_clock);
 166         *input_freq = -value;
 167
 168         dprintk("%s: if2 %d, ife %d, adc_clock %d => %d / 0x%x\n",
 169                 __func__, if2, ife, adc_clock, -(int)value, *input_freq);
 170 }
 171
 172 static int zl10353_sleep(struct dvb_frontend *fe)
 173 {
 174         static u8 zl10353_softdown[] = { 0x50, 0x0C, 0x44 };
 175
 176         zl10353_write(fe, zl10353_softdown, sizeof(zl10353_softdown));
 177         return 0;
 178 }
 179
 180 static int zl10353_set_parameters(struct dvb_frontend *fe)
 181 {
 182         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 183         struct zl10353_state *state = fe->demodulator_priv;
 184         u16 nominal_rate, input_freq;
 185         u8 pllbuf[6] = { 0x67 }, acq_ctl = 0;
 186         u16 tps = 0;
 187
 188         state->frequency = c->frequency;
 189
 190         zl10353_single_write(fe, RESET, 0x80);
 191         udelay(200);
 192         zl10353_single_write(fe, 0xEA, 0x01);
 193         udelay(200);
 194         zl10353_single_write(fe, 0xEA, 0x00);
 195
 196         zl10353_single_write(fe, AGC_TARGET, 0x28);
 197
 198         if (c->transmission_mode != TRANSMISSION_MODE_AUTO)
 199                 acq_ctl |= (1 << 0);
 200         if (c->guard_interval != GUARD_INTERVAL_AUTO)
 201                 acq_ctl |= (1 << 1);
 202         zl10353_single_write(fe, ACQ_CTL, acq_ctl);
 203
 204         switch (c->bandwidth_hz) {
 205         case 6000000:
 206                 /* These are extrapolated from the 7 and 8MHz values */
 207                 zl10353_single_write(fe, MCLK_RATIO, 0x97);
 208                 zl10353_single_write(fe, 0x64, 0x34);
 209                 zl10353_single_write(fe, 0xcc, 0xdd);
 210                 break;
 211         case 7000000:
 212                 zl10353_single_write(fe, MCLK_RATIO, 0x86);
 213                 zl10353_single_write(fe, 0x64, 0x35);
 214                 zl10353_single_write(fe, 0xcc, 0x73);
 215                 break;
 216         default:
 217                 c->bandwidth_hz = 8000000;
 218                 /* fall though */
 219         case 8000000:
 220                 zl10353_single_write(fe, MCLK_RATIO, 0x75);
 221                 zl10353_single_write(fe, 0x64, 0x36);
 222                 zl10353_single_write(fe, 0xcc, 0x73);
 223         }
 224
 225         zl10353_calc_nominal_rate(fe, c->bandwidth_hz, &nominal_rate);
 226         zl10353_single_write(fe, TRL_NOMINAL_RATE_1, msb(nominal_rate));
 227         zl10353_single_write(fe, TRL_NOMINAL_RATE_0, lsb(nominal_rate));
 228         state->bandwidth = c->bandwidth_hz;
 229
 230         zl10353_calc_input_freq(fe, &input_freq);
 231         zl10353_single_write(fe, INPUT_FREQ_1, msb(input_freq));
 232         zl10353_single_write(fe, INPUT_FREQ_0, lsb(input_freq));
 233
 234         /* Hint at TPS settings */
 235         switch (c->code_rate_HP) {
 236         case FEC_2_3:
 237                 tps |= (1 << 7);
 238                 break;
 239         case FEC_3_4:
 240                 tps |= (2 << 7);
 241                 break;
 242         case FEC_5_6:
 243                 tps |= (3 << 7);
 244                 break;
 245         case FEC_7_8:
 246                 tps |= (4 << 7);
 247                 break;
 248         case FEC_1_2:
 249         case FEC_AUTO:
 250                 break;
 251         default:
 252                 return -EINVAL;
 253         }
 254
 255         switch (c->code_rate_LP) {
 256         case FEC_2_3:
 257                 tps |= (1 << 4);
 258                 break;
 259         case FEC_3_4:
 260                 tps |= (2 << 4);
 261                 break;
 262         case FEC_5_6:
 263                 tps |= (3 << 4);
 264                 break;
 265         case FEC_7_8:
 266                 tps |= (4 << 4);
 267                 break;
 268         case FEC_1_2:
 269         case FEC_AUTO:
 270                 break;
 271         case FEC_NONE:
 272                 if (c->hierarchy == HIERARCHY_AUTO ||
 273                     c->hierarchy == HIERARCHY_NONE)
 274                         break;
 275         default:
 276                 return -EINVAL;
 277         }
 278
 279         switch (c->modulation) {
 280         case QPSK:
 281                 break;
 282         case QAM_AUTO:
 283         case QAM_16:
 284                 tps |= (1 << 13);
 285                 break;
 286         case QAM_64:
 287                 tps |= (2 << 13);
 288                 break;
 289         default:
 290                 return -EINVAL;
 291         }
 292
 293         switch (c->transmission_mode) {
 294         case TRANSMISSION_MODE_2K:
 295         case TRANSMISSION_MODE_AUTO:
 296                 break;
 297         case TRANSMISSION_MODE_8K:
 298                 tps |= (1 << 0);
 299                 break;
 300         default:
 301                 return -EINVAL;
 302         }
 303
 304         switch (c->guard_interval) {
 305         case GUARD_INTERVAL_1_32:
 306         case GUARD_INTERVAL_AUTO:
 307                 break;
 308         case GUARD_INTERVAL_1_16:
 309                 tps |= (1 << 2);
 310                 break;
 311         case GUARD_INTERVAL_1_8:
 312                 tps |= (2 << 2);
 313                 break;
 314         case GUARD_INTERVAL_1_4:
 315                 tps |= (3 << 2);
 316                 break;
 317         default:
 318                 return -EINVAL;
 319         }
 320
 321         switch (c->hierarchy) {
 322         case HIERARCHY_AUTO:
 323         case HIERARCHY_NONE:
 324                 break;
 325         case HIERARCHY_1:
 326                 tps |= (1 << 10);
 327                 break;
 328         case HIERARCHY_2:
 329                 tps |= (2 << 10);
 330                 break;
 331         case HIERARCHY_4:
 332                 tps |= (3 << 10);
 333                 break;
 334         default:
 335                 return -EINVAL;
 336         }
 337
 338         zl10353_single_write(fe, TPS_GIVEN_1, msb(tps));
 339         zl10353_single_write(fe, TPS_GIVEN_0, lsb(tps));
 340
 341         if (fe->ops.i2c_gate_ctrl)
 342                 fe->ops.i2c_gate_ctrl(fe, 0);
 343
 344         /*
 345          * If there is no tuner attached to the secondary I2C bus, we call
 346          * set_params to program a potential tuner attached somewhere else.
 347          * Otherwise, we update the PLL registers via calc_regs.
 348          */
 349         if (state->config.no_tuner) {
 350                 if (fe->ops.tuner_ops.set_params) {
 351                         fe->ops.tuner_ops.set_params(fe);
 352                         if (fe->ops.i2c_gate_ctrl)
 353                                 fe->ops.i2c_gate_ctrl(fe, 0);
 354                 }
 355         } else if (fe->ops.tuner_ops.calc_regs) {
 356                 fe->ops.tuner_ops.calc_regs(fe, pllbuf + 1, 5);
 357                 pllbuf[1] <<= 1;
 358                 zl10353_write(fe, pllbuf, sizeof(pllbuf));
 359         }
 360
 361         zl10353_single_write(fe, 0x5F, 0x13);
 362
 363         /* If no attached tuner or invalid PLL registers, just start the FSM. */
 364         if (state->config.no_tuner || fe->ops.tuner_ops.calc_regs == NULL)
 365                 zl10353_single_write(fe, FSM_GO, 0x01);
 366         else
 367                 zl10353_single_write(fe, TUNER_GO, 0x01);
 368
 369         return 0;
 370 }
 371
 372 static int zl10353_get_parameters(struct dvb_frontend *fe,
 373                                   struct dtv_frontend_properties *c)
 374 {
 375         struct zl10353_state *state = fe->demodulator_priv;
 376         int s6, s9;
 377         u16 tps;
 378         static const u8 tps_fec_to_api[8] = {
 379                 FEC_1_2,
 380                 FEC_2_3,
 381                 FEC_3_4,
 382                 FEC_5_6,
 383                 FEC_7_8,
 384                 FEC_AUTO,
 385                 FEC_AUTO,
 386                 FEC_AUTO
 387         };
 388
 389         s6 = zl10353_read_register(state, STATUS_6);
 390         s9 = zl10353_read_register(state, STATUS_9);
 391         if (s6 < 0 || s9 < 0)
 392                 return -EREMOTEIO;
 393         if ((s6 & (1 << 5)) == 0 || (s9 & (1 << 4)) == 0)
 394                 return -EINVAL; /* no FE or TPS lock */
 395
 396         tps = zl10353_read_register(state, TPS_RECEIVED_1) << 8 |
 397               zl10353_read_register(state, TPS_RECEIVED_0);
 398
 399         c->code_rate_HP = tps_fec_to_api[(tps >> 7) & 7];
 400         c->code_rate_LP = tps_fec_to_api[(tps >> 4) & 7];
 401
 402         switch ((tps >> 13) & 3) {
 403         case 0:
 404                 c->modulation = QPSK;
 405                 break;
 406         case 1:
 407                 c->modulation = QAM_16;
 408                 break;
 409         case 2:
 410                 c->modulation = QAM_64;
 411                 break;
 412         default:
 413                 c->modulation = QAM_AUTO;
 414                 break;
 415         }
 416
 417         c->transmission_mode = (tps & 0x01) ? TRANSMISSION_MODE_8K :
 418                                                TRANSMISSION_MODE_2K;
 419
 420         switch ((tps >> 2) & 3) {
 421         case 0:
 422                 c->guard_interval = GUARD_INTERVAL_1_32;
 423                 break;
 424         case 1:
 425                 c->guard_interval = GUARD_INTERVAL_1_16;
 426                 break;
 427         case 2:
 428                 c->guard_interval = GUARD_INTERVAL_1_8;
 429                 break;
 430         case 3:
 431                 c->guard_interval = GUARD_INTERVAL_1_4;
 432                 break;
 433         default:
 434                 c->guard_interval = GUARD_INTERVAL_AUTO;
 435                 break;
 436         }
 437
 438         switch ((tps >> 10) & 7) {
 439         case 0:
 440                 c->hierarchy = HIERARCHY_NONE;
 441                 break;
 442         case 1:
 443                 c->hierarchy = HIERARCHY_1;
 444                 break;
 445         case 2:
 446                 c->hierarchy = HIERARCHY_2;
 447                 break;
 448         case 3:
 449                 c->hierarchy = HIERARCHY_4;
 450                 break;
 451         default:
 452                 c->hierarchy = HIERARCHY_AUTO;
 453                 break;
 454         }
 455
 456         c->frequency = state->frequency;
 457         c->bandwidth_hz = state->bandwidth;
 458         c->inversion = INVERSION_AUTO;
 459
 460         return 0;
 461 }
 462
 463 static int zl10353_read_status(struct dvb_frontend *fe, enum fe_status *status)
 464 {
 465         struct zl10353_state *state = fe->demodulator_priv;
 466         int s6, s7, s8;
 467
 468         if ((s6 = zl10353_read_register(state, STATUS_6)) < 0)
 469                 return -EREMOTEIO;
 470         if ((s7 = zl10353_read_register(state, STATUS_7)) < 0)
 471                 return -EREMOTEIO;
 472         if ((s8 = zl10353_read_register(state, STATUS_8)) < 0)
 473                 return -EREMOTEIO;
 474
 475         *status = 0;
 476         if (s6 & (1 << 2))
 477                 *status |= FE_HAS_CARRIER;
 478         if (s6 & (1 << 1))
 479                 *status |= FE_HAS_VITERBI;
 480         if (s6 & (1 << 5))
 481                 *status |= FE_HAS_LOCK;
 482         if (s7 & (1 << 4))
 483                 *status |= FE_HAS_SYNC;
 484         if (s8 & (1 << 6))
 485                 *status |= FE_HAS_SIGNAL;
 486
 487         if ((*status & (FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC)) !=
 488             (FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC))
 489                 *status &= ~FE_HAS_LOCK;
 490
 491         return 0;
 492 }
 493
 494 static int zl10353_read_ber(struct dvb_frontend *fe, u32 *ber)
 495 {
 496         struct zl10353_state *state = fe->demodulator_priv;
 497
 498         *ber = zl10353_read_register(state, RS_ERR_CNT_2) << 16 |
 499                zl10353_read_register(state, RS_ERR_CNT_1) << 8 |
 500                zl10353_read_register(state, RS_ERR_CNT_0);
 501
 502         return 0;
 503 }
 504
 505 static int zl10353_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
 506 {
 507         struct zl10353_state *state = fe->demodulator_priv;
 508
 509         u16 signal = zl10353_read_register(state, AGC_GAIN_1) << 10 |
 510                      zl10353_read_register(state, AGC_GAIN_0) << 2 | 3;
 511
 512         *strength = ~signal;
 513
 514         return 0;
 515 }
 516
 517 static int zl10353_read_snr(struct dvb_frontend *fe, u16 *snr)
 518 {
 519         struct zl10353_state *state = fe->demodulator_priv;
 520         u8 _snr;
 521
 522         if (debug_regs)
 523                 zl10353_dump_regs(fe);
 524
 525         _snr = zl10353_read_register(state, SNR);
 526         *snr = 10 * _snr / 8;
 527
 528         return 0;
 529 }
 530
 531 static int zl10353_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
 532 {
 533         struct zl10353_state *state = fe->demodulator_priv;
 534         u32 ubl = 0;
 535
 536         ubl = zl10353_read_register(state, RS_UBC_1) << 8 |
 537               zl10353_read_register(state, RS_UBC_0);
 538
 539         state->ucblocks += ubl;
 540         *ucblocks = state->ucblocks;
 541
 542         return 0;
 543 }
 544
 545 static int zl10353_get_tune_settings(struct dvb_frontend *fe,
 546                                      struct dvb_frontend_tune_settings
 547                                          *fe_tune_settings)
 548 {
 549         fe_tune_settings->min_delay_ms = 1000;
 550         fe_tune_settings->step_size = 0;
 551         fe_tune_settings->max_drift = 0;
 552
 553         return 0;
 554 }
 555
 556 static int zl10353_init(struct dvb_frontend *fe)
 557 {
 558         struct zl10353_state *state = fe->demodulator_priv;
 559         u8 zl10353_reset_attach[6] = { 0x50, 0x03, 0x64, 0x46, 0x15, 0x0F };
 560
 561         if (debug_regs)
 562                 zl10353_dump_regs(fe);
 563         if (state->config.parallel_ts)
 564                 zl10353_reset_attach[2] &= ~0x20;
 565         if (state->config.clock_ctl_1)
 566                 zl10353_reset_attach[3] = state->config.clock_ctl_1;
 567         if (state->config.pll_0)
 568                 zl10353_reset_attach[4] = state->config.pll_0;
 569
 570         /* Do a "hard" reset if not already done */
 571         if (zl10353_read_register(state, 0x50) != zl10353_reset_attach[1] ||
 572             zl10353_read_register(state, 0x51) != zl10353_reset_attach[2]) {
 573                 zl10353_write(fe, zl10353_reset_attach,
 574                                    sizeof(zl10353_reset_attach));
 575                 if (debug_regs)
 576                         zl10353_dump_regs(fe);
 577         }
 578
 579         return 0;
 580 }
 581
 582 static int zl10353_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
 583 {
 584         struct zl10353_state *state = fe->demodulator_priv;
 585         u8 val = 0x0a;
 586
 587         if (state->config.disable_i2c_gate_ctrl) {
 588                 /* No tuner attached to the internal I2C bus */
 589                 /* If set enable I2C bridge, the main I2C bus stopped hardly */
 590                 return 0;
 591         }
 592
 593         if (enable)
 594                 val |= 0x10;
 595
 596         return zl10353_single_write(fe, 0x62, val);
 597 }
 598
 599 static void zl10353_release(struct dvb_frontend *fe)
 600 {
 601         struct zl10353_state *state = fe->demodulator_priv;
 602         kfree(state);
 603 }
 604
 605 static const struct dvb_frontend_ops zl10353_ops;
 606
 607 struct dvb_frontend *zl10353_attach(const struct zl10353_config *config,
 608                                     struct i2c_adapter *i2c)
 609 {
 610         struct zl10353_state *state = NULL;
 611         int id;
 612
 613         /* allocate memory for the internal state */
 614         state = kzalloc(sizeof(struct zl10353_state), GFP_KERNEL);
 615         if (state == NULL)
 616                 goto error;
 617
 618         /* setup the state */
 619         state->i2c = i2c;
 620         memcpy(&state->config, config, sizeof(struct zl10353_config));
 621
 622         /* check if the demod is there */
 623         id = zl10353_read_register(state, CHIP_ID);
 624         if ((id != ID_ZL10353) && (id != ID_CE6230) && (id != ID_CE6231))
 625                 goto error;
 626
 627         /* create dvb_frontend */
 628         memcpy(&state->frontend.ops, &zl10353_ops, sizeof(struct dvb_frontend_ops));
 629         state->frontend.demodulator_priv = state;
 630
 631         return &state->frontend;
 632 error:
 633         kfree(state);
 634         return NULL;
 635 }
 636
 637 static const struct dvb_frontend_ops zl10353_ops = {
 638         .delsys = { SYS_DVBT },
 639         .info = {
 640                 .name                   = "Zarlink ZL10353 DVB-T",
 641                 .frequency_min          = 174000000,
 642                 .frequency_max          = 862000000,
 643                 .frequency_stepsize     = 166667,
 644                 .frequency_tolerance    = 0,
 645                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
 646                         FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
 647                         FE_CAN_FEC_AUTO |
 648                         FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
 649                         FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
 650                         FE_CAN_HIERARCHY_AUTO | FE_CAN_RECOVER |
 651                         FE_CAN_MUTE_TS
 652         },
 653
 654         .release = zl10353_release,
 655
 656         .init = zl10353_init,
 657         .sleep = zl10353_sleep,
 658         .i2c_gate_ctrl = zl10353_i2c_gate_ctrl,
 659         .write = zl10353_write,
 660
 661         .set_frontend = zl10353_set_parameters,
 662         .get_frontend = zl10353_get_parameters,
 663         .get_tune_settings = zl10353_get_tune_settings,
 664
 665         .read_status = zl10353_read_status,
 666         .read_ber = zl10353_read_ber,
 667         .read_signal_strength = zl10353_read_signal_strength,
 668         .read_snr = zl10353_read_snr,
 669         .read_ucblocks = zl10353_read_ucblocks,
 670 };
 671
 672 module_param(debug, int, 0644);
 673 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
 674
 675 module_param(debug_regs, int, 0644);
 676 MODULE_PARM_DESC(debug_regs, "Turn on/off frontend register dumps (default:off).");
 677
 678 MODULE_DESCRIPTION("Zarlink ZL10353 DVB-T demodulator driver");
 679 MODULE_AUTHOR("Chris Pascoe");
 680 MODULE_LICENSE("GPL");
 681
 682 EXPORT_SYMBOL(zl10353_attach);