1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Intel Corporation
4 #include <linux/acpi.h>
6 #include <linux/delay.h>
8 #include <linux/module.h>
9 #include <linux/pm_runtime.h>
10 #include <media/v4l2-ctrls.h>
11 #include <media/v4l2-device.h>
12 #include <asm/unaligned.h>
14 #define IMX258_REG_VALUE_08BIT 1
15 #define IMX258_REG_VALUE_16BIT 2
17 #define IMX258_REG_MODE_SELECT 0x0100
18 #define IMX258_MODE_STANDBY 0x00
19 #define IMX258_MODE_STREAMING 0x01
22 #define IMX258_REG_CHIP_ID 0x0016
23 #define IMX258_CHIP_ID 0x0258
25 /* V_TIMING internal */
26 #define IMX258_VTS_30FPS 0x0c50
27 #define IMX258_VTS_30FPS_2K 0x0638
28 #define IMX258_VTS_30FPS_VGA 0x034c
29 #define IMX258_VTS_MAX 0xffff
32 #define IMX258_FLL_MIN 0x08a6
33 #define IMX258_FLL_MAX 0xffff
34 #define IMX258_FLL_STEP 1
35 #define IMX258_FLL_DEFAULT 0x0c98
37 /* HBLANK control - read only */
38 #define IMX258_PPL_DEFAULT 5352
40 /* Exposure control */
41 #define IMX258_REG_EXPOSURE 0x0202
42 #define IMX258_EXPOSURE_MIN 4
43 #define IMX258_EXPOSURE_STEP 1
44 #define IMX258_EXPOSURE_DEFAULT 0x640
45 #define IMX258_EXPOSURE_MAX 65535
47 /* Analog gain control */
48 #define IMX258_REG_ANALOG_GAIN 0x0204
49 #define IMX258_ANA_GAIN_MIN 0
50 #define IMX258_ANA_GAIN_MAX 480
51 #define IMX258_ANA_GAIN_STEP 1
52 #define IMX258_ANA_GAIN_DEFAULT 0x0
54 /* Digital gain control */
55 #define IMX258_REG_GR_DIGITAL_GAIN 0x020e
56 #define IMX258_REG_R_DIGITAL_GAIN 0x0210
57 #define IMX258_REG_B_DIGITAL_GAIN 0x0212
58 #define IMX258_REG_GB_DIGITAL_GAIN 0x0214
59 #define IMX258_DGTL_GAIN_MIN 0
60 #define IMX258_DGTL_GAIN_MAX 4096 /* Max = 0xFFF */
61 #define IMX258_DGTL_GAIN_DEFAULT 1024
62 #define IMX258_DGTL_GAIN_STEP 1
65 #define IMX258_REG_HDR 0x0220
66 #define IMX258_HDR_ON BIT(0)
67 #define IMX258_REG_HDR_RATIO 0x0222
68 #define IMX258_HDR_RATIO_MIN 0
69 #define IMX258_HDR_RATIO_MAX 5
70 #define IMX258_HDR_RATIO_STEP 1
71 #define IMX258_HDR_RATIO_DEFAULT 0x0
73 /* Test Pattern Control */
74 #define IMX258_REG_TEST_PATTERN 0x0600
77 #define REG_MIRROR_FLIP_CONTROL 0x0101
78 #define REG_CONFIG_MIRROR_FLIP 0x03
79 #define REG_CONFIG_FLIP_TEST_PATTERN 0x02
81 /* Input clock frequency in Hz */
82 #define IMX258_INPUT_CLOCK_FREQ 19200000
89 struct imx258_reg_list
{
91 const struct imx258_reg
*regs
;
94 /* Link frequency config */
95 struct imx258_link_freq_config
{
98 /* PLL registers for this link frequency */
99 struct imx258_reg_list reg_list
;
102 /* Mode : resolution and related config&values */
113 /* Index of Link frequency config to be used */
115 /* Default register values */
116 struct imx258_reg_list reg_list
;
119 /* 4208x3118 needs 1267Mbps/lane, 4 lanes */
120 static const struct imx258_reg mipi_data_rate_1267mbps
[] = {
138 static const struct imx258_reg mipi_data_rate_640mbps
[] = {
156 static const struct imx258_reg mode_4208x3118_regs
[] = {
275 static const struct imx258_reg mode_2104_1560_regs
[] = {
394 static const struct imx258_reg mode_1048_780_regs
[] = {
513 static const char * const imx258_test_pattern_menu
[] = {
516 "Eight Vertical Colour Bars",
517 "Colour Bars With Fade to Grey",
518 "Pseudorandom Sequence (PN9)",
521 /* Configurations for supported link frequencies */
522 #define IMX258_LINK_FREQ_634MHZ 633600000ULL
523 #define IMX258_LINK_FREQ_320MHZ 320000000ULL
526 IMX258_LINK_FREQ_1267MBPS
,
527 IMX258_LINK_FREQ_640MBPS
,
531 * pixel_rate = link_freq * data-rate * nr_of_lanes / bits_per_sample
532 * data rate => double data rate; number of lanes => 4; bits per pixel => 10
534 static u64
link_freq_to_pixel_rate(u64 f
)
542 /* Menu items for LINK_FREQ V4L2 control */
543 static const s64 link_freq_menu_items
[] = {
544 IMX258_LINK_FREQ_634MHZ
,
545 IMX258_LINK_FREQ_320MHZ
,
548 /* Link frequency configs */
549 static const struct imx258_link_freq_config link_freq_configs
[] = {
550 [IMX258_LINK_FREQ_1267MBPS
] = {
551 .pixels_per_line
= IMX258_PPL_DEFAULT
,
553 .num_of_regs
= ARRAY_SIZE(mipi_data_rate_1267mbps
),
554 .regs
= mipi_data_rate_1267mbps
,
557 [IMX258_LINK_FREQ_640MBPS
] = {
558 .pixels_per_line
= IMX258_PPL_DEFAULT
,
560 .num_of_regs
= ARRAY_SIZE(mipi_data_rate_640mbps
),
561 .regs
= mipi_data_rate_640mbps
,
567 static const struct imx258_mode supported_modes
[] = {
571 .vts_def
= IMX258_VTS_30FPS
,
572 .vts_min
= IMX258_VTS_30FPS
,
574 .num_of_regs
= ARRAY_SIZE(mode_4208x3118_regs
),
575 .regs
= mode_4208x3118_regs
,
577 .link_freq_index
= IMX258_LINK_FREQ_1267MBPS
,
582 .vts_def
= IMX258_VTS_30FPS_2K
,
583 .vts_min
= IMX258_VTS_30FPS_2K
,
585 .num_of_regs
= ARRAY_SIZE(mode_2104_1560_regs
),
586 .regs
= mode_2104_1560_regs
,
588 .link_freq_index
= IMX258_LINK_FREQ_640MBPS
,
593 .vts_def
= IMX258_VTS_30FPS_VGA
,
594 .vts_min
= IMX258_VTS_30FPS_VGA
,
596 .num_of_regs
= ARRAY_SIZE(mode_1048_780_regs
),
597 .regs
= mode_1048_780_regs
,
599 .link_freq_index
= IMX258_LINK_FREQ_640MBPS
,
604 struct v4l2_subdev sd
;
605 struct media_pad pad
;
607 struct v4l2_ctrl_handler ctrl_handler
;
609 struct v4l2_ctrl
*link_freq
;
610 struct v4l2_ctrl
*pixel_rate
;
611 struct v4l2_ctrl
*vblank
;
612 struct v4l2_ctrl
*hblank
;
613 struct v4l2_ctrl
*exposure
;
616 const struct imx258_mode
*cur_mode
;
619 * Mutex for serialized access:
620 * Protect sensor module set pad format and start/stop streaming safely.
624 /* Streaming on/off */
630 static inline struct imx258
*to_imx258(struct v4l2_subdev
*_sd
)
632 return container_of(_sd
, struct imx258
, sd
);
635 /* Read registers up to 2 at a time */
636 static int imx258_read_reg(struct imx258
*imx258
, u16 reg
, u32 len
, u32
*val
)
638 struct i2c_client
*client
= v4l2_get_subdevdata(&imx258
->sd
);
639 struct i2c_msg msgs
[2];
640 u8 addr_buf
[2] = { reg
>> 8, reg
& 0xff };
641 u8 data_buf
[4] = { 0, };
647 /* Write register address */
648 msgs
[0].addr
= client
->addr
;
650 msgs
[0].len
= ARRAY_SIZE(addr_buf
);
651 msgs
[0].buf
= addr_buf
;
653 /* Read data from register */
654 msgs
[1].addr
= client
->addr
;
655 msgs
[1].flags
= I2C_M_RD
;
657 msgs
[1].buf
= &data_buf
[4 - len
];
659 ret
= i2c_transfer(client
->adapter
, msgs
, ARRAY_SIZE(msgs
));
660 if (ret
!= ARRAY_SIZE(msgs
))
663 *val
= get_unaligned_be32(data_buf
);
668 /* Write registers up to 2 at a time */
669 static int imx258_write_reg(struct imx258
*imx258
, u16 reg
, u32 len
, u32 val
)
671 struct i2c_client
*client
= v4l2_get_subdevdata(&imx258
->sd
);
677 put_unaligned_be16(reg
, buf
);
678 put_unaligned_be32(val
<< (8 * (4 - len
)), buf
+ 2);
679 if (i2c_master_send(client
, buf
, len
+ 2) != len
+ 2)
685 /* Write a list of registers */
686 static int imx258_write_regs(struct imx258
*imx258
,
687 const struct imx258_reg
*regs
, u32 len
)
689 struct i2c_client
*client
= v4l2_get_subdevdata(&imx258
->sd
);
693 for (i
= 0; i
< len
; i
++) {
694 ret
= imx258_write_reg(imx258
, regs
[i
].address
, 1,
699 "Failed to write reg 0x%4.4x. error = %d\n",
700 regs
[i
].address
, ret
);
709 /* Open sub-device */
710 static int imx258_open(struct v4l2_subdev
*sd
, struct v4l2_subdev_fh
*fh
)
712 struct v4l2_mbus_framefmt
*try_fmt
=
713 v4l2_subdev_get_try_format(sd
, fh
->state
, 0);
715 /* Initialize try_fmt */
716 try_fmt
->width
= supported_modes
[0].width
;
717 try_fmt
->height
= supported_modes
[0].height
;
718 try_fmt
->code
= MEDIA_BUS_FMT_SGRBG10_1X10
;
719 try_fmt
->field
= V4L2_FIELD_NONE
;
724 static int imx258_update_digital_gain(struct imx258
*imx258
, u32 len
, u32 val
)
728 ret
= imx258_write_reg(imx258
, IMX258_REG_GR_DIGITAL_GAIN
,
729 IMX258_REG_VALUE_16BIT
,
733 ret
= imx258_write_reg(imx258
, IMX258_REG_GB_DIGITAL_GAIN
,
734 IMX258_REG_VALUE_16BIT
,
738 ret
= imx258_write_reg(imx258
, IMX258_REG_R_DIGITAL_GAIN
,
739 IMX258_REG_VALUE_16BIT
,
743 ret
= imx258_write_reg(imx258
, IMX258_REG_B_DIGITAL_GAIN
,
744 IMX258_REG_VALUE_16BIT
,
751 static int imx258_set_ctrl(struct v4l2_ctrl
*ctrl
)
753 struct imx258
*imx258
=
754 container_of(ctrl
->handler
, struct imx258
, ctrl_handler
);
755 struct i2c_client
*client
= v4l2_get_subdevdata(&imx258
->sd
);
759 * Applying V4L2 control value only happens
760 * when power is up for streaming
762 if (pm_runtime_get_if_in_use(&client
->dev
) == 0)
766 case V4L2_CID_ANALOGUE_GAIN
:
767 ret
= imx258_write_reg(imx258
, IMX258_REG_ANALOG_GAIN
,
768 IMX258_REG_VALUE_16BIT
,
771 case V4L2_CID_EXPOSURE
:
772 ret
= imx258_write_reg(imx258
, IMX258_REG_EXPOSURE
,
773 IMX258_REG_VALUE_16BIT
,
776 case V4L2_CID_DIGITAL_GAIN
:
777 ret
= imx258_update_digital_gain(imx258
, IMX258_REG_VALUE_16BIT
,
780 case V4L2_CID_TEST_PATTERN
:
781 ret
= imx258_write_reg(imx258
, IMX258_REG_TEST_PATTERN
,
782 IMX258_REG_VALUE_16BIT
,
784 ret
= imx258_write_reg(imx258
, REG_MIRROR_FLIP_CONTROL
,
785 IMX258_REG_VALUE_08BIT
,
786 !ctrl
->val
? REG_CONFIG_MIRROR_FLIP
:
787 REG_CONFIG_FLIP_TEST_PATTERN
);
789 case V4L2_CID_WIDE_DYNAMIC_RANGE
:
791 ret
= imx258_write_reg(imx258
, IMX258_REG_HDR
,
792 IMX258_REG_VALUE_08BIT
,
793 IMX258_HDR_RATIO_MIN
);
795 ret
= imx258_write_reg(imx258
, IMX258_REG_HDR
,
796 IMX258_REG_VALUE_08BIT
,
800 ret
= imx258_write_reg(imx258
, IMX258_REG_HDR_RATIO
,
801 IMX258_REG_VALUE_08BIT
,
802 BIT(IMX258_HDR_RATIO_MAX
));
806 dev_info(&client
->dev
,
807 "ctrl(id:0x%x,val:0x%x) is not handled\n",
808 ctrl
->id
, ctrl
->val
);
813 pm_runtime_put(&client
->dev
);
818 static const struct v4l2_ctrl_ops imx258_ctrl_ops
= {
819 .s_ctrl
= imx258_set_ctrl
,
822 static int imx258_enum_mbus_code(struct v4l2_subdev
*sd
,
823 struct v4l2_subdev_state
*sd_state
,
824 struct v4l2_subdev_mbus_code_enum
*code
)
826 /* Only one bayer order(GRBG) is supported */
830 code
->code
= MEDIA_BUS_FMT_SGRBG10_1X10
;
835 static int imx258_enum_frame_size(struct v4l2_subdev
*sd
,
836 struct v4l2_subdev_state
*sd_state
,
837 struct v4l2_subdev_frame_size_enum
*fse
)
839 if (fse
->index
>= ARRAY_SIZE(supported_modes
))
842 if (fse
->code
!= MEDIA_BUS_FMT_SGRBG10_1X10
)
845 fse
->min_width
= supported_modes
[fse
->index
].width
;
846 fse
->max_width
= fse
->min_width
;
847 fse
->min_height
= supported_modes
[fse
->index
].height
;
848 fse
->max_height
= fse
->min_height
;
853 static void imx258_update_pad_format(const struct imx258_mode
*mode
,
854 struct v4l2_subdev_format
*fmt
)
856 fmt
->format
.width
= mode
->width
;
857 fmt
->format
.height
= mode
->height
;
858 fmt
->format
.code
= MEDIA_BUS_FMT_SGRBG10_1X10
;
859 fmt
->format
.field
= V4L2_FIELD_NONE
;
862 static int __imx258_get_pad_format(struct imx258
*imx258
,
863 struct v4l2_subdev_state
*sd_state
,
864 struct v4l2_subdev_format
*fmt
)
866 if (fmt
->which
== V4L2_SUBDEV_FORMAT_TRY
)
867 fmt
->format
= *v4l2_subdev_get_try_format(&imx258
->sd
,
871 imx258_update_pad_format(imx258
->cur_mode
, fmt
);
876 static int imx258_get_pad_format(struct v4l2_subdev
*sd
,
877 struct v4l2_subdev_state
*sd_state
,
878 struct v4l2_subdev_format
*fmt
)
880 struct imx258
*imx258
= to_imx258(sd
);
883 mutex_lock(&imx258
->mutex
);
884 ret
= __imx258_get_pad_format(imx258
, sd_state
, fmt
);
885 mutex_unlock(&imx258
->mutex
);
890 static int imx258_set_pad_format(struct v4l2_subdev
*sd
,
891 struct v4l2_subdev_state
*sd_state
,
892 struct v4l2_subdev_format
*fmt
)
894 struct imx258
*imx258
= to_imx258(sd
);
895 const struct imx258_mode
*mode
;
896 struct v4l2_mbus_framefmt
*framefmt
;
903 mutex_lock(&imx258
->mutex
);
905 /* Only one raw bayer(GBRG) order is supported */
906 fmt
->format
.code
= MEDIA_BUS_FMT_SGRBG10_1X10
;
908 mode
= v4l2_find_nearest_size(supported_modes
,
909 ARRAY_SIZE(supported_modes
), width
, height
,
910 fmt
->format
.width
, fmt
->format
.height
);
911 imx258_update_pad_format(mode
, fmt
);
912 if (fmt
->which
== V4L2_SUBDEV_FORMAT_TRY
) {
913 framefmt
= v4l2_subdev_get_try_format(sd
, sd_state
, fmt
->pad
);
914 *framefmt
= fmt
->format
;
916 imx258
->cur_mode
= mode
;
917 __v4l2_ctrl_s_ctrl(imx258
->link_freq
, mode
->link_freq_index
);
919 link_freq
= link_freq_menu_items
[mode
->link_freq_index
];
920 pixel_rate
= link_freq_to_pixel_rate(link_freq
);
921 __v4l2_ctrl_s_ctrl_int64(imx258
->pixel_rate
, pixel_rate
);
922 /* Update limits and set FPS to default */
923 vblank_def
= imx258
->cur_mode
->vts_def
-
924 imx258
->cur_mode
->height
;
925 vblank_min
= imx258
->cur_mode
->vts_min
-
926 imx258
->cur_mode
->height
;
927 __v4l2_ctrl_modify_range(
928 imx258
->vblank
, vblank_min
,
929 IMX258_VTS_MAX
- imx258
->cur_mode
->height
, 1,
931 __v4l2_ctrl_s_ctrl(imx258
->vblank
, vblank_def
);
933 link_freq_configs
[mode
->link_freq_index
].pixels_per_line
934 - imx258
->cur_mode
->width
;
935 __v4l2_ctrl_modify_range(imx258
->hblank
, h_blank
,
936 h_blank
, 1, h_blank
);
939 mutex_unlock(&imx258
->mutex
);
944 /* Start streaming */
945 static int imx258_start_streaming(struct imx258
*imx258
)
947 struct i2c_client
*client
= v4l2_get_subdevdata(&imx258
->sd
);
948 const struct imx258_reg_list
*reg_list
;
949 int ret
, link_freq_index
;
952 link_freq_index
= imx258
->cur_mode
->link_freq_index
;
953 reg_list
= &link_freq_configs
[link_freq_index
].reg_list
;
954 ret
= imx258_write_regs(imx258
, reg_list
->regs
, reg_list
->num_of_regs
);
956 dev_err(&client
->dev
, "%s failed to set plls\n", __func__
);
960 /* Apply default values of current mode */
961 reg_list
= &imx258
->cur_mode
->reg_list
;
962 ret
= imx258_write_regs(imx258
, reg_list
->regs
, reg_list
->num_of_regs
);
964 dev_err(&client
->dev
, "%s failed to set mode\n", __func__
);
968 /* Set Orientation be 180 degree */
969 ret
= imx258_write_reg(imx258
, REG_MIRROR_FLIP_CONTROL
,
970 IMX258_REG_VALUE_08BIT
, REG_CONFIG_MIRROR_FLIP
);
972 dev_err(&client
->dev
, "%s failed to set orientation\n",
977 /* Apply customized values from user */
978 ret
= __v4l2_ctrl_handler_setup(imx258
->sd
.ctrl_handler
);
982 /* set stream on register */
983 return imx258_write_reg(imx258
, IMX258_REG_MODE_SELECT
,
984 IMX258_REG_VALUE_08BIT
,
985 IMX258_MODE_STREAMING
);
989 static int imx258_stop_streaming(struct imx258
*imx258
)
991 struct i2c_client
*client
= v4l2_get_subdevdata(&imx258
->sd
);
994 /* set stream off register */
995 ret
= imx258_write_reg(imx258
, IMX258_REG_MODE_SELECT
,
996 IMX258_REG_VALUE_08BIT
, IMX258_MODE_STANDBY
);
998 dev_err(&client
->dev
, "%s failed to set stream\n", __func__
);
1001 * Return success even if it was an error, as there is nothing the
1002 * caller can do about it.
1007 static int imx258_power_on(struct device
*dev
)
1009 struct v4l2_subdev
*sd
= dev_get_drvdata(dev
);
1010 struct imx258
*imx258
= to_imx258(sd
);
1013 ret
= clk_prepare_enable(imx258
->clk
);
1015 dev_err(dev
, "failed to enable clock\n");
1020 static int imx258_power_off(struct device
*dev
)
1022 struct v4l2_subdev
*sd
= dev_get_drvdata(dev
);
1023 struct imx258
*imx258
= to_imx258(sd
);
1025 clk_disable_unprepare(imx258
->clk
);
1030 static int imx258_set_stream(struct v4l2_subdev
*sd
, int enable
)
1032 struct imx258
*imx258
= to_imx258(sd
);
1033 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
1036 mutex_lock(&imx258
->mutex
);
1037 if (imx258
->streaming
== enable
) {
1038 mutex_unlock(&imx258
->mutex
);
1043 ret
= pm_runtime_resume_and_get(&client
->dev
);
1048 * Apply default & customized values
1049 * and then start streaming.
1051 ret
= imx258_start_streaming(imx258
);
1055 imx258_stop_streaming(imx258
);
1056 pm_runtime_put(&client
->dev
);
1059 imx258
->streaming
= enable
;
1060 mutex_unlock(&imx258
->mutex
);
1065 pm_runtime_put(&client
->dev
);
1067 mutex_unlock(&imx258
->mutex
);
1072 static int __maybe_unused
imx258_suspend(struct device
*dev
)
1074 struct v4l2_subdev
*sd
= dev_get_drvdata(dev
);
1075 struct imx258
*imx258
= to_imx258(sd
);
1077 if (imx258
->streaming
)
1078 imx258_stop_streaming(imx258
);
1083 static int __maybe_unused
imx258_resume(struct device
*dev
)
1085 struct v4l2_subdev
*sd
= dev_get_drvdata(dev
);
1086 struct imx258
*imx258
= to_imx258(sd
);
1089 if (imx258
->streaming
) {
1090 ret
= imx258_start_streaming(imx258
);
1098 imx258_stop_streaming(imx258
);
1099 imx258
->streaming
= 0;
1103 /* Verify chip ID */
1104 static int imx258_identify_module(struct imx258
*imx258
)
1106 struct i2c_client
*client
= v4l2_get_subdevdata(&imx258
->sd
);
1110 ret
= imx258_read_reg(imx258
, IMX258_REG_CHIP_ID
,
1111 IMX258_REG_VALUE_16BIT
, &val
);
1113 dev_err(&client
->dev
, "failed to read chip id %x\n",
1118 if (val
!= IMX258_CHIP_ID
) {
1119 dev_err(&client
->dev
, "chip id mismatch: %x!=%x\n",
1120 IMX258_CHIP_ID
, val
);
1127 static const struct v4l2_subdev_video_ops imx258_video_ops
= {
1128 .s_stream
= imx258_set_stream
,
1131 static const struct v4l2_subdev_pad_ops imx258_pad_ops
= {
1132 .enum_mbus_code
= imx258_enum_mbus_code
,
1133 .get_fmt
= imx258_get_pad_format
,
1134 .set_fmt
= imx258_set_pad_format
,
1135 .enum_frame_size
= imx258_enum_frame_size
,
1138 static const struct v4l2_subdev_ops imx258_subdev_ops
= {
1139 .video
= &imx258_video_ops
,
1140 .pad
= &imx258_pad_ops
,
1143 static const struct v4l2_subdev_internal_ops imx258_internal_ops
= {
1144 .open
= imx258_open
,
1147 /* Initialize control handlers */
1148 static int imx258_init_controls(struct imx258
*imx258
)
1150 struct i2c_client
*client
= v4l2_get_subdevdata(&imx258
->sd
);
1151 struct v4l2_ctrl_handler
*ctrl_hdlr
;
1158 ctrl_hdlr
= &imx258
->ctrl_handler
;
1159 ret
= v4l2_ctrl_handler_init(ctrl_hdlr
, 8);
1163 mutex_init(&imx258
->mutex
);
1164 ctrl_hdlr
->lock
= &imx258
->mutex
;
1165 imx258
->link_freq
= v4l2_ctrl_new_int_menu(ctrl_hdlr
,
1168 ARRAY_SIZE(link_freq_menu_items
) - 1,
1170 link_freq_menu_items
);
1172 if (imx258
->link_freq
)
1173 imx258
->link_freq
->flags
|= V4L2_CTRL_FLAG_READ_ONLY
;
1175 pixel_rate_max
= link_freq_to_pixel_rate(link_freq_menu_items
[0]);
1176 pixel_rate_min
= link_freq_to_pixel_rate(link_freq_menu_items
[1]);
1177 /* By default, PIXEL_RATE is read only */
1178 imx258
->pixel_rate
= v4l2_ctrl_new_std(ctrl_hdlr
, &imx258_ctrl_ops
,
1179 V4L2_CID_PIXEL_RATE
,
1180 pixel_rate_min
, pixel_rate_max
,
1184 vblank_def
= imx258
->cur_mode
->vts_def
- imx258
->cur_mode
->height
;
1185 vblank_min
= imx258
->cur_mode
->vts_min
- imx258
->cur_mode
->height
;
1186 imx258
->vblank
= v4l2_ctrl_new_std(
1187 ctrl_hdlr
, &imx258_ctrl_ops
, V4L2_CID_VBLANK
,
1189 IMX258_VTS_MAX
- imx258
->cur_mode
->height
, 1,
1193 imx258
->vblank
->flags
|= V4L2_CTRL_FLAG_READ_ONLY
;
1195 imx258
->hblank
= v4l2_ctrl_new_std(
1196 ctrl_hdlr
, &imx258_ctrl_ops
, V4L2_CID_HBLANK
,
1197 IMX258_PPL_DEFAULT
- imx258
->cur_mode
->width
,
1198 IMX258_PPL_DEFAULT
- imx258
->cur_mode
->width
,
1200 IMX258_PPL_DEFAULT
- imx258
->cur_mode
->width
);
1203 imx258
->hblank
->flags
|= V4L2_CTRL_FLAG_READ_ONLY
;
1205 imx258
->exposure
= v4l2_ctrl_new_std(
1206 ctrl_hdlr
, &imx258_ctrl_ops
,
1207 V4L2_CID_EXPOSURE
, IMX258_EXPOSURE_MIN
,
1208 IMX258_EXPOSURE_MAX
, IMX258_EXPOSURE_STEP
,
1209 IMX258_EXPOSURE_DEFAULT
);
1211 v4l2_ctrl_new_std(ctrl_hdlr
, &imx258_ctrl_ops
, V4L2_CID_ANALOGUE_GAIN
,
1212 IMX258_ANA_GAIN_MIN
, IMX258_ANA_GAIN_MAX
,
1213 IMX258_ANA_GAIN_STEP
, IMX258_ANA_GAIN_DEFAULT
);
1215 v4l2_ctrl_new_std(ctrl_hdlr
, &imx258_ctrl_ops
, V4L2_CID_DIGITAL_GAIN
,
1216 IMX258_DGTL_GAIN_MIN
, IMX258_DGTL_GAIN_MAX
,
1217 IMX258_DGTL_GAIN_STEP
,
1218 IMX258_DGTL_GAIN_DEFAULT
);
1220 v4l2_ctrl_new_std(ctrl_hdlr
, &imx258_ctrl_ops
, V4L2_CID_WIDE_DYNAMIC_RANGE
,
1221 0, 1, 1, IMX258_HDR_RATIO_DEFAULT
);
1223 v4l2_ctrl_new_std_menu_items(ctrl_hdlr
, &imx258_ctrl_ops
,
1224 V4L2_CID_TEST_PATTERN
,
1225 ARRAY_SIZE(imx258_test_pattern_menu
) - 1,
1226 0, 0, imx258_test_pattern_menu
);
1228 if (ctrl_hdlr
->error
) {
1229 ret
= ctrl_hdlr
->error
;
1230 dev_err(&client
->dev
, "%s control init failed (%d)\n",
1235 imx258
->sd
.ctrl_handler
= ctrl_hdlr
;
1240 v4l2_ctrl_handler_free(ctrl_hdlr
);
1241 mutex_destroy(&imx258
->mutex
);
1246 static void imx258_free_controls(struct imx258
*imx258
)
1248 v4l2_ctrl_handler_free(imx258
->sd
.ctrl_handler
);
1249 mutex_destroy(&imx258
->mutex
);
1252 static int imx258_probe(struct i2c_client
*client
)
1254 struct imx258
*imx258
;
1258 imx258
= devm_kzalloc(&client
->dev
, sizeof(*imx258
), GFP_KERNEL
);
1262 imx258
->clk
= devm_clk_get_optional(&client
->dev
, NULL
);
1264 dev_dbg(&client
->dev
,
1265 "no clock provided, using clock-frequency property\n");
1267 device_property_read_u32(&client
->dev
, "clock-frequency", &val
);
1268 if (val
!= IMX258_INPUT_CLOCK_FREQ
)
1270 } else if (IS_ERR(imx258
->clk
)) {
1271 return dev_err_probe(&client
->dev
, PTR_ERR(imx258
->clk
),
1272 "error getting clock\n");
1274 if (clk_get_rate(imx258
->clk
) != IMX258_INPUT_CLOCK_FREQ
) {
1275 dev_err(&client
->dev
, "input clock frequency not supported\n");
1280 * Check that the device is mounted upside down. The driver only
1281 * supports a single pixel order right now.
1283 ret
= device_property_read_u32(&client
->dev
, "rotation", &val
);
1284 if (ret
|| val
!= 180)
1287 /* Initialize subdev */
1288 v4l2_i2c_subdev_init(&imx258
->sd
, client
, &imx258_subdev_ops
);
1290 /* Will be powered off via pm_runtime_idle */
1291 ret
= imx258_power_on(&client
->dev
);
1295 /* Check module identity */
1296 ret
= imx258_identify_module(imx258
);
1298 goto error_identify
;
1300 /* Set default mode to max resolution */
1301 imx258
->cur_mode
= &supported_modes
[0];
1303 ret
= imx258_init_controls(imx258
);
1305 goto error_identify
;
1307 /* Initialize subdev */
1308 imx258
->sd
.internal_ops
= &imx258_internal_ops
;
1309 imx258
->sd
.flags
|= V4L2_SUBDEV_FL_HAS_DEVNODE
;
1310 imx258
->sd
.entity
.function
= MEDIA_ENT_F_CAM_SENSOR
;
1312 /* Initialize source pad */
1313 imx258
->pad
.flags
= MEDIA_PAD_FL_SOURCE
;
1315 ret
= media_entity_pads_init(&imx258
->sd
.entity
, 1, &imx258
->pad
);
1317 goto error_handler_free
;
1319 ret
= v4l2_async_register_subdev_sensor(&imx258
->sd
);
1321 goto error_media_entity
;
1323 pm_runtime_set_active(&client
->dev
);
1324 pm_runtime_enable(&client
->dev
);
1325 pm_runtime_idle(&client
->dev
);
1330 media_entity_cleanup(&imx258
->sd
.entity
);
1333 imx258_free_controls(imx258
);
1336 imx258_power_off(&client
->dev
);
1341 static int imx258_remove(struct i2c_client
*client
)
1343 struct v4l2_subdev
*sd
= i2c_get_clientdata(client
);
1344 struct imx258
*imx258
= to_imx258(sd
);
1346 v4l2_async_unregister_subdev(sd
);
1347 media_entity_cleanup(&sd
->entity
);
1348 imx258_free_controls(imx258
);
1350 pm_runtime_disable(&client
->dev
);
1351 if (!pm_runtime_status_suspended(&client
->dev
))
1352 imx258_power_off(&client
->dev
);
1353 pm_runtime_set_suspended(&client
->dev
);
1358 static const struct dev_pm_ops imx258_pm_ops
= {
1359 SET_SYSTEM_SLEEP_PM_OPS(imx258_suspend
, imx258_resume
)
1360 SET_RUNTIME_PM_OPS(imx258_power_off
, imx258_power_on
, NULL
)
1364 static const struct acpi_device_id imx258_acpi_ids
[] = {
1369 MODULE_DEVICE_TABLE(acpi
, imx258_acpi_ids
);
1372 static const struct of_device_id imx258_dt_ids
[] = {
1373 { .compatible
= "sony,imx258" },
1376 MODULE_DEVICE_TABLE(of
, imx258_dt_ids
);
1378 static struct i2c_driver imx258_i2c_driver
= {
1381 .pm
= &imx258_pm_ops
,
1382 .acpi_match_table
= ACPI_PTR(imx258_acpi_ids
),
1383 .of_match_table
= imx258_dt_ids
,
1385 .probe_new
= imx258_probe
,
1386 .remove
= imx258_remove
,
1389 module_i2c_driver(imx258_i2c_driver
);
1391 MODULE_AUTHOR("Yeh, Andy <andy.yeh@intel.com>");
1392 MODULE_AUTHOR("Chiang, Alan");
1393 MODULE_AUTHOR("Chen, Jason");
1394 MODULE_DESCRIPTION("Sony IMX258 sensor driver");
1395 MODULE_LICENSE("GPL v2");