]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/blob - drivers/media/pci/cx23885/cx23885-cards.c
projects / mirror_ubuntu-hirsute-kernel.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
[mirror_ubuntu-hirsute-kernel.git] / drivers / media / pci / cx23885 / cx23885-cards.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Driver for the Conexant CX23885 PCIe bridge
4 *
5 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6 */
7
8 #include "cx23885.h"
9
10 #include <linux/init.h>
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/delay.h>
14 #include <media/drv-intf/cx25840.h>
15 #include <linux/firmware.h>
16 #include <misc/altera.h>
17
18 #include "tuner-xc2028.h"
19 #include "netup-eeprom.h"
20 #include "netup-init.h"
21 #include "altera-ci.h"
22 #include "xc4000.h"
23 #include "xc5000.h"
24 #include "cx23888-ir.h"
25
26 static unsigned int netup_card_rev = 4;
27 module_param(netup_card_rev, int, 0644);
28 MODULE_PARM_DESC(netup_card_rev,
29 "NetUP Dual DVB-T/C CI card revision");
30 static unsigned int enable_885_ir;
31 module_param(enable_885_ir, int, 0644);
32 MODULE_PARM_DESC(enable_885_ir,
33 "Enable integrated IR controller for supported\n"
34 "\t\t CX2388[57] boards that are wired for it:\n"
35 "\t\t\tHVR-1250 (reported safe)\n"
36 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
37 "\t\t\tTeVii S470 (reported unsafe)\n"
38 "\t\t This can cause an interrupt storm with some cards.\n"
39 "\t\t Default: 0 [Disabled]");
40
41 /* ------------------------------------------------------------------ */
42 /* board config info */
43
44 struct cx23885_board cx23885_boards[] = {
45 [CX23885_BOARD_UNKNOWN] = {
46 .name = "UNKNOWN/GENERIC",
47 /* Ensure safe default for unknown boards */
48 .clk_freq = 0,
49 .input = {{
50 .type = CX23885_VMUX_COMPOSITE1,
51 .vmux = 0,
52 }, {
53 .type = CX23885_VMUX_COMPOSITE2,
54 .vmux = 1,
55 }, {
56 .type = CX23885_VMUX_COMPOSITE3,
57 .vmux = 2,
58 }, {
59 .type = CX23885_VMUX_COMPOSITE4,
60 .vmux = 3,
61 } },
62 },
63 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
64 .name = "Hauppauge WinTV-HVR1800lp",
65 .portc = CX23885_MPEG_DVB,
66 .input = {{
67 .type = CX23885_VMUX_TELEVISION,
68 .vmux = 0,
69 .gpio0 = 0xff00,
70 }, {
71 .type = CX23885_VMUX_DEBUG,
72 .vmux = 0,
73 .gpio0 = 0xff01,
74 }, {
75 .type = CX23885_VMUX_COMPOSITE1,
76 .vmux = 1,
77 .gpio0 = 0xff02,
78 }, {
79 .type = CX23885_VMUX_SVIDEO,
80 .vmux = 2,
81 .gpio0 = 0xff02,
82 } },
83 },
84 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
85 .name = "Hauppauge WinTV-HVR1800",
86 .porta = CX23885_ANALOG_VIDEO,
87 .portb = CX23885_MPEG_ENCODER,
88 .portc = CX23885_MPEG_DVB,
89 .tuner_type = TUNER_PHILIPS_TDA8290,
90 .tuner_addr = 0x42, /* 0x84 >> 1 */
91 .tuner_bus = 1,
92 .input = {{
93 .type = CX23885_VMUX_TELEVISION,
94 .vmux = CX25840_VIN7_CH3 |
95 CX25840_VIN5_CH2 |
96 CX25840_VIN2_CH1,
97 .amux = CX25840_AUDIO8,
98 .gpio0 = 0,
99 }, {
100 .type = CX23885_VMUX_COMPOSITE1,
101 .vmux = CX25840_VIN7_CH3 |
102 CX25840_VIN4_CH2 |
103 CX25840_VIN6_CH1,
104 .amux = CX25840_AUDIO7,
105 .gpio0 = 0,
106 }, {
107 .type = CX23885_VMUX_SVIDEO,
108 .vmux = CX25840_VIN7_CH3 |
109 CX25840_VIN4_CH2 |
110 CX25840_VIN8_CH1 |
111 CX25840_SVIDEO_ON,
112 .amux = CX25840_AUDIO7,
113 .gpio0 = 0,
114 } },
115 },
116 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
117 .name = "Hauppauge WinTV-HVR1250",
118 .porta = CX23885_ANALOG_VIDEO,
119 .portc = CX23885_MPEG_DVB,
120 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
121 .tuner_type = TUNER_PHILIPS_TDA8290,
122 .tuner_addr = 0x42, /* 0x84 >> 1 */
123 .tuner_bus = 1,
124 #endif
125 .force_bff = 1,
126 .input = {{
127 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
128 .type = CX23885_VMUX_TELEVISION,
129 .vmux = CX25840_VIN7_CH3 |
130 CX25840_VIN5_CH2 |
131 CX25840_VIN2_CH1,
132 .amux = CX25840_AUDIO8,
133 .gpio0 = 0xff00,
134 }, {
135 #endif
136 .type = CX23885_VMUX_COMPOSITE1,
137 .vmux = CX25840_VIN7_CH3 |
138 CX25840_VIN4_CH2 |
139 CX25840_VIN6_CH1,
140 .amux = CX25840_AUDIO7,
141 .gpio0 = 0xff02,
142 }, {
143 .type = CX23885_VMUX_SVIDEO,
144 .vmux = CX25840_VIN7_CH3 |
145 CX25840_VIN4_CH2 |
146 CX25840_VIN8_CH1 |
147 CX25840_SVIDEO_ON,
148 .amux = CX25840_AUDIO7,
149 .gpio0 = 0xff02,
150 } },
151 },
152 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
153 .name = "DViCO FusionHDTV5 Express",
154 .portb = CX23885_MPEG_DVB,
155 },
156 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
157 .name = "Hauppauge WinTV-HVR1500Q",
158 .portc = CX23885_MPEG_DVB,
159 },
160 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
161 .name = "Hauppauge WinTV-HVR1500",
162 .porta = CX23885_ANALOG_VIDEO,
163 .portc = CX23885_MPEG_DVB,
164 .tuner_type = TUNER_XC2028,
165 .tuner_addr = 0x61, /* 0xc2 >> 1 */
166 .input = {{
167 .type = CX23885_VMUX_TELEVISION,
168 .vmux = CX25840_VIN7_CH3 |
169 CX25840_VIN5_CH2 |
170 CX25840_VIN2_CH1,
171 .gpio0 = 0,
172 }, {
173 .type = CX23885_VMUX_COMPOSITE1,
174 .vmux = CX25840_VIN7_CH3 |
175 CX25840_VIN4_CH2 |
176 CX25840_VIN6_CH1,
177 .gpio0 = 0,
178 }, {
179 .type = CX23885_VMUX_SVIDEO,
180 .vmux = CX25840_VIN7_CH3 |
181 CX25840_VIN4_CH2 |
182 CX25840_VIN8_CH1 |
183 CX25840_SVIDEO_ON,
184 .gpio0 = 0,
185 } },
186 },
187 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
188 .name = "Hauppauge WinTV-HVR1200",
189 .portc = CX23885_MPEG_DVB,
190 },
191 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
192 .name = "Hauppauge WinTV-HVR1700",
193 .portc = CX23885_MPEG_DVB,
194 },
195 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
196 .name = "Hauppauge WinTV-HVR1400",
197 .portc = CX23885_MPEG_DVB,
198 },
199 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
200 .name = "DViCO FusionHDTV7 Dual Express",
201 .portb = CX23885_MPEG_DVB,
202 .portc = CX23885_MPEG_DVB,
203 },
204 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
205 .name = "DViCO FusionHDTV DVB-T Dual Express",
206 .portb = CX23885_MPEG_DVB,
207 .portc = CX23885_MPEG_DVB,
208 },
209 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
210 .name = "Leadtek Winfast PxDVR3200 H",
211 .portc = CX23885_MPEG_DVB,
212 },
213 [CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = {
214 .name = "Leadtek Winfast PxPVR2200",
215 .porta = CX23885_ANALOG_VIDEO,
216 .tuner_type = TUNER_XC2028,
217 .tuner_addr = 0x61,
218 .tuner_bus = 1,
219 .input = {{
220 .type = CX23885_VMUX_TELEVISION,
221 .vmux = CX25840_VIN2_CH1 |
222 CX25840_VIN5_CH2,
223 .amux = CX25840_AUDIO8,
224 .gpio0 = 0x704040,
225 }, {
226 .type = CX23885_VMUX_COMPOSITE1,
227 .vmux = CX25840_COMPOSITE1,
228 .amux = CX25840_AUDIO7,
229 .gpio0 = 0x704040,
230 }, {
231 .type = CX23885_VMUX_SVIDEO,
232 .vmux = CX25840_SVIDEO_LUMA3 |
233 CX25840_SVIDEO_CHROMA4,
234 .amux = CX25840_AUDIO7,
235 .gpio0 = 0x704040,
236 }, {
237 .type = CX23885_VMUX_COMPONENT,
238 .vmux = CX25840_VIN7_CH1 |
239 CX25840_VIN6_CH2 |
240 CX25840_VIN8_CH3 |
241 CX25840_COMPONENT_ON,
242 .amux = CX25840_AUDIO7,
243 .gpio0 = 0x704040,
244 } },
245 },
246 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
247 .name = "Leadtek Winfast PxDVR3200 H XC4000",
248 .porta = CX23885_ANALOG_VIDEO,
249 .portc = CX23885_MPEG_DVB,
250 .tuner_type = TUNER_XC4000,
251 .tuner_addr = 0x61,
252 .radio_type = UNSET,
253 .radio_addr = ADDR_UNSET,
254 .input = {{
255 .type = CX23885_VMUX_TELEVISION,
256 .vmux = CX25840_VIN2_CH1 |
257 CX25840_VIN5_CH2 |
258 CX25840_NONE0_CH3,
259 }, {
260 .type = CX23885_VMUX_COMPOSITE1,
261 .vmux = CX25840_COMPOSITE1,
262 }, {
263 .type = CX23885_VMUX_SVIDEO,
264 .vmux = CX25840_SVIDEO_LUMA3 |
265 CX25840_SVIDEO_CHROMA4,
266 }, {
267 .type = CX23885_VMUX_COMPONENT,
268 .vmux = CX25840_VIN7_CH1 |
269 CX25840_VIN6_CH2 |
270 CX25840_VIN8_CH3 |
271 CX25840_COMPONENT_ON,
272 } },
273 },
274 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
275 .name = "Compro VideoMate E650F",
276 .portc = CX23885_MPEG_DVB,
277 },
278 [CX23885_BOARD_TBS_6920] = {
279 .name = "TurboSight TBS 6920",
280 .portb = CX23885_MPEG_DVB,
281 },
282 [CX23885_BOARD_TBS_6980] = {
283 .name = "TurboSight TBS 6980",
284 .portb = CX23885_MPEG_DVB,
285 .portc = CX23885_MPEG_DVB,
286 },
287 [CX23885_BOARD_TBS_6981] = {
288 .name = "TurboSight TBS 6981",
289 .portb = CX23885_MPEG_DVB,
290 .portc = CX23885_MPEG_DVB,
291 },
292 [CX23885_BOARD_TEVII_S470] = {
293 .name = "TeVii S470",
294 .portb = CX23885_MPEG_DVB,
295 },
296 [CX23885_BOARD_DVBWORLD_2005] = {
297 .name = "DVBWorld DVB-S2 2005",
298 .portb = CX23885_MPEG_DVB,
299 },
300 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
301 .ci_type = 1,
302 .name = "NetUP Dual DVB-S2 CI",
303 .portb = CX23885_MPEG_DVB,
304 .portc = CX23885_MPEG_DVB,
305 },
306 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
307 .name = "Hauppauge WinTV-HVR1270",
308 .portc = CX23885_MPEG_DVB,
309 },
310 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
311 .name = "Hauppauge WinTV-HVR1275",
312 .portc = CX23885_MPEG_DVB,
313 },
314 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
315 .name = "Hauppauge WinTV-HVR1255",
316 .porta = CX23885_ANALOG_VIDEO,
317 .portc = CX23885_MPEG_DVB,
318 .tuner_type = TUNER_ABSENT,
319 .tuner_addr = 0x42, /* 0x84 >> 1 */
320 .force_bff = 1,
321 .input = {{
322 .type = CX23885_VMUX_TELEVISION,
323 .vmux = CX25840_VIN7_CH3 |
324 CX25840_VIN5_CH2 |
325 CX25840_VIN2_CH1 |
326 CX25840_DIF_ON,
327 .amux = CX25840_AUDIO8,
328 }, {
329 .type = CX23885_VMUX_COMPOSITE1,
330 .vmux = CX25840_VIN7_CH3 |
331 CX25840_VIN4_CH2 |
332 CX25840_VIN6_CH1,
333 .amux = CX25840_AUDIO7,
334 }, {
335 .type = CX23885_VMUX_SVIDEO,
336 .vmux = CX25840_VIN7_CH3 |
337 CX25840_VIN4_CH2 |
338 CX25840_VIN8_CH1 |
339 CX25840_SVIDEO_ON,
340 .amux = CX25840_AUDIO7,
341 } },
342 },
343 [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
344 .name = "Hauppauge WinTV-HVR1255",
345 .porta = CX23885_ANALOG_VIDEO,
346 .portc = CX23885_MPEG_DVB,
347 .tuner_type = TUNER_ABSENT,
348 .tuner_addr = 0x42, /* 0x84 >> 1 */
349 .force_bff = 1,
350 .input = {{
351 .type = CX23885_VMUX_TELEVISION,
352 .vmux = CX25840_VIN7_CH3 |
353 CX25840_VIN5_CH2 |
354 CX25840_VIN2_CH1 |
355 CX25840_DIF_ON,
356 .amux = CX25840_AUDIO8,
357 }, {
358 .type = CX23885_VMUX_SVIDEO,
359 .vmux = CX25840_VIN7_CH3 |
360 CX25840_VIN4_CH2 |
361 CX25840_VIN8_CH1 |
362 CX25840_SVIDEO_ON,
363 .amux = CX25840_AUDIO7,
364 } },
365 },
366 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
367 .name = "Hauppauge WinTV-HVR1210",
368 .portc = CX23885_MPEG_DVB,
369 },
370 [CX23885_BOARD_MYGICA_X8506] = {
371 .name = "Mygica X8506 DMB-TH",
372 .tuner_type = TUNER_XC5000,
373 .tuner_addr = 0x61,
374 .tuner_bus = 1,
375 .porta = CX23885_ANALOG_VIDEO,
376 .portb = CX23885_MPEG_DVB,
377 .input = {
378 {
379 .type = CX23885_VMUX_TELEVISION,
380 .vmux = CX25840_COMPOSITE2,
381 },
382 {
383 .type = CX23885_VMUX_COMPOSITE1,
384 .vmux = CX25840_COMPOSITE8,
385 },
386 {
387 .type = CX23885_VMUX_SVIDEO,
388 .vmux = CX25840_SVIDEO_LUMA3 |
389 CX25840_SVIDEO_CHROMA4,
390 },
391 {
392 .type = CX23885_VMUX_COMPONENT,
393 .vmux = CX25840_COMPONENT_ON |
394 CX25840_VIN1_CH1 |
395 CX25840_VIN6_CH2 |
396 CX25840_VIN7_CH3,
397 },
398 },
399 },
400 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
401 .name = "Magic-Pro ProHDTV Extreme 2",
402 .tuner_type = TUNER_XC5000,
403 .tuner_addr = 0x61,
404 .tuner_bus = 1,
405 .porta = CX23885_ANALOG_VIDEO,
406 .portb = CX23885_MPEG_DVB,
407 .input = {
408 {
409 .type = CX23885_VMUX_TELEVISION,
410 .vmux = CX25840_COMPOSITE2,
411 },
412 {
413 .type = CX23885_VMUX_COMPOSITE1,
414 .vmux = CX25840_COMPOSITE8,
415 },
416 {
417 .type = CX23885_VMUX_SVIDEO,
418 .vmux = CX25840_SVIDEO_LUMA3 |
419 CX25840_SVIDEO_CHROMA4,
420 },
421 {
422 .type = CX23885_VMUX_COMPONENT,
423 .vmux = CX25840_COMPONENT_ON |
424 CX25840_VIN1_CH1 |
425 CX25840_VIN6_CH2 |
426 CX25840_VIN7_CH3,
427 },
428 },
429 },
430 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
431 .name = "Hauppauge WinTV-HVR1850",
432 .porta = CX23885_ANALOG_VIDEO,
433 .portb = CX23885_MPEG_ENCODER,
434 .portc = CX23885_MPEG_DVB,
435 .tuner_type = TUNER_ABSENT,
436 .tuner_addr = 0x42, /* 0x84 >> 1 */
437 .force_bff = 1,
438 .input = {{
439 .type = CX23885_VMUX_TELEVISION,
440 .vmux = CX25840_VIN7_CH3 |
441 CX25840_VIN5_CH2 |
442 CX25840_VIN2_CH1 |
443 CX25840_DIF_ON,
444 .amux = CX25840_AUDIO8,
445 }, {
446 .type = CX23885_VMUX_COMPOSITE1,
447 .vmux = CX25840_VIN7_CH3 |
448 CX25840_VIN4_CH2 |
449 CX25840_VIN6_CH1,
450 .amux = CX25840_AUDIO7,
451 }, {
452 .type = CX23885_VMUX_SVIDEO,
453 .vmux = CX25840_VIN7_CH3 |
454 CX25840_VIN4_CH2 |
455 CX25840_VIN8_CH1 |
456 CX25840_SVIDEO_ON,
457 .amux = CX25840_AUDIO7,
458 } },
459 },
460 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
461 .name = "Compro VideoMate E800",
462 .portc = CX23885_MPEG_DVB,
463 },
464 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
465 .name = "Hauppauge WinTV-HVR1290",
466 .portc = CX23885_MPEG_DVB,
467 },
468 [CX23885_BOARD_MYGICA_X8558PRO] = {
469 .name = "Mygica X8558 PRO DMB-TH",
470 .portb = CX23885_MPEG_DVB,
471 .portc = CX23885_MPEG_DVB,
472 },
473 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
474 .name = "LEADTEK WinFast PxTV1200",
475 .porta = CX23885_ANALOG_VIDEO,
476 .tuner_type = TUNER_XC2028,
477 .tuner_addr = 0x61,
478 .tuner_bus = 1,
479 .input = {{
480 .type = CX23885_VMUX_TELEVISION,
481 .vmux = CX25840_VIN2_CH1 |
482 CX25840_VIN5_CH2 |
483 CX25840_NONE0_CH3,
484 }, {
485 .type = CX23885_VMUX_COMPOSITE1,
486 .vmux = CX25840_COMPOSITE1,
487 }, {
488 .type = CX23885_VMUX_SVIDEO,
489 .vmux = CX25840_SVIDEO_LUMA3 |
490 CX25840_SVIDEO_CHROMA4,
491 }, {
492 .type = CX23885_VMUX_COMPONENT,
493 .vmux = CX25840_VIN7_CH1 |
494 CX25840_VIN6_CH2 |
495 CX25840_VIN8_CH3 |
496 CX25840_COMPONENT_ON,
497 } },
498 },
499 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
500 .name = "GoTView X5 3D Hybrid",
501 .tuner_type = TUNER_XC5000,
502 .tuner_addr = 0x64,
503 .tuner_bus = 1,
504 .porta = CX23885_ANALOG_VIDEO,
505 .portb = CX23885_MPEG_DVB,
506 .input = {{
507 .type = CX23885_VMUX_TELEVISION,
508 .vmux = CX25840_VIN2_CH1 |
509 CX25840_VIN5_CH2,
510 .gpio0 = 0x02,
511 }, {
512 .type = CX23885_VMUX_COMPOSITE1,
513 .vmux = CX23885_VMUX_COMPOSITE1,
514 }, {
515 .type = CX23885_VMUX_SVIDEO,
516 .vmux = CX25840_SVIDEO_LUMA3 |
517 CX25840_SVIDEO_CHROMA4,
518 } },
519 },
520 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
521 .ci_type = 2,
522 .name = "NetUP Dual DVB-T/C-CI RF",
523 .porta = CX23885_ANALOG_VIDEO,
524 .portb = CX23885_MPEG_DVB,
525 .portc = CX23885_MPEG_DVB,
526 .num_fds_portb = 2,
527 .num_fds_portc = 2,
528 .tuner_type = TUNER_XC5000,
529 .tuner_addr = 0x64,
530 .input = { {
531 .type = CX23885_VMUX_TELEVISION,
532 .vmux = CX25840_COMPOSITE1,
533 } },
534 },
535 [CX23885_BOARD_MPX885] = {
536 .name = "MPX-885",
537 .porta = CX23885_ANALOG_VIDEO,
538 .input = {{
539 .type = CX23885_VMUX_COMPOSITE1,
540 .vmux = CX25840_COMPOSITE1,
541 .amux = CX25840_AUDIO6,
542 .gpio0 = 0,
543 }, {
544 .type = CX23885_VMUX_COMPOSITE2,
545 .vmux = CX25840_COMPOSITE2,
546 .amux = CX25840_AUDIO6,
547 .gpio0 = 0,
548 }, {
549 .type = CX23885_VMUX_COMPOSITE3,
550 .vmux = CX25840_COMPOSITE3,
551 .amux = CX25840_AUDIO7,
552 .gpio0 = 0,
553 }, {
554 .type = CX23885_VMUX_COMPOSITE4,
555 .vmux = CX25840_COMPOSITE4,
556 .amux = CX25840_AUDIO7,
557 .gpio0 = 0,
558 } },
559 },
560 [CX23885_BOARD_MYGICA_X8507] = {
561 .name = "Mygica X8502/X8507 ISDB-T",
562 .tuner_type = TUNER_XC5000,
563 .tuner_addr = 0x61,
564 .tuner_bus = 1,
565 .porta = CX23885_ANALOG_VIDEO,
566 .portb = CX23885_MPEG_DVB,
567 .input = {
568 {
569 .type = CX23885_VMUX_TELEVISION,
570 .vmux = CX25840_COMPOSITE2,
571 .amux = CX25840_AUDIO8,
572 },
573 {
574 .type = CX23885_VMUX_COMPOSITE1,
575 .vmux = CX25840_COMPOSITE8,
576 .amux = CX25840_AUDIO7,
577 },
578 {
579 .type = CX23885_VMUX_SVIDEO,
580 .vmux = CX25840_SVIDEO_LUMA3 |
581 CX25840_SVIDEO_CHROMA4,
582 .amux = CX25840_AUDIO7,
583 },
584 {
585 .type = CX23885_VMUX_COMPONENT,
586 .vmux = CX25840_COMPONENT_ON |
587 CX25840_VIN1_CH1 |
588 CX25840_VIN6_CH2 |
589 CX25840_VIN7_CH3,
590 .amux = CX25840_AUDIO7,
591 },
592 },
593 },
594 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
595 .name = "TerraTec Cinergy T PCIe Dual",
596 .portb = CX23885_MPEG_DVB,
597 .portc = CX23885_MPEG_DVB,
598 },
599 [CX23885_BOARD_TEVII_S471] = {
600 .name = "TeVii S471",
601 .portb = CX23885_MPEG_DVB,
602 },
603 [CX23885_BOARD_PROF_8000] = {
604 .name = "Prof Revolution DVB-S2 8000",
605 .portb = CX23885_MPEG_DVB,
606 },
607 [CX23885_BOARD_HAUPPAUGE_HVR4400] = {
608 .name = "Hauppauge WinTV-HVR4400/HVR5500",
609 .porta = CX23885_ANALOG_VIDEO,
610 .portb = CX23885_MPEG_DVB,
611 .portc = CX23885_MPEG_DVB,
612 .tuner_type = TUNER_NXP_TDA18271,
613 .tuner_addr = 0x60, /* 0xc0 >> 1 */
614 .tuner_bus = 1,
615 },
616 [CX23885_BOARD_HAUPPAUGE_STARBURST] = {
617 .name = "Hauppauge WinTV Starburst",
618 .portb = CX23885_MPEG_DVB,
619 },
620 [CX23885_BOARD_AVERMEDIA_HC81R] = {
621 .name = "AVerTV Hybrid Express Slim HC81R",
622 .tuner_type = TUNER_XC2028,
623 .tuner_addr = 0x61, /* 0xc2 >> 1 */
624 .tuner_bus = 1,
625 .porta = CX23885_ANALOG_VIDEO,
626 .input = {{
627 .type = CX23885_VMUX_TELEVISION,
628 .vmux = CX25840_VIN2_CH1 |
629 CX25840_VIN5_CH2 |
630 CX25840_NONE0_CH3 |
631 CX25840_NONE1_CH3,
632 .amux = CX25840_AUDIO8,
633 }, {
634 .type = CX23885_VMUX_SVIDEO,
635 .vmux = CX25840_VIN8_CH1 |
636 CX25840_NONE_CH2 |
637 CX25840_VIN7_CH3 |
638 CX25840_SVIDEO_ON,
639 .amux = CX25840_AUDIO6,
640 }, {
641 .type = CX23885_VMUX_COMPONENT,
642 .vmux = CX25840_VIN1_CH1 |
643 CX25840_NONE_CH2 |
644 CX25840_NONE0_CH3 |
645 CX25840_NONE1_CH3,
646 .amux = CX25840_AUDIO6,
647 } },
648 },
649 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = {
650 .name = "DViCO FusionHDTV DVB-T Dual Express2",
651 .portb = CX23885_MPEG_DVB,
652 .portc = CX23885_MPEG_DVB,
653 },
654 [CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
655 .name = "Hauppauge ImpactVCB-e",
656 .tuner_type = TUNER_ABSENT,
657 .porta = CX23885_ANALOG_VIDEO,
658 .input = {{
659 .type = CX23885_VMUX_COMPOSITE1,
660 .vmux = CX25840_VIN7_CH3 |
661 CX25840_VIN4_CH2 |
662 CX25840_VIN6_CH1,
663 .amux = CX25840_AUDIO7,
664 }, {
665 .type = CX23885_VMUX_SVIDEO,
666 .vmux = CX25840_VIN7_CH3 |
667 CX25840_VIN4_CH2 |
668 CX25840_VIN8_CH1 |
669 CX25840_SVIDEO_ON,
670 .amux = CX25840_AUDIO7,
671 } },
672 },
673 [CX23885_BOARD_DVBSKY_T9580] = {
674 .name = "DVBSky T9580",
675 .portb = CX23885_MPEG_DVB,
676 .portc = CX23885_MPEG_DVB,
677 },
678 [CX23885_BOARD_DVBSKY_T980C] = {
679 .name = "DVBSky T980C",
680 .portb = CX23885_MPEG_DVB,
681 },
682 [CX23885_BOARD_DVBSKY_S950C] = {
683 .name = "DVBSky S950C",
684 .portb = CX23885_MPEG_DVB,
685 },
686 [CX23885_BOARD_TT_CT2_4500_CI] = {
687 .name = "Technotrend TT-budget CT2-4500 CI",
688 .portb = CX23885_MPEG_DVB,
689 },
690 [CX23885_BOARD_DVBSKY_S950] = {
691 .name = "DVBSky S950",
692 .portb = CX23885_MPEG_DVB,
693 },
694 [CX23885_BOARD_DVBSKY_S952] = {
695 .name = "DVBSky S952",
696 .portb = CX23885_MPEG_DVB,
697 .portc = CX23885_MPEG_DVB,
698 },
699 [CX23885_BOARD_DVBSKY_T982] = {
700 .name = "DVBSky T982",
701 .portb = CX23885_MPEG_DVB,
702 .portc = CX23885_MPEG_DVB,
703 },
704 [CX23885_BOARD_HAUPPAUGE_HVR5525] = {
705 .name = "Hauppauge WinTV-HVR5525",
706 .portb = CX23885_MPEG_DVB,
707 .portc = CX23885_MPEG_DVB,
708 },
709 [CX23885_BOARD_VIEWCAST_260E] = {
710 .name = "ViewCast 260e",
711 .porta = CX23885_ANALOG_VIDEO,
712 .force_bff = 1,
713 .input = {{
714 .type = CX23885_VMUX_COMPOSITE1,
715 .vmux = CX25840_VIN6_CH1,
716 .amux = CX25840_AUDIO7,
717 }, {
718 .type = CX23885_VMUX_SVIDEO,
719 .vmux = CX25840_VIN7_CH3 |
720 CX25840_VIN5_CH1 |
721 CX25840_SVIDEO_ON,
722 .amux = CX25840_AUDIO7,
723 }, {
724 .type = CX23885_VMUX_COMPONENT,
725 .vmux = CX25840_VIN7_CH3 |
726 CX25840_VIN6_CH2 |
727 CX25840_VIN5_CH1 |
728 CX25840_COMPONENT_ON,
729 .amux = CX25840_AUDIO7,
730 } },
731 },
732 [CX23885_BOARD_VIEWCAST_460E] = {
733 .name = "ViewCast 460e",
734 .porta = CX23885_ANALOG_VIDEO,
735 .force_bff = 1,
736 .input = {{
737 .type = CX23885_VMUX_COMPOSITE1,
738 .vmux = CX25840_VIN4_CH1,
739 .amux = CX25840_AUDIO7,
740 }, {
741 .type = CX23885_VMUX_SVIDEO,
742 .vmux = CX25840_VIN7_CH3 |
743 CX25840_VIN6_CH1 |
744 CX25840_SVIDEO_ON,
745 .amux = CX25840_AUDIO7,
746 }, {
747 .type = CX23885_VMUX_COMPONENT,
748 .vmux = CX25840_VIN7_CH3 |
749 CX25840_VIN6_CH1 |
750 CX25840_VIN5_CH2 |
751 CX25840_COMPONENT_ON,
752 .amux = CX25840_AUDIO7,
753 }, {
754 .type = CX23885_VMUX_COMPOSITE2,
755 .vmux = CX25840_VIN6_CH1,
756 .amux = CX25840_AUDIO7,
757 } },
758 },
759 [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB] = {
760 .name = "Hauppauge WinTV-QuadHD-DVB",
761 .portb = CX23885_MPEG_DVB,
762 .portc = CX23885_MPEG_DVB,
763 },
764 [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885] = {
765 .name = "Hauppauge WinTV-QuadHD-DVB(885)",
766 .portb = CX23885_MPEG_DVB,
767 .portc = CX23885_MPEG_DVB,
768 },
769 [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC] = {
770 .name = "Hauppauge WinTV-QuadHD-ATSC",
771 .portb = CX23885_MPEG_DVB,
772 .portc = CX23885_MPEG_DVB,
773 },
774 [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885] = {
775 .name = "Hauppauge WinTV-QuadHD-ATSC(885)",
776 .portb = CX23885_MPEG_DVB,
777 .portc = CX23885_MPEG_DVB,
778 },
779 [CX23885_BOARD_HAUPPAUGE_HVR1265_K4] = {
780 .name = "Hauppauge WinTV-HVR-1265(161111)",
781 .porta = CX23885_ANALOG_VIDEO,
782 .portc = CX23885_MPEG_DVB,
783 .tuner_type = TUNER_ABSENT,
784 .force_bff = 1,
785 .input = {{
786 .type = CX23885_VMUX_COMPOSITE1,
787 .vmux = CX25840_VIN7_CH3 |
788 CX25840_VIN4_CH2 |
789 CX25840_VIN6_CH1,
790 .amux = CX25840_AUDIO7,
791 }, {
792 .type = CX23885_VMUX_SVIDEO,
793 .vmux = CX25840_VIN7_CH3 |
794 CX25840_VIN4_CH2 |
795 CX25840_VIN8_CH1 |
796 CX25840_SVIDEO_ON,
797 .amux = CX25840_AUDIO7,
798 } },
799 },
800 [CX23885_BOARD_HAUPPAUGE_STARBURST2] = {
801 .name = "Hauppauge WinTV-Starburst2",
802 .portb = CX23885_MPEG_DVB,
803 },
804 };
805 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
806
807 /* ------------------------------------------------------------------ */
808 /* PCI subsystem IDs */
809
810 struct cx23885_subid cx23885_subids[] = {
811 {
812 .subvendor = 0x0070,
813 .subdevice = 0x3400,
814 .card = CX23885_BOARD_UNKNOWN,
815 }, {
816 .subvendor = 0x0070,
817 .subdevice = 0x7600,
818 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
819 }, {
820 .subvendor = 0x0070,
821 .subdevice = 0x7800,
822 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
823 }, {
824 .subvendor = 0x0070,
825 .subdevice = 0x7801,
826 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
827 }, {
828 .subvendor = 0x0070,
829 .subdevice = 0x7809,
830 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
831 }, {
832 .subvendor = 0x0070,
833 .subdevice = 0x7911,
834 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
835 }, {
836 .subvendor = 0x18ac,
837 .subdevice = 0xd500,
838 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
839 }, {
840 .subvendor = 0x0070,
841 .subdevice = 0x7790,
842 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
843 }, {
844 .subvendor = 0x0070,
845 .subdevice = 0x7797,
846 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
847 }, {
848 .subvendor = 0x0070,
849 .subdevice = 0x7710,
850 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
851 }, {
852 .subvendor = 0x0070,
853 .subdevice = 0x7717,
854 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
855 }, {
856 .subvendor = 0x0070,
857 .subdevice = 0x71d1,
858 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
859 }, {
860 .subvendor = 0x0070,
861 .subdevice = 0x71d3,
862 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
863 }, {
864 .subvendor = 0x0070,
865 .subdevice = 0x8101,
866 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
867 }, {
868 .subvendor = 0x0070,
869 .subdevice = 0x8010,
870 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
871 }, {
872 .subvendor = 0x18ac,
873 .subdevice = 0xd618,
874 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
875 }, {
876 .subvendor = 0x18ac,
877 .subdevice = 0xdb78,
878 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
879 }, {
880 .subvendor = 0x107d,
881 .subdevice = 0x6681,
882 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
883 }, {
884 .subvendor = 0x107d,
885 .subdevice = 0x6f21,
886 .card = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200,
887 }, {
888 .subvendor = 0x107d,
889 .subdevice = 0x6f39,
890 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
891 }, {
892 .subvendor = 0x185b,
893 .subdevice = 0xe800,
894 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
895 }, {
896 .subvendor = 0x6920,
897 .subdevice = 0x8888,
898 .card = CX23885_BOARD_TBS_6920,
899 }, {
900 .subvendor = 0x6980,
901 .subdevice = 0x8888,
902 .card = CX23885_BOARD_TBS_6980,
903 }, {
904 .subvendor = 0x6981,
905 .subdevice = 0x8888,
906 .card = CX23885_BOARD_TBS_6981,
907 }, {
908 .subvendor = 0xd470,
909 .subdevice = 0x9022,
910 .card = CX23885_BOARD_TEVII_S470,
911 }, {
912 .subvendor = 0x0001,
913 .subdevice = 0x2005,
914 .card = CX23885_BOARD_DVBWORLD_2005,
915 }, {
916 .subvendor = 0x1b55,
917 .subdevice = 0x2a2c,
918 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
919 }, {
920 .subvendor = 0x0070,
921 .subdevice = 0x2211,
922 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
923 }, {
924 .subvendor = 0x0070,
925 .subdevice = 0x2215,
926 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
927 }, {
928 .subvendor = 0x0070,
929 .subdevice = 0x221d,
930 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
931 }, {
932 .subvendor = 0x0070,
933 .subdevice = 0x2251,
934 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
935 }, {
936 .subvendor = 0x0070,
937 .subdevice = 0x2259,
938 .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
939 }, {
940 .subvendor = 0x0070,
941 .subdevice = 0x2291,
942 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
943 }, {
944 .subvendor = 0x0070,
945 .subdevice = 0x2295,
946 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
947 }, {
948 .subvendor = 0x0070,
949 .subdevice = 0x2299,
950 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
951 }, {
952 .subvendor = 0x0070,
953 .subdevice = 0x229d,
954 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
955 }, {
956 .subvendor = 0x0070,
957 .subdevice = 0x22f0,
958 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
959 }, {
960 .subvendor = 0x0070,
961 .subdevice = 0x22f1,
962 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
963 }, {
964 .subvendor = 0x0070,
965 .subdevice = 0x22f2,
966 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
967 }, {
968 .subvendor = 0x0070,
969 .subdevice = 0x22f3,
970 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
971 }, {
972 .subvendor = 0x0070,
973 .subdevice = 0x22f4,
974 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
975 }, {
976 .subvendor = 0x0070,
977 .subdevice = 0x22f5,
978 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
979 }, {
980 .subvendor = 0x14f1,
981 .subdevice = 0x8651,
982 .card = CX23885_BOARD_MYGICA_X8506,
983 }, {
984 .subvendor = 0x14f1,
985 .subdevice = 0x8657,
986 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
987 }, {
988 .subvendor = 0x0070,
989 .subdevice = 0x8541,
990 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
991 }, {
992 .subvendor = 0x1858,
993 .subdevice = 0xe800,
994 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
995 }, {
996 .subvendor = 0x0070,
997 .subdevice = 0x8551,
998 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
999 }, {
1000 .subvendor = 0x14f1,
1001 .subdevice = 0x8578,
1002 .card = CX23885_BOARD_MYGICA_X8558PRO,
1003 }, {
1004 .subvendor = 0x107d,
1005 .subdevice = 0x6f22,
1006 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
1007 }, {
1008 .subvendor = 0x5654,
1009 .subdevice = 0x2390,
1010 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
1011 }, {
1012 .subvendor = 0x1b55,
1013 .subdevice = 0xe2e4,
1014 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
1015 }, {
1016 .subvendor = 0x14f1,
1017 .subdevice = 0x8502,
1018 .card = CX23885_BOARD_MYGICA_X8507,
1019 }, {
1020 .subvendor = 0x153b,
1021 .subdevice = 0x117e,
1022 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
1023 }, {
1024 .subvendor = 0xd471,
1025 .subdevice = 0x9022,
1026 .card = CX23885_BOARD_TEVII_S471,
1027 }, {
1028 .subvendor = 0x8000,
1029 .subdevice = 0x3034,
1030 .card = CX23885_BOARD_PROF_8000,
1031 }, {
1032 .subvendor = 0x0070,
1033 .subdevice = 0xc108,
1034 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */
1035 }, {
1036 .subvendor = 0x0070,
1037 .subdevice = 0xc138,
1038 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
1039 }, {
1040 .subvendor = 0x0070,
1041 .subdevice = 0xc12a,
1042 .card = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */
1043 }, {
1044 .subvendor = 0x0070,
1045 .subdevice = 0xc1f8,
1046 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
1047 }, {
1048 .subvendor = 0x1461,
1049 .subdevice = 0xd939,
1050 .card = CX23885_BOARD_AVERMEDIA_HC81R,
1051 }, {
1052 .subvendor = 0x0070,
1053 .subdevice = 0x7133,
1054 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
1055 }, {
1056 .subvendor = 0x0070,
1057 .subdevice = 0x7137,
1058 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
1059 }, {
1060 .subvendor = 0x18ac,
1061 .subdevice = 0xdb98,
1062 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
1063 }, {
1064 .subvendor = 0x4254,
1065 .subdevice = 0x9580,
1066 .card = CX23885_BOARD_DVBSKY_T9580,
1067 }, {
1068 .subvendor = 0x4254,
1069 .subdevice = 0x980c,
1070 .card = CX23885_BOARD_DVBSKY_T980C,
1071 }, {
1072 .subvendor = 0x4254,
1073 .subdevice = 0x950c,
1074 .card = CX23885_BOARD_DVBSKY_S950C,
1075 }, {
1076 .subvendor = 0x13c2,
1077 .subdevice = 0x3013,
1078 .card = CX23885_BOARD_TT_CT2_4500_CI,
1079 }, {
1080 .subvendor = 0x4254,
1081 .subdevice = 0x0950,
1082 .card = CX23885_BOARD_DVBSKY_S950,
1083 }, {
1084 .subvendor = 0x4254,
1085 .subdevice = 0x0952,
1086 .card = CX23885_BOARD_DVBSKY_S952,
1087 }, {
1088 .subvendor = 0x4254,
1089 .subdevice = 0x0982,
1090 .card = CX23885_BOARD_DVBSKY_T982,
1091 }, {
1092 .subvendor = 0x0070,
1093 .subdevice = 0xf038,
1094 .card = CX23885_BOARD_HAUPPAUGE_HVR5525,
1095 }, {
1096 .subvendor = 0x1576,
1097 .subdevice = 0x0260,
1098 .card = CX23885_BOARD_VIEWCAST_260E,
1099 }, {
1100 .subvendor = 0x1576,
1101 .subdevice = 0x0460,
1102 .card = CX23885_BOARD_VIEWCAST_460E,
1103 }, {
1104 .subvendor = 0x0070,
1105 .subdevice = 0x6a28,
1106 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 1 */
1107 }, {
1108 .subvendor = 0x0070,
1109 .subdevice = 0x6b28,
1110 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 2 */
1111 }, {
1112 .subvendor = 0x0070,
1113 .subdevice = 0x6a18,
1114 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 1 */
1115 }, {
1116 .subvendor = 0x0070,
1117 .subdevice = 0x6b18,
1118 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 2 */
1119 }, {
1120 .subvendor = 0x0070,
1121 .subdevice = 0x2a18,
1122 .card = CX23885_BOARD_HAUPPAUGE_HVR1265_K4, /* Hauppauge WinTV HVR-1265 (Model 161xx1, Hybrid ATSC/QAM-B) */
1123 }, {
1124 .subvendor = 0x0070,
1125 .subdevice = 0xf02a,
1126 .card = CX23885_BOARD_HAUPPAUGE_STARBURST2,
1127 },
1128 };
1129 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
1130
1131 void cx23885_card_list(struct cx23885_dev *dev)
1132 {
1133 int i;
1134
1135 if (0 == dev->pci->subsystem_vendor &&
1136 0 == dev->pci->subsystem_device) {
1137 pr_info("%s: Board has no valid PCIe Subsystem ID and can't\n"
1138 "%s: be autodetected. Pass card=<n> insmod option\n"
1139 "%s: to workaround that. Redirect complaints to the\n"
1140 "%s: vendor of the TV card. Best regards,\n"
1141 "%s: -- tux\n",
1142 dev->name, dev->name, dev->name, dev->name, dev->name);
1143 } else {
1144 pr_info("%s: Your board isn't known (yet) to the driver.\n"
1145 "%s: Try to pick one of the existing card configs via\n"
1146 "%s: card=<n> insmod option. Updating to the latest\n"
1147 "%s: version might help as well.\n",
1148 dev->name, dev->name, dev->name, dev->name);
1149 }
1150 pr_info("%s: Here is a list of valid choices for the card=<n> insmod option:\n",
1151 dev->name);
1152 for (i = 0; i < cx23885_bcount; i++)
1153 pr_info("%s: card=%d -> %s\n",
1154 dev->name, i, cx23885_boards[i].name);
1155 }
1156
1157 static void viewcast_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
1158 {
1159 u32 sn;
1160
1161 /* The serial number record begins with tag 0x59 */
1162 if (*(eeprom_data + 0x00) != 0x59) {
1163 pr_info("%s() eeprom records are undefined, no serial number\n",
1164 __func__);
1165 return;
1166 }
1167
1168 sn = (*(eeprom_data + 0x06) << 24) |
1169 (*(eeprom_data + 0x05) << 16) |
1170 (*(eeprom_data + 0x04) << 8) |
1171 (*(eeprom_data + 0x03));
1172
1173 pr_info("%s: card '%s' sn# MM%d\n",
1174 dev->name,
1175 cx23885_boards[dev->board].name,
1176 sn);
1177 }
1178
1179 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
1180 {
1181 struct tveeprom tv;
1182
1183 tveeprom_hauppauge_analog(&tv, eeprom_data);
1184
1185 /* Make sure we support the board model */
1186 switch (tv.model) {
1187 case 22001:
1188 /* WinTV-HVR1270 (PCIe, Retail, half height)
1189 * ATSC/QAM and basic analog, IR Blast */
1190 case 22009:
1191 /* WinTV-HVR1210 (PCIe, Retail, half height)
1192 * DVB-T and basic analog, IR Blast */
1193 case 22011:
1194 /* WinTV-HVR1270 (PCIe, Retail, half height)
1195 * ATSC/QAM and basic analog, IR Recv */
1196 case 22019:
1197 /* WinTV-HVR1210 (PCIe, Retail, half height)
1198 * DVB-T and basic analog, IR Recv */
1199 case 22021:
1200 /* WinTV-HVR1275 (PCIe, Retail, half height)
1201 * ATSC/QAM and basic analog, IR Recv */
1202 case 22029:
1203 /* WinTV-HVR1210 (PCIe, Retail, half height)
1204 * DVB-T and basic analog, IR Recv */
1205 case 22101:
1206 /* WinTV-HVR1270 (PCIe, Retail, full height)
1207 * ATSC/QAM and basic analog, IR Blast */
1208 case 22109:
1209 /* WinTV-HVR1210 (PCIe, Retail, full height)
1210 * DVB-T and basic analog, IR Blast */
1211 case 22111:
1212 /* WinTV-HVR1270 (PCIe, Retail, full height)
1213 * ATSC/QAM and basic analog, IR Recv */
1214 case 22119:
1215 /* WinTV-HVR1210 (PCIe, Retail, full height)
1216 * DVB-T and basic analog, IR Recv */
1217 case 22121:
1218 /* WinTV-HVR1275 (PCIe, Retail, full height)
1219 * ATSC/QAM and basic analog, IR Recv */
1220 case 22129:
1221 /* WinTV-HVR1210 (PCIe, Retail, full height)
1222 * DVB-T and basic analog, IR Recv */
1223 case 71009:
1224 /* WinTV-HVR1200 (PCIe, Retail, full height)
1225 * DVB-T and basic analog */
1226 case 71100:
1227 /* WinTV-ImpactVCB-e (PCIe, Retail, half height)
1228 * Basic analog */
1229 case 71359:
1230 /* WinTV-HVR1200 (PCIe, OEM, half height)
1231 * DVB-T and basic analog */
1232 case 71439:
1233 /* WinTV-HVR1200 (PCIe, OEM, half height)
1234 * DVB-T and basic analog */
1235 case 71449:
1236 /* WinTV-HVR1200 (PCIe, OEM, full height)
1237 * DVB-T and basic analog */
1238 case 71939:
1239 /* WinTV-HVR1200 (PCIe, OEM, half height)
1240 * DVB-T and basic analog */
1241 case 71949:
1242 /* WinTV-HVR1200 (PCIe, OEM, full height)
1243 * DVB-T and basic analog */
1244 case 71959:
1245 /* WinTV-HVR1200 (PCIe, OEM, full height)
1246 * DVB-T and basic analog */
1247 case 71979:
1248 /* WinTV-HVR1200 (PCIe, OEM, half height)
1249 * DVB-T and basic analog */
1250 case 71999:
1251 /* WinTV-HVR1200 (PCIe, OEM, full height)
1252 * DVB-T and basic analog */
1253 case 76601:
1254 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
1255 channel ATSC and MPEG2 HW Encoder */
1256 case 77001:
1257 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
1258 and Basic analog */
1259 case 77011:
1260 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
1261 and Basic analog */
1262 case 77041:
1263 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
1264 and Basic analog */
1265 case 77051:
1266 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
1267 and Basic analog */
1268 case 78011:
1269 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
1270 Dual channel ATSC and MPEG2 HW Encoder */
1271 case 78501:
1272 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1273 Dual channel ATSC and MPEG2 HW Encoder */
1274 case 78521:
1275 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1276 Dual channel ATSC and MPEG2 HW Encoder */
1277 case 78531:
1278 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
1279 Dual channel ATSC and MPEG2 HW Encoder */
1280 case 78631:
1281 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
1282 Dual channel ATSC and MPEG2 HW Encoder */
1283 case 79001:
1284 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
1285 ATSC and Basic analog */
1286 case 79101:
1287 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
1288 ATSC and Basic analog */
1289 case 79501:
1290 /* WinTV-HVR1250 (PCIe, No IR, half height,
1291 ATSC [at least] and Basic analog) */
1292 case 79561:
1293 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1294 ATSC and Basic analog */
1295 case 79571:
1296 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
1297 ATSC and Basic analog */
1298 case 79671:
1299 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1300 ATSC and Basic analog */
1301 case 80019:
1302 /* WinTV-HVR1400 (Express Card, Retail, IR,
1303 * DVB-T and Basic analog */
1304 case 81509:
1305 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
1306 * DVB-T and MPEG2 HW Encoder */
1307 case 81519:
1308 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
1309 * DVB-T and MPEG2 HW Encoder */
1310 break;
1311 case 85021:
1312 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
1313 Dual channel ATSC and MPEG2 HW Encoder */
1314 break;
1315 case 85721:
1316 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
1317 Dual channel ATSC and Basic analog */
1318 case 121019:
1319 /* WinTV-HVR4400 (PCIe, DVB-S2, DVB-C/T) */
1320 break;
1321 case 121029:
1322 /* WinTV-HVR5500 (PCIe, DVB-S2, DVB-C/T) */
1323 break;
1324 case 150329:
1325 /* WinTV-HVR5525 (PCIe, DVB-S/S2, DVB-T/T2/C) */
1326 break;
1327 case 161111:
1328 /* WinTV-HVR-1265 K4 (PCIe, Analog/ATSC/QAM-B) */
1329 break;
1330 case 166100: /* 888 version, hybrid */
1331 case 166200: /* 885 version, DVB only */
1332 /* WinTV-QuadHD (DVB) Tuner Pair 1 (PCIe, IR, half height,
1333 DVB-T/T2/C, DVB-T/T2/C */
1334 break;
1335 case 166101: /* 888 version, hybrid */
1336 case 166201: /* 885 version, DVB only */
1337 /* WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height,
1338 DVB-T/T2/C, DVB-T/T2/C */
1339 break;
1340 case 165100: /* 888 version, hybrid */
1341 case 165200: /* 885 version, digital only */
1342 /* WinTV-QuadHD (ATSC) Tuner Pair 1 (PCIe, IR, half height,
1343 * ATSC/QAM-B, ATSC/QAM-B */
1344 break;
1345 case 165101: /* 888 version, hybrid */
1346 case 165201: /* 885 version, digital only */
1347 /* WinTV-QuadHD (ATSC) Tuner Pair 2 (PCIe, IR, half height,
1348 * ATSC/QAM-B, ATSC/QAM-B */
1349 break;
1350 default:
1351 pr_warn("%s: warning: unknown hauppauge model #%d\n",
1352 dev->name, tv.model);
1353 break;
1354 }
1355
1356 pr_info("%s: hauppauge eeprom: model=%d\n",
1357 dev->name, tv.model);
1358 }
1359
1360 /* Some TBS cards require initing a chip using a bitbanged SPI attached
1361 to the cx23885 gpio's. If this chip doesn't get init'ed the demod
1362 doesn't respond to any command. */
1363 static void tbs_card_init(struct cx23885_dev *dev)
1364 {
1365 int i;
1366 static const u8 buf[] = {
1367 0xe0, 0x06, 0x66, 0x33, 0x65,
1368 0x01, 0x17, 0x06, 0xde};
1369
1370 switch (dev->board) {
1371 case CX23885_BOARD_TBS_6980:
1372 case CX23885_BOARD_TBS_6981:
1373 cx_set(GP0_IO, 0x00070007);
1374 usleep_range(1000, 10000);
1375 cx_clear(GP0_IO, 2);
1376 usleep_range(1000, 10000);
1377 for (i = 0; i < 9 * 8; i++) {
1378 cx_clear(GP0_IO, 7);
1379 usleep_range(1000, 10000);
1380 cx_set(GP0_IO,
1381 ((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
1382 usleep_range(1000, 10000);
1383 }
1384 cx_set(GP0_IO, 7);
1385 break;
1386 }
1387 }
1388
1389 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
1390 {
1391 struct cx23885_tsport *port = priv;
1392 struct cx23885_dev *dev = port->dev;
1393 u32 bitmask = 0;
1394
1395 if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
1396 return 0;
1397
1398 if (command != 0) {
1399 pr_err("%s(): Unknown command 0x%x.\n",
1400 __func__, command);
1401 return -EINVAL;
1402 }
1403
1404 switch (dev->board) {
1405 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1406 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1407 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1408 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1409 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1410 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1411 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1412 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1413 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1414 /* Tuner Reset Command */
1415 bitmask = 0x04;
1416 break;
1417 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1418 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1419 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1420 /* Two identical tuners on two different i2c buses,
1421 * we need to reset the correct gpio. */
1422 if (port->nr == 1)
1423 bitmask = 0x01;
1424 else if (port->nr == 2)
1425 bitmask = 0x04;
1426 break;
1427 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1428 /* Tuner Reset Command */
1429 bitmask = 0x02;
1430 break;
1431 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1432 altera_ci_tuner_reset(dev, port->nr);
1433 break;
1434 case CX23885_BOARD_AVERMEDIA_HC81R:
1435 /* XC3028L Reset Command */
1436 bitmask = 1 << 2;
1437 break;
1438 }
1439
1440 if (bitmask) {
1441 /* Drive the tuner into reset and back out */
1442 cx_clear(GP0_IO, bitmask);
1443 mdelay(200);
1444 cx_set(GP0_IO, bitmask);
1445 }
1446
1447 return 0;
1448 }
1449
1450 void cx23885_gpio_setup(struct cx23885_dev *dev)
1451 {
1452 switch (dev->board) {
1453 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1454 /* GPIO-0 cx24227 demodulator reset */
1455 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1456 break;
1457 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1458 /* GPIO-0 cx24227 demodulator */
1459 /* GPIO-2 xc3028 tuner */
1460
1461 /* Put the parts into reset */
1462 cx_set(GP0_IO, 0x00050000);
1463 cx_clear(GP0_IO, 0x00000005);
1464 msleep(5);
1465
1466 /* Bring the parts out of reset */
1467 cx_set(GP0_IO, 0x00050005);
1468 break;
1469 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1470 /* GPIO-0 cx24227 demodulator reset */
1471 /* GPIO-2 xc5000 tuner reset */
1472 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1473 break;
1474 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1475 /* GPIO-0 656_CLK */
1476 /* GPIO-1 656_D0 */
1477 /* GPIO-2 8295A Reset */
1478 /* GPIO-3-10 cx23417 data0-7 */
1479 /* GPIO-11-14 cx23417 addr0-3 */
1480 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1481 /* GPIO-19 IR_RX */
1482
1483 /* CX23417 GPIO's */
1484 /* EIO15 Zilog Reset */
1485 /* EIO14 S5H1409/CX24227 Reset */
1486 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1487
1488 /* Put the demod into reset and protect the eeprom */
1489 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
1490 msleep(100);
1491
1492 /* Bring the demod and blaster out of reset */
1493 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
1494 msleep(100);
1495
1496 /* Force the TDA8295A into reset and back */
1497 cx23885_gpio_enable(dev, GPIO_2, 1);
1498 cx23885_gpio_set(dev, GPIO_2);
1499 msleep(20);
1500 cx23885_gpio_clear(dev, GPIO_2);
1501 msleep(20);
1502 cx23885_gpio_set(dev, GPIO_2);
1503 msleep(20);
1504 break;
1505 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1506 /* GPIO-0 tda10048 demodulator reset */
1507 /* GPIO-2 tda18271 tuner reset */
1508
1509 /* Put the parts into reset and back */
1510 cx_set(GP0_IO, 0x00050000);
1511 msleep(20);
1512 cx_clear(GP0_IO, 0x00000005);
1513 msleep(20);
1514 cx_set(GP0_IO, 0x00050005);
1515 break;
1516 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1517 /* GPIO-0 TDA10048 demodulator reset */
1518 /* GPIO-2 TDA8295A Reset */
1519 /* GPIO-3-10 cx23417 data0-7 */
1520 /* GPIO-11-14 cx23417 addr0-3 */
1521 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1522
1523 /* The following GPIO's are on the interna AVCore (cx25840) */
1524 /* GPIO-19 IR_RX */
1525 /* GPIO-20 IR_TX 416/DVBT Select */
1526 /* GPIO-21 IIS DAT */
1527 /* GPIO-22 IIS WCLK */
1528 /* GPIO-23 IIS BCLK */
1529
1530 /* Put the parts into reset and back */
1531 cx_set(GP0_IO, 0x00050000);
1532 msleep(20);
1533 cx_clear(GP0_IO, 0x00000005);
1534 msleep(20);
1535 cx_set(GP0_IO, 0x00050005);
1536 break;
1537 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1538 /* GPIO-0 Dibcom7000p demodulator reset */
1539 /* GPIO-2 xc3028L tuner reset */
1540 /* GPIO-13 LED */
1541
1542 /* Put the parts into reset and back */
1543 cx_set(GP0_IO, 0x00050000);
1544 msleep(20);
1545 cx_clear(GP0_IO, 0x00000005);
1546 msleep(20);
1547 cx_set(GP0_IO, 0x00050005);
1548 break;
1549 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1550 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
1551 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
1552 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
1553 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
1554
1555 /* Put the parts into reset and back */
1556 cx_set(GP0_IO, 0x000f0000);
1557 msleep(20);
1558 cx_clear(GP0_IO, 0x0000000f);
1559 msleep(20);
1560 cx_set(GP0_IO, 0x000f000f);
1561 break;
1562 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1563 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1564 /* GPIO-0 portb xc3028 reset */
1565 /* GPIO-1 portb zl10353 reset */
1566 /* GPIO-2 portc xc3028 reset */
1567 /* GPIO-3 portc zl10353 reset */
1568
1569 /* Put the parts into reset and back */
1570 cx_set(GP0_IO, 0x000f0000);
1571 msleep(20);
1572 cx_clear(GP0_IO, 0x0000000f);
1573 msleep(20);
1574 cx_set(GP0_IO, 0x000f000f);
1575 break;
1576 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1577 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1578 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1579 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1580 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1581 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1582 /* GPIO-2 xc3028 tuner reset */
1583
1584 /* The following GPIO's are on the internal AVCore (cx25840) */
1585 /* GPIO-? zl10353 demod reset */
1586
1587 /* Put the parts into reset and back */
1588 cx_set(GP0_IO, 0x00040000);
1589 msleep(20);
1590 cx_clear(GP0_IO, 0x00000004);
1591 msleep(20);
1592 cx_set(GP0_IO, 0x00040004);
1593 break;
1594 case CX23885_BOARD_TBS_6920:
1595 case CX23885_BOARD_TBS_6980:
1596 case CX23885_BOARD_TBS_6981:
1597 case CX23885_BOARD_PROF_8000:
1598 cx_write(MC417_CTL, 0x00000036);
1599 cx_write(MC417_OEN, 0x00001000);
1600 cx_set(MC417_RWD, 0x00000002);
1601 msleep(200);
1602 cx_clear(MC417_RWD, 0x00000800);
1603 msleep(200);
1604 cx_set(MC417_RWD, 0x00000800);
1605 msleep(200);
1606 break;
1607 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1608 /* GPIO-0 INTA from CiMax1
1609 GPIO-1 INTB from CiMax2
1610 GPIO-2 reset chips
1611 GPIO-3 to GPIO-10 data/addr for CA
1612 GPIO-11 ~CS0 to CiMax1
1613 GPIO-12 ~CS1 to CiMax2
1614 GPIO-13 ADL0 load LSB addr
1615 GPIO-14 ADL1 load MSB addr
1616 GPIO-15 ~RDY from CiMax
1617 GPIO-17 ~RD to CiMax
1618 GPIO-18 ~WR to CiMax
1619 */
1620 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1621 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1622 cx_clear(GP0_IO, 0x00030004);
1623 msleep(100);/* reset delay */
1624 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1625 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1626 /* GPIO-15 IN as ~ACK, rest as OUT */
1627 cx_write(MC417_OEN, 0x00001000);
1628 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1629 cx_write(MC417_RWD, 0x0000c300);
1630 /* enable irq */
1631 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1632 break;
1633 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1634 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1635 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1636 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1637 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1638 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1639 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
1640 /* GPIO-9 Demod reset */
1641
1642 /* Put the parts into reset and back */
1643 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1644 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1645 cx23885_gpio_clear(dev, GPIO_9);
1646 msleep(20);
1647 cx23885_gpio_set(dev, GPIO_9);
1648 break;
1649 case CX23885_BOARD_MYGICA_X8506:
1650 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1651 case CX23885_BOARD_MYGICA_X8507:
1652 /* GPIO-0 (0)Analog / (1)Digital TV */
1653 /* GPIO-1 reset XC5000 */
1654 /* GPIO-2 demod reset */
1655 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1656 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1657 msleep(100);
1658 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1659 msleep(100);
1660 break;
1661 case CX23885_BOARD_MYGICA_X8558PRO:
1662 /* GPIO-0 reset first ATBM8830 */
1663 /* GPIO-1 reset second ATBM8830 */
1664 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1665 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1666 msleep(100);
1667 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1668 msleep(100);
1669 break;
1670 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1671 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1672 /* GPIO-0 656_CLK */
1673 /* GPIO-1 656_D0 */
1674 /* GPIO-2 Wake# */
1675 /* GPIO-3-10 cx23417 data0-7 */
1676 /* GPIO-11-14 cx23417 addr0-3 */
1677 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1678 /* GPIO-19 IR_RX */
1679 /* GPIO-20 C_IR_TX */
1680 /* GPIO-21 I2S DAT */
1681 /* GPIO-22 I2S WCLK */
1682 /* GPIO-23 I2S BCLK */
1683 /* ALT GPIO: EXP GPIO LATCH */
1684
1685 /* CX23417 GPIO's */
1686 /* GPIO-14 S5H1411/CX24228 Reset */
1687 /* GPIO-13 EEPROM write protect */
1688 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1689
1690 /* Put the demod into reset and protect the eeprom */
1691 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1692 msleep(100);
1693
1694 /* Bring the demod out of reset */
1695 mc417_gpio_set(dev, GPIO_14);
1696 msleep(100);
1697
1698 /* CX24228 GPIO */
1699 /* Connected to IF / Mux */
1700 break;
1701 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1702 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1703 break;
1704 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1705 /* GPIO-0 ~INT in
1706 GPIO-1 TMS out
1707 GPIO-2 ~reset chips out
1708 GPIO-3 to GPIO-10 data/addr for CA in/out
1709 GPIO-11 ~CS out
1710 GPIO-12 ADDR out
1711 GPIO-13 ~WR out
1712 GPIO-14 ~RD out
1713 GPIO-15 ~RDY in
1714 GPIO-16 TCK out
1715 GPIO-17 TDO in
1716 GPIO-18 TDI out
1717 */
1718 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1719 /* GPIO-0 as INT, reset & TMS low */
1720 cx_clear(GP0_IO, 0x00010006);
1721 msleep(100);/* reset delay */
1722 cx_set(GP0_IO, 0x00000004); /* reset high */
1723 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1724 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1725 cx_write(MC417_OEN, 0x00005000);
1726 /* ~RD, ~WR high; ADDR low; ~CS high */
1727 cx_write(MC417_RWD, 0x00000d00);
1728 /* enable irq */
1729 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1730 break;
1731 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1732 case CX23885_BOARD_HAUPPAUGE_STARBURST:
1733 /* GPIO-8 tda10071 demod reset */
1734 /* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/
1735
1736 /* Put the parts into reset and back */
1737 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1738
1739 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1740 msleep(100);
1741 cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1742 msleep(100);
1743
1744 break;
1745 case CX23885_BOARD_AVERMEDIA_HC81R:
1746 cx_clear(MC417_CTL, 1);
1747 /* GPIO-0,1,2 setup direction as output */
1748 cx_set(GP0_IO, 0x00070000);
1749 usleep_range(10000, 11000);
1750 /* AF9013 demod reset */
1751 cx_set(GP0_IO, 0x00010001);
1752 usleep_range(10000, 11000);
1753 cx_clear(GP0_IO, 0x00010001);
1754 usleep_range(10000, 11000);
1755 cx_set(GP0_IO, 0x00010001);
1756 usleep_range(10000, 11000);
1757 /* demod tune? */
1758 cx_clear(GP0_IO, 0x00030003);
1759 usleep_range(10000, 11000);
1760 cx_set(GP0_IO, 0x00020002);
1761 usleep_range(10000, 11000);
1762 cx_set(GP0_IO, 0x00010001);
1763 usleep_range(10000, 11000);
1764 cx_clear(GP0_IO, 0x00020002);
1765 /* XC3028L tuner reset */
1766 cx_set(GP0_IO, 0x00040004);
1767 cx_clear(GP0_IO, 0x00040004);
1768 cx_set(GP0_IO, 0x00040004);
1769 msleep(60);
1770 break;
1771 case CX23885_BOARD_DVBSKY_T9580:
1772 case CX23885_BOARD_DVBSKY_S952:
1773 case CX23885_BOARD_DVBSKY_T982:
1774 /* enable GPIO3-18 pins */
1775 cx_write(MC417_CTL, 0x00000037);
1776 cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1);
1777 cx23885_gpio_clear(dev, GPIO_2 | GPIO_11);
1778 msleep(100);
1779 cx23885_gpio_set(dev, GPIO_2 | GPIO_11);
1780 break;
1781 case CX23885_BOARD_DVBSKY_T980C:
1782 case CX23885_BOARD_DVBSKY_S950C:
1783 case CX23885_BOARD_TT_CT2_4500_CI:
1784 /*
1785 * GPIO-0 INTA from CiMax, input
1786 * GPIO-1 reset CiMax, output, high active
1787 * GPIO-2 reset demod, output, low active
1788 * GPIO-3 to GPIO-10 data/addr for CAM
1789 * GPIO-11 ~CS0 to CiMax1
1790 * GPIO-12 ~CS1 to CiMax2
1791 * GPIO-13 ADL0 load LSB addr
1792 * GPIO-14 ADL1 load MSB addr
1793 * GPIO-15 ~RDY from CiMax
1794 * GPIO-17 ~RD to CiMax
1795 * GPIO-18 ~WR to CiMax
1796 */
1797
1798 cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */
1799 cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */
1800 msleep(100); /* reset delay */
1801 cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */
1802 cx_clear(GP0_IO, 0x00010002);
1803 cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */
1804
1805 /* GPIO-15 IN as ~ACK, rest as OUT */
1806 cx_write(MC417_OEN, 0x00001000);
1807
1808 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1809 cx_write(MC417_RWD, 0x0000c300);
1810
1811 /* enable irq */
1812 cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */
1813 break;
1814 case CX23885_BOARD_DVBSKY_S950:
1815 cx23885_gpio_enable(dev, GPIO_2, 1);
1816 cx23885_gpio_clear(dev, GPIO_2);
1817 msleep(100);
1818 cx23885_gpio_set(dev, GPIO_2);
1819 break;
1820 case CX23885_BOARD_HAUPPAUGE_HVR5525:
1821 case CX23885_BOARD_HAUPPAUGE_STARBURST2:
1822 /*
1823 * HVR5525 GPIO Details:
1824 * GPIO-00 IR_WIDE
1825 * GPIO-02 wake#
1826 * GPIO-03 VAUX Pres.
1827 * GPIO-07 PROG#
1828 * GPIO-08 SAT_RESN
1829 * GPIO-09 TER_RESN
1830 * GPIO-10 B2_SENSE
1831 * GPIO-11 B1_SENSE
1832 * GPIO-15 IR_LED_STATUS
1833 * GPIO-19 IR_NARROW
1834 * GPIO-20 Blauster1
1835 * ALTGPIO VAUX_SWITCH
1836 * AUX_PLL_CLK : Blaster2
1837 */
1838 /* Put the parts into reset and back */
1839 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1840 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1841 msleep(100);
1842 cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1843 msleep(100);
1844 break;
1845 case CX23885_BOARD_VIEWCAST_260E:
1846 case CX23885_BOARD_VIEWCAST_460E:
1847 /* For documentation purposes, it's worth noting that this
1848 * card does not have any GPIO's connected to subcomponents.
1849 */
1850 break;
1851 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
1852 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1853 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
1854 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
1855 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
1856 /*
1857 * GPIO-08 TER1_RESN
1858 * GPIO-09 TER2_RESN
1859 */
1860 /* Put the parts into reset and back */
1861 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1862 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1863 msleep(100);
1864 cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1865 msleep(100);
1866 break;
1867 }
1868 }
1869
1870 int cx23885_ir_init(struct cx23885_dev *dev)
1871 {
1872 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1873 {
1874 .flags = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
1875 .pin = CX23885_PIN_IR_RX_GPIO19,
1876 .function = CX23885_PAD_IR_RX,
1877 .value = 0,
1878 .strength = CX25840_PIN_DRIVE_MEDIUM,
1879 }, {
1880 .flags = BIT(V4L2_SUBDEV_IO_PIN_OUTPUT),
1881 .pin = CX23885_PIN_IR_TX_GPIO20,
1882 .function = CX23885_PAD_IR_TX,
1883 .value = 0,
1884 .strength = CX25840_PIN_DRIVE_MEDIUM,
1885 }
1886 };
1887 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1888
1889 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1890 {
1891 .flags = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
1892 .pin = CX23885_PIN_IR_RX_GPIO19,
1893 .function = CX23885_PAD_IR_RX,
1894 .value = 0,
1895 .strength = CX25840_PIN_DRIVE_MEDIUM,
1896 }
1897 };
1898 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1899
1900 struct v4l2_subdev_ir_parameters params;
1901 int ret = 0;
1902 switch (dev->board) {
1903 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1904 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1905 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1906 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1907 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1908 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1909 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1910 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1911 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1912 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1913 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
1914 /* FIXME: Implement me */
1915 break;
1916 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1917 ret = cx23888_ir_probe(dev);
1918 if (ret)
1919 break;
1920 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1921 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1922 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1923 break;
1924 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1925 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1926 ret = cx23888_ir_probe(dev);
1927 if (ret)
1928 break;
1929 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1930 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1931 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1932 /*
1933 * For these boards we need to invert the Tx output via the
1934 * IR controller to have the LED off while idle
1935 */
1936 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
1937 params.enable = false;
1938 params.shutdown = false;
1939 params.invert_level = true;
1940 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1941 params.shutdown = true;
1942 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1943 break;
1944 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1945 case CX23885_BOARD_TEVII_S470:
1946 case CX23885_BOARD_MYGICA_X8507:
1947 case CX23885_BOARD_TBS_6980:
1948 case CX23885_BOARD_TBS_6981:
1949 case CX23885_BOARD_DVBSKY_T9580:
1950 case CX23885_BOARD_DVBSKY_T980C:
1951 case CX23885_BOARD_DVBSKY_S950C:
1952 case CX23885_BOARD_TT_CT2_4500_CI:
1953 case CX23885_BOARD_DVBSKY_S950:
1954 case CX23885_BOARD_DVBSKY_S952:
1955 case CX23885_BOARD_DVBSKY_T982:
1956 if (!enable_885_ir)
1957 break;
1958 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1959 if (dev->sd_ir == NULL) {
1960 ret = -ENODEV;
1961 break;
1962 }
1963 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1964 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1965 break;
1966 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1967 if (!enable_885_ir)
1968 break;
1969 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1970 if (dev->sd_ir == NULL) {
1971 ret = -ENODEV;
1972 break;
1973 }
1974 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1975 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1976 break;
1977 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1978 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1979 request_module("ir-kbd-i2c");
1980 break;
1981 }
1982
1983 return ret;
1984 }
1985
1986 void cx23885_ir_fini(struct cx23885_dev *dev)
1987 {
1988 switch (dev->board) {
1989 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1990 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1991 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1992 cx23885_irq_remove(dev, PCI_MSK_IR);
1993 cx23888_ir_remove(dev);
1994 dev->sd_ir = NULL;
1995 break;
1996 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1997 case CX23885_BOARD_TEVII_S470:
1998 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1999 case CX23885_BOARD_MYGICA_X8507:
2000 case CX23885_BOARD_TBS_6980:
2001 case CX23885_BOARD_TBS_6981:
2002 case CX23885_BOARD_DVBSKY_T9580:
2003 case CX23885_BOARD_DVBSKY_T980C:
2004 case CX23885_BOARD_DVBSKY_S950C:
2005 case CX23885_BOARD_TT_CT2_4500_CI:
2006 case CX23885_BOARD_DVBSKY_S950:
2007 case CX23885_BOARD_DVBSKY_S952:
2008 case CX23885_BOARD_DVBSKY_T982:
2009 cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
2010 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
2011 dev->sd_ir = NULL;
2012 break;
2013 }
2014 }
2015
2016 static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
2017 {
2018 int data;
2019 int tdo = 0;
2020 struct cx23885_dev *dev = (struct cx23885_dev *)device;
2021 /*TMS*/
2022 data = ((cx_read(GP0_IO)) & (~0x00000002));
2023 data |= (tms ? 0x00020002 : 0x00020000);
2024 cx_write(GP0_IO, data);
2025
2026 /*TDI*/
2027 data = ((cx_read(MC417_RWD)) & (~0x0000a000));
2028 data |= (tdi ? 0x00008000 : 0);
2029 cx_write(MC417_RWD, data);
2030 if (read_tdo)
2031 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
2032
2033 cx_write(MC417_RWD, data | 0x00002000);
2034 udelay(1);
2035 /*TCK*/
2036 cx_write(MC417_RWD, data);
2037
2038 return tdo;
2039 }
2040
2041 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
2042 {
2043 switch (dev->board) {
2044 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2045 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2046 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2047 if (dev->sd_ir)
2048 cx23885_irq_add_enable(dev, PCI_MSK_IR);
2049 break;
2050 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2051 case CX23885_BOARD_TEVII_S470:
2052 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2053 case CX23885_BOARD_MYGICA_X8507:
2054 case CX23885_BOARD_TBS_6980:
2055 case CX23885_BOARD_TBS_6981:
2056 case CX23885_BOARD_DVBSKY_T9580:
2057 case CX23885_BOARD_DVBSKY_T980C:
2058 case CX23885_BOARD_DVBSKY_S950C:
2059 case CX23885_BOARD_TT_CT2_4500_CI:
2060 case CX23885_BOARD_DVBSKY_S950:
2061 case CX23885_BOARD_DVBSKY_S952:
2062 case CX23885_BOARD_DVBSKY_T982:
2063 if (dev->sd_ir)
2064 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
2065 break;
2066 }
2067 }
2068
2069 void cx23885_card_setup(struct cx23885_dev *dev)
2070 {
2071 struct cx23885_tsport *ts1 = &dev->ts1;
2072 struct cx23885_tsport *ts2 = &dev->ts2;
2073
2074 static u8 eeprom[256];
2075
2076 if (dev->i2c_bus[0].i2c_rc == 0) {
2077 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
2078 tveeprom_read(&dev->i2c_bus[0].i2c_client,
2079 eeprom, sizeof(eeprom));
2080 }
2081
2082 switch (dev->board) {
2083 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2084 if (dev->i2c_bus[0].i2c_rc == 0) {
2085 if (eeprom[0x80] != 0x84)
2086 hauppauge_eeprom(dev, eeprom+0xc0);
2087 else
2088 hauppauge_eeprom(dev, eeprom+0x80);
2089 }
2090 break;
2091 case CX23885_BOARD_HAUPPAUGE_HVR1500:
2092 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
2093 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2094 if (dev->i2c_bus[0].i2c_rc == 0)
2095 hauppauge_eeprom(dev, eeprom+0x80);
2096 break;
2097 case CX23885_BOARD_HAUPPAUGE_HVR1800:
2098 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2099 case CX23885_BOARD_HAUPPAUGE_HVR1200:
2100 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2101 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2102 case CX23885_BOARD_HAUPPAUGE_HVR1275:
2103 case CX23885_BOARD_HAUPPAUGE_HVR1255:
2104 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2105 case CX23885_BOARD_HAUPPAUGE_HVR1210:
2106 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2107 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2108 case CX23885_BOARD_HAUPPAUGE_HVR4400:
2109 case CX23885_BOARD_HAUPPAUGE_STARBURST:
2110 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2111 case CX23885_BOARD_HAUPPAUGE_HVR5525:
2112 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
2113 case CX23885_BOARD_HAUPPAUGE_STARBURST2:
2114 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2115 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
2116 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
2117 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
2118 if (dev->i2c_bus[0].i2c_rc == 0)
2119 hauppauge_eeprom(dev, eeprom+0xc0);
2120 break;
2121 case CX23885_BOARD_VIEWCAST_260E:
2122 case CX23885_BOARD_VIEWCAST_460E:
2123 dev->i2c_bus[1].i2c_client.addr = 0xa0 >> 1;
2124 tveeprom_read(&dev->i2c_bus[1].i2c_client,
2125 eeprom, sizeof(eeprom));
2126 if (dev->i2c_bus[0].i2c_rc == 0)
2127 viewcast_eeprom(dev, eeprom);
2128 break;
2129 }
2130
2131 switch (dev->board) {
2132 case CX23885_BOARD_AVERMEDIA_HC81R:
2133 /* Defaults for VID B */
2134 ts1->gen_ctrl_val = 0x4; /* Parallel */
2135 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2136 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2137 /* Defaults for VID C */
2138 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
2139 ts2->gen_ctrl_val = 0x10e;
2140 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2141 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2142 break;
2143 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
2144 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
2145 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
2146 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2147 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2148 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2149 /* fall-through */
2150 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
2151 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2152 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2153 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2154 break;
2155 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2156 case CX23885_BOARD_HAUPPAUGE_HVR1800:
2157 /* Defaults for VID B - Analog encoder */
2158 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
2159 ts1->gen_ctrl_val = 0x10e;
2160 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2161 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2162
2163 /* APB_TSVALERR_POL (active low)*/
2164 ts1->vld_misc_val = 0x2000;
2165 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
2166 cx_write(0x130184, 0xc);
2167
2168 /* Defaults for VID C */
2169 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2170 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2171 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2172 break;
2173 case CX23885_BOARD_TBS_6920:
2174 ts1->gen_ctrl_val = 0x4; /* Parallel */
2175 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2176 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2177 break;
2178 case CX23885_BOARD_TEVII_S470:
2179 case CX23885_BOARD_TEVII_S471:
2180 case CX23885_BOARD_DVBWORLD_2005:
2181 case CX23885_BOARD_PROF_8000:
2182 case CX23885_BOARD_DVBSKY_T980C:
2183 case CX23885_BOARD_DVBSKY_S950C:
2184 case CX23885_BOARD_TT_CT2_4500_CI:
2185 case CX23885_BOARD_DVBSKY_S950:
2186 ts1->gen_ctrl_val = 0x5; /* Parallel */
2187 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2188 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2189 break;
2190 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2191 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2192 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2193 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2194 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2195 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2196 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2197 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2198 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2199 break;
2200 case CX23885_BOARD_TBS_6980:
2201 case CX23885_BOARD_TBS_6981:
2202 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2203 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2204 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2205 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2206 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2207 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2208 tbs_card_init(dev);
2209 break;
2210 case CX23885_BOARD_MYGICA_X8506:
2211 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
2212 case CX23885_BOARD_MYGICA_X8507:
2213 ts1->gen_ctrl_val = 0x5; /* Parallel */
2214 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2215 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2216 break;
2217 case CX23885_BOARD_MYGICA_X8558PRO:
2218 ts1->gen_ctrl_val = 0x5; /* Parallel */
2219 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2220 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2221 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2222 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2223 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2224 break;
2225 case CX23885_BOARD_HAUPPAUGE_HVR4400:
2226 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2227 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2228 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2229 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2230 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2231 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2232 break;
2233 case CX23885_BOARD_HAUPPAUGE_STARBURST:
2234 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2235 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2236 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2237 break;
2238 case CX23885_BOARD_DVBSKY_T9580:
2239 case CX23885_BOARD_DVBSKY_T982:
2240 ts1->gen_ctrl_val = 0x5; /* Parallel */
2241 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2242 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2243 ts2->gen_ctrl_val = 0x8; /* Serial bus */
2244 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2245 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2246 break;
2247 case CX23885_BOARD_DVBSKY_S952:
2248 ts1->gen_ctrl_val = 0x5; /* Parallel */
2249 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2250 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2251 ts2->gen_ctrl_val = 0xe; /* Serial bus */
2252 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2253 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2254 break;
2255 case CX23885_BOARD_HAUPPAUGE_HVR5525:
2256 case CX23885_BOARD_HAUPPAUGE_STARBURST2:
2257 ts1->gen_ctrl_val = 0x5; /* Parallel */
2258 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2259 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2260 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2261 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2262 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2263 break;
2264 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
2265 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2266 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
2267 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
2268 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
2269 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2270 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2271 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2272 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2273 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2274 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2275 break;
2276 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2277 case CX23885_BOARD_HAUPPAUGE_HVR1500:
2278 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
2279 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2280 case CX23885_BOARD_HAUPPAUGE_HVR1200:
2281 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2282 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2283 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2284 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2285 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2286 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2287 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2288 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2289 case CX23885_BOARD_HAUPPAUGE_HVR1275:
2290 case CX23885_BOARD_HAUPPAUGE_HVR1255:
2291 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2292 case CX23885_BOARD_HAUPPAUGE_HVR1210:
2293 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2294 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2295 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2296 default:
2297 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2298 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2299 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2300 }
2301
2302 /* Certain boards support analog, or require the avcore to be
2303 * loaded, ensure this happens.
2304 */
2305 switch (dev->board) {
2306 case CX23885_BOARD_TEVII_S470:
2307 /* Currently only enabled for the integrated IR controller */
2308 if (!enable_885_ir)
2309 break;
2310 /* fall-through */
2311 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2312 case CX23885_BOARD_HAUPPAUGE_HVR1800:
2313 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2314 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2315 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2316 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2317 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2318 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2319 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2320 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2321 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2322 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2323 case CX23885_BOARD_HAUPPAUGE_HVR1255:
2324 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2325 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
2326 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2327 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
2328 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2329 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2330 case CX23885_BOARD_MYGICA_X8506:
2331 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
2332 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2333 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
2334 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2335 case CX23885_BOARD_HAUPPAUGE_HVR1500:
2336 case CX23885_BOARD_MPX885:
2337 case CX23885_BOARD_MYGICA_X8507:
2338 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2339 case CX23885_BOARD_AVERMEDIA_HC81R:
2340 case CX23885_BOARD_TBS_6980:
2341 case CX23885_BOARD_TBS_6981:
2342 case CX23885_BOARD_DVBSKY_T9580:
2343 case CX23885_BOARD_DVBSKY_T980C:
2344 case CX23885_BOARD_DVBSKY_S950C:
2345 case CX23885_BOARD_TT_CT2_4500_CI:
2346 case CX23885_BOARD_DVBSKY_S950:
2347 case CX23885_BOARD_DVBSKY_S952:
2348 case CX23885_BOARD_DVBSKY_T982:
2349 case CX23885_BOARD_VIEWCAST_260E:
2350 case CX23885_BOARD_VIEWCAST_460E:
2351 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
2352 &dev->i2c_bus[2].i2c_adap,
2353 "cx25840", 0x88 >> 1, NULL);
2354 if (dev->sd_cx25840) {
2355 /* set host data for clk_freq configuration */
2356 v4l2_set_subdev_hostdata(dev->sd_cx25840,
2357 &dev->clk_freq);
2358
2359 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
2360 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
2361 }
2362 break;
2363 }
2364
2365 switch (dev->board) {
2366 case CX23885_BOARD_VIEWCAST_260E:
2367 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2368 &dev->i2c_bus[0].i2c_adap,
2369 "cs3308", 0x82 >> 1, NULL);
2370 break;
2371 case CX23885_BOARD_VIEWCAST_460E:
2372 /* This cs3308 controls the audio from the breakout cable */
2373 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2374 &dev->i2c_bus[0].i2c_adap,
2375 "cs3308", 0x80 >> 1, NULL);
2376 /* This cs3308 controls the audio from the onboard header */
2377 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2378 &dev->i2c_bus[0].i2c_adap,
2379 "cs3308", 0x82 >> 1, NULL);
2380 break;
2381 }
2382
2383 /* AUX-PLL 27MHz CLK */
2384 switch (dev->board) {
2385 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2386 netup_initialize(dev);
2387 break;
2388 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
2389 int ret;
2390 const struct firmware *fw;
2391 const char *filename = "dvb-netup-altera-01.fw";
2392 char *action = "configure";
2393 static struct netup_card_info cinfo;
2394 struct altera_config netup_config = {
2395 .dev = dev,
2396 .action = action,
2397 .jtag_io = netup_jtag_io,
2398 };
2399
2400 netup_initialize(dev);
2401
2402 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
2403 if (netup_card_rev)
2404 cinfo.rev = netup_card_rev;
2405
2406 switch (cinfo.rev) {
2407 case 0x4:
2408 filename = "dvb-netup-altera-04.fw";
2409 break;
2410 default:
2411 filename = "dvb-netup-altera-01.fw";
2412 break;
2413 }
2414 pr_info("NetUP card rev=0x%x fw_filename=%s\n",
2415 cinfo.rev, filename);
2416
2417 ret = request_firmware(&fw, filename, &dev->pci->dev);
2418 if (ret != 0)
2419 pr_err("did not find the firmware file '%s'. You can use <kernel_dir>/scripts/get_dvb_firmware to get the firmware.",
2420 filename);
2421 else
2422 altera_init(&netup_config, fw);
2423
2424 release_firmware(fw);
2425 break;
2426 }
2427 }
2428 }
Ubuntu Hirsute Linux kernel mirror