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1 /*
2 * cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver
3 *
4 * (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]
5 * (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
6 * (c) 2003 Gerd Knorr <kraxel@bytesex.org>
7 *
8 * -----------------------------------------------------------------------
9 *
10 * Lot of voodoo here. Even the data sheet doesn't help to
11 * understand what is going on here, the documentation for the audio
12 * part of the cx2388x chip is *very* bad.
13 *
14 * Some of this comes from party done linux driver sources I got from
15 * [undocumented].
16 *
17 * Some comes from the dscaler sources, one of the dscaler driver guy works
18 * for Conexant ...
19 *
20 * -----------------------------------------------------------------------
21 *
22 * This program is free software; you can redistribute it and/or modify
23 * it under the terms of the GNU General Public License as published by
24 * the Free Software Foundation; either version 2 of the License, or
25 * (at your option) any later version.
26 *
27 * This program is distributed in the hope that it will be useful,
28 * but WITHOUT ANY WARRANTY; without even the implied warranty of
29 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
30 * GNU General Public License for more details.
31 */
32
33 #include "cx88.h"
34
35 #include <linux/module.h>
36 #include <linux/errno.h>
37 #include <linux/freezer.h>
38 #include <linux/kernel.h>
39 #include <linux/mm.h>
40 #include <linux/poll.h>
41 #include <linux/signal.h>
42 #include <linux/ioport.h>
43 #include <linux/types.h>
44 #include <linux/interrupt.h>
45 #include <linux/vmalloc.h>
46 #include <linux/init.h>
47 #include <linux/delay.h>
48 #include <linux/kthread.h>
49
50 static unsigned int audio_debug;
51 module_param(audio_debug, int, 0644);
52 MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");
53
54 static unsigned int always_analog;
55 module_param(always_analog, int, 0644);
56 MODULE_PARM_DESC(always_analog, "force analog audio out");
57
58 static unsigned int radio_deemphasis;
59 module_param(radio_deemphasis, int, 0644);
60 MODULE_PARM_DESC(radio_deemphasis, "Radio deemphasis time constant, 0=None, 1=50us (elsewhere), 2=75us (USA)");
61
62 #define dprintk(fmt, arg...) do { \
63 if (audio_debug) \
64 printk(KERN_DEBUG pr_fmt("%s: tvaudio:" fmt), \
65 __func__, ##arg); \
66 } while (0)
67 /* ----------------------------------------------------------- */
68
69 static const char * const aud_ctl_names[64] = {
70 [EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO",
71 [EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO",
72 [EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP",
73 [EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO",
74 [EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP",
75 [EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1",
76 [EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2",
77 [EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO",
78 [EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2",
79 [EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO",
80 [EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1",
81 [EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2",
82 [EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO",
83 [EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2",
84 [EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO",
85 [EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1",
86 [EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2",
87 [EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO",
88 [EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2",
89 [EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO",
90 [EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO",
91 [EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO",
92 [EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO",
93 };
94
95 struct rlist {
96 u32 reg;
97 u32 val;
98 };
99
100 static void set_audio_registers(struct cx88_core *core, const struct rlist *l)
101 {
102 int i;
103
104 for (i = 0; l[i].reg; i++) {
105 switch (l[i].reg) {
106 case AUD_PDF_DDS_CNST_BYTE2:
107 case AUD_PDF_DDS_CNST_BYTE1:
108 case AUD_PDF_DDS_CNST_BYTE0:
109 case AUD_QAM_MODE:
110 case AUD_PHACC_FREQ_8MSB:
111 case AUD_PHACC_FREQ_8LSB:
112 cx_writeb(l[i].reg, l[i].val);
113 break;
114 default:
115 cx_write(l[i].reg, l[i].val);
116 break;
117 }
118 }
119 }
120
121 static void set_audio_start(struct cx88_core *core, u32 mode)
122 {
123 /* mute */
124 cx_write(AUD_VOL_CTL, (1 << 6));
125
126 /* start programming */
127 cx_write(AUD_INIT, mode);
128 cx_write(AUD_INIT_LD, 0x0001);
129 cx_write(AUD_SOFT_RESET, 0x0001);
130 }
131
132 static void set_audio_finish(struct cx88_core *core, u32 ctl)
133 {
134 u32 volume;
135
136 /* restart dma; This avoids buzz in NICAM and is good in others */
137 cx88_stop_audio_dma(core);
138 cx_write(AUD_RATE_THRES_DMD, 0x000000C0);
139 cx88_start_audio_dma(core);
140
141 if (core->board.mpeg & CX88_MPEG_BLACKBIRD) {
142 cx_write(AUD_I2SINPUTCNTL, 4);
143 cx_write(AUD_BAUDRATE, 1);
144 /* 'pass-thru mode': this enables the i2s output to the mpeg encoder */
145 cx_set(AUD_CTL, EN_I2SOUT_ENABLE);
146 cx_write(AUD_I2SOUTPUTCNTL, 1);
147 cx_write(AUD_I2SCNTL, 0);
148 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */
149 }
150 if ((always_analog) || (!(core->board.mpeg & CX88_MPEG_BLACKBIRD))) {
151 ctl |= EN_DAC_ENABLE;
152 cx_write(AUD_CTL, ctl);
153 }
154
155 /* finish programming */
156 cx_write(AUD_SOFT_RESET, 0x0000);
157
158 /* unmute */
159 volume = cx_sread(SHADOW_AUD_VOL_CTL);
160 cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume);
161
162 core->last_change = jiffies;
163 }
164
165 /* ----------------------------------------------------------- */
166
167 static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap,
168 u32 mode)
169 {
170 static const struct rlist btsc[] = {
171 {AUD_AFE_12DB_EN, 0x00000001},
172 {AUD_OUT1_SEL, 0x00000013},
173 {AUD_OUT1_SHIFT, 0x00000000},
174 {AUD_POLY0_DDS_CONSTANT, 0x0012010c},
175 {AUD_DMD_RA_DDS, 0x00c3e7aa},
176 {AUD_DBX_IN_GAIN, 0x00004734},
177 {AUD_DBX_WBE_GAIN, 0x00004640},
178 {AUD_DBX_SE_GAIN, 0x00008d31},
179 {AUD_DCOC_0_SRC, 0x0000001a},
180 {AUD_IIR1_4_SEL, 0x00000021},
181 {AUD_DCOC_PASS_IN, 0x00000003},
182 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
183 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
184 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
185 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
186 {AUD_DN0_FREQ, 0x0000283b},
187 {AUD_DN2_SRC_SEL, 0x00000008},
188 {AUD_DN2_FREQ, 0x00003000},
189 {AUD_DN2_AFC, 0x00000002},
190 {AUD_DN2_SHFT, 0x00000000},
191 {AUD_IIR2_2_SEL, 0x00000020},
192 {AUD_IIR2_2_SHIFT, 0x00000000},
193 {AUD_IIR2_3_SEL, 0x0000001f},
194 {AUD_IIR2_3_SHIFT, 0x00000000},
195 {AUD_CRDC1_SRC_SEL, 0x000003ce},
196 {AUD_CRDC1_SHIFT, 0x00000000},
197 {AUD_CORDIC_SHIFT_1, 0x00000007},
198 {AUD_DCOC_1_SRC, 0x0000001b},
199 {AUD_DCOC1_SHIFT, 0x00000000},
200 {AUD_RDSI_SEL, 0x00000008},
201 {AUD_RDSQ_SEL, 0x00000008},
202 {AUD_RDSI_SHIFT, 0x00000000},
203 {AUD_RDSQ_SHIFT, 0x00000000},
204 {AUD_POLYPH80SCALEFAC, 0x00000003},
205 { /* end of list */ },
206 };
207 static const struct rlist btsc_sap[] = {
208 {AUD_AFE_12DB_EN, 0x00000001},
209 {AUD_DBX_IN_GAIN, 0x00007200},
210 {AUD_DBX_WBE_GAIN, 0x00006200},
211 {AUD_DBX_SE_GAIN, 0x00006200},
212 {AUD_IIR1_1_SEL, 0x00000000},
213 {AUD_IIR1_3_SEL, 0x00000001},
214 {AUD_DN1_SRC_SEL, 0x00000007},
215 {AUD_IIR1_4_SHIFT, 0x00000006},
216 {AUD_IIR2_1_SHIFT, 0x00000000},
217 {AUD_IIR2_2_SHIFT, 0x00000000},
218 {AUD_IIR3_0_SHIFT, 0x00000000},
219 {AUD_IIR3_1_SHIFT, 0x00000000},
220 {AUD_IIR3_0_SEL, 0x0000000d},
221 {AUD_IIR3_1_SEL, 0x0000000e},
222 {AUD_DEEMPH1_SRC_SEL, 0x00000014},
223 {AUD_DEEMPH1_SHIFT, 0x00000000},
224 {AUD_DEEMPH1_G0, 0x00004000},
225 {AUD_DEEMPH1_A0, 0x00000000},
226 {AUD_DEEMPH1_B0, 0x00000000},
227 {AUD_DEEMPH1_A1, 0x00000000},
228 {AUD_DEEMPH1_B1, 0x00000000},
229 {AUD_OUT0_SEL, 0x0000003f},
230 {AUD_OUT1_SEL, 0x0000003f},
231 {AUD_DN1_AFC, 0x00000002},
232 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
233 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
234 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
235 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
236 {AUD_IIR1_0_SEL, 0x0000001d},
237 {AUD_IIR1_2_SEL, 0x0000001e},
238 {AUD_IIR2_1_SEL, 0x00000002},
239 {AUD_IIR2_2_SEL, 0x00000004},
240 {AUD_IIR3_2_SEL, 0x0000000f},
241 {AUD_DCOC2_SHIFT, 0x00000001},
242 {AUD_IIR3_2_SHIFT, 0x00000001},
243 {AUD_DEEMPH0_SRC_SEL, 0x00000014},
244 {AUD_CORDIC_SHIFT_1, 0x00000006},
245 {AUD_POLY0_DDS_CONSTANT, 0x000e4db2},
246 {AUD_DMD_RA_DDS, 0x00f696e6},
247 {AUD_IIR2_3_SEL, 0x00000025},
248 {AUD_IIR1_4_SEL, 0x00000021},
249 {AUD_DN1_FREQ, 0x0000c965},
250 {AUD_DCOC_PASS_IN, 0x00000003},
251 {AUD_DCOC_0_SRC, 0x0000001a},
252 {AUD_DCOC_1_SRC, 0x0000001b},
253 {AUD_DCOC1_SHIFT, 0x00000000},
254 {AUD_RDSI_SEL, 0x00000009},
255 {AUD_RDSQ_SEL, 0x00000009},
256 {AUD_RDSI_SHIFT, 0x00000000},
257 {AUD_RDSQ_SHIFT, 0x00000000},
258 {AUD_POLYPH80SCALEFAC, 0x00000003},
259 { /* end of list */ },
260 };
261
262 mode |= EN_FMRADIO_EN_RDS;
263
264 if (sap) {
265 dprintk("%s SAP (status: unknown)\n", __func__);
266 set_audio_start(core, SEL_SAP);
267 set_audio_registers(core, btsc_sap);
268 set_audio_finish(core, mode);
269 } else {
270 dprintk("%s (status: known-good)\n", __func__);
271 set_audio_start(core, SEL_BTSC);
272 set_audio_registers(core, btsc);
273 set_audio_finish(core, mode);
274 }
275 }
276
277 static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)
278 {
279 static const struct rlist nicam_l[] = {
280 {AUD_AFE_12DB_EN, 0x00000001},
281 {AUD_RATE_ADJ1, 0x00000060},
282 {AUD_RATE_ADJ2, 0x000000F9},
283 {AUD_RATE_ADJ3, 0x000001CC},
284 {AUD_RATE_ADJ4, 0x000002B3},
285 {AUD_RATE_ADJ5, 0x00000726},
286 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
287 {AUD_DEEMPHDENOM2_R, 0x00000000},
288 {AUD_ERRLOGPERIOD_R, 0x00000064},
289 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
290 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
291 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
292 {AUD_POLYPH80SCALEFAC, 0x00000003},
293 {AUD_DMD_RA_DDS, 0x00C00000},
294 {AUD_PLL_INT, 0x0000001E},
295 {AUD_PLL_DDS, 0x00000000},
296 {AUD_PLL_FRAC, 0x0000E542},
297 {AUD_START_TIMER, 0x00000000},
298 {AUD_DEEMPHNUMER1_R, 0x000353DE},
299 {AUD_DEEMPHNUMER2_R, 0x000001B1},
300 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
301 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
302 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
303 {AUD_QAM_MODE, 0x05},
304 {AUD_PHACC_FREQ_8MSB, 0x34},
305 {AUD_PHACC_FREQ_8LSB, 0x4C},
306 {AUD_DEEMPHGAIN_R, 0x00006680},
307 {AUD_RATE_THRES_DMD, 0x000000C0},
308 { /* end of list */ },
309 };
310
311 static const struct rlist nicam_bgdki_common[] = {
312 {AUD_AFE_12DB_EN, 0x00000001},
313 {AUD_RATE_ADJ1, 0x00000010},
314 {AUD_RATE_ADJ2, 0x00000040},
315 {AUD_RATE_ADJ3, 0x00000100},
316 {AUD_RATE_ADJ4, 0x00000400},
317 {AUD_RATE_ADJ5, 0x00001000},
318 {AUD_ERRLOGPERIOD_R, 0x00000fff},
319 {AUD_ERRINTRPTTHSHLD1_R, 0x000003ff},
320 {AUD_ERRINTRPTTHSHLD2_R, 0x000000ff},
321 {AUD_ERRINTRPTTHSHLD3_R, 0x0000003f},
322 {AUD_POLYPH80SCALEFAC, 0x00000003},
323 {AUD_DEEMPHGAIN_R, 0x000023c2},
324 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
325 {AUD_DEEMPHNUMER2_R, 0x0003023e},
326 {AUD_DEEMPHDENOM1_R, 0x0000f3d0},
327 {AUD_DEEMPHDENOM2_R, 0x00000000},
328 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
329 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
330 {AUD_QAM_MODE, 0x05},
331 { /* end of list */ },
332 };
333
334 static const struct rlist nicam_i[] = {
335 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
336 {AUD_PHACC_FREQ_8MSB, 0x3a},
337 {AUD_PHACC_FREQ_8LSB, 0x93},
338 { /* end of list */ },
339 };
340
341 static const struct rlist nicam_default[] = {
342 {AUD_PDF_DDS_CNST_BYTE0, 0x16},
343 {AUD_PHACC_FREQ_8MSB, 0x34},
344 {AUD_PHACC_FREQ_8LSB, 0x4c},
345 { /* end of list */ },
346 };
347
348 set_audio_start(core, SEL_NICAM);
349 switch (core->tvaudio) {
350 case WW_L:
351 dprintk("%s SECAM-L NICAM (status: devel)\n", __func__);
352 set_audio_registers(core, nicam_l);
353 break;
354 case WW_I:
355 dprintk("%s PAL-I NICAM (status: known-good)\n", __func__);
356 set_audio_registers(core, nicam_bgdki_common);
357 set_audio_registers(core, nicam_i);
358 break;
359 case WW_NONE:
360 case WW_BTSC:
361 case WW_BG:
362 case WW_DK:
363 case WW_EIAJ:
364 case WW_I2SPT:
365 case WW_FM:
366 case WW_I2SADC:
367 case WW_M:
368 dprintk("%s PAL-BGDK NICAM (status: known-good)\n", __func__);
369 set_audio_registers(core, nicam_bgdki_common);
370 set_audio_registers(core, nicam_default);
371 break;
372 }
373
374 mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;
375 set_audio_finish(core, mode);
376 }
377
378 static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
379 {
380 static const struct rlist a2_bgdk_common[] = {
381 {AUD_ERRLOGPERIOD_R, 0x00000064},
382 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
383 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
384 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
385 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
386 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
387 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
388 {AUD_QAM_MODE, 0x05},
389 {AUD_PHACC_FREQ_8MSB, 0x34},
390 {AUD_PHACC_FREQ_8LSB, 0x4c},
391 {AUD_RATE_ADJ1, 0x00000100},
392 {AUD_RATE_ADJ2, 0x00000200},
393 {AUD_RATE_ADJ3, 0x00000300},
394 {AUD_RATE_ADJ4, 0x00000400},
395 {AUD_RATE_ADJ5, 0x00000500},
396 {AUD_THR_FR, 0x00000000},
397 {AAGC_HYST, 0x0000001a},
398 {AUD_PILOT_BQD_1_K0, 0x0000755b},
399 {AUD_PILOT_BQD_1_K1, 0x00551340},
400 {AUD_PILOT_BQD_1_K2, 0x006d30be},
401 {AUD_PILOT_BQD_1_K3, 0xffd394af},
402 {AUD_PILOT_BQD_1_K4, 0x00400000},
403 {AUD_PILOT_BQD_2_K0, 0x00040000},
404 {AUD_PILOT_BQD_2_K1, 0x002a4841},
405 {AUD_PILOT_BQD_2_K2, 0x00400000},
406 {AUD_PILOT_BQD_2_K3, 0x00000000},
407 {AUD_PILOT_BQD_2_K4, 0x00000000},
408 {AUD_MODE_CHG_TIMER, 0x00000040},
409 {AUD_AFE_12DB_EN, 0x00000001},
410 {AUD_CORDIC_SHIFT_0, 0x00000007},
411 {AUD_CORDIC_SHIFT_1, 0x00000007},
412 {AUD_DEEMPH0_G0, 0x00000380},
413 {AUD_DEEMPH1_G0, 0x00000380},
414 {AUD_DCOC_0_SRC, 0x0000001a},
415 {AUD_DCOC0_SHIFT, 0x00000000},
416 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
417 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
418 {AUD_DCOC_PASS_IN, 0x00000003},
419 {AUD_IIR3_0_SEL, 0x00000021},
420 {AUD_DN2_AFC, 0x00000002},
421 {AUD_DCOC_1_SRC, 0x0000001b},
422 {AUD_DCOC1_SHIFT, 0x00000000},
423 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
424 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
425 {AUD_IIR3_1_SEL, 0x00000023},
426 {AUD_RDSI_SEL, 0x00000017},
427 {AUD_RDSI_SHIFT, 0x00000000},
428 {AUD_RDSQ_SEL, 0x00000017},
429 {AUD_RDSQ_SHIFT, 0x00000000},
430 {AUD_PLL_INT, 0x0000001e},
431 {AUD_PLL_DDS, 0x00000000},
432 {AUD_PLL_FRAC, 0x0000e542},
433 {AUD_POLYPH80SCALEFAC, 0x00000001},
434 {AUD_START_TIMER, 0x00000000},
435 { /* end of list */ },
436 };
437
438 static const struct rlist a2_bg[] = {
439 {AUD_DMD_RA_DDS, 0x002a4f2f},
440 {AUD_C1_UP_THR, 0x00007000},
441 {AUD_C1_LO_THR, 0x00005400},
442 {AUD_C2_UP_THR, 0x00005400},
443 {AUD_C2_LO_THR, 0x00003000},
444 { /* end of list */ },
445 };
446
447 static const struct rlist a2_dk[] = {
448 {AUD_DMD_RA_DDS, 0x002a4f2f},
449 {AUD_C1_UP_THR, 0x00007000},
450 {AUD_C1_LO_THR, 0x00005400},
451 {AUD_C2_UP_THR, 0x00005400},
452 {AUD_C2_LO_THR, 0x00003000},
453 {AUD_DN0_FREQ, 0x00003a1c},
454 {AUD_DN2_FREQ, 0x0000d2e0},
455 { /* end of list */ },
456 };
457
458 static const struct rlist a1_i[] = {
459 {AUD_ERRLOGPERIOD_R, 0x00000064},
460 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
461 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
462 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
463 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
464 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
465 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
466 {AUD_QAM_MODE, 0x05},
467 {AUD_PHACC_FREQ_8MSB, 0x3a},
468 {AUD_PHACC_FREQ_8LSB, 0x93},
469 {AUD_DMD_RA_DDS, 0x002a4f2f},
470 {AUD_PLL_INT, 0x0000001e},
471 {AUD_PLL_DDS, 0x00000004},
472 {AUD_PLL_FRAC, 0x0000e542},
473 {AUD_RATE_ADJ1, 0x00000100},
474 {AUD_RATE_ADJ2, 0x00000200},
475 {AUD_RATE_ADJ3, 0x00000300},
476 {AUD_RATE_ADJ4, 0x00000400},
477 {AUD_RATE_ADJ5, 0x00000500},
478 {AUD_THR_FR, 0x00000000},
479 {AUD_PILOT_BQD_1_K0, 0x0000755b},
480 {AUD_PILOT_BQD_1_K1, 0x00551340},
481 {AUD_PILOT_BQD_1_K2, 0x006d30be},
482 {AUD_PILOT_BQD_1_K3, 0xffd394af},
483 {AUD_PILOT_BQD_1_K4, 0x00400000},
484 {AUD_PILOT_BQD_2_K0, 0x00040000},
485 {AUD_PILOT_BQD_2_K1, 0x002a4841},
486 {AUD_PILOT_BQD_2_K2, 0x00400000},
487 {AUD_PILOT_BQD_2_K3, 0x00000000},
488 {AUD_PILOT_BQD_2_K4, 0x00000000},
489 {AUD_MODE_CHG_TIMER, 0x00000060},
490 {AUD_AFE_12DB_EN, 0x00000001},
491 {AAGC_HYST, 0x0000000a},
492 {AUD_CORDIC_SHIFT_0, 0x00000007},
493 {AUD_CORDIC_SHIFT_1, 0x00000007},
494 {AUD_C1_UP_THR, 0x00007000},
495 {AUD_C1_LO_THR, 0x00005400},
496 {AUD_C2_UP_THR, 0x00005400},
497 {AUD_C2_LO_THR, 0x00003000},
498 {AUD_DCOC_0_SRC, 0x0000001a},
499 {AUD_DCOC0_SHIFT, 0x00000000},
500 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
501 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
502 {AUD_DCOC_PASS_IN, 0x00000003},
503 {AUD_IIR3_0_SEL, 0x00000021},
504 {AUD_DN2_AFC, 0x00000002},
505 {AUD_DCOC_1_SRC, 0x0000001b},
506 {AUD_DCOC1_SHIFT, 0x00000000},
507 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
508 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
509 {AUD_IIR3_1_SEL, 0x00000023},
510 {AUD_DN0_FREQ, 0x000035a3},
511 {AUD_DN2_FREQ, 0x000029c7},
512 {AUD_CRDC0_SRC_SEL, 0x00000511},
513 {AUD_IIR1_0_SEL, 0x00000001},
514 {AUD_IIR1_1_SEL, 0x00000000},
515 {AUD_IIR3_2_SEL, 0x00000003},
516 {AUD_IIR3_2_SHIFT, 0x00000000},
517 {AUD_IIR3_0_SEL, 0x00000002},
518 {AUD_IIR2_0_SEL, 0x00000021},
519 {AUD_IIR2_0_SHIFT, 0x00000002},
520 {AUD_DEEMPH0_SRC_SEL, 0x0000000b},
521 {AUD_DEEMPH1_SRC_SEL, 0x0000000b},
522 {AUD_POLYPH80SCALEFAC, 0x00000001},
523 {AUD_START_TIMER, 0x00000000},
524 { /* end of list */ },
525 };
526
527 static const struct rlist am_l[] = {
528 {AUD_ERRLOGPERIOD_R, 0x00000064},
529 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
530 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
531 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
532 {AUD_PDF_DDS_CNST_BYTE2, 0x48},
533 {AUD_PDF_DDS_CNST_BYTE1, 0x3D},
534 {AUD_QAM_MODE, 0x00},
535 {AUD_PDF_DDS_CNST_BYTE0, 0xf5},
536 {AUD_PHACC_FREQ_8MSB, 0x3a},
537 {AUD_PHACC_FREQ_8LSB, 0x4a},
538 {AUD_DEEMPHGAIN_R, 0x00006680},
539 {AUD_DEEMPHNUMER1_R, 0x000353DE},
540 {AUD_DEEMPHNUMER2_R, 0x000001B1},
541 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
542 {AUD_DEEMPHDENOM2_R, 0x00000000},
543 {AUD_FM_MODE_ENABLE, 0x00000007},
544 {AUD_POLYPH80SCALEFAC, 0x00000003},
545 {AUD_AFE_12DB_EN, 0x00000001},
546 {AAGC_GAIN, 0x00000000},
547 {AAGC_HYST, 0x00000018},
548 {AAGC_DEF, 0x00000020},
549 {AUD_DN0_FREQ, 0x00000000},
550 {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},
551 {AUD_DCOC_0_SRC, 0x00000021},
552 {AUD_IIR1_0_SEL, 0x00000000},
553 {AUD_IIR1_0_SHIFT, 0x00000007},
554 {AUD_IIR1_1_SEL, 0x00000002},
555 {AUD_IIR1_1_SHIFT, 0x00000000},
556 {AUD_DCOC_1_SRC, 0x00000003},
557 {AUD_DCOC1_SHIFT, 0x00000000},
558 {AUD_DCOC_PASS_IN, 0x00000000},
559 {AUD_IIR1_2_SEL, 0x00000023},
560 {AUD_IIR1_2_SHIFT, 0x00000000},
561 {AUD_IIR1_3_SEL, 0x00000004},
562 {AUD_IIR1_3_SHIFT, 0x00000007},
563 {AUD_IIR1_4_SEL, 0x00000005},
564 {AUD_IIR1_4_SHIFT, 0x00000007},
565 {AUD_IIR3_0_SEL, 0x00000007},
566 {AUD_IIR3_0_SHIFT, 0x00000000},
567 {AUD_DEEMPH0_SRC_SEL, 0x00000011},
568 {AUD_DEEMPH0_SHIFT, 0x00000000},
569 {AUD_DEEMPH0_G0, 0x00007000},
570 {AUD_DEEMPH0_A0, 0x00000000},
571 {AUD_DEEMPH0_B0, 0x00000000},
572 {AUD_DEEMPH0_A1, 0x00000000},
573 {AUD_DEEMPH0_B1, 0x00000000},
574 {AUD_DEEMPH1_SRC_SEL, 0x00000011},
575 {AUD_DEEMPH1_SHIFT, 0x00000000},
576 {AUD_DEEMPH1_G0, 0x00007000},
577 {AUD_DEEMPH1_A0, 0x00000000},
578 {AUD_DEEMPH1_B0, 0x00000000},
579 {AUD_DEEMPH1_A1, 0x00000000},
580 {AUD_DEEMPH1_B1, 0x00000000},
581 {AUD_OUT0_SEL, 0x0000003F},
582 {AUD_OUT1_SEL, 0x0000003F},
583 {AUD_DMD_RA_DDS, 0x00F5C285},
584 {AUD_PLL_INT, 0x0000001E},
585 {AUD_PLL_DDS, 0x00000000},
586 {AUD_PLL_FRAC, 0x0000E542},
587 {AUD_RATE_ADJ1, 0x00000100},
588 {AUD_RATE_ADJ2, 0x00000200},
589 {AUD_RATE_ADJ3, 0x00000300},
590 {AUD_RATE_ADJ4, 0x00000400},
591 {AUD_RATE_ADJ5, 0x00000500},
592 {AUD_RATE_THRES_DMD, 0x000000C0},
593 { /* end of list */ },
594 };
595
596 static const struct rlist a2_deemph50[] = {
597 {AUD_DEEMPH0_G0, 0x00000380},
598 {AUD_DEEMPH1_G0, 0x00000380},
599 {AUD_DEEMPHGAIN_R, 0x000011e1},
600 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
601 {AUD_DEEMPHNUMER2_R, 0x0003023c},
602 { /* end of list */ },
603 };
604
605 set_audio_start(core, SEL_A2);
606 switch (core->tvaudio) {
607 case WW_BG:
608 dprintk("%s PAL-BG A1/2 (status: known-good)\n", __func__);
609 set_audio_registers(core, a2_bgdk_common);
610 set_audio_registers(core, a2_bg);
611 set_audio_registers(core, a2_deemph50);
612 break;
613 case WW_DK:
614 dprintk("%s PAL-DK A1/2 (status: known-good)\n", __func__);
615 set_audio_registers(core, a2_bgdk_common);
616 set_audio_registers(core, a2_dk);
617 set_audio_registers(core, a2_deemph50);
618 break;
619 case WW_I:
620 dprintk("%s PAL-I A1 (status: known-good)\n", __func__);
621 set_audio_registers(core, a1_i);
622 set_audio_registers(core, a2_deemph50);
623 break;
624 case WW_L:
625 dprintk("%s AM-L (status: devel)\n", __func__);
626 set_audio_registers(core, am_l);
627 break;
628 case WW_NONE:
629 case WW_BTSC:
630 case WW_EIAJ:
631 case WW_I2SPT:
632 case WW_FM:
633 case WW_I2SADC:
634 case WW_M:
635 dprintk("%s Warning: wrong value\n", __func__);
636 return;
637 break;
638 }
639
640 mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;
641 set_audio_finish(core, mode);
642 }
643
644 static void set_audio_standard_EIAJ(struct cx88_core *core)
645 {
646 static const struct rlist eiaj[] = {
647 /* TODO: eiaj register settings are not there yet ... */
648
649 { /* end of list */ },
650 };
651 dprintk("%s (status: unknown)\n", __func__);
652
653 set_audio_start(core, SEL_EIAJ);
654 set_audio_registers(core, eiaj);
655 set_audio_finish(core, EN_EIAJ_AUTO_STEREO);
656 }
657
658 static void set_audio_standard_FM(struct cx88_core *core,
659 enum cx88_deemph_type deemph)
660 {
661 static const struct rlist fm_deemph_50[] = {
662 {AUD_DEEMPH0_G0, 0x0C45},
663 {AUD_DEEMPH0_A0, 0x6262},
664 {AUD_DEEMPH0_B0, 0x1C29},
665 {AUD_DEEMPH0_A1, 0x3FC66},
666 {AUD_DEEMPH0_B1, 0x399A},
667
668 {AUD_DEEMPH1_G0, 0x0D80},
669 {AUD_DEEMPH1_A0, 0x6262},
670 {AUD_DEEMPH1_B0, 0x1C29},
671 {AUD_DEEMPH1_A1, 0x3FC66},
672 {AUD_DEEMPH1_B1, 0x399A},
673
674 {AUD_POLYPH80SCALEFAC, 0x0003},
675 { /* end of list */ },
676 };
677 static const struct rlist fm_deemph_75[] = {
678 {AUD_DEEMPH0_G0, 0x091B},
679 {AUD_DEEMPH0_A0, 0x6B68},
680 {AUD_DEEMPH0_B0, 0x11EC},
681 {AUD_DEEMPH0_A1, 0x3FC66},
682 {AUD_DEEMPH0_B1, 0x399A},
683
684 {AUD_DEEMPH1_G0, 0x0AA0},
685 {AUD_DEEMPH1_A0, 0x6B68},
686 {AUD_DEEMPH1_B0, 0x11EC},
687 {AUD_DEEMPH1_A1, 0x3FC66},
688 {AUD_DEEMPH1_B1, 0x399A},
689
690 {AUD_POLYPH80SCALEFAC, 0x0003},
691 { /* end of list */ },
692 };
693
694 /* It is enough to leave default values? */
695 /* No, it's not! The deemphasis registers are reset to the 75us
696 * values by default. Analyzing the spectrum of the decoded audio
697 * reveals that "no deemphasis" is the same as 75 us, while the 50 us
698 * setting results in less deemphasis. */
699 static const struct rlist fm_no_deemph[] = {
700
701 {AUD_POLYPH80SCALEFAC, 0x0003},
702 { /* end of list */ },
703 };
704
705 dprintk("%s (status: unknown)\n", __func__);
706 set_audio_start(core, SEL_FMRADIO);
707
708 switch (deemph) {
709 default:
710 case FM_NO_DEEMPH:
711 set_audio_registers(core, fm_no_deemph);
712 break;
713
714 case FM_DEEMPH_50:
715 set_audio_registers(core, fm_deemph_50);
716 break;
717
718 case FM_DEEMPH_75:
719 set_audio_registers(core, fm_deemph_75);
720 break;
721 }
722
723 set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);
724 }
725
726 /* ----------------------------------------------------------- */
727
728 static int cx88_detect_nicam(struct cx88_core *core)
729 {
730 int i, j = 0;
731
732 dprintk("start nicam autodetect.\n");
733
734 for (i = 0; i < 6; i++) {
735 /* if bit1=1 then nicam is detected */
736 j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);
737
738 if (j == 1) {
739 dprintk("nicam is detected.\n");
740 return 1;
741 }
742
743 /* wait a little bit for next reading status */
744 msleep(10);
745 }
746
747 dprintk("nicam is not detected.\n");
748 return 0;
749 }
750
751 void cx88_set_tvaudio(struct cx88_core *core)
752 {
753 switch (core->tvaudio) {
754 case WW_BTSC:
755 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
756 break;
757 case WW_BG:
758 case WW_DK:
759 case WW_M:
760 case WW_I:
761 case WW_L:
762 /* prepare all dsp registers */
763 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
764
765 /* set nicam mode - otherwise
766 AUD_NICAM_STATUS2 contains wrong values */
767 set_audio_standard_NICAM(core, EN_NICAM_AUTO_STEREO);
768 if (cx88_detect_nicam(core) == 0) {
769 /* fall back to fm / am mono */
770 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
771 core->audiomode_current = V4L2_TUNER_MODE_MONO;
772 core->use_nicam = 0;
773 } else {
774 core->use_nicam = 1;
775 }
776 break;
777 case WW_EIAJ:
778 set_audio_standard_EIAJ(core);
779 break;
780 case WW_FM:
781 set_audio_standard_FM(core, radio_deemphasis);
782 break;
783 case WW_I2SADC:
784 set_audio_start(core, 0x01);
785 /*
786 * Slave/Philips/Autobaud
787 * NB on Nova-S bit1 NPhilipsSony appears to be inverted:
788 * 0= Sony, 1=Philips
789 */
790 cx_write(AUD_I2SINPUTCNTL, core->board.i2sinputcntl);
791 /* Switch to "I2S ADC mode" */
792 cx_write(AUD_I2SCNTL, 0x1);
793 set_audio_finish(core, EN_I2SIN_ENABLE);
794 break;
795 case WW_NONE:
796 case WW_I2SPT:
797 pr_info("unknown tv audio mode [%d]\n", core->tvaudio);
798 break;
799 }
800 return;
801 }
802
803 void cx88_newstation(struct cx88_core *core)
804 {
805 core->audiomode_manual = UNSET;
806 core->last_change = jiffies;
807 }
808
809 void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
810 {
811 static const char * const m[] = { "stereo", "dual mono", "mono", "sap" };
812 static const char * const p[] = { "no pilot", "pilot c1", "pilot c2", "?" };
813 u32 reg, mode, pilot;
814
815 reg = cx_read(AUD_STATUS);
816 mode = reg & 0x03;
817 pilot = (reg >> 2) & 0x03;
818
819 if (core->astat != reg)
820 dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",
821 reg, m[mode], p[pilot],
822 aud_ctl_names[cx_read(AUD_CTL) & 63]);
823 core->astat = reg;
824
825 t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP |
826 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
827 t->rxsubchans = UNSET;
828 t->audmode = V4L2_TUNER_MODE_MONO;
829
830 switch (mode) {
831 case 0:
832 t->audmode = V4L2_TUNER_MODE_STEREO;
833 break;
834 case 1:
835 t->audmode = V4L2_TUNER_MODE_LANG2;
836 break;
837 case 2:
838 t->audmode = V4L2_TUNER_MODE_MONO;
839 break;
840 case 3:
841 t->audmode = V4L2_TUNER_MODE_SAP;
842 break;
843 }
844
845 switch (core->tvaudio) {
846 case WW_BTSC:
847 case WW_BG:
848 case WW_DK:
849 case WW_M:
850 case WW_EIAJ:
851 if (!core->use_nicam) {
852 t->rxsubchans = cx88_dsp_detect_stereo_sap(core);
853 break;
854 }
855 break;
856 case WW_NONE:
857 case WW_I:
858 case WW_L:
859 case WW_I2SPT:
860 case WW_FM:
861 case WW_I2SADC:
862 /* nothing */
863 break;
864 }
865
866 /* If software stereo detection is not supported... */
867 if (t->rxsubchans == UNSET) {
868 t->rxsubchans = V4L2_TUNER_SUB_MONO;
869 /* If the hardware itself detected stereo, also return
870 stereo as an available subchannel */
871 if (t->audmode == V4L2_TUNER_MODE_STEREO)
872 t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
873 }
874 return;
875 }
876
877 void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
878 {
879 u32 ctl = UNSET;
880 u32 mask = UNSET;
881
882 if (manual) {
883 core->audiomode_manual = mode;
884 } else {
885 if (core->audiomode_manual != UNSET)
886 return;
887 }
888 core->audiomode_current = mode;
889
890 switch (core->tvaudio) {
891 case WW_BTSC:
892 switch (mode) {
893 case V4L2_TUNER_MODE_MONO:
894 set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO);
895 break;
896 case V4L2_TUNER_MODE_LANG1:
897 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
898 break;
899 case V4L2_TUNER_MODE_LANG2:
900 set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP);
901 break;
902 case V4L2_TUNER_MODE_STEREO:
903 case V4L2_TUNER_MODE_LANG1_LANG2:
904 set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO);
905 break;
906 }
907 break;
908 case WW_BG:
909 case WW_DK:
910 case WW_M:
911 case WW_I:
912 case WW_L:
913 if (core->use_nicam == 1) {
914 switch (mode) {
915 case V4L2_TUNER_MODE_MONO:
916 case V4L2_TUNER_MODE_LANG1:
917 set_audio_standard_NICAM(core,
918 EN_NICAM_FORCE_MONO1);
919 break;
920 case V4L2_TUNER_MODE_LANG2:
921 set_audio_standard_NICAM(core,
922 EN_NICAM_FORCE_MONO2);
923 break;
924 case V4L2_TUNER_MODE_STEREO:
925 case V4L2_TUNER_MODE_LANG1_LANG2:
926 set_audio_standard_NICAM(core,
927 EN_NICAM_FORCE_STEREO);
928 break;
929 }
930 } else {
931 if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) {
932 /* fall back to fm / am mono */
933 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
934 } else {
935 /* TODO: Add A2 autodection */
936 mask = 0x3f;
937 switch (mode) {
938 case V4L2_TUNER_MODE_MONO:
939 case V4L2_TUNER_MODE_LANG1:
940 ctl = EN_A2_FORCE_MONO1;
941 break;
942 case V4L2_TUNER_MODE_LANG2:
943 ctl = EN_A2_FORCE_MONO2;
944 break;
945 case V4L2_TUNER_MODE_STEREO:
946 case V4L2_TUNER_MODE_LANG1_LANG2:
947 ctl = EN_A2_FORCE_STEREO;
948 break;
949 }
950 }
951 }
952 break;
953 case WW_FM:
954 switch (mode) {
955 case V4L2_TUNER_MODE_MONO:
956 ctl = EN_FMRADIO_FORCE_MONO;
957 mask = 0x3f;
958 break;
959 case V4L2_TUNER_MODE_STEREO:
960 ctl = EN_FMRADIO_AUTO_STEREO;
961 mask = 0x3f;
962 break;
963 }
964 break;
965 case WW_I2SADC:
966 case WW_NONE:
967 case WW_EIAJ:
968 case WW_I2SPT:
969 /* DO NOTHING */
970 break;
971 }
972
973 if (ctl != UNSET) {
974 dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x [status=0x%x,ctl=0x%x,vol=0x%x]\n",
975 mask, ctl, cx_read(AUD_STATUS),
976 cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL));
977 cx_andor(AUD_CTL, mask, ctl);
978 }
979 return;
980 }
981
982 int cx88_audio_thread(void *data)
983 {
984 struct cx88_core *core = data;
985 struct v4l2_tuner t;
986 u32 mode = 0;
987
988 dprintk("cx88: tvaudio thread started\n");
989 set_freezable();
990 for (;;) {
991 msleep_interruptible(1000);
992 if (kthread_should_stop())
993 break;
994 try_to_freeze();
995
996 switch (core->tvaudio) {
997 case WW_BG:
998 case WW_DK:
999 case WW_M:
1000 case WW_I:
1001 case WW_L:
1002 if (core->use_nicam)
1003 goto hw_autodetect;
1004
1005 /* just monitor the audio status for now ... */
1006 memset(&t, 0, sizeof(t));
1007 cx88_get_stereo(core, &t);
1008
1009 if (core->audiomode_manual != UNSET)
1010 /* manually set, don't do anything. */
1011 continue;
1012
1013 /* monitor signal and set stereo if available */
1014 if (t.rxsubchans & V4L2_TUNER_SUB_STEREO)
1015 mode = V4L2_TUNER_MODE_STEREO;
1016 else
1017 mode = V4L2_TUNER_MODE_MONO;
1018 if (mode == core->audiomode_current)
1019 continue;
1020 /* automatically switch to best available mode */
1021 cx88_set_stereo(core, mode, 0);
1022 break;
1023 case WW_NONE:
1024 case WW_BTSC:
1025 case WW_EIAJ:
1026 case WW_I2SPT:
1027 case WW_FM:
1028 case WW_I2SADC:
1029 hw_autodetect:
1030 /* stereo autodetection is supported by hardware so
1031 we don't need to do it manually. Do nothing. */
1032 break;
1033 }
1034 }
1035
1036 dprintk("cx88: tvaudio thread exiting\n");
1037 return 0;
1038 }
1039
1040 /* ----------------------------------------------------------- */
1041
1042 EXPORT_SYMBOL(cx88_set_tvaudio);
1043 EXPORT_SYMBOL(cx88_newstation);
1044 EXPORT_SYMBOL(cx88_set_stereo);
1045 EXPORT_SYMBOL(cx88_get_stereo);
1046 EXPORT_SYMBOL(cx88_audio_thread);