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UBUNTU: SAUCE: change power control driver to acpi driver
[mirror_ubuntu-jammy-kernel.git] / drivers / media / pci / intel / ipu-isys-video.c
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2013 - 2021 Intel Corporation
3
4 #include <linux/delay.h>
5 #include <linux/firmware.h>
6 #include <linux/init_task.h>
7 #include <linux/kthread.h>
8 #include <linux/pm_runtime.h>
9 #include <linux/module.h>
10 #include <linux/version.h>
11 #include <linux/compat.h>
12
13 #include <uapi/linux/sched/types.h>
14
15 #include <media/media-entity.h>
16 #include <media/v4l2-device.h>
17 #include <media/v4l2-ioctl.h>
18 #include <media/v4l2-mc.h>
19
20 #include "ipu.h"
21 #include "ipu-bus.h"
22 #include "ipu-cpd.h"
23 #include "ipu-isys.h"
24 #include "ipu-isys-video.h"
25 #include "ipu-platform.h"
26 #include "ipu-platform-regs.h"
27 #include "ipu-platform-buttress-regs.h"
28 #include "ipu-trace.h"
29 #include "ipu-fw-isys.h"
30 #include "ipu-fw-com.h"
31
32 /* use max resolution pixel rate by default */
33 #define DEFAULT_PIXEL_RATE (360000000ULL * 2 * 4 / 10)
34
35 const struct ipu_isys_pixelformat ipu_isys_pfmts_be_soc[] = {
36 {V4L2_PIX_FMT_Y10, 16, 10, 0, MEDIA_BUS_FMT_Y10_1X10,
37 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
38 {V4L2_PIX_FMT_UYVY, 16, 16, 0, MEDIA_BUS_FMT_UYVY8_1X16,
39 IPU_FW_ISYS_FRAME_FORMAT_UYVY},
40 {V4L2_PIX_FMT_YUYV, 16, 16, 0, MEDIA_BUS_FMT_YUYV8_1X16,
41 IPU_FW_ISYS_FRAME_FORMAT_YUYV},
42 {V4L2_PIX_FMT_NV16, 16, 16, 8, MEDIA_BUS_FMT_UYVY8_1X16,
43 IPU_FW_ISYS_FRAME_FORMAT_NV16},
44 {V4L2_PIX_FMT_XRGB32, 32, 32, 0, MEDIA_BUS_FMT_RGB565_1X16,
45 IPU_FW_ISYS_FRAME_FORMAT_RGBA888},
46 {V4L2_PIX_FMT_XBGR32, 32, 32, 0, MEDIA_BUS_FMT_RGB888_1X24,
47 IPU_FW_ISYS_FRAME_FORMAT_RGBA888},
48 /* Raw bayer formats. */
49 {V4L2_PIX_FMT_SBGGR12, 16, 12, 0, MEDIA_BUS_FMT_SBGGR12_1X12,
50 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
51 {V4L2_PIX_FMT_SGBRG12, 16, 12, 0, MEDIA_BUS_FMT_SGBRG12_1X12,
52 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
53 {V4L2_PIX_FMT_SGRBG12, 16, 12, 0, MEDIA_BUS_FMT_SGRBG12_1X12,
54 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
55 {V4L2_PIX_FMT_SRGGB12, 16, 12, 0, MEDIA_BUS_FMT_SRGGB12_1X12,
56 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
57 {V4L2_PIX_FMT_SBGGR10, 16, 10, 0, MEDIA_BUS_FMT_SBGGR10_1X10,
58 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
59 {V4L2_PIX_FMT_SGBRG10, 16, 10, 0, MEDIA_BUS_FMT_SGBRG10_1X10,
60 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
61 {V4L2_PIX_FMT_SGRBG10, 16, 10, 0, MEDIA_BUS_FMT_SGRBG10_1X10,
62 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
63 {V4L2_PIX_FMT_SRGGB10, 16, 10, 0, MEDIA_BUS_FMT_SRGGB10_1X10,
64 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
65 {V4L2_PIX_FMT_SBGGR8, 8, 8, 0, MEDIA_BUS_FMT_SBGGR8_1X8,
66 IPU_FW_ISYS_FRAME_FORMAT_RAW8},
67 {V4L2_PIX_FMT_SGBRG8, 8, 8, 0, MEDIA_BUS_FMT_SGBRG8_1X8,
68 IPU_FW_ISYS_FRAME_FORMAT_RAW8},
69 {V4L2_PIX_FMT_SGRBG8, 8, 8, 0, MEDIA_BUS_FMT_SGRBG8_1X8,
70 IPU_FW_ISYS_FRAME_FORMAT_RAW8},
71 {V4L2_PIX_FMT_SRGGB8, 8, 8, 0, MEDIA_BUS_FMT_SRGGB8_1X8,
72 IPU_FW_ISYS_FRAME_FORMAT_RAW8},
73 {}
74 };
75
76 const struct ipu_isys_pixelformat ipu_isys_pfmts_packed[] = {
77 {V4L2_PIX_FMT_Y10, 10, 10, 0, MEDIA_BUS_FMT_Y10_1X10,
78 IPU_FW_ISYS_FRAME_FORMAT_RAW10},
79 #ifdef V4L2_PIX_FMT_Y210
80 {V4L2_PIX_FMT_Y210, 20, 20, 0, MEDIA_BUS_FMT_YUYV10_1X20,
81 IPU_FW_ISYS_FRAME_FORMAT_YUYV},
82 #endif
83 {V4L2_PIX_FMT_UYVY, 16, 16, 0, MEDIA_BUS_FMT_UYVY8_1X16,
84 IPU_FW_ISYS_FRAME_FORMAT_UYVY},
85 {V4L2_PIX_FMT_YUYV, 16, 16, 0, MEDIA_BUS_FMT_YUYV8_1X16,
86 IPU_FW_ISYS_FRAME_FORMAT_YUYV},
87 {V4L2_PIX_FMT_RGB565, 16, 16, 0, MEDIA_BUS_FMT_RGB565_1X16,
88 IPU_FW_ISYS_FRAME_FORMAT_RGB565},
89 {V4L2_PIX_FMT_BGR24, 24, 24, 0, MEDIA_BUS_FMT_RGB888_1X24,
90 IPU_FW_ISYS_FRAME_FORMAT_RGBA888},
91 #ifndef V4L2_PIX_FMT_SBGGR12P
92 {V4L2_PIX_FMT_SBGGR12, 12, 12, 0, MEDIA_BUS_FMT_SBGGR12_1X12,
93 IPU_FW_ISYS_FRAME_FORMAT_RAW12},
94 {V4L2_PIX_FMT_SGBRG12, 12, 12, 0, MEDIA_BUS_FMT_SGBRG12_1X12,
95 IPU_FW_ISYS_FRAME_FORMAT_RAW12},
96 {V4L2_PIX_FMT_SGRBG12, 12, 12, 0, MEDIA_BUS_FMT_SGRBG12_1X12,
97 IPU_FW_ISYS_FRAME_FORMAT_RAW12},
98 {V4L2_PIX_FMT_SRGGB12, 12, 12, 0, MEDIA_BUS_FMT_SRGGB12_1X12,
99 IPU_FW_ISYS_FRAME_FORMAT_RAW12},
100 #else /* V4L2_PIX_FMT_SBGGR12P */
101 {V4L2_PIX_FMT_SBGGR12P, 12, 12, 0, MEDIA_BUS_FMT_SBGGR12_1X12,
102 IPU_FW_ISYS_FRAME_FORMAT_RAW12},
103 {V4L2_PIX_FMT_SGBRG12P, 12, 12, 0, MEDIA_BUS_FMT_SGBRG12_1X12,
104 IPU_FW_ISYS_FRAME_FORMAT_RAW12},
105 {V4L2_PIX_FMT_SGRBG12P, 12, 12, 0, MEDIA_BUS_FMT_SGRBG12_1X12,
106 IPU_FW_ISYS_FRAME_FORMAT_RAW12},
107 {V4L2_PIX_FMT_SRGGB12P, 12, 12, 0, MEDIA_BUS_FMT_SRGGB12_1X12,
108 IPU_FW_ISYS_FRAME_FORMAT_RAW12},
109 #endif /* V4L2_PIX_FMT_SBGGR12P */
110 {V4L2_PIX_FMT_SBGGR10P, 10, 10, 0, MEDIA_BUS_FMT_SBGGR10_1X10,
111 IPU_FW_ISYS_FRAME_FORMAT_RAW10},
112 {V4L2_PIX_FMT_SGBRG10P, 10, 10, 0, MEDIA_BUS_FMT_SGBRG10_1X10,
113 IPU_FW_ISYS_FRAME_FORMAT_RAW10},
114 {V4L2_PIX_FMT_SGRBG10P, 10, 10, 0, MEDIA_BUS_FMT_SGRBG10_1X10,
115 IPU_FW_ISYS_FRAME_FORMAT_RAW10},
116 {V4L2_PIX_FMT_SRGGB10P, 10, 10, 0, MEDIA_BUS_FMT_SRGGB10_1X10,
117 IPU_FW_ISYS_FRAME_FORMAT_RAW10},
118 {V4L2_PIX_FMT_SBGGR8, 8, 8, 0, MEDIA_BUS_FMT_SBGGR8_1X8,
119 IPU_FW_ISYS_FRAME_FORMAT_RAW8},
120 {V4L2_PIX_FMT_SGBRG8, 8, 8, 0, MEDIA_BUS_FMT_SGBRG8_1X8,
121 IPU_FW_ISYS_FRAME_FORMAT_RAW8},
122 {V4L2_PIX_FMT_SGRBG8, 8, 8, 0, MEDIA_BUS_FMT_SGRBG8_1X8,
123 IPU_FW_ISYS_FRAME_FORMAT_RAW8},
124 {V4L2_PIX_FMT_SRGGB8, 8, 8, 0, MEDIA_BUS_FMT_SRGGB8_1X8,
125 IPU_FW_ISYS_FRAME_FORMAT_RAW8},
126 {}
127 };
128
129 static int video_open(struct file *file)
130 {
131 struct ipu_isys_video *av = video_drvdata(file);
132 struct ipu_isys *isys = av->isys;
133 struct ipu_bus_device *adev = to_ipu_bus_device(&isys->adev->dev);
134 struct ipu_device *isp = adev->isp;
135 int rval;
136 const struct ipu_isys_internal_pdata *ipdata;
137
138 mutex_lock(&isys->mutex);
139
140 if (isys->reset_needed || isp->flr_done) {
141 mutex_unlock(&isys->mutex);
142 dev_warn(&isys->adev->dev, "isys power cycle required\n");
143 return -EIO;
144 }
145 mutex_unlock(&isys->mutex);
146
147 rval = pm_runtime_get_sync(&isys->adev->dev);
148 if (rval < 0) {
149 pm_runtime_put_noidle(&isys->adev->dev);
150 return rval;
151 }
152
153 rval = v4l2_fh_open(file);
154 if (rval)
155 goto out_power_down;
156
157 rval = v4l2_pipeline_pm_get(&av->vdev.entity);
158 if (rval)
159 goto out_v4l2_fh_release;
160
161 mutex_lock(&isys->mutex);
162
163 if (isys->video_opened++) {
164 /* Already open */
165 mutex_unlock(&isys->mutex);
166 return 0;
167 }
168
169 ipdata = isys->pdata->ipdata;
170 ipu_configure_spc(adev->isp,
171 &ipdata->hw_variant,
172 IPU_CPD_PKG_DIR_ISYS_SERVER_IDX,
173 isys->pdata->base, isys->pkg_dir,
174 isys->pkg_dir_dma_addr);
175
176 /*
177 * Buffers could have been left to wrong queue at last closure.
178 * Move them now back to empty buffer queue.
179 */
180 ipu_cleanup_fw_msg_bufs(isys);
181
182 if (isys->fwcom) {
183 /*
184 * Something went wrong in previous shutdown. As we are now
185 * restarting isys we can safely delete old context.
186 */
187 dev_err(&isys->adev->dev, "Clearing old context\n");
188 ipu_fw_isys_cleanup(isys);
189 }
190
191 rval = ipu_fw_isys_init(av->isys, ipdata->num_parallel_streams);
192 if (rval < 0)
193 goto out_lib_init;
194
195 mutex_unlock(&isys->mutex);
196
197 return 0;
198
199 out_lib_init:
200 isys->video_opened--;
201 mutex_unlock(&isys->mutex);
202 v4l2_pipeline_pm_put(&av->vdev.entity);
203
204 out_v4l2_fh_release:
205 v4l2_fh_release(file);
206 out_power_down:
207 pm_runtime_put(&isys->adev->dev);
208
209 return rval;
210 }
211
212 static int video_release(struct file *file)
213 {
214 struct ipu_isys_video *av = video_drvdata(file);
215 int ret = 0;
216
217 vb2_fop_release(file);
218
219 mutex_lock(&av->isys->mutex);
220
221 if (!--av->isys->video_opened) {
222 ipu_fw_isys_close(av->isys);
223 if (av->isys->fwcom) {
224 av->isys->reset_needed = true;
225 ret = -EIO;
226 }
227 }
228
229 mutex_unlock(&av->isys->mutex);
230
231 v4l2_pipeline_pm_put(&av->vdev.entity);
232
233 if (av->isys->reset_needed)
234 pm_runtime_put_sync(&av->isys->adev->dev);
235 else
236 pm_runtime_put(&av->isys->adev->dev);
237
238 return ret;
239 }
240
241 static struct media_pad *other_pad(struct media_pad *pad)
242 {
243 struct media_link *link;
244
245 list_for_each_entry(link, &pad->entity->links, list) {
246 if ((link->flags & MEDIA_LNK_FL_LINK_TYPE)
247 != MEDIA_LNK_FL_DATA_LINK)
248 continue;
249
250 return link->source == pad ? link->sink : link->source;
251 }
252
253 WARN_ON(1);
254 return NULL;
255 }
256
257 const struct ipu_isys_pixelformat *
258 ipu_isys_get_pixelformat(struct ipu_isys_video *av, u32 pixelformat)
259 {
260 struct media_pad *pad = other_pad(&av->vdev.entity.pads[0]);
261 struct v4l2_subdev *sd;
262 const u32 *supported_codes;
263 const struct ipu_isys_pixelformat *pfmt;
264
265 if (!pad || !pad->entity) {
266 WARN_ON(1);
267 return NULL;
268 }
269
270 sd = media_entity_to_v4l2_subdev(pad->entity);
271 supported_codes = to_ipu_isys_subdev(sd)->supported_codes[pad->index];
272
273 for (pfmt = av->pfmts; pfmt->bpp; pfmt++) {
274 unsigned int i;
275
276 if (pfmt->pixelformat != pixelformat)
277 continue;
278
279 for (i = 0; supported_codes[i]; i++) {
280 if (pfmt->code == supported_codes[i])
281 return pfmt;
282 }
283 }
284
285 /* Not found. Get the default, i.e. the first defined one. */
286 for (pfmt = av->pfmts; pfmt->bpp; pfmt++) {
287 if (pfmt->code == *supported_codes)
288 return pfmt;
289 }
290
291 WARN_ON(1);
292 return NULL;
293 }
294
295 int ipu_isys_vidioc_querycap(struct file *file, void *fh,
296 struct v4l2_capability *cap)
297 {
298 struct ipu_isys_video *av = video_drvdata(file);
299
300 strlcpy(cap->driver, IPU_ISYS_NAME, sizeof(cap->driver));
301 strlcpy(cap->card, av->isys->media_dev.model, sizeof(cap->card));
302 snprintf(cap->bus_info, sizeof(cap->bus_info), "PCI:%s",
303 av->isys->media_dev.bus_info);
304 return 0;
305 }
306
307 int ipu_isys_vidioc_enum_fmt(struct file *file, void *fh,
308 struct v4l2_fmtdesc *f)
309 {
310 struct ipu_isys_video *av = video_drvdata(file);
311 struct media_pad *pad = other_pad(&av->vdev.entity.pads[0]);
312 struct v4l2_subdev *sd;
313 const u32 *supported_codes;
314 const struct ipu_isys_pixelformat *pfmt;
315 u32 index;
316
317 if (!pad || !pad->entity)
318 return -EINVAL;
319 sd = media_entity_to_v4l2_subdev(pad->entity);
320 supported_codes = to_ipu_isys_subdev(sd)->supported_codes[pad->index];
321
322 /* Walk the 0-terminated array for the f->index-th code. */
323 for (index = f->index; *supported_codes && index;
324 index--, supported_codes++) {
325 };
326
327 if (!*supported_codes)
328 return -EINVAL;
329
330 f->flags = 0;
331
332 /* Code found */
333 for (pfmt = av->pfmts; pfmt->bpp; pfmt++)
334 if (pfmt->code == *supported_codes)
335 break;
336
337 if (!pfmt->bpp) {
338 dev_warn(&av->isys->adev->dev,
339 "Format not found in mapping table.");
340 return -EINVAL;
341 }
342
343 f->pixelformat = pfmt->pixelformat;
344
345 return 0;
346 }
347
348 static int vidioc_g_fmt_vid_cap_mplane(struct file *file, void *fh,
349 struct v4l2_format *fmt)
350 {
351 struct ipu_isys_video *av = video_drvdata(file);
352
353 fmt->fmt.pix_mp = av->mpix;
354
355 return 0;
356 }
357
358 const struct ipu_isys_pixelformat *
359 ipu_isys_video_try_fmt_vid_mplane_default(struct ipu_isys_video *av,
360 struct v4l2_pix_format_mplane *mpix)
361 {
362 return ipu_isys_video_try_fmt_vid_mplane(av, mpix, 0);
363 }
364
365 const struct ipu_isys_pixelformat *
366 ipu_isys_video_try_fmt_vid_mplane(struct ipu_isys_video *av,
367 struct v4l2_pix_format_mplane *mpix,
368 int store_csi2_header)
369 {
370 const struct ipu_isys_pixelformat *pfmt =
371 ipu_isys_get_pixelformat(av, mpix->pixelformat);
372
373 if (!pfmt)
374 return NULL;
375 mpix->pixelformat = pfmt->pixelformat;
376 mpix->num_planes = 1;
377
378 mpix->width = clamp(mpix->width, IPU_ISYS_MIN_WIDTH,
379 IPU_ISYS_MAX_WIDTH);
380 mpix->height = clamp(mpix->height, IPU_ISYS_MIN_HEIGHT,
381 IPU_ISYS_MAX_HEIGHT);
382
383 if (!av->packed)
384 mpix->plane_fmt[0].bytesperline =
385 mpix->width * DIV_ROUND_UP(pfmt->bpp_planar ?
386 pfmt->bpp_planar : pfmt->bpp,
387 BITS_PER_BYTE);
388 else if (store_csi2_header)
389 mpix->plane_fmt[0].bytesperline =
390 DIV_ROUND_UP(av->line_header_length +
391 av->line_footer_length +
392 (unsigned int)mpix->width * pfmt->bpp,
393 BITS_PER_BYTE);
394 else
395 mpix->plane_fmt[0].bytesperline =
396 DIV_ROUND_UP((unsigned int)mpix->width * pfmt->bpp,
397 BITS_PER_BYTE);
398
399 mpix->plane_fmt[0].bytesperline = ALIGN(mpix->plane_fmt[0].bytesperline,
400 av->isys->line_align);
401
402 if (pfmt->bpp_planar)
403 mpix->plane_fmt[0].bytesperline =
404 mpix->plane_fmt[0].bytesperline *
405 pfmt->bpp / pfmt->bpp_planar;
406 /*
407 * (height + 1) * bytesperline due to a hardware issue: the DMA unit
408 * is a power of two, and a line should be transferred as few units
409 * as possible. The result is that up to line length more data than
410 * the image size may be transferred to memory after the image.
411 * Another limition is the GDA allocation unit size. For low
412 * resolution it gives a bigger number. Use larger one to avoid
413 * memory corruption.
414 */
415 mpix->plane_fmt[0].sizeimage =
416 max(max(mpix->plane_fmt[0].sizeimage,
417 mpix->plane_fmt[0].bytesperline * mpix->height +
418 max(mpix->plane_fmt[0].bytesperline,
419 av->isys->pdata->ipdata->isys_dma_overshoot)), 1U);
420
421 if (av->compression_ctrl)
422 av->compression = v4l2_ctrl_g_ctrl(av->compression_ctrl);
423
424 /* overwrite bpl/height with compression alignment */
425 if (av->compression) {
426 u32 planar_tile_status_size, tile_status_size;
427
428 mpix->plane_fmt[0].bytesperline =
429 ALIGN(mpix->plane_fmt[0].bytesperline,
430 IPU_ISYS_COMPRESSION_LINE_ALIGN);
431 mpix->height = ALIGN(mpix->height,
432 IPU_ISYS_COMPRESSION_HEIGHT_ALIGN);
433
434 mpix->plane_fmt[0].sizeimage =
435 ALIGN(mpix->plane_fmt[0].bytesperline * mpix->height,
436 IPU_ISYS_COMPRESSION_PAGE_ALIGN);
437
438 /* ISYS compression only for RAW and single plannar */
439 planar_tile_status_size =
440 DIV_ROUND_UP_ULL((mpix->plane_fmt[0].bytesperline *
441 mpix->height /
442 IPU_ISYS_COMPRESSION_TILE_SIZE_BYTES) *
443 IPU_ISYS_COMPRESSION_TILE_STATUS_BITS,
444 BITS_PER_BYTE);
445 tile_status_size = ALIGN(planar_tile_status_size,
446 IPU_ISYS_COMPRESSION_PAGE_ALIGN);
447
448 /* tile status buffer offsets relative to buffer base address */
449 av->ts_offsets[0] = mpix->plane_fmt[0].sizeimage;
450 mpix->plane_fmt[0].sizeimage += tile_status_size;
451
452 dev_dbg(&av->isys->adev->dev,
453 "cmprs: bpl:%d, height:%d img size:%d, ts_sz:%d\n",
454 mpix->plane_fmt[0].bytesperline, mpix->height,
455 av->ts_offsets[0], tile_status_size);
456 }
457
458 memset(mpix->plane_fmt[0].reserved, 0,
459 sizeof(mpix->plane_fmt[0].reserved));
460
461 if (mpix->field == V4L2_FIELD_ANY)
462 mpix->field = V4L2_FIELD_NONE;
463 /* Use defaults */
464 mpix->colorspace = V4L2_COLORSPACE_RAW;
465 mpix->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
466 mpix->quantization = V4L2_QUANTIZATION_DEFAULT;
467 mpix->xfer_func = V4L2_XFER_FUNC_DEFAULT;
468
469 return pfmt;
470 }
471
472 static int vidioc_s_fmt_vid_cap_mplane(struct file *file, void *fh,
473 struct v4l2_format *f)
474 {
475 struct ipu_isys_video *av = video_drvdata(file);
476
477 if (av->aq.vbq.streaming)
478 return -EBUSY;
479
480 av->pfmt = av->try_fmt_vid_mplane(av, &f->fmt.pix_mp);
481 av->mpix = f->fmt.pix_mp;
482
483 return 0;
484 }
485
486 static int vidioc_try_fmt_vid_cap_mplane(struct file *file, void *fh,
487 struct v4l2_format *f)
488 {
489 struct ipu_isys_video *av = video_drvdata(file);
490
491 av->try_fmt_vid_mplane(av, &f->fmt.pix_mp);
492
493 return 0;
494 }
495
496 static long ipu_isys_vidioc_private(struct file *file, void *fh,
497 bool valid_prio, unsigned int cmd,
498 void *arg)
499 {
500 struct ipu_isys_video *av = video_drvdata(file);
501 int ret = 0;
502
503 switch (cmd) {
504 case VIDIOC_IPU_GET_DRIVER_VERSION:
505 *(u32 *)arg = IPU_DRIVER_VERSION;
506 break;
507
508 default:
509 dev_dbg(&av->isys->adev->dev, "unsupported private ioctl %x\n",
510 cmd);
511 }
512
513 return ret;
514 }
515
516 static int vidioc_enum_input(struct file *file, void *fh,
517 struct v4l2_input *input)
518 {
519 if (input->index > 0)
520 return -EINVAL;
521 strlcpy(input->name, "camera", sizeof(input->name));
522 input->type = V4L2_INPUT_TYPE_CAMERA;
523
524 return 0;
525 }
526
527 static int vidioc_g_input(struct file *file, void *fh, unsigned int *input)
528 {
529 *input = 0;
530
531 return 0;
532 }
533
534 static int vidioc_s_input(struct file *file, void *fh, unsigned int input)
535 {
536 return input == 0 ? 0 : -EINVAL;
537 }
538
539 /*
540 * Return true if an entity directly connected to an Iunit entity is
541 * an image source for the ISP. This can be any external directly
542 * connected entity or any of the test pattern generators in the
543 * Iunit.
544 */
545 static bool is_external(struct ipu_isys_video *av, struct media_entity *entity)
546 {
547 struct v4l2_subdev *sd;
548
549 /* All video nodes are ours. */
550 if (!is_media_entity_v4l2_subdev(entity))
551 return false;
552
553 sd = media_entity_to_v4l2_subdev(entity);
554 if (strncmp(sd->name, IPU_ISYS_ENTITY_PREFIX,
555 strlen(IPU_ISYS_ENTITY_PREFIX)) != 0)
556 return true;
557
558 return false;
559 }
560
561 static int link_validate(struct media_link *link)
562 {
563 struct ipu_isys_video *av =
564 container_of(link->sink, struct ipu_isys_video, pad);
565 /* All sub-devices connected to a video node are ours. */
566 struct ipu_isys_pipeline *ip =
567 to_ipu_isys_pipeline(av->vdev.entity.pipe);
568 struct v4l2_subdev *sd;
569
570 if (!link->source->entity)
571 return -EINVAL;
572 sd = media_entity_to_v4l2_subdev(link->source->entity);
573 if (is_external(av, link->source->entity)) {
574 ip->external = media_entity_remote_pad(av->vdev.entity.pads);
575 ip->source = to_ipu_isys_subdev(sd)->source;
576 }
577
578 ip->nr_queues++;
579
580 return 0;
581 }
582
583 static void get_stream_opened(struct ipu_isys_video *av)
584 {
585 unsigned long flags;
586
587 spin_lock_irqsave(&av->isys->lock, flags);
588 av->isys->stream_opened++;
589 spin_unlock_irqrestore(&av->isys->lock, flags);
590 }
591
592 static void put_stream_opened(struct ipu_isys_video *av)
593 {
594 unsigned long flags;
595
596 spin_lock_irqsave(&av->isys->lock, flags);
597 av->isys->stream_opened--;
598 spin_unlock_irqrestore(&av->isys->lock, flags);
599 }
600
601 static int get_stream_handle(struct ipu_isys_video *av)
602 {
603 struct ipu_isys_pipeline *ip =
604 to_ipu_isys_pipeline(av->vdev.entity.pipe);
605 unsigned int stream_handle;
606 unsigned long flags;
607
608 spin_lock_irqsave(&av->isys->lock, flags);
609 for (stream_handle = 0;
610 stream_handle < IPU_ISYS_MAX_STREAMS; stream_handle++)
611 if (!av->isys->pipes[stream_handle])
612 break;
613 if (stream_handle == IPU_ISYS_MAX_STREAMS) {
614 spin_unlock_irqrestore(&av->isys->lock, flags);
615 return -EBUSY;
616 }
617 av->isys->pipes[stream_handle] = ip;
618 ip->stream_handle = stream_handle;
619 spin_unlock_irqrestore(&av->isys->lock, flags);
620 return 0;
621 }
622
623 static void put_stream_handle(struct ipu_isys_video *av)
624 {
625 struct ipu_isys_pipeline *ip =
626 to_ipu_isys_pipeline(av->vdev.entity.pipe);
627 unsigned long flags;
628
629 spin_lock_irqsave(&av->isys->lock, flags);
630 av->isys->pipes[ip->stream_handle] = NULL;
631 ip->stream_handle = -1;
632 spin_unlock_irqrestore(&av->isys->lock, flags);
633 }
634
635 static int get_external_facing_format(struct ipu_isys_pipeline *ip,
636 struct v4l2_subdev_format *format)
637 {
638 struct ipu_isys_video *av = container_of(ip, struct ipu_isys_video, ip);
639 struct v4l2_subdev *sd;
640 struct media_pad *external_facing;
641
642 if (!ip->external->entity) {
643 WARN_ON(1);
644 return -ENODEV;
645 }
646 sd = media_entity_to_v4l2_subdev(ip->external->entity);
647 external_facing = (strncmp(sd->name, IPU_ISYS_ENTITY_PREFIX,
648 strlen(IPU_ISYS_ENTITY_PREFIX)) == 0) ?
649 ip->external :
650 media_entity_remote_pad(ip->external);
651 if (WARN_ON(!external_facing)) {
652 dev_warn(&av->isys->adev->dev,
653 "no external facing pad --- driver bug?\n");
654 return -EINVAL;
655 }
656
657 format->which = V4L2_SUBDEV_FORMAT_ACTIVE;
658 format->pad = 0;
659 sd = media_entity_to_v4l2_subdev(external_facing->entity);
660
661 return v4l2_subdev_call(sd, pad, get_fmt, NULL, format);
662 }
663
664 static void short_packet_queue_destroy(struct ipu_isys_pipeline *ip)
665 {
666 struct ipu_isys_video *av = container_of(ip, struct ipu_isys_video, ip);
667 unsigned int i;
668
669 if (!ip->short_packet_bufs)
670 return;
671 for (i = 0; i < IPU_ISYS_SHORT_PACKET_BUFFER_NUM; i++) {
672 if (ip->short_packet_bufs[i].buffer)
673 dma_free_coherent(&av->isys->adev->dev,
674 ip->short_packet_buffer_size,
675 ip->short_packet_bufs[i].buffer,
676 ip->short_packet_bufs[i].dma_addr);
677 }
678 kfree(ip->short_packet_bufs);
679 ip->short_packet_bufs = NULL;
680 }
681
682 static int short_packet_queue_setup(struct ipu_isys_pipeline *ip)
683 {
684 struct ipu_isys_video *av = container_of(ip, struct ipu_isys_video, ip);
685 struct v4l2_subdev_format source_fmt = { 0 };
686 unsigned int i;
687 int rval;
688 size_t buf_size;
689
690 INIT_LIST_HEAD(&ip->pending_interlaced_bufs);
691 ip->cur_field = V4L2_FIELD_TOP;
692
693 if (ip->isys->short_packet_source == IPU_ISYS_SHORT_PACKET_FROM_TUNIT) {
694 ip->short_packet_trace_index = 0;
695 return 0;
696 }
697
698 rval = get_external_facing_format(ip, &source_fmt);
699 if (rval)
700 return rval;
701 buf_size = IPU_ISYS_SHORT_PACKET_BUF_SIZE(source_fmt.format.height);
702 ip->short_packet_buffer_size = buf_size;
703 ip->num_short_packet_lines =
704 IPU_ISYS_SHORT_PACKET_PKT_LINES(source_fmt.format.height);
705
706 /* Initialize short packet queue. */
707 INIT_LIST_HEAD(&ip->short_packet_incoming);
708 INIT_LIST_HEAD(&ip->short_packet_active);
709
710 ip->short_packet_bufs =
711 kzalloc(sizeof(struct ipu_isys_private_buffer) *
712 IPU_ISYS_SHORT_PACKET_BUFFER_NUM, GFP_KERNEL);
713 if (!ip->short_packet_bufs)
714 return -ENOMEM;
715
716 for (i = 0; i < IPU_ISYS_SHORT_PACKET_BUFFER_NUM; i++) {
717 struct ipu_isys_private_buffer *buf = &ip->short_packet_bufs[i];
718
719 buf->index = (unsigned int)i;
720 buf->ip = ip;
721 buf->ib.type = IPU_ISYS_SHORT_PACKET_BUFFER;
722 buf->bytesused = buf_size;
723 buf->buffer = dma_alloc_coherent(&av->isys->adev->dev,
724 buf_size,
725 &buf->dma_addr,
726 GFP_KERNEL);
727 if (!buf->buffer) {
728 short_packet_queue_destroy(ip);
729 return -ENOMEM;
730 }
731 list_add(&buf->ib.head, &ip->short_packet_incoming);
732 }
733
734 return 0;
735 }
736
737 static void
738 csi_short_packet_prepare_fw_cfg(struct ipu_isys_pipeline *ip,
739 struct ipu_fw_isys_stream_cfg_data_abi *cfg)
740 {
741 int input_pin = cfg->nof_input_pins++;
742 int output_pin = cfg->nof_output_pins++;
743 struct ipu_fw_isys_input_pin_info_abi *input_info =
744 &cfg->input_pins[input_pin];
745 struct ipu_fw_isys_output_pin_info_abi *output_info =
746 &cfg->output_pins[output_pin];
747 struct ipu_isys *isys = ip->isys;
748
749 /*
750 * Setting dt as IPU_ISYS_SHORT_PACKET_GENERAL_DT will cause
751 * MIPI receiver to receive all MIPI short packets.
752 */
753 input_info->dt = IPU_ISYS_SHORT_PACKET_GENERAL_DT;
754 input_info->input_res.width = IPU_ISYS_SHORT_PACKET_WIDTH;
755 input_info->input_res.height = ip->num_short_packet_lines;
756
757 ip->output_pins[output_pin].pin_ready =
758 ipu_isys_queue_short_packet_ready;
759 ip->output_pins[output_pin].aq = NULL;
760 ip->short_packet_output_pin = output_pin;
761
762 output_info->input_pin_id = input_pin;
763 output_info->output_res.width = IPU_ISYS_SHORT_PACKET_WIDTH;
764 output_info->output_res.height = ip->num_short_packet_lines;
765 output_info->stride = IPU_ISYS_SHORT_PACKET_WIDTH *
766 IPU_ISYS_SHORT_PACKET_UNITSIZE;
767 output_info->pt = IPU_ISYS_SHORT_PACKET_PT;
768 output_info->ft = IPU_ISYS_SHORT_PACKET_FT;
769 output_info->send_irq = 1;
770 memset(output_info->ts_offsets, 0, sizeof(output_info->ts_offsets));
771 output_info->s2m_pixel_soc_pixel_remapping =
772 S2M_PIXEL_SOC_PIXEL_REMAPPING_FLAG_NO_REMAPPING;
773 output_info->csi_be_soc_pixel_remapping =
774 CSI_BE_SOC_PIXEL_REMAPPING_FLAG_NO_REMAPPING;
775 output_info->sensor_type = isys->sensor_info.sensor_metadata;
776 output_info->snoopable = true;
777 output_info->error_handling_enable = false;
778 }
779
780 void
781 ipu_isys_prepare_fw_cfg_default(struct ipu_isys_video *av,
782 struct ipu_fw_isys_stream_cfg_data_abi *cfg)
783 {
784 struct ipu_isys_pipeline *ip =
785 to_ipu_isys_pipeline(av->vdev.entity.pipe);
786 struct ipu_isys_queue *aq = &av->aq;
787 struct ipu_fw_isys_output_pin_info_abi *pin_info;
788 struct ipu_isys *isys = av->isys;
789 unsigned int type_index, type;
790 int pin = cfg->nof_output_pins++;
791
792 aq->fw_output = pin;
793 ip->output_pins[pin].pin_ready = ipu_isys_queue_buf_ready;
794 ip->output_pins[pin].aq = aq;
795
796 pin_info = &cfg->output_pins[pin];
797 pin_info->input_pin_id = 0;
798 pin_info->output_res.width = av->mpix.width;
799 pin_info->output_res.height = av->mpix.height;
800
801 if (!av->pfmt->bpp_planar)
802 pin_info->stride = av->mpix.plane_fmt[0].bytesperline;
803 else
804 pin_info->stride = ALIGN(DIV_ROUND_UP(av->mpix.width *
805 av->pfmt->bpp_planar,
806 BITS_PER_BYTE),
807 av->isys->line_align);
808
809 pin_info->pt = aq->css_pin_type;
810 pin_info->ft = av->pfmt->css_pixelformat;
811 pin_info->send_irq = 1;
812 memset(pin_info->ts_offsets, 0, sizeof(pin_info->ts_offsets));
813 pin_info->s2m_pixel_soc_pixel_remapping =
814 S2M_PIXEL_SOC_PIXEL_REMAPPING_FLAG_NO_REMAPPING;
815 pin_info->csi_be_soc_pixel_remapping =
816 CSI_BE_SOC_PIXEL_REMAPPING_FLAG_NO_REMAPPING;
817 cfg->vc = 0;
818
819 switch (pin_info->pt) {
820 /* non-snoopable sensor data to PSYS */
821 case IPU_FW_ISYS_PIN_TYPE_RAW_NS:
822 type_index = IPU_FW_ISYS_VC1_SENSOR_DATA;
823 pin_info->sensor_type = isys->sensor_types[type_index]++;
824 pin_info->snoopable = false;
825 pin_info->error_handling_enable = false;
826 type = isys->sensor_types[type_index];
827 if (type > isys->sensor_info.vc1_data_end)
828 isys->sensor_types[type_index] =
829 isys->sensor_info.vc1_data_start;
830
831 break;
832 /* snoopable META/Stats data to CPU */
833 case IPU_FW_ISYS_PIN_TYPE_METADATA_0:
834 case IPU_FW_ISYS_PIN_TYPE_METADATA_1:
835 pin_info->sensor_type = isys->sensor_info.sensor_metadata;
836 pin_info->snoopable = true;
837 pin_info->error_handling_enable = false;
838 break;
839 case IPU_FW_ISYS_PIN_TYPE_RAW_SOC:
840 if (av->compression) {
841 type_index = IPU_FW_ISYS_VC1_SENSOR_DATA;
842 pin_info->sensor_type
843 = isys->sensor_types[type_index]++;
844 pin_info->snoopable = false;
845 pin_info->error_handling_enable = false;
846 type = isys->sensor_types[type_index];
847 if (type > isys->sensor_info.vc1_data_end)
848 isys->sensor_types[type_index] =
849 isys->sensor_info.vc1_data_start;
850 } else {
851 type_index = IPU_FW_ISYS_VC0_SENSOR_DATA;
852 pin_info->sensor_type
853 = isys->sensor_types[type_index]++;
854 pin_info->snoopable = true;
855 pin_info->error_handling_enable = false;
856 type = isys->sensor_types[type_index];
857 if (type > isys->sensor_info.vc0_data_end)
858 isys->sensor_types[type_index] =
859 isys->sensor_info.vc0_data_start;
860 }
861 break;
862 case IPU_FW_ISYS_PIN_TYPE_MIPI:
863 type_index = IPU_FW_ISYS_VC0_SENSOR_DATA;
864 pin_info->sensor_type = isys->sensor_types[type_index]++;
865 pin_info->snoopable = true;
866 pin_info->error_handling_enable = false;
867 type = isys->sensor_types[type_index];
868 if (type > isys->sensor_info.vc0_data_end)
869 isys->sensor_types[type_index] =
870 isys->sensor_info.vc0_data_start;
871
872 break;
873
874 default:
875 dev_err(&av->isys->adev->dev,
876 "Unknown pin type, use metadata type as default\n");
877
878 pin_info->sensor_type = isys->sensor_info.sensor_metadata;
879 pin_info->snoopable = true;
880 pin_info->error_handling_enable = false;
881 }
882 if (av->compression) {
883 pin_info->payload_buf_size = av->mpix.plane_fmt[0].sizeimage;
884 pin_info->reserve_compression = av->compression;
885 pin_info->ts_offsets[0] = av->ts_offsets[0];
886 }
887 }
888
889 static unsigned int ipu_isys_get_compression_scheme(u32 code)
890 {
891 switch (code) {
892 case MEDIA_BUS_FMT_SBGGR10_DPCM8_1X8:
893 case MEDIA_BUS_FMT_SGBRG10_DPCM8_1X8:
894 case MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8:
895 case MEDIA_BUS_FMT_SRGGB10_DPCM8_1X8:
896 return 3;
897 default:
898 return 0;
899 }
900 }
901
902 static unsigned int get_comp_format(u32 code)
903 {
904 unsigned int predictor = 0; /* currently hard coded */
905 unsigned int udt = ipu_isys_mbus_code_to_mipi(code);
906 unsigned int scheme = ipu_isys_get_compression_scheme(code);
907
908 /* if data type is not user defined return here */
909 if (udt < IPU_ISYS_MIPI_CSI2_TYPE_USER_DEF(1) ||
910 udt > IPU_ISYS_MIPI_CSI2_TYPE_USER_DEF(8))
911 return 0;
912
913 /*
914 * For each user defined type (1..8) there is configuration bitfield for
915 * decompression.
916 *
917 * | bit 3 | bits 2:0 |
918 * | predictor | scheme |
919 * compression schemes:
920 * 000 = no compression
921 * 001 = 10 - 6 - 10
922 * 010 = 10 - 7 - 10
923 * 011 = 10 - 8 - 10
924 * 100 = 12 - 6 - 12
925 * 101 = 12 - 7 - 12
926 * 110 = 12 - 8 - 12
927 */
928
929 return ((predictor << 3) | scheme) <<
930 ((udt - IPU_ISYS_MIPI_CSI2_TYPE_USER_DEF(1)) * 4);
931 }
932
933 /* Create stream and start it using the CSS FW ABI. */
934 static int start_stream_firmware(struct ipu_isys_video *av,
935 struct ipu_isys_buffer_list *bl)
936 {
937 struct ipu_isys_pipeline *ip =
938 to_ipu_isys_pipeline(av->vdev.entity.pipe);
939 struct device *dev = &av->isys->adev->dev;
940 struct v4l2_subdev_selection sel_fmt = {
941 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
942 .target = V4L2_SEL_TGT_CROP,
943 .pad = CSI2_BE_PAD_SOURCE,
944 };
945 struct ipu_fw_isys_stream_cfg_data_abi *stream_cfg;
946 struct isys_fw_msgs *msg = NULL;
947 struct ipu_fw_isys_frame_buff_set_abi *buf = NULL;
948 struct ipu_isys_queue *aq;
949 struct ipu_isys_video *isl_av = NULL;
950 struct v4l2_subdev_format source_fmt = { 0 };
951 struct v4l2_subdev *be_sd = NULL;
952 struct media_pad *source_pad = media_entity_remote_pad(&av->pad);
953 struct ipu_fw_isys_cropping_abi *crop;
954 enum ipu_fw_isys_send_type send_type;
955 int rval, rvalout, tout;
956
957 rval = get_external_facing_format(ip, &source_fmt);
958 if (rval)
959 return rval;
960
961 msg = ipu_get_fw_msg_buf(ip);
962 if (!msg)
963 return -ENOMEM;
964
965 stream_cfg = to_stream_cfg_msg_buf(msg);
966 stream_cfg->compfmt = get_comp_format(source_fmt.format.code);
967 stream_cfg->input_pins[0].input_res.width = source_fmt.format.width;
968 stream_cfg->input_pins[0].input_res.height = source_fmt.format.height;
969 stream_cfg->input_pins[0].dt =
970 ipu_isys_mbus_code_to_mipi(source_fmt.format.code);
971 stream_cfg->input_pins[0].mapped_dt = N_IPU_FW_ISYS_MIPI_DATA_TYPE;
972 stream_cfg->input_pins[0].mipi_decompression =
973 IPU_FW_ISYS_MIPI_COMPRESSION_TYPE_NO_COMPRESSION;
974 stream_cfg->input_pins[0].capture_mode =
975 IPU_FW_ISYS_CAPTURE_MODE_REGULAR;
976 if (ip->csi2 && !v4l2_ctrl_g_ctrl(ip->csi2->store_csi2_header))
977 stream_cfg->input_pins[0].mipi_store_mode =
978 IPU_FW_ISYS_MIPI_STORE_MODE_DISCARD_LONG_HEADER;
979
980 stream_cfg->src = ip->source;
981 stream_cfg->vc = 0;
982 stream_cfg->isl_use = ip->isl_mode;
983 stream_cfg->nof_input_pins = 1;
984 stream_cfg->sensor_type = IPU_FW_ISYS_SENSOR_MODE_NORMAL;
985
986 /*
987 * Only CSI2-BE and SOC BE has the capability to do crop,
988 * so get the crop info from csi2-be or csi2-be-soc.
989 */
990 if (ip->csi2_be) {
991 be_sd = &ip->csi2_be->asd.sd;
992 } else if (ip->csi2_be_soc) {
993 be_sd = &ip->csi2_be_soc->asd.sd;
994 if (source_pad)
995 sel_fmt.pad = source_pad->index;
996 }
997 crop = &stream_cfg->crop;
998 if (be_sd &&
999 !v4l2_subdev_call(be_sd, pad, get_selection, NULL, &sel_fmt)) {
1000 crop->left_offset = sel_fmt.r.left;
1001 crop->top_offset = sel_fmt.r.top;
1002 crop->right_offset = sel_fmt.r.left + sel_fmt.r.width;
1003 crop->bottom_offset = sel_fmt.r.top + sel_fmt.r.height;
1004
1005 } else {
1006 crop->right_offset = source_fmt.format.width;
1007 crop->bottom_offset = source_fmt.format.height;
1008 }
1009
1010 /*
1011 * If the CSI-2 backend's video node is part of the pipeline
1012 * it must be arranged first in the output pin list. This is
1013 * the most probably a firmware requirement.
1014 */
1015 if (ip->isl_mode == IPU_ISL_CSI2_BE)
1016 isl_av = &ip->csi2_be->av;
1017
1018 if (isl_av) {
1019 struct ipu_isys_queue *safe;
1020
1021 list_for_each_entry_safe(aq, safe, &ip->queues, node) {
1022 struct ipu_isys_video *av = ipu_isys_queue_to_video(aq);
1023
1024 if (av != isl_av)
1025 continue;
1026
1027 list_del(&aq->node);
1028 list_add(&aq->node, &ip->queues);
1029 break;
1030 }
1031 }
1032
1033 list_for_each_entry(aq, &ip->queues, node) {
1034 struct ipu_isys_video *__av = ipu_isys_queue_to_video(aq);
1035
1036 __av->prepare_fw_stream(__av, stream_cfg);
1037 }
1038
1039 if (ip->interlaced && ip->isys->short_packet_source ==
1040 IPU_ISYS_SHORT_PACKET_FROM_RECEIVER)
1041 csi_short_packet_prepare_fw_cfg(ip, stream_cfg);
1042
1043 ipu_fw_isys_dump_stream_cfg(dev, stream_cfg);
1044
1045 ip->nr_output_pins = stream_cfg->nof_output_pins;
1046
1047 rval = get_stream_handle(av);
1048 if (rval) {
1049 dev_dbg(dev, "Can't get stream_handle\n");
1050 return rval;
1051 }
1052
1053 reinit_completion(&ip->stream_open_completion);
1054
1055 ipu_fw_isys_set_params(stream_cfg);
1056
1057 rval = ipu_fw_isys_complex_cmd(av->isys,
1058 ip->stream_handle,
1059 stream_cfg,
1060 to_dma_addr(msg),
1061 sizeof(*stream_cfg),
1062 IPU_FW_ISYS_SEND_TYPE_STREAM_OPEN);
1063 ipu_put_fw_mgs_buf(av->isys, (uintptr_t)stream_cfg);
1064
1065 if (rval < 0) {
1066 dev_err(dev, "can't open stream (%d)\n", rval);
1067 goto out_put_stream_handle;
1068 }
1069
1070 get_stream_opened(av);
1071
1072 tout = wait_for_completion_timeout(&ip->stream_open_completion,
1073 IPU_LIB_CALL_TIMEOUT_JIFFIES);
1074 if (!tout) {
1075 dev_err(dev, "stream open time out\n");
1076 rval = -ETIMEDOUT;
1077 goto out_put_stream_opened;
1078 }
1079 if (ip->error) {
1080 dev_err(dev, "stream open error: %d\n", ip->error);
1081 rval = -EIO;
1082 goto out_put_stream_opened;
1083 }
1084 dev_dbg(dev, "start stream: open complete\n");
1085
1086 if (bl) {
1087 msg = ipu_get_fw_msg_buf(ip);
1088 if (!msg) {
1089 rval = -ENOMEM;
1090 goto out_put_stream_opened;
1091 }
1092 buf = to_frame_msg_buf(msg);
1093 }
1094
1095 if (bl) {
1096 ipu_isys_buffer_to_fw_frame_buff(buf, ip, bl);
1097 ipu_isys_buffer_list_queue(bl,
1098 IPU_ISYS_BUFFER_LIST_FL_ACTIVE, 0);
1099 }
1100
1101 reinit_completion(&ip->stream_start_completion);
1102
1103 if (bl) {
1104 send_type = IPU_FW_ISYS_SEND_TYPE_STREAM_START_AND_CAPTURE;
1105 ipu_fw_isys_dump_frame_buff_set(dev, buf,
1106 stream_cfg->nof_output_pins);
1107 rval = ipu_fw_isys_complex_cmd(av->isys,
1108 ip->stream_handle,
1109 buf, to_dma_addr(msg),
1110 sizeof(*buf),
1111 send_type);
1112 ipu_put_fw_mgs_buf(av->isys, (uintptr_t)buf);
1113 } else {
1114 send_type = IPU_FW_ISYS_SEND_TYPE_STREAM_START;
1115 rval = ipu_fw_isys_simple_cmd(av->isys,
1116 ip->stream_handle,
1117 send_type);
1118 }
1119
1120 if (rval < 0) {
1121 dev_err(dev, "can't start streaming (%d)\n", rval);
1122 goto out_stream_close;
1123 }
1124
1125 tout = wait_for_completion_timeout(&ip->stream_start_completion,
1126 IPU_LIB_CALL_TIMEOUT_JIFFIES);
1127 if (!tout) {
1128 dev_err(dev, "stream start time out\n");
1129 rval = -ETIMEDOUT;
1130 goto out_stream_close;
1131 }
1132 if (ip->error) {
1133 dev_err(dev, "stream start error: %d\n", ip->error);
1134 rval = -EIO;
1135 goto out_stream_close;
1136 }
1137 dev_dbg(dev, "start stream: complete\n");
1138
1139 return 0;
1140
1141 out_stream_close:
1142 reinit_completion(&ip->stream_close_completion);
1143
1144 rvalout = ipu_fw_isys_simple_cmd(av->isys,
1145 ip->stream_handle,
1146 IPU_FW_ISYS_SEND_TYPE_STREAM_CLOSE);
1147 if (rvalout < 0) {
1148 dev_dbg(dev, "can't close stream (%d)\n", rvalout);
1149 goto out_put_stream_opened;
1150 }
1151
1152 tout = wait_for_completion_timeout(&ip->stream_close_completion,
1153 IPU_LIB_CALL_TIMEOUT_JIFFIES);
1154 if (!tout)
1155 dev_err(dev, "stream close time out\n");
1156 else if (ip->error)
1157 dev_err(dev, "stream close error: %d\n", ip->error);
1158 else
1159 dev_dbg(dev, "stream close complete\n");
1160
1161 out_put_stream_opened:
1162 put_stream_opened(av);
1163
1164 out_put_stream_handle:
1165 put_stream_handle(av);
1166 return rval;
1167 }
1168
1169 static void stop_streaming_firmware(struct ipu_isys_video *av)
1170 {
1171 struct ipu_isys_pipeline *ip =
1172 to_ipu_isys_pipeline(av->vdev.entity.pipe);
1173 struct device *dev = &av->isys->adev->dev;
1174 int rval, tout;
1175 enum ipu_fw_isys_send_type send_type =
1176 IPU_FW_ISYS_SEND_TYPE_STREAM_FLUSH;
1177
1178 reinit_completion(&ip->stream_stop_completion);
1179
1180 rval = ipu_fw_isys_simple_cmd(av->isys, ip->stream_handle,
1181 send_type);
1182
1183 if (rval < 0) {
1184 dev_err(dev, "can't stop stream (%d)\n", rval);
1185 return;
1186 }
1187
1188 tout = wait_for_completion_timeout(&ip->stream_stop_completion,
1189 IPU_LIB_CALL_TIMEOUT_JIFFIES);
1190 if (!tout)
1191 dev_err(dev, "stream stop time out\n");
1192 else if (ip->error)
1193 dev_err(dev, "stream stop error: %d\n", ip->error);
1194 else
1195 dev_dbg(dev, "stop stream: complete\n");
1196 }
1197
1198 static void close_streaming_firmware(struct ipu_isys_video *av)
1199 {
1200 struct ipu_isys_pipeline *ip =
1201 to_ipu_isys_pipeline(av->vdev.entity.pipe);
1202 struct device *dev = &av->isys->adev->dev;
1203 int rval, tout;
1204
1205 reinit_completion(&ip->stream_close_completion);
1206
1207 rval = ipu_fw_isys_simple_cmd(av->isys, ip->stream_handle,
1208 IPU_FW_ISYS_SEND_TYPE_STREAM_CLOSE);
1209 if (rval < 0) {
1210 dev_err(dev, "can't close stream (%d)\n", rval);
1211 return;
1212 }
1213
1214 tout = wait_for_completion_timeout(&ip->stream_close_completion,
1215 IPU_LIB_CALL_TIMEOUT_JIFFIES);
1216 if (!tout)
1217 dev_err(dev, "stream close time out\n");
1218 else if (ip->error)
1219 dev_err(dev, "stream close error: %d\n", ip->error);
1220 else
1221 dev_dbg(dev, "close stream: complete\n");
1222
1223 put_stream_opened(av);
1224 put_stream_handle(av);
1225 }
1226
1227 void
1228 ipu_isys_video_add_capture_done(struct ipu_isys_pipeline *ip,
1229 void (*capture_done)
1230 (struct ipu_isys_pipeline *ip,
1231 struct ipu_fw_isys_resp_info_abi *resp))
1232 {
1233 unsigned int i;
1234
1235 /* Different instances may register same function. Add only once */
1236 for (i = 0; i < IPU_NUM_CAPTURE_DONE; i++)
1237 if (ip->capture_done[i] == capture_done)
1238 return;
1239
1240 for (i = 0; i < IPU_NUM_CAPTURE_DONE; i++) {
1241 if (!ip->capture_done[i]) {
1242 ip->capture_done[i] = capture_done;
1243 return;
1244 }
1245 }
1246 /*
1247 * Too many call backs registered. Change to IPU_NUM_CAPTURE_DONE
1248 * constant probably required.
1249 */
1250 WARN_ON(1);
1251 }
1252
1253 int ipu_isys_video_prepare_streaming(struct ipu_isys_video *av,
1254 unsigned int state)
1255 {
1256 struct ipu_isys *isys = av->isys;
1257 struct device *dev = &isys->adev->dev;
1258 struct ipu_isys_pipeline *ip;
1259 struct media_graph graph;
1260 struct media_entity *entity;
1261 struct media_device *mdev = &av->isys->media_dev;
1262 int rval;
1263 unsigned int i;
1264
1265 dev_dbg(dev, "prepare stream: %d\n", state);
1266
1267 if (!state) {
1268 ip = to_ipu_isys_pipeline(av->vdev.entity.pipe);
1269
1270 if (ip->interlaced && isys->short_packet_source ==
1271 IPU_ISYS_SHORT_PACKET_FROM_RECEIVER)
1272 short_packet_queue_destroy(ip);
1273 media_pipeline_stop(&av->vdev.entity);
1274 media_entity_enum_cleanup(&ip->entity_enum);
1275 return 0;
1276 }
1277
1278 ip = &av->ip;
1279
1280 WARN_ON(ip->nr_streaming);
1281 ip->has_sof = false;
1282 ip->nr_queues = 0;
1283 ip->external = NULL;
1284 atomic_set(&ip->sequence, 0);
1285 ip->isl_mode = IPU_ISL_OFF;
1286
1287 for (i = 0; i < IPU_NUM_CAPTURE_DONE; i++)
1288 ip->capture_done[i] = NULL;
1289 ip->csi2_be = NULL;
1290 ip->csi2_be_soc = NULL;
1291 ip->csi2 = NULL;
1292 ip->seq_index = 0;
1293 memset(ip->seq, 0, sizeof(ip->seq));
1294
1295 WARN_ON(!list_empty(&ip->queues));
1296 ip->interlaced = false;
1297
1298 rval = media_entity_enum_init(&ip->entity_enum, mdev);
1299 if (rval)
1300 return rval;
1301
1302 rval = media_pipeline_start(&av->vdev.entity, &ip->pipe);
1303 if (rval < 0) {
1304 dev_dbg(dev, "pipeline start failed\n");
1305 goto out_enum_cleanup;
1306 }
1307
1308 if (!ip->external) {
1309 dev_err(dev, "no external entity set! Driver bug?\n");
1310 rval = -EINVAL;
1311 goto out_pipeline_stop;
1312 }
1313
1314 rval = media_graph_walk_init(&graph, mdev);
1315 if (rval)
1316 goto out_pipeline_stop;
1317
1318 /* Gather all entities in the graph. */
1319 mutex_lock(&mdev->graph_mutex);
1320 media_graph_walk_start(&graph, &av->vdev.entity);
1321 while ((entity = media_graph_walk_next(&graph)))
1322 media_entity_enum_set(&ip->entity_enum, entity);
1323
1324 mutex_unlock(&mdev->graph_mutex);
1325
1326 media_graph_walk_cleanup(&graph);
1327
1328 if (ip->interlaced) {
1329 rval = short_packet_queue_setup(ip);
1330 if (rval) {
1331 dev_err(&isys->adev->dev,
1332 "Failed to setup short packet buffer.\n");
1333 goto out_pipeline_stop;
1334 }
1335 }
1336
1337 dev_dbg(dev, "prepare stream: external entity %s\n",
1338 ip->external->entity->name);
1339
1340 return 0;
1341
1342 out_pipeline_stop:
1343 media_pipeline_stop(&av->vdev.entity);
1344
1345 out_enum_cleanup:
1346 media_entity_enum_cleanup(&ip->entity_enum);
1347
1348 return rval;
1349 }
1350
1351 static void configure_stream_watermark(struct ipu_isys_video *av)
1352 {
1353 u32 vblank, hblank;
1354 u64 pixel_rate;
1355 int ret = 0;
1356 struct v4l2_subdev *esd;
1357 struct v4l2_ctrl *ctrl;
1358 struct ipu_isys_pipeline *ip;
1359 struct isys_iwake_watermark *iwake_watermark;
1360 struct v4l2_control vb = { .id = V4L2_CID_VBLANK, .value = 0 };
1361 struct v4l2_control hb = { .id = V4L2_CID_HBLANK, .value = 0 };
1362
1363 ip = to_ipu_isys_pipeline(av->vdev.entity.pipe);
1364 if (!ip->external->entity) {
1365 WARN_ON(1);
1366 return;
1367 }
1368 esd = media_entity_to_v4l2_subdev(ip->external->entity);
1369
1370 av->watermark->width = av->mpix.width;
1371 av->watermark->height = av->mpix.height;
1372
1373 ret = v4l2_g_ctrl(esd->ctrl_handler, &vb);
1374 if (!ret && vb.value >= 0)
1375 vblank = vb.value;
1376 else
1377 vblank = 0;
1378
1379 ret = v4l2_g_ctrl(esd->ctrl_handler, &hb);
1380 if (!ret && hb.value >= 0)
1381 hblank = hb.value;
1382 else
1383 hblank = 0;
1384
1385 ctrl = v4l2_ctrl_find(esd->ctrl_handler, V4L2_CID_PIXEL_RATE);
1386
1387 if (!ctrl)
1388 pixel_rate = DEFAULT_PIXEL_RATE;
1389 else
1390 pixel_rate = v4l2_ctrl_g_ctrl_int64(ctrl);
1391
1392 av->watermark->vblank = vblank;
1393 av->watermark->hblank = hblank;
1394 av->watermark->pixel_rate = pixel_rate;
1395 if (!pixel_rate) {
1396 iwake_watermark = av->isys->iwake_watermark;
1397 mutex_lock(&iwake_watermark->mutex);
1398 iwake_watermark->force_iwake_disable = true;
1399 mutex_unlock(&iwake_watermark->mutex);
1400 WARN(1, "%s Invalid pixel_rate, disable iwake.\n", __func__);
1401 return;
1402 }
1403 }
1404
1405 static void calculate_stream_datarate(struct video_stream_watermark *watermark)
1406 {
1407 u64 pixels_per_line, bytes_per_line, line_time_ns;
1408 u64 pages_per_line, pb_bytes_per_line, stream_data_rate;
1409 u16 sram_granulrity_shift =
1410 (ipu_ver == IPU_VER_6 || ipu_ver == IPU_VER_6EP) ?
1411 IPU6_SRAM_GRANULRITY_SHIFT : IPU6SE_SRAM_GRANULRITY_SHIFT;
1412 u16 sram_granulrity_size =
1413 (ipu_ver == IPU_VER_6 || ipu_ver == IPU_VER_6EP) ?
1414 IPU6_SRAM_GRANULRITY_SIZE : IPU6SE_SRAM_GRANULRITY_SIZE;
1415
1416 pixels_per_line = watermark->width + watermark->hblank;
1417 line_time_ns =
1418 pixels_per_line * 1000 / (watermark->pixel_rate / 1000000);
1419 /* 2 bytes per Bayer pixel */
1420 bytes_per_line = watermark->width << 1;
1421 /* bytes to IS pixel buffer pages */
1422 pages_per_line = bytes_per_line >> sram_granulrity_shift;
1423
1424 /* pages for each line */
1425 pages_per_line = DIV_ROUND_UP(bytes_per_line,
1426 sram_granulrity_size);
1427 pb_bytes_per_line = pages_per_line << sram_granulrity_shift;
1428
1429 /* data rate MB/s */
1430 stream_data_rate = (pb_bytes_per_line * 1000) / line_time_ns;
1431 watermark->stream_data_rate = stream_data_rate;
1432 }
1433
1434 static void update_stream_watermark(struct ipu_isys_video *av, bool state)
1435 {
1436 struct isys_iwake_watermark *iwake_watermark;
1437
1438 iwake_watermark = av->isys->iwake_watermark;
1439 if (state) {
1440 calculate_stream_datarate(av->watermark);
1441 mutex_lock(&iwake_watermark->mutex);
1442 list_add(&av->watermark->stream_node,
1443 &iwake_watermark->video_list);
1444 mutex_unlock(&iwake_watermark->mutex);
1445 } else {
1446 av->watermark->stream_data_rate = 0;
1447 mutex_lock(&iwake_watermark->mutex);
1448 list_del(&av->watermark->stream_node);
1449 mutex_unlock(&iwake_watermark->mutex);
1450 }
1451 update_watermark_setting(av->isys);
1452 }
1453
1454 int ipu_isys_video_set_streaming(struct ipu_isys_video *av,
1455 unsigned int state,
1456 struct ipu_isys_buffer_list *bl)
1457 {
1458 struct device *dev = &av->isys->adev->dev;
1459 struct media_device *mdev = av->vdev.entity.graph_obj.mdev;
1460 struct media_entity_enum entities;
1461
1462 struct media_entity *entity, *entity2;
1463 struct ipu_isys_pipeline *ip =
1464 to_ipu_isys_pipeline(av->vdev.entity.pipe);
1465 struct v4l2_subdev *sd, *esd;
1466 int rval = 0;
1467
1468 dev_dbg(dev, "set stream: %d\n", state);
1469
1470 if (!ip->external->entity) {
1471 WARN_ON(1);
1472 return -ENODEV;
1473 }
1474 esd = media_entity_to_v4l2_subdev(ip->external->entity);
1475
1476 if (state) {
1477 rval = media_graph_walk_init(&ip->graph, mdev);
1478 if (rval)
1479 return rval;
1480 rval = media_entity_enum_init(&entities, mdev);
1481 if (rval)
1482 goto out_media_entity_graph_init;
1483 }
1484
1485 if (!state) {
1486 stop_streaming_firmware(av);
1487
1488 /* stop external sub-device now. */
1489 dev_info(dev, "stream off %s\n", ip->external->entity->name);
1490
1491 v4l2_subdev_call(esd, video, s_stream, state);
1492 }
1493
1494 mutex_lock(&mdev->graph_mutex);
1495
1496 media_graph_walk_start(&ip->graph,
1497 &av->vdev.entity);
1498
1499 while ((entity = media_graph_walk_next(&ip->graph))) {
1500 sd = media_entity_to_v4l2_subdev(entity);
1501
1502 /* Non-subdev nodes can be safely ignored here. */
1503 if (!is_media_entity_v4l2_subdev(entity))
1504 continue;
1505
1506 /* Don't start truly external devices quite yet. */
1507 if (strncmp(sd->name, IPU_ISYS_ENTITY_PREFIX,
1508 strlen(IPU_ISYS_ENTITY_PREFIX)) != 0 ||
1509 ip->external->entity == entity)
1510 continue;
1511
1512 dev_dbg(dev, "s_stream %s entity %s\n", state ? "on" : "off",
1513 entity->name);
1514 rval = v4l2_subdev_call(sd, video, s_stream, state);
1515 if (!state)
1516 continue;
1517 if (rval && rval != -ENOIOCTLCMD) {
1518 mutex_unlock(&mdev->graph_mutex);
1519 goto out_media_entity_stop_streaming;
1520 }
1521
1522 media_entity_enum_set(&entities, entity);
1523 }
1524
1525 mutex_unlock(&mdev->graph_mutex);
1526
1527 if (av->aq.css_pin_type == IPU_FW_ISYS_PIN_TYPE_RAW_SOC) {
1528 if (state)
1529 configure_stream_watermark(av);
1530 update_stream_watermark(av, state);
1531 }
1532
1533 /* Oh crap */
1534 if (state) {
1535 rval = start_stream_firmware(av, bl);
1536 if (rval)
1537 goto out_media_entity_stop_streaming;
1538
1539 dev_dbg(dev, "set stream: source %d, stream_handle %d\n",
1540 ip->source, ip->stream_handle);
1541
1542 /* Start external sub-device now. */
1543 dev_info(dev, "stream on %s\n", ip->external->entity->name);
1544
1545 rval = v4l2_subdev_call(esd, video, s_stream, state);
1546 if (rval)
1547 goto out_media_entity_stop_streaming_firmware;
1548 } else {
1549 close_streaming_firmware(av);
1550 }
1551
1552 if (state)
1553 media_entity_enum_cleanup(&entities);
1554 else
1555 media_graph_walk_cleanup(&ip->graph);
1556 av->streaming = state;
1557
1558 return 0;
1559
1560 out_media_entity_stop_streaming_firmware:
1561 stop_streaming_firmware(av);
1562
1563 out_media_entity_stop_streaming:
1564 mutex_lock(&mdev->graph_mutex);
1565
1566 media_graph_walk_start(&ip->graph,
1567 &av->vdev.entity);
1568
1569 while (state && (entity2 = media_graph_walk_next(&ip->graph)) &&
1570 entity2 != entity) {
1571 sd = media_entity_to_v4l2_subdev(entity2);
1572
1573 if (!media_entity_enum_test(&entities, entity2))
1574 continue;
1575
1576 v4l2_subdev_call(sd, video, s_stream, 0);
1577 }
1578
1579 mutex_unlock(&mdev->graph_mutex);
1580
1581 media_entity_enum_cleanup(&entities);
1582
1583 out_media_entity_graph_init:
1584 media_graph_walk_cleanup(&ip->graph);
1585
1586 return rval;
1587 }
1588
1589 #ifdef CONFIG_COMPAT
1590 static long ipu_isys_compat_ioctl(struct file *file, unsigned int cmd,
1591 unsigned long arg)
1592 {
1593 long ret = -ENOIOCTLCMD;
1594 void __user *up = compat_ptr(arg);
1595
1596 /*
1597 * at present, there is not any private IOCTL need to compat handle
1598 */
1599 if (file->f_op->unlocked_ioctl)
1600 ret = file->f_op->unlocked_ioctl(file, cmd, (unsigned long)up);
1601
1602 return ret;
1603 }
1604 #endif
1605
1606 static const struct v4l2_ioctl_ops ioctl_ops_mplane = {
1607 .vidioc_querycap = ipu_isys_vidioc_querycap,
1608 .vidioc_enum_fmt_vid_cap = ipu_isys_vidioc_enum_fmt,
1609 .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt_vid_cap_mplane,
1610 .vidioc_s_fmt_vid_cap_mplane = vidioc_s_fmt_vid_cap_mplane,
1611 .vidioc_try_fmt_vid_cap_mplane = vidioc_try_fmt_vid_cap_mplane,
1612 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1613 .vidioc_create_bufs = vb2_ioctl_create_bufs,
1614 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1615 .vidioc_querybuf = vb2_ioctl_querybuf,
1616 .vidioc_qbuf = vb2_ioctl_qbuf,
1617 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1618 .vidioc_streamon = vb2_ioctl_streamon,
1619 .vidioc_streamoff = vb2_ioctl_streamoff,
1620 .vidioc_expbuf = vb2_ioctl_expbuf,
1621 .vidioc_default = ipu_isys_vidioc_private,
1622 .vidioc_enum_input = vidioc_enum_input,
1623 .vidioc_g_input = vidioc_g_input,
1624 .vidioc_s_input = vidioc_s_input,
1625 };
1626
1627 static const struct media_entity_operations entity_ops = {
1628 .link_validate = link_validate,
1629 };
1630
1631 static const struct v4l2_file_operations isys_fops = {
1632 .owner = THIS_MODULE,
1633 .poll = vb2_fop_poll,
1634 .unlocked_ioctl = video_ioctl2,
1635 #ifdef CONFIG_COMPAT
1636 .compat_ioctl32 = ipu_isys_compat_ioctl,
1637 #endif
1638 .mmap = vb2_fop_mmap,
1639 .open = video_open,
1640 .release = video_release,
1641 };
1642
1643 /*
1644 * Do everything that's needed to initialise things related to video
1645 * buffer queue, video node, and the related media entity. The caller
1646 * is expected to assign isys field and set the name of the video
1647 * device.
1648 */
1649 int ipu_isys_video_init(struct ipu_isys_video *av,
1650 struct media_entity *entity,
1651 unsigned int pad, unsigned long pad_flags,
1652 unsigned int flags)
1653 {
1654 const struct v4l2_ioctl_ops *ioctl_ops = NULL;
1655 int rval;
1656
1657 mutex_init(&av->mutex);
1658 init_completion(&av->ip.stream_open_completion);
1659 init_completion(&av->ip.stream_close_completion);
1660 init_completion(&av->ip.stream_start_completion);
1661 init_completion(&av->ip.stream_stop_completion);
1662 INIT_LIST_HEAD(&av->ip.queues);
1663 spin_lock_init(&av->ip.short_packet_queue_lock);
1664 av->ip.isys = av->isys;
1665
1666 if (!av->watermark) {
1667 av->watermark = kzalloc(sizeof(*av->watermark), GFP_KERNEL);
1668 if (!av->watermark) {
1669 rval = -ENOMEM;
1670 goto out_mutex_destroy;
1671 }
1672 }
1673
1674 av->vdev.device_caps = V4L2_CAP_STREAMING;
1675 if (pad_flags & MEDIA_PAD_FL_SINK) {
1676 av->aq.vbq.type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1677 ioctl_ops = &ioctl_ops_mplane;
1678 av->vdev.device_caps |= V4L2_CAP_VIDEO_CAPTURE_MPLANE;
1679 av->vdev.vfl_dir = VFL_DIR_RX;
1680 } else {
1681 av->aq.vbq.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
1682 av->vdev.vfl_dir = VFL_DIR_TX;
1683 av->vdev.device_caps |= V4L2_CAP_VIDEO_OUTPUT_MPLANE;
1684 }
1685 rval = ipu_isys_queue_init(&av->aq);
1686 if (rval)
1687 goto out_mutex_destroy;
1688
1689 av->pad.flags = pad_flags | MEDIA_PAD_FL_MUST_CONNECT;
1690 rval = media_entity_pads_init(&av->vdev.entity, 1, &av->pad);
1691 if (rval)
1692 goto out_ipu_isys_queue_cleanup;
1693
1694 av->vdev.entity.ops = &entity_ops;
1695 av->vdev.release = video_device_release_empty;
1696 av->vdev.fops = &isys_fops;
1697 av->vdev.v4l2_dev = &av->isys->v4l2_dev;
1698 if (!av->vdev.ioctl_ops)
1699 av->vdev.ioctl_ops = ioctl_ops;
1700 av->vdev.queue = &av->aq.vbq;
1701 av->vdev.lock = &av->mutex;
1702 set_bit(V4L2_FL_USES_V4L2_FH, &av->vdev.flags);
1703 video_set_drvdata(&av->vdev, av);
1704
1705 mutex_lock(&av->mutex);
1706
1707 rval = video_register_device(&av->vdev, VFL_TYPE_VIDEO, -1);
1708 if (rval)
1709 goto out_media_entity_cleanup;
1710
1711 if (pad_flags & MEDIA_PAD_FL_SINK)
1712 rval = media_create_pad_link(entity, pad,
1713 &av->vdev.entity, 0, flags);
1714 else
1715 rval = media_create_pad_link(&av->vdev.entity, 0, entity,
1716 pad, flags);
1717 if (rval) {
1718 dev_info(&av->isys->adev->dev, "can't create link\n");
1719 goto out_media_entity_cleanup;
1720 }
1721
1722 av->pfmt = av->try_fmt_vid_mplane(av, &av->mpix);
1723
1724 mutex_unlock(&av->mutex);
1725
1726 return rval;
1727
1728 out_media_entity_cleanup:
1729 video_unregister_device(&av->vdev);
1730 mutex_unlock(&av->mutex);
1731 media_entity_cleanup(&av->vdev.entity);
1732
1733 out_ipu_isys_queue_cleanup:
1734 ipu_isys_queue_cleanup(&av->aq);
1735
1736 out_mutex_destroy:
1737 kfree(av->watermark);
1738 mutex_destroy(&av->mutex);
1739
1740 return rval;
1741 }
1742
1743 void ipu_isys_video_cleanup(struct ipu_isys_video *av)
1744 {
1745 kfree(av->watermark);
1746 video_unregister_device(&av->vdev);
1747 media_entity_cleanup(&av->vdev.entity);
1748 mutex_destroy(&av->mutex);
1749 ipu_isys_queue_cleanup(&av->aq);
1750 }
Ubuntu Jammy Linux kernel mirror