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[mirror_ubuntu-jammy-kernel.git] / drivers / media / pci / intel / ipu-isys-video.c
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2013 - 2021 Intel Corporation
3
4 #include <linux/delay.h>
5 #include <linux/firmware.h>
6 #include <linux/init_task.h>
7 #include <linux/kthread.h>
8 #include <linux/pm_runtime.h>
9 #include <linux/module.h>
10 #include <linux/version.h>
11 #include <linux/compat.h>
12
13 #include <uapi/linux/sched/types.h>
14
15 #include <media/media-entity.h>
16 #include <media/v4l2-device.h>
17 #include <media/v4l2-ioctl.h>
18 #include <media/v4l2-mc.h>
19
20 #include "ipu.h"
21 #include "ipu-bus.h"
22 #include "ipu-cpd.h"
23 #include "ipu-isys.h"
24 #include "ipu-isys-video.h"
25 #include "ipu-platform.h"
26 #include "ipu-platform-regs.h"
27 #include "ipu-platform-buttress-regs.h"
28 #include "ipu-trace.h"
29 #include "ipu-fw-isys.h"
30 #include "ipu-fw-com.h"
31
32 /* use max resolution pixel rate by default */
33 #define DEFAULT_PIXEL_RATE (360000000ULL * 2 * 4 / 10)
34
35 const struct ipu_isys_pixelformat ipu_isys_pfmts_be_soc[] = {
36 {V4L2_PIX_FMT_Y10, 16, 10, 0, MEDIA_BUS_FMT_Y10_1X10,
37 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
38 {V4L2_PIX_FMT_UYVY, 16, 16, 0, MEDIA_BUS_FMT_UYVY8_1X16,
39 IPU_FW_ISYS_FRAME_FORMAT_UYVY},
40 {V4L2_PIX_FMT_YUYV, 16, 16, 0, MEDIA_BUS_FMT_YUYV8_1X16,
41 IPU_FW_ISYS_FRAME_FORMAT_YUYV},
42 {V4L2_PIX_FMT_NV16, 16, 16, 8, MEDIA_BUS_FMT_UYVY8_1X16,
43 IPU_FW_ISYS_FRAME_FORMAT_NV16},
44 {V4L2_PIX_FMT_XRGB32, 32, 32, 0, MEDIA_BUS_FMT_RGB565_1X16,
45 IPU_FW_ISYS_FRAME_FORMAT_RGBA888},
46 {V4L2_PIX_FMT_XBGR32, 32, 32, 0, MEDIA_BUS_FMT_RGB888_1X24,
47 IPU_FW_ISYS_FRAME_FORMAT_RGBA888},
48 /* Raw bayer formats. */
49 {V4L2_PIX_FMT_SBGGR12, 16, 12, 0, MEDIA_BUS_FMT_SBGGR12_1X12,
50 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
51 {V4L2_PIX_FMT_SGBRG12, 16, 12, 0, MEDIA_BUS_FMT_SGBRG12_1X12,
52 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
53 {V4L2_PIX_FMT_SGRBG12, 16, 12, 0, MEDIA_BUS_FMT_SGRBG12_1X12,
54 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
55 {V4L2_PIX_FMT_SRGGB12, 16, 12, 0, MEDIA_BUS_FMT_SRGGB12_1X12,
56 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
57 {V4L2_PIX_FMT_SBGGR10, 16, 10, 0, MEDIA_BUS_FMT_SBGGR10_1X10,
58 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
59 {V4L2_PIX_FMT_SGBRG10, 16, 10, 0, MEDIA_BUS_FMT_SGBRG10_1X10,
60 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
61 {V4L2_PIX_FMT_SGRBG10, 16, 10, 0, MEDIA_BUS_FMT_SGRBG10_1X10,
62 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
63 {V4L2_PIX_FMT_SRGGB10, 16, 10, 0, MEDIA_BUS_FMT_SRGGB10_1X10,
64 IPU_FW_ISYS_FRAME_FORMAT_RAW16},
65 {V4L2_PIX_FMT_SBGGR8, 8, 8, 0, MEDIA_BUS_FMT_SBGGR8_1X8,
66 IPU_FW_ISYS_FRAME_FORMAT_RAW8},
67 {V4L2_PIX_FMT_SGBRG8, 8, 8, 0, MEDIA_BUS_FMT_SGBRG8_1X8,
68 IPU_FW_ISYS_FRAME_FORMAT_RAW8},
69 {V4L2_PIX_FMT_SGRBG8, 8, 8, 0, MEDIA_BUS_FMT_SGRBG8_1X8,
70 IPU_FW_ISYS_FRAME_FORMAT_RAW8},
71 {V4L2_PIX_FMT_SRGGB8, 8, 8, 0, MEDIA_BUS_FMT_SRGGB8_1X8,
72 IPU_FW_ISYS_FRAME_FORMAT_RAW8},
73 {}
74 };
75
76 const struct ipu_isys_pixelformat ipu_isys_pfmts_packed[] = {
77 {V4L2_PIX_FMT_Y10, 10, 10, 0, MEDIA_BUS_FMT_Y10_1X10,
78 IPU_FW_ISYS_FRAME_FORMAT_RAW10},
79 #ifdef V4L2_PIX_FMT_Y210
80 {V4L2_PIX_FMT_Y210, 20, 20, 0, MEDIA_BUS_FMT_YUYV10_1X20,
81 IPU_FW_ISYS_FRAME_FORMAT_YUYV},
82 #endif
83 {V4L2_PIX_FMT_UYVY, 16, 16, 0, MEDIA_BUS_FMT_UYVY8_1X16,
84 IPU_FW_ISYS_FRAME_FORMAT_UYVY},
85 {V4L2_PIX_FMT_YUYV, 16, 16, 0, MEDIA_BUS_FMT_YUYV8_1X16,
86 IPU_FW_ISYS_FRAME_FORMAT_YUYV},
87 {V4L2_PIX_FMT_RGB565, 16, 16, 0, MEDIA_BUS_FMT_RGB565_1X16,
88 IPU_FW_ISYS_FRAME_FORMAT_RGB565},
89 {V4L2_PIX_FMT_BGR24, 24, 24, 0, MEDIA_BUS_FMT_RGB888_1X24,
90 IPU_FW_ISYS_FRAME_FORMAT_RGBA888},
91 #ifndef V4L2_PIX_FMT_SBGGR12P
92 {V4L2_PIX_FMT_SBGGR12, 12, 12, 0, MEDIA_BUS_FMT_SBGGR12_1X12,
93 IPU_FW_ISYS_FRAME_FORMAT_RAW12},
94 {V4L2_PIX_FMT_SGBRG12, 12, 12, 0, MEDIA_BUS_FMT_SGBRG12_1X12,
95 IPU_FW_ISYS_FRAME_FORMAT_RAW12},
96 {V4L2_PIX_FMT_SGRBG12, 12, 12, 0, MEDIA_BUS_FMT_SGRBG12_1X12,
97 IPU_FW_ISYS_FRAME_FORMAT_RAW12},
98 {V4L2_PIX_FMT_SRGGB12, 12, 12, 0, MEDIA_BUS_FMT_SRGGB12_1X12,
99 IPU_FW_ISYS_FRAME_FORMAT_RAW12},
100 #else /* V4L2_PIX_FMT_SBGGR12P */
101 {V4L2_PIX_FMT_SBGGR12P, 12, 12, 0, MEDIA_BUS_FMT_SBGGR12_1X12,
102 IPU_FW_ISYS_FRAME_FORMAT_RAW12},
103 {V4L2_PIX_FMT_SGBRG12P, 12, 12, 0, MEDIA_BUS_FMT_SGBRG12_1X12,
104 IPU_FW_ISYS_FRAME_FORMAT_RAW12},
105 {V4L2_PIX_FMT_SGRBG12P, 12, 12, 0, MEDIA_BUS_FMT_SGRBG12_1X12,
106 IPU_FW_ISYS_FRAME_FORMAT_RAW12},
107 {V4L2_PIX_FMT_SRGGB12P, 12, 12, 0, MEDIA_BUS_FMT_SRGGB12_1X12,
108 IPU_FW_ISYS_FRAME_FORMAT_RAW12},
109 #endif /* V4L2_PIX_FMT_SBGGR12P */
110 {V4L2_PIX_FMT_SBGGR10P, 10, 10, 0, MEDIA_BUS_FMT_SBGGR10_1X10,
111 IPU_FW_ISYS_FRAME_FORMAT_RAW10},
112 {V4L2_PIX_FMT_SGBRG10P, 10, 10, 0, MEDIA_BUS_FMT_SGBRG10_1X10,
113 IPU_FW_ISYS_FRAME_FORMAT_RAW10},
114 {V4L2_PIX_FMT_SGRBG10P, 10, 10, 0, MEDIA_BUS_FMT_SGRBG10_1X10,
115 IPU_FW_ISYS_FRAME_FORMAT_RAW10},
116 {V4L2_PIX_FMT_SRGGB10P, 10, 10, 0, MEDIA_BUS_FMT_SRGGB10_1X10,
117 IPU_FW_ISYS_FRAME_FORMAT_RAW10},
118 {V4L2_PIX_FMT_SBGGR8, 8, 8, 0, MEDIA_BUS_FMT_SBGGR8_1X8,
119 IPU_FW_ISYS_FRAME_FORMAT_RAW8},
120 {V4L2_PIX_FMT_SGBRG8, 8, 8, 0, MEDIA_BUS_FMT_SGBRG8_1X8,
121 IPU_FW_ISYS_FRAME_FORMAT_RAW8},
122 {V4L2_PIX_FMT_SGRBG8, 8, 8, 0, MEDIA_BUS_FMT_SGRBG8_1X8,
123 IPU_FW_ISYS_FRAME_FORMAT_RAW8},
124 {V4L2_PIX_FMT_SRGGB8, 8, 8, 0, MEDIA_BUS_FMT_SRGGB8_1X8,
125 IPU_FW_ISYS_FRAME_FORMAT_RAW8},
126 {}
127 };
128
129 static int video_open(struct file *file)
130 {
131 struct ipu_isys_video *av = video_drvdata(file);
132 struct ipu_isys *isys = av->isys;
133 struct ipu_bus_device *adev = to_ipu_bus_device(&isys->adev->dev);
134 struct ipu_device *isp = adev->isp;
135 int rval;
136 const struct ipu_isys_internal_pdata *ipdata;
137
138 mutex_lock(&isys->mutex);
139
140 if (isys->reset_needed || isp->flr_done) {
141 mutex_unlock(&isys->mutex);
142 dev_warn(&isys->adev->dev, "isys power cycle required\n");
143 return -EIO;
144 }
145 mutex_unlock(&isys->mutex);
146
147 rval = pm_runtime_get_sync(&isys->adev->dev);
148 if (rval < 0) {
149 pm_runtime_put_noidle(&isys->adev->dev);
150 return rval;
151 }
152
153 rval = v4l2_fh_open(file);
154 if (rval)
155 goto out_power_down;
156
157 rval = v4l2_pipeline_pm_get(&av->vdev.entity);
158 if (rval)
159 goto out_v4l2_fh_release;
160
161 mutex_lock(&isys->mutex);
162
163 if (isys->video_opened++) {
164 /* Already open */
165 mutex_unlock(&isys->mutex);
166 return 0;
167 }
168
169 ipdata = isys->pdata->ipdata;
170 ipu_configure_spc(adev->isp,
171 &ipdata->hw_variant,
172 IPU_CPD_PKG_DIR_ISYS_SERVER_IDX,
173 isys->pdata->base, isys->pkg_dir,
174 isys->pkg_dir_dma_addr);
175
176 /*
177 * Buffers could have been left to wrong queue at last closure.
178 * Move them now back to empty buffer queue.
179 */
180 ipu_cleanup_fw_msg_bufs(isys);
181
182 if (isys->fwcom) {
183 /*
184 * Something went wrong in previous shutdown. As we are now
185 * restarting isys we can safely delete old context.
186 */
187 dev_err(&isys->adev->dev, "Clearing old context\n");
188 ipu_fw_isys_cleanup(isys);
189 }
190
191 rval = ipu_fw_isys_init(av->isys, ipdata->num_parallel_streams);
192 if (rval < 0)
193 goto out_lib_init;
194
195 mutex_unlock(&isys->mutex);
196
197 return 0;
198
199 out_lib_init:
200 isys->video_opened--;
201 mutex_unlock(&isys->mutex);
202 v4l2_pipeline_pm_put(&av->vdev.entity);
203
204 out_v4l2_fh_release:
205 v4l2_fh_release(file);
206 out_power_down:
207 pm_runtime_put(&isys->adev->dev);
208
209 return rval;
210 }
211
212 static int video_release(struct file *file)
213 {
214 struct ipu_isys_video *av = video_drvdata(file);
215 int ret = 0;
216
217 vb2_fop_release(file);
218
219 mutex_lock(&av->isys->mutex);
220
221 if (!--av->isys->video_opened) {
222 ipu_fw_isys_close(av->isys);
223 if (av->isys->fwcom) {
224 av->isys->reset_needed = true;
225 ret = -EIO;
226 }
227 }
228
229 mutex_unlock(&av->isys->mutex);
230
231 v4l2_pipeline_pm_put(&av->vdev.entity);
232
233 if (av->isys->reset_needed)
234 pm_runtime_put_sync(&av->isys->adev->dev);
235 else
236 pm_runtime_put(&av->isys->adev->dev);
237
238 return ret;
239 }
240
241 static struct media_pad *other_pad(struct media_pad *pad)
242 {
243 struct media_link *link;
244
245 list_for_each_entry(link, &pad->entity->links, list) {
246 if ((link->flags & MEDIA_LNK_FL_LINK_TYPE)
247 != MEDIA_LNK_FL_DATA_LINK)
248 continue;
249
250 return link->source == pad ? link->sink : link->source;
251 }
252
253 WARN_ON(1);
254 return NULL;
255 }
256
257 const struct ipu_isys_pixelformat *
258 ipu_isys_get_pixelformat(struct ipu_isys_video *av, u32 pixelformat)
259 {
260 struct media_pad *pad = other_pad(&av->vdev.entity.pads[0]);
261 struct v4l2_subdev *sd;
262 const u32 *supported_codes;
263 const struct ipu_isys_pixelformat *pfmt;
264
265 if (!pad || !pad->entity) {
266 WARN_ON(1);
267 return NULL;
268 }
269
270 sd = media_entity_to_v4l2_subdev(pad->entity);
271 supported_codes = to_ipu_isys_subdev(sd)->supported_codes[pad->index];
272
273 for (pfmt = av->pfmts; pfmt->bpp; pfmt++) {
274 unsigned int i;
275
276 if (pfmt->pixelformat != pixelformat)
277 continue;
278
279 for (i = 0; supported_codes[i]; i++) {
280 if (pfmt->code == supported_codes[i])
281 return pfmt;
282 }
283 }
284
285 /* Not found. Get the default, i.e. the first defined one. */
286 for (pfmt = av->pfmts; pfmt->bpp; pfmt++) {
287 if (pfmt->code == *supported_codes)
288 return pfmt;
289 }
290
291 WARN_ON(1);
292 return NULL;
293 }
294
295 int ipu_isys_vidioc_querycap(struct file *file, void *fh,
296 struct v4l2_capability *cap)
297 {
298 struct ipu_isys_video *av = video_drvdata(file);
299
300 strlcpy(cap->driver, IPU_ISYS_NAME, sizeof(cap->driver));
301 strlcpy(cap->card, av->isys->media_dev.model, sizeof(cap->card));
302 snprintf(cap->bus_info, sizeof(cap->bus_info), "PCI:%s",
303 av->isys->media_dev.bus_info);
304 return 0;
305 }
306
307 int ipu_isys_vidioc_enum_fmt(struct file *file, void *fh,
308 struct v4l2_fmtdesc *f)
309 {
310 struct ipu_isys_video *av = video_drvdata(file);
311 struct media_pad *pad = other_pad(&av->vdev.entity.pads[0]);
312 struct v4l2_subdev *sd;
313 const u32 *supported_codes;
314 const struct ipu_isys_pixelformat *pfmt;
315 u32 index;
316
317 if (!pad || !pad->entity)
318 return -EINVAL;
319 sd = media_entity_to_v4l2_subdev(pad->entity);
320 supported_codes = to_ipu_isys_subdev(sd)->supported_codes[pad->index];
321
322 /* Walk the 0-terminated array for the f->index-th code. */
323 for (index = f->index; *supported_codes && index;
324 index--, supported_codes++) {
325 };
326
327 if (!*supported_codes)
328 return -EINVAL;
329
330 f->flags = 0;
331
332 /* Code found */
333 for (pfmt = av->pfmts; pfmt->bpp; pfmt++)
334 if (pfmt->code == *supported_codes)
335 break;
336
337 if (!pfmt->bpp) {
338 dev_warn(&av->isys->adev->dev,
339 "Format not found in mapping table.");
340 return -EINVAL;
341 }
342
343 f->pixelformat = pfmt->pixelformat;
344
345 return 0;
346 }
347
348 static int vidioc_g_fmt_vid_cap_mplane(struct file *file, void *fh,
349 struct v4l2_format *fmt)
350 {
351 struct ipu_isys_video *av = video_drvdata(file);
352
353 fmt->fmt.pix_mp = av->mpix;
354
355 return 0;
356 }
357
358 const struct ipu_isys_pixelformat *
359 ipu_isys_video_try_fmt_vid_mplane_default(struct ipu_isys_video *av,
360 struct v4l2_pix_format_mplane *mpix)
361 {
362 return ipu_isys_video_try_fmt_vid_mplane(av, mpix, 0);
363 }
364
365 const struct ipu_isys_pixelformat *
366 ipu_isys_video_try_fmt_vid_mplane(struct ipu_isys_video *av,
367 struct v4l2_pix_format_mplane *mpix,
368 int store_csi2_header)
369 {
370 const struct ipu_isys_pixelformat *pfmt =
371 ipu_isys_get_pixelformat(av, mpix->pixelformat);
372
373 if (!pfmt)
374 return NULL;
375 mpix->pixelformat = pfmt->pixelformat;
376 mpix->num_planes = 1;
377
378 mpix->width = clamp(mpix->width, IPU_ISYS_MIN_WIDTH,
379 IPU_ISYS_MAX_WIDTH);
380 mpix->height = clamp(mpix->height, IPU_ISYS_MIN_HEIGHT,
381 IPU_ISYS_MAX_HEIGHT);
382
383 if (!av->packed)
384 mpix->plane_fmt[0].bytesperline =
385 mpix->width * DIV_ROUND_UP(pfmt->bpp_planar ?
386 pfmt->bpp_planar : pfmt->bpp,
387 BITS_PER_BYTE);
388 else if (store_csi2_header)
389 mpix->plane_fmt[0].bytesperline =
390 DIV_ROUND_UP(av->line_header_length +
391 av->line_footer_length +
392 (unsigned int)mpix->width * pfmt->bpp,
393 BITS_PER_BYTE);
394 else
395 mpix->plane_fmt[0].bytesperline =
396 DIV_ROUND_UP((unsigned int)mpix->width * pfmt->bpp,
397 BITS_PER_BYTE);
398
399 mpix->plane_fmt[0].bytesperline = ALIGN(mpix->plane_fmt[0].bytesperline,
400 av->isys->line_align);
401
402 if (pfmt->bpp_planar)
403 mpix->plane_fmt[0].bytesperline =
404 mpix->plane_fmt[0].bytesperline *
405 pfmt->bpp / pfmt->bpp_planar;
406 /*
407 * (height + 1) * bytesperline due to a hardware issue: the DMA unit
408 * is a power of two, and a line should be transferred as few units
409 * as possible. The result is that up to line length more data than
410 * the image size may be transferred to memory after the image.
411 * Another limition is the GDA allocation unit size. For low
412 * resolution it gives a bigger number. Use larger one to avoid
413 * memory corruption.
414 */
415 mpix->plane_fmt[0].sizeimage =
416 max(max(mpix->plane_fmt[0].sizeimage,
417 mpix->plane_fmt[0].bytesperline * mpix->height +
418 max(mpix->plane_fmt[0].bytesperline,
419 av->isys->pdata->ipdata->isys_dma_overshoot)), 1U);
420
421 if (av->compression_ctrl)
422 av->compression = v4l2_ctrl_g_ctrl(av->compression_ctrl);
423
424 /* overwrite bpl/height with compression alignment */
425 if (av->compression) {
426 u32 planar_tile_status_size, tile_status_size;
427
428 mpix->plane_fmt[0].bytesperline =
429 ALIGN(mpix->plane_fmt[0].bytesperline,
430 IPU_ISYS_COMPRESSION_LINE_ALIGN);
431 mpix->height = ALIGN(mpix->height,
432 IPU_ISYS_COMPRESSION_HEIGHT_ALIGN);
433
434 mpix->plane_fmt[0].sizeimage =
435 ALIGN(mpix->plane_fmt[0].bytesperline * mpix->height,
436 IPU_ISYS_COMPRESSION_PAGE_ALIGN);
437
438 /* ISYS compression only for RAW and single plannar */
439 planar_tile_status_size =
440 DIV_ROUND_UP_ULL((mpix->plane_fmt[0].bytesperline *
441 mpix->height /
442 IPU_ISYS_COMPRESSION_TILE_SIZE_BYTES) *
443 IPU_ISYS_COMPRESSION_TILE_STATUS_BITS,
444 BITS_PER_BYTE);
445 tile_status_size = ALIGN(planar_tile_status_size,
446 IPU_ISYS_COMPRESSION_PAGE_ALIGN);
447
448 /* tile status buffer offsets relative to buffer base address */
449 av->ts_offsets[0] = mpix->plane_fmt[0].sizeimage;
450 mpix->plane_fmt[0].sizeimage += tile_status_size;
451
452 dev_dbg(&av->isys->adev->dev,
453 "cmprs: bpl:%d, height:%d img size:%d, ts_sz:%d\n",
454 mpix->plane_fmt[0].bytesperline, mpix->height,
455 av->ts_offsets[0], tile_status_size);
456 }
457
458 memset(mpix->plane_fmt[0].reserved, 0,
459 sizeof(mpix->plane_fmt[0].reserved));
460
461 if (mpix->field == V4L2_FIELD_ANY)
462 mpix->field = V4L2_FIELD_NONE;
463 /* Use defaults */
464 mpix->colorspace = V4L2_COLORSPACE_RAW;
465 mpix->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
466 mpix->quantization = V4L2_QUANTIZATION_DEFAULT;
467 mpix->xfer_func = V4L2_XFER_FUNC_DEFAULT;
468
469 return pfmt;
470 }
471
472 static int vidioc_s_fmt_vid_cap_mplane(struct file *file, void *fh,
473 struct v4l2_format *f)
474 {
475 struct ipu_isys_video *av = video_drvdata(file);
476
477 if (av->aq.vbq.streaming)
478 return -EBUSY;
479
480 av->pfmt = av->try_fmt_vid_mplane(av, &f->fmt.pix_mp);
481 av->mpix = f->fmt.pix_mp;
482
483 return 0;
484 }
485
486 static int vidioc_try_fmt_vid_cap_mplane(struct file *file, void *fh,
487 struct v4l2_format *f)
488 {
489 struct ipu_isys_video *av = video_drvdata(file);
490
491 av->try_fmt_vid_mplane(av, &f->fmt.pix_mp);
492
493 return 0;
494 }
495
496 static long ipu_isys_vidioc_private(struct file *file, void *fh,
497 bool valid_prio, unsigned int cmd,
498 void *arg)
499 {
500 struct ipu_isys_video *av = video_drvdata(file);
501 int ret = 0;
502
503 switch (cmd) {
504 case VIDIOC_IPU_GET_DRIVER_VERSION:
505 *(u32 *)arg = IPU_DRIVER_VERSION;
506 break;
507
508 default:
509 dev_dbg(&av->isys->adev->dev, "unsupported private ioctl %x\n",
510 cmd);
511 }
512
513 return ret;
514 }
515
516 static int vidioc_enum_input(struct file *file, void *fh,
517 struct v4l2_input *input)
518 {
519 if (input->index > 0)
520 return -EINVAL;
521 strlcpy(input->name, "camera", sizeof(input->name));
522 input->type = V4L2_INPUT_TYPE_CAMERA;
523
524 return 0;
525 }
526
527 static int vidioc_g_input(struct file *file, void *fh, unsigned int *input)
528 {
529 *input = 0;
530
531 return 0;
532 }
533
534 static int vidioc_s_input(struct file *file, void *fh, unsigned int input)
535 {
536 return input == 0 ? 0 : -EINVAL;
537 }
538
539 /*
540 * Return true if an entity directly connected to an Iunit entity is
541 * an image source for the ISP. This can be any external directly
542 * connected entity or any of the test pattern generators in the
543 * Iunit.
544 */
545 static bool is_external(struct ipu_isys_video *av, struct media_entity *entity)
546 {
547 struct v4l2_subdev *sd;
548 unsigned int i;
549
550 /* All video nodes are ours. */
551 if (!is_media_entity_v4l2_subdev(entity))
552 return false;
553
554 sd = media_entity_to_v4l2_subdev(entity);
555 if (strncmp(sd->name, IPU_ISYS_ENTITY_PREFIX,
556 strlen(IPU_ISYS_ENTITY_PREFIX)) != 0)
557 return true;
558
559 for (i = 0; i < av->isys->pdata->ipdata->tpg.ntpgs &&
560 av->isys->tpg[i].isys; i++)
561 if (entity == &av->isys->tpg[i].asd.sd.entity)
562 return true;
563
564 return false;
565 }
566
567 static int link_validate(struct media_link *link)
568 {
569 struct ipu_isys_video *av =
570 container_of(link->sink, struct ipu_isys_video, pad);
571 /* All sub-devices connected to a video node are ours. */
572 struct ipu_isys_pipeline *ip =
573 to_ipu_isys_pipeline(av->vdev.entity.pipe);
574 struct v4l2_subdev *sd;
575
576 if (!link->source->entity)
577 return -EINVAL;
578 sd = media_entity_to_v4l2_subdev(link->source->entity);
579 if (is_external(av, link->source->entity)) {
580 ip->external = media_entity_remote_pad(av->vdev.entity.pads);
581 ip->source = to_ipu_isys_subdev(sd)->source;
582 }
583
584 ip->nr_queues++;
585
586 return 0;
587 }
588
589 static void get_stream_opened(struct ipu_isys_video *av)
590 {
591 unsigned long flags;
592
593 spin_lock_irqsave(&av->isys->lock, flags);
594 av->isys->stream_opened++;
595 spin_unlock_irqrestore(&av->isys->lock, flags);
596 }
597
598 static void put_stream_opened(struct ipu_isys_video *av)
599 {
600 unsigned long flags;
601
602 spin_lock_irqsave(&av->isys->lock, flags);
603 av->isys->stream_opened--;
604 spin_unlock_irqrestore(&av->isys->lock, flags);
605 }
606
607 static int get_stream_handle(struct ipu_isys_video *av)
608 {
609 struct ipu_isys_pipeline *ip =
610 to_ipu_isys_pipeline(av->vdev.entity.pipe);
611 unsigned int stream_handle;
612 unsigned long flags;
613
614 spin_lock_irqsave(&av->isys->lock, flags);
615 for (stream_handle = 0;
616 stream_handle < IPU_ISYS_MAX_STREAMS; stream_handle++)
617 if (!av->isys->pipes[stream_handle])
618 break;
619 if (stream_handle == IPU_ISYS_MAX_STREAMS) {
620 spin_unlock_irqrestore(&av->isys->lock, flags);
621 return -EBUSY;
622 }
623 av->isys->pipes[stream_handle] = ip;
624 ip->stream_handle = stream_handle;
625 spin_unlock_irqrestore(&av->isys->lock, flags);
626 return 0;
627 }
628
629 static void put_stream_handle(struct ipu_isys_video *av)
630 {
631 struct ipu_isys_pipeline *ip =
632 to_ipu_isys_pipeline(av->vdev.entity.pipe);
633 unsigned long flags;
634
635 spin_lock_irqsave(&av->isys->lock, flags);
636 av->isys->pipes[ip->stream_handle] = NULL;
637 ip->stream_handle = -1;
638 spin_unlock_irqrestore(&av->isys->lock, flags);
639 }
640
641 static int get_external_facing_format(struct ipu_isys_pipeline *ip,
642 struct v4l2_subdev_format *format)
643 {
644 struct ipu_isys_video *av = container_of(ip, struct ipu_isys_video, ip);
645 struct v4l2_subdev *sd;
646 struct media_pad *external_facing;
647
648 if (!ip->external->entity) {
649 WARN_ON(1);
650 return -ENODEV;
651 }
652 sd = media_entity_to_v4l2_subdev(ip->external->entity);
653 external_facing = (strncmp(sd->name, IPU_ISYS_ENTITY_PREFIX,
654 strlen(IPU_ISYS_ENTITY_PREFIX)) == 0) ?
655 ip->external :
656 media_entity_remote_pad(ip->external);
657 if (WARN_ON(!external_facing)) {
658 dev_warn(&av->isys->adev->dev,
659 "no external facing pad --- driver bug?\n");
660 return -EINVAL;
661 }
662
663 format->which = V4L2_SUBDEV_FORMAT_ACTIVE;
664 format->pad = 0;
665 sd = media_entity_to_v4l2_subdev(external_facing->entity);
666
667 return v4l2_subdev_call(sd, pad, get_fmt, NULL, format);
668 }
669
670 static void short_packet_queue_destroy(struct ipu_isys_pipeline *ip)
671 {
672 struct ipu_isys_video *av = container_of(ip, struct ipu_isys_video, ip);
673 unsigned int i;
674
675 if (!ip->short_packet_bufs)
676 return;
677 for (i = 0; i < IPU_ISYS_SHORT_PACKET_BUFFER_NUM; i++) {
678 if (ip->short_packet_bufs[i].buffer)
679 dma_free_coherent(&av->isys->adev->dev,
680 ip->short_packet_buffer_size,
681 ip->short_packet_bufs[i].buffer,
682 ip->short_packet_bufs[i].dma_addr);
683 }
684 kfree(ip->short_packet_bufs);
685 ip->short_packet_bufs = NULL;
686 }
687
688 static int short_packet_queue_setup(struct ipu_isys_pipeline *ip)
689 {
690 struct ipu_isys_video *av = container_of(ip, struct ipu_isys_video, ip);
691 struct v4l2_subdev_format source_fmt = { 0 };
692 unsigned int i;
693 int rval;
694 size_t buf_size;
695
696 INIT_LIST_HEAD(&ip->pending_interlaced_bufs);
697 ip->cur_field = V4L2_FIELD_TOP;
698
699 if (ip->isys->short_packet_source == IPU_ISYS_SHORT_PACKET_FROM_TUNIT) {
700 ip->short_packet_trace_index = 0;
701 return 0;
702 }
703
704 rval = get_external_facing_format(ip, &source_fmt);
705 if (rval)
706 return rval;
707 buf_size = IPU_ISYS_SHORT_PACKET_BUF_SIZE(source_fmt.format.height);
708 ip->short_packet_buffer_size = buf_size;
709 ip->num_short_packet_lines =
710 IPU_ISYS_SHORT_PACKET_PKT_LINES(source_fmt.format.height);
711
712 /* Initialize short packet queue. */
713 INIT_LIST_HEAD(&ip->short_packet_incoming);
714 INIT_LIST_HEAD(&ip->short_packet_active);
715
716 ip->short_packet_bufs =
717 kzalloc(sizeof(struct ipu_isys_private_buffer) *
718 IPU_ISYS_SHORT_PACKET_BUFFER_NUM, GFP_KERNEL);
719 if (!ip->short_packet_bufs)
720 return -ENOMEM;
721
722 for (i = 0; i < IPU_ISYS_SHORT_PACKET_BUFFER_NUM; i++) {
723 struct ipu_isys_private_buffer *buf = &ip->short_packet_bufs[i];
724
725 buf->index = (unsigned int)i;
726 buf->ip = ip;
727 buf->ib.type = IPU_ISYS_SHORT_PACKET_BUFFER;
728 buf->bytesused = buf_size;
729 buf->buffer = dma_alloc_coherent(&av->isys->adev->dev,
730 buf_size,
731 &buf->dma_addr,
732 GFP_KERNEL);
733 if (!buf->buffer) {
734 short_packet_queue_destroy(ip);
735 return -ENOMEM;
736 }
737 list_add(&buf->ib.head, &ip->short_packet_incoming);
738 }
739
740 return 0;
741 }
742
743 static void
744 csi_short_packet_prepare_fw_cfg(struct ipu_isys_pipeline *ip,
745 struct ipu_fw_isys_stream_cfg_data_abi *cfg)
746 {
747 int input_pin = cfg->nof_input_pins++;
748 int output_pin = cfg->nof_output_pins++;
749 struct ipu_fw_isys_input_pin_info_abi *input_info =
750 &cfg->input_pins[input_pin];
751 struct ipu_fw_isys_output_pin_info_abi *output_info =
752 &cfg->output_pins[output_pin];
753 struct ipu_isys *isys = ip->isys;
754
755 /*
756 * Setting dt as IPU_ISYS_SHORT_PACKET_GENERAL_DT will cause
757 * MIPI receiver to receive all MIPI short packets.
758 */
759 input_info->dt = IPU_ISYS_SHORT_PACKET_GENERAL_DT;
760 input_info->input_res.width = IPU_ISYS_SHORT_PACKET_WIDTH;
761 input_info->input_res.height = ip->num_short_packet_lines;
762
763 ip->output_pins[output_pin].pin_ready =
764 ipu_isys_queue_short_packet_ready;
765 ip->output_pins[output_pin].aq = NULL;
766 ip->short_packet_output_pin = output_pin;
767
768 output_info->input_pin_id = input_pin;
769 output_info->output_res.width = IPU_ISYS_SHORT_PACKET_WIDTH;
770 output_info->output_res.height = ip->num_short_packet_lines;
771 output_info->stride = IPU_ISYS_SHORT_PACKET_WIDTH *
772 IPU_ISYS_SHORT_PACKET_UNITSIZE;
773 output_info->pt = IPU_ISYS_SHORT_PACKET_PT;
774 output_info->ft = IPU_ISYS_SHORT_PACKET_FT;
775 output_info->send_irq = 1;
776 memset(output_info->ts_offsets, 0, sizeof(output_info->ts_offsets));
777 output_info->s2m_pixel_soc_pixel_remapping =
778 S2M_PIXEL_SOC_PIXEL_REMAPPING_FLAG_NO_REMAPPING;
779 output_info->csi_be_soc_pixel_remapping =
780 CSI_BE_SOC_PIXEL_REMAPPING_FLAG_NO_REMAPPING;
781 output_info->sensor_type = isys->sensor_info.sensor_metadata;
782 output_info->snoopable = true;
783 output_info->error_handling_enable = false;
784 }
785
786 void
787 ipu_isys_prepare_fw_cfg_default(struct ipu_isys_video *av,
788 struct ipu_fw_isys_stream_cfg_data_abi *cfg)
789 {
790 struct ipu_isys_pipeline *ip =
791 to_ipu_isys_pipeline(av->vdev.entity.pipe);
792 struct ipu_isys_queue *aq = &av->aq;
793 struct ipu_fw_isys_output_pin_info_abi *pin_info;
794 struct ipu_isys *isys = av->isys;
795 unsigned int type_index, type;
796 int pin = cfg->nof_output_pins++;
797
798 aq->fw_output = pin;
799 ip->output_pins[pin].pin_ready = ipu_isys_queue_buf_ready;
800 ip->output_pins[pin].aq = aq;
801
802 pin_info = &cfg->output_pins[pin];
803 pin_info->input_pin_id = 0;
804 pin_info->output_res.width = av->mpix.width;
805 pin_info->output_res.height = av->mpix.height;
806
807 if (!av->pfmt->bpp_planar)
808 pin_info->stride = av->mpix.plane_fmt[0].bytesperline;
809 else
810 pin_info->stride = ALIGN(DIV_ROUND_UP(av->mpix.width *
811 av->pfmt->bpp_planar,
812 BITS_PER_BYTE),
813 av->isys->line_align);
814
815 pin_info->pt = aq->css_pin_type;
816 pin_info->ft = av->pfmt->css_pixelformat;
817 pin_info->send_irq = 1;
818 memset(pin_info->ts_offsets, 0, sizeof(pin_info->ts_offsets));
819 pin_info->s2m_pixel_soc_pixel_remapping =
820 S2M_PIXEL_SOC_PIXEL_REMAPPING_FLAG_NO_REMAPPING;
821 pin_info->csi_be_soc_pixel_remapping =
822 CSI_BE_SOC_PIXEL_REMAPPING_FLAG_NO_REMAPPING;
823 cfg->vc = 0;
824
825 switch (pin_info->pt) {
826 /* non-snoopable sensor data to PSYS */
827 case IPU_FW_ISYS_PIN_TYPE_RAW_NS:
828 type_index = IPU_FW_ISYS_VC1_SENSOR_DATA;
829 pin_info->sensor_type = isys->sensor_types[type_index]++;
830 pin_info->snoopable = false;
831 pin_info->error_handling_enable = false;
832 type = isys->sensor_types[type_index];
833 if (type > isys->sensor_info.vc1_data_end)
834 isys->sensor_types[type_index] =
835 isys->sensor_info.vc1_data_start;
836
837 break;
838 /* snoopable META/Stats data to CPU */
839 case IPU_FW_ISYS_PIN_TYPE_METADATA_0:
840 case IPU_FW_ISYS_PIN_TYPE_METADATA_1:
841 pin_info->sensor_type = isys->sensor_info.sensor_metadata;
842 pin_info->snoopable = true;
843 pin_info->error_handling_enable = false;
844 break;
845 case IPU_FW_ISYS_PIN_TYPE_RAW_SOC:
846 if (av->compression) {
847 type_index = IPU_FW_ISYS_VC1_SENSOR_DATA;
848 pin_info->sensor_type
849 = isys->sensor_types[type_index]++;
850 pin_info->snoopable = false;
851 pin_info->error_handling_enable = false;
852 type = isys->sensor_types[type_index];
853 if (type > isys->sensor_info.vc1_data_end)
854 isys->sensor_types[type_index] =
855 isys->sensor_info.vc1_data_start;
856 } else {
857 type_index = IPU_FW_ISYS_VC0_SENSOR_DATA;
858 pin_info->sensor_type
859 = isys->sensor_types[type_index]++;
860 pin_info->snoopable = true;
861 pin_info->error_handling_enable = false;
862 type = isys->sensor_types[type_index];
863 if (type > isys->sensor_info.vc0_data_end)
864 isys->sensor_types[type_index] =
865 isys->sensor_info.vc0_data_start;
866 }
867 break;
868 case IPU_FW_ISYS_PIN_TYPE_MIPI:
869 type_index = IPU_FW_ISYS_VC0_SENSOR_DATA;
870 pin_info->sensor_type = isys->sensor_types[type_index]++;
871 pin_info->snoopable = true;
872 pin_info->error_handling_enable = false;
873 type = isys->sensor_types[type_index];
874 if (type > isys->sensor_info.vc0_data_end)
875 isys->sensor_types[type_index] =
876 isys->sensor_info.vc0_data_start;
877
878 break;
879
880 default:
881 dev_err(&av->isys->adev->dev,
882 "Unknown pin type, use metadata type as default\n");
883
884 pin_info->sensor_type = isys->sensor_info.sensor_metadata;
885 pin_info->snoopable = true;
886 pin_info->error_handling_enable = false;
887 }
888 if (av->compression) {
889 pin_info->payload_buf_size = av->mpix.plane_fmt[0].sizeimage;
890 pin_info->reserve_compression = av->compression;
891 pin_info->ts_offsets[0] = av->ts_offsets[0];
892 }
893 }
894
895 static unsigned int ipu_isys_get_compression_scheme(u32 code)
896 {
897 switch (code) {
898 case MEDIA_BUS_FMT_SBGGR10_DPCM8_1X8:
899 case MEDIA_BUS_FMT_SGBRG10_DPCM8_1X8:
900 case MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8:
901 case MEDIA_BUS_FMT_SRGGB10_DPCM8_1X8:
902 return 3;
903 default:
904 return 0;
905 }
906 }
907
908 static unsigned int get_comp_format(u32 code)
909 {
910 unsigned int predictor = 0; /* currently hard coded */
911 unsigned int udt = ipu_isys_mbus_code_to_mipi(code);
912 unsigned int scheme = ipu_isys_get_compression_scheme(code);
913
914 /* if data type is not user defined return here */
915 if (udt < IPU_ISYS_MIPI_CSI2_TYPE_USER_DEF(1) ||
916 udt > IPU_ISYS_MIPI_CSI2_TYPE_USER_DEF(8))
917 return 0;
918
919 /*
920 * For each user defined type (1..8) there is configuration bitfield for
921 * decompression.
922 *
923 * | bit 3 | bits 2:0 |
924 * | predictor | scheme |
925 * compression schemes:
926 * 000 = no compression
927 * 001 = 10 - 6 - 10
928 * 010 = 10 - 7 - 10
929 * 011 = 10 - 8 - 10
930 * 100 = 12 - 6 - 12
931 * 101 = 12 - 7 - 12
932 * 110 = 12 - 8 - 12
933 */
934
935 return ((predictor << 3) | scheme) <<
936 ((udt - IPU_ISYS_MIPI_CSI2_TYPE_USER_DEF(1)) * 4);
937 }
938
939 /* Create stream and start it using the CSS FW ABI. */
940 static int start_stream_firmware(struct ipu_isys_video *av,
941 struct ipu_isys_buffer_list *bl)
942 {
943 struct ipu_isys_pipeline *ip =
944 to_ipu_isys_pipeline(av->vdev.entity.pipe);
945 struct device *dev = &av->isys->adev->dev;
946 struct v4l2_subdev_selection sel_fmt = {
947 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
948 .target = V4L2_SEL_TGT_CROP,
949 .pad = CSI2_BE_PAD_SOURCE,
950 };
951 struct ipu_fw_isys_stream_cfg_data_abi *stream_cfg;
952 struct isys_fw_msgs *msg = NULL;
953 struct ipu_fw_isys_frame_buff_set_abi *buf = NULL;
954 struct ipu_isys_queue *aq;
955 struct ipu_isys_video *isl_av = NULL;
956 struct v4l2_subdev_format source_fmt = { 0 };
957 struct v4l2_subdev *be_sd = NULL;
958 struct media_pad *source_pad = media_entity_remote_pad(&av->pad);
959 struct ipu_fw_isys_cropping_abi *crop;
960 enum ipu_fw_isys_send_type send_type;
961 int rval, rvalout, tout;
962
963 rval = get_external_facing_format(ip, &source_fmt);
964 if (rval)
965 return rval;
966
967 msg = ipu_get_fw_msg_buf(ip);
968 if (!msg)
969 return -ENOMEM;
970
971 stream_cfg = to_stream_cfg_msg_buf(msg);
972 stream_cfg->compfmt = get_comp_format(source_fmt.format.code);
973 stream_cfg->input_pins[0].input_res.width = source_fmt.format.width;
974 stream_cfg->input_pins[0].input_res.height = source_fmt.format.height;
975 stream_cfg->input_pins[0].dt =
976 ipu_isys_mbus_code_to_mipi(source_fmt.format.code);
977 stream_cfg->input_pins[0].mapped_dt = N_IPU_FW_ISYS_MIPI_DATA_TYPE;
978 stream_cfg->input_pins[0].mipi_decompression =
979 IPU_FW_ISYS_MIPI_COMPRESSION_TYPE_NO_COMPRESSION;
980 stream_cfg->input_pins[0].capture_mode =
981 IPU_FW_ISYS_CAPTURE_MODE_REGULAR;
982 if (ip->csi2 && !v4l2_ctrl_g_ctrl(ip->csi2->store_csi2_header))
983 stream_cfg->input_pins[0].mipi_store_mode =
984 IPU_FW_ISYS_MIPI_STORE_MODE_DISCARD_LONG_HEADER;
985 else if (ip->tpg && !v4l2_ctrl_g_ctrl(ip->tpg->store_csi2_header))
986 stream_cfg->input_pins[0].mipi_store_mode =
987 IPU_FW_ISYS_MIPI_STORE_MODE_DISCARD_LONG_HEADER;
988
989 stream_cfg->src = ip->source;
990 stream_cfg->vc = 0;
991 stream_cfg->isl_use = ip->isl_mode;
992 stream_cfg->nof_input_pins = 1;
993 stream_cfg->sensor_type = IPU_FW_ISYS_SENSOR_MODE_NORMAL;
994
995 /*
996 * Only CSI2-BE and SOC BE has the capability to do crop,
997 * so get the crop info from csi2-be or csi2-be-soc.
998 */
999 if (ip->csi2_be) {
1000 be_sd = &ip->csi2_be->asd.sd;
1001 } else if (ip->csi2_be_soc) {
1002 be_sd = &ip->csi2_be_soc->asd.sd;
1003 if (source_pad)
1004 sel_fmt.pad = source_pad->index;
1005 }
1006 crop = &stream_cfg->crop;
1007 if (be_sd &&
1008 !v4l2_subdev_call(be_sd, pad, get_selection, NULL, &sel_fmt)) {
1009 crop->left_offset = sel_fmt.r.left;
1010 crop->top_offset = sel_fmt.r.top;
1011 crop->right_offset = sel_fmt.r.left + sel_fmt.r.width;
1012 crop->bottom_offset = sel_fmt.r.top + sel_fmt.r.height;
1013
1014 } else {
1015 crop->right_offset = source_fmt.format.width;
1016 crop->bottom_offset = source_fmt.format.height;
1017 }
1018
1019 /*
1020 * If the CSI-2 backend's video node is part of the pipeline
1021 * it must be arranged first in the output pin list. This is
1022 * the most probably a firmware requirement.
1023 */
1024 if (ip->isl_mode == IPU_ISL_CSI2_BE)
1025 isl_av = &ip->csi2_be->av;
1026
1027 if (isl_av) {
1028 struct ipu_isys_queue *safe;
1029
1030 list_for_each_entry_safe(aq, safe, &ip->queues, node) {
1031 struct ipu_isys_video *av = ipu_isys_queue_to_video(aq);
1032
1033 if (av != isl_av)
1034 continue;
1035
1036 list_del(&aq->node);
1037 list_add(&aq->node, &ip->queues);
1038 break;
1039 }
1040 }
1041
1042 list_for_each_entry(aq, &ip->queues, node) {
1043 struct ipu_isys_video *__av = ipu_isys_queue_to_video(aq);
1044
1045 __av->prepare_fw_stream(__av, stream_cfg);
1046 }
1047
1048 if (ip->interlaced && ip->isys->short_packet_source ==
1049 IPU_ISYS_SHORT_PACKET_FROM_RECEIVER)
1050 csi_short_packet_prepare_fw_cfg(ip, stream_cfg);
1051
1052 ipu_fw_isys_dump_stream_cfg(dev, stream_cfg);
1053
1054 ip->nr_output_pins = stream_cfg->nof_output_pins;
1055
1056 rval = get_stream_handle(av);
1057 if (rval) {
1058 dev_dbg(dev, "Can't get stream_handle\n");
1059 return rval;
1060 }
1061
1062 reinit_completion(&ip->stream_open_completion);
1063
1064 ipu_fw_isys_set_params(stream_cfg);
1065
1066 rval = ipu_fw_isys_complex_cmd(av->isys,
1067 ip->stream_handle,
1068 stream_cfg,
1069 to_dma_addr(msg),
1070 sizeof(*stream_cfg),
1071 IPU_FW_ISYS_SEND_TYPE_STREAM_OPEN);
1072 ipu_put_fw_mgs_buf(av->isys, (uintptr_t)stream_cfg);
1073
1074 if (rval < 0) {
1075 dev_err(dev, "can't open stream (%d)\n", rval);
1076 goto out_put_stream_handle;
1077 }
1078
1079 get_stream_opened(av);
1080
1081 tout = wait_for_completion_timeout(&ip->stream_open_completion,
1082 IPU_LIB_CALL_TIMEOUT_JIFFIES);
1083 if (!tout) {
1084 dev_err(dev, "stream open time out\n");
1085 rval = -ETIMEDOUT;
1086 goto out_put_stream_opened;
1087 }
1088 if (ip->error) {
1089 dev_err(dev, "stream open error: %d\n", ip->error);
1090 rval = -EIO;
1091 goto out_put_stream_opened;
1092 }
1093 dev_dbg(dev, "start stream: open complete\n");
1094
1095 if (bl) {
1096 msg = ipu_get_fw_msg_buf(ip);
1097 if (!msg) {
1098 rval = -ENOMEM;
1099 goto out_put_stream_opened;
1100 }
1101 buf = to_frame_msg_buf(msg);
1102 }
1103
1104 if (bl) {
1105 ipu_isys_buffer_to_fw_frame_buff(buf, ip, bl);
1106 ipu_isys_buffer_list_queue(bl,
1107 IPU_ISYS_BUFFER_LIST_FL_ACTIVE, 0);
1108 }
1109
1110 reinit_completion(&ip->stream_start_completion);
1111
1112 if (bl) {
1113 send_type = IPU_FW_ISYS_SEND_TYPE_STREAM_START_AND_CAPTURE;
1114 ipu_fw_isys_dump_frame_buff_set(dev, buf,
1115 stream_cfg->nof_output_pins);
1116 rval = ipu_fw_isys_complex_cmd(av->isys,
1117 ip->stream_handle,
1118 buf, to_dma_addr(msg),
1119 sizeof(*buf),
1120 send_type);
1121 ipu_put_fw_mgs_buf(av->isys, (uintptr_t)buf);
1122 } else {
1123 send_type = IPU_FW_ISYS_SEND_TYPE_STREAM_START;
1124 rval = ipu_fw_isys_simple_cmd(av->isys,
1125 ip->stream_handle,
1126 send_type);
1127 }
1128
1129 if (rval < 0) {
1130 dev_err(dev, "can't start streaming (%d)\n", rval);
1131 goto out_stream_close;
1132 }
1133
1134 tout = wait_for_completion_timeout(&ip->stream_start_completion,
1135 IPU_LIB_CALL_TIMEOUT_JIFFIES);
1136 if (!tout) {
1137 dev_err(dev, "stream start time out\n");
1138 rval = -ETIMEDOUT;
1139 goto out_stream_close;
1140 }
1141 if (ip->error) {
1142 dev_err(dev, "stream start error: %d\n", ip->error);
1143 rval = -EIO;
1144 goto out_stream_close;
1145 }
1146 dev_dbg(dev, "start stream: complete\n");
1147
1148 return 0;
1149
1150 out_stream_close:
1151 reinit_completion(&ip->stream_close_completion);
1152
1153 rvalout = ipu_fw_isys_simple_cmd(av->isys,
1154 ip->stream_handle,
1155 IPU_FW_ISYS_SEND_TYPE_STREAM_CLOSE);
1156 if (rvalout < 0) {
1157 dev_dbg(dev, "can't close stream (%d)\n", rvalout);
1158 goto out_put_stream_opened;
1159 }
1160
1161 tout = wait_for_completion_timeout(&ip->stream_close_completion,
1162 IPU_LIB_CALL_TIMEOUT_JIFFIES);
1163 if (!tout)
1164 dev_err(dev, "stream close time out\n");
1165 else if (ip->error)
1166 dev_err(dev, "stream close error: %d\n", ip->error);
1167 else
1168 dev_dbg(dev, "stream close complete\n");
1169
1170 out_put_stream_opened:
1171 put_stream_opened(av);
1172
1173 out_put_stream_handle:
1174 put_stream_handle(av);
1175 return rval;
1176 }
1177
1178 static void stop_streaming_firmware(struct ipu_isys_video *av)
1179 {
1180 struct ipu_isys_pipeline *ip =
1181 to_ipu_isys_pipeline(av->vdev.entity.pipe);
1182 struct device *dev = &av->isys->adev->dev;
1183 int rval, tout;
1184 enum ipu_fw_isys_send_type send_type =
1185 IPU_FW_ISYS_SEND_TYPE_STREAM_FLUSH;
1186
1187 reinit_completion(&ip->stream_stop_completion);
1188
1189 rval = ipu_fw_isys_simple_cmd(av->isys, ip->stream_handle,
1190 send_type);
1191
1192 if (rval < 0) {
1193 dev_err(dev, "can't stop stream (%d)\n", rval);
1194 return;
1195 }
1196
1197 tout = wait_for_completion_timeout(&ip->stream_stop_completion,
1198 IPU_LIB_CALL_TIMEOUT_JIFFIES);
1199 if (!tout)
1200 dev_err(dev, "stream stop time out\n");
1201 else if (ip->error)
1202 dev_err(dev, "stream stop error: %d\n", ip->error);
1203 else
1204 dev_dbg(dev, "stop stream: complete\n");
1205 }
1206
1207 static void close_streaming_firmware(struct ipu_isys_video *av)
1208 {
1209 struct ipu_isys_pipeline *ip =
1210 to_ipu_isys_pipeline(av->vdev.entity.pipe);
1211 struct device *dev = &av->isys->adev->dev;
1212 int rval, tout;
1213
1214 reinit_completion(&ip->stream_close_completion);
1215
1216 rval = ipu_fw_isys_simple_cmd(av->isys, ip->stream_handle,
1217 IPU_FW_ISYS_SEND_TYPE_STREAM_CLOSE);
1218 if (rval < 0) {
1219 dev_err(dev, "can't close stream (%d)\n", rval);
1220 return;
1221 }
1222
1223 tout = wait_for_completion_timeout(&ip->stream_close_completion,
1224 IPU_LIB_CALL_TIMEOUT_JIFFIES);
1225 if (!tout)
1226 dev_err(dev, "stream close time out\n");
1227 else if (ip->error)
1228 dev_err(dev, "stream close error: %d\n", ip->error);
1229 else
1230 dev_dbg(dev, "close stream: complete\n");
1231
1232 put_stream_opened(av);
1233 put_stream_handle(av);
1234 }
1235
1236 void
1237 ipu_isys_video_add_capture_done(struct ipu_isys_pipeline *ip,
1238 void (*capture_done)
1239 (struct ipu_isys_pipeline *ip,
1240 struct ipu_fw_isys_resp_info_abi *resp))
1241 {
1242 unsigned int i;
1243
1244 /* Different instances may register same function. Add only once */
1245 for (i = 0; i < IPU_NUM_CAPTURE_DONE; i++)
1246 if (ip->capture_done[i] == capture_done)
1247 return;
1248
1249 for (i = 0; i < IPU_NUM_CAPTURE_DONE; i++) {
1250 if (!ip->capture_done[i]) {
1251 ip->capture_done[i] = capture_done;
1252 return;
1253 }
1254 }
1255 /*
1256 * Too many call backs registered. Change to IPU_NUM_CAPTURE_DONE
1257 * constant probably required.
1258 */
1259 WARN_ON(1);
1260 }
1261
1262 int ipu_isys_video_prepare_streaming(struct ipu_isys_video *av,
1263 unsigned int state)
1264 {
1265 struct ipu_isys *isys = av->isys;
1266 struct device *dev = &isys->adev->dev;
1267 struct ipu_isys_pipeline *ip;
1268 struct media_graph graph;
1269 struct media_entity *entity;
1270 struct media_device *mdev = &av->isys->media_dev;
1271 int rval;
1272 unsigned int i;
1273
1274 dev_dbg(dev, "prepare stream: %d\n", state);
1275
1276 if (!state) {
1277 ip = to_ipu_isys_pipeline(av->vdev.entity.pipe);
1278
1279 if (ip->interlaced && isys->short_packet_source ==
1280 IPU_ISYS_SHORT_PACKET_FROM_RECEIVER)
1281 short_packet_queue_destroy(ip);
1282 media_pipeline_stop(&av->vdev.entity);
1283 media_entity_enum_cleanup(&ip->entity_enum);
1284 return 0;
1285 }
1286
1287 ip = &av->ip;
1288
1289 WARN_ON(ip->nr_streaming);
1290 ip->has_sof = false;
1291 ip->nr_queues = 0;
1292 ip->external = NULL;
1293 atomic_set(&ip->sequence, 0);
1294 ip->isl_mode = IPU_ISL_OFF;
1295
1296 for (i = 0; i < IPU_NUM_CAPTURE_DONE; i++)
1297 ip->capture_done[i] = NULL;
1298 ip->csi2_be = NULL;
1299 ip->csi2_be_soc = NULL;
1300 ip->csi2 = NULL;
1301 ip->tpg = NULL;
1302 ip->seq_index = 0;
1303 memset(ip->seq, 0, sizeof(ip->seq));
1304
1305 WARN_ON(!list_empty(&ip->queues));
1306 ip->interlaced = false;
1307
1308 rval = media_entity_enum_init(&ip->entity_enum, mdev);
1309 if (rval)
1310 return rval;
1311
1312 rval = media_pipeline_start(&av->vdev.entity, &ip->pipe);
1313 if (rval < 0) {
1314 dev_dbg(dev, "pipeline start failed\n");
1315 goto out_enum_cleanup;
1316 }
1317
1318 if (!ip->external) {
1319 dev_err(dev, "no external entity set! Driver bug?\n");
1320 rval = -EINVAL;
1321 goto out_pipeline_stop;
1322 }
1323
1324 rval = media_graph_walk_init(&graph, mdev);
1325 if (rval)
1326 goto out_pipeline_stop;
1327
1328 /* Gather all entities in the graph. */
1329 mutex_lock(&mdev->graph_mutex);
1330 media_graph_walk_start(&graph, &av->vdev.entity);
1331 while ((entity = media_graph_walk_next(&graph)))
1332 media_entity_enum_set(&ip->entity_enum, entity);
1333
1334 mutex_unlock(&mdev->graph_mutex);
1335
1336 media_graph_walk_cleanup(&graph);
1337
1338 if (ip->interlaced) {
1339 rval = short_packet_queue_setup(ip);
1340 if (rval) {
1341 dev_err(&isys->adev->dev,
1342 "Failed to setup short packet buffer.\n");
1343 goto out_pipeline_stop;
1344 }
1345 }
1346
1347 dev_dbg(dev, "prepare stream: external entity %s\n",
1348 ip->external->entity->name);
1349
1350 return 0;
1351
1352 out_pipeline_stop:
1353 media_pipeline_stop(&av->vdev.entity);
1354
1355 out_enum_cleanup:
1356 media_entity_enum_cleanup(&ip->entity_enum);
1357
1358 return rval;
1359 }
1360
1361 static void configure_stream_watermark(struct ipu_isys_video *av)
1362 {
1363 u32 vblank, hblank;
1364 u64 pixel_rate;
1365 int ret = 0;
1366 struct v4l2_subdev *esd;
1367 struct v4l2_ctrl *ctrl;
1368 struct ipu_isys_pipeline *ip;
1369 struct isys_iwake_watermark *iwake_watermark;
1370 struct v4l2_control vb = { .id = V4L2_CID_VBLANK, .value = 0 };
1371 struct v4l2_control hb = { .id = V4L2_CID_HBLANK, .value = 0 };
1372
1373 ip = to_ipu_isys_pipeline(av->vdev.entity.pipe);
1374 if (!ip->external->entity) {
1375 WARN_ON(1);
1376 return;
1377 }
1378 esd = media_entity_to_v4l2_subdev(ip->external->entity);
1379
1380 av->watermark->width = av->mpix.width;
1381 av->watermark->height = av->mpix.height;
1382
1383 ret = v4l2_g_ctrl(esd->ctrl_handler, &vb);
1384 if (!ret && vb.value >= 0)
1385 vblank = vb.value;
1386 else
1387 vblank = 0;
1388
1389 ret = v4l2_g_ctrl(esd->ctrl_handler, &hb);
1390 if (!ret && hb.value >= 0)
1391 hblank = hb.value;
1392 else
1393 hblank = 0;
1394
1395 ctrl = v4l2_ctrl_find(esd->ctrl_handler, V4L2_CID_PIXEL_RATE);
1396
1397 if (!ctrl)
1398 pixel_rate = DEFAULT_PIXEL_RATE;
1399 else
1400 pixel_rate = v4l2_ctrl_g_ctrl_int64(ctrl);
1401
1402 av->watermark->vblank = vblank;
1403 av->watermark->hblank = hblank;
1404 av->watermark->pixel_rate = pixel_rate;
1405 if (!pixel_rate) {
1406 iwake_watermark = av->isys->iwake_watermark;
1407 mutex_lock(&iwake_watermark->mutex);
1408 iwake_watermark->force_iwake_disable = true;
1409 mutex_unlock(&iwake_watermark->mutex);
1410 WARN(1, "%s Invalid pixel_rate, disable iwake.\n", __func__);
1411 return;
1412 }
1413 }
1414
1415 static void calculate_stream_datarate(struct video_stream_watermark *watermark)
1416 {
1417 u64 pixels_per_line, bytes_per_line, line_time_ns;
1418 u64 pages_per_line, pb_bytes_per_line, stream_data_rate;
1419 u16 sram_granulrity_shift =
1420 (ipu_ver == IPU_VER_6 || ipu_ver == IPU_VER_6EP) ?
1421 IPU6_SRAM_GRANULRITY_SHIFT : IPU6SE_SRAM_GRANULRITY_SHIFT;
1422 u16 sram_granulrity_size =
1423 (ipu_ver == IPU_VER_6 || ipu_ver == IPU_VER_6EP) ?
1424 IPU6_SRAM_GRANULRITY_SIZE : IPU6SE_SRAM_GRANULRITY_SIZE;
1425
1426 pixels_per_line = watermark->width + watermark->hblank;
1427 line_time_ns =
1428 pixels_per_line * 1000 / (watermark->pixel_rate / 1000000);
1429 /* 2 bytes per Bayer pixel */
1430 bytes_per_line = watermark->width << 1;
1431 /* bytes to IS pixel buffer pages */
1432 pages_per_line = bytes_per_line >> sram_granulrity_shift;
1433
1434 /* pages for each line */
1435 pages_per_line = DIV_ROUND_UP(bytes_per_line,
1436 sram_granulrity_size);
1437 pb_bytes_per_line = pages_per_line << sram_granulrity_shift;
1438
1439 /* data rate MB/s */
1440 stream_data_rate = (pb_bytes_per_line * 1000) / line_time_ns;
1441 watermark->stream_data_rate = stream_data_rate;
1442 }
1443
1444 static void update_stream_watermark(struct ipu_isys_video *av, bool state)
1445 {
1446 struct isys_iwake_watermark *iwake_watermark;
1447
1448 iwake_watermark = av->isys->iwake_watermark;
1449 if (state) {
1450 calculate_stream_datarate(av->watermark);
1451 mutex_lock(&iwake_watermark->mutex);
1452 list_add(&av->watermark->stream_node,
1453 &iwake_watermark->video_list);
1454 mutex_unlock(&iwake_watermark->mutex);
1455 } else {
1456 av->watermark->stream_data_rate = 0;
1457 mutex_lock(&iwake_watermark->mutex);
1458 list_del(&av->watermark->stream_node);
1459 mutex_unlock(&iwake_watermark->mutex);
1460 }
1461 update_watermark_setting(av->isys);
1462 }
1463
1464 int ipu_isys_video_set_streaming(struct ipu_isys_video *av,
1465 unsigned int state,
1466 struct ipu_isys_buffer_list *bl)
1467 {
1468 struct device *dev = &av->isys->adev->dev;
1469 struct media_device *mdev = av->vdev.entity.graph_obj.mdev;
1470 struct media_entity_enum entities;
1471
1472 struct media_entity *entity, *entity2;
1473 struct ipu_isys_pipeline *ip =
1474 to_ipu_isys_pipeline(av->vdev.entity.pipe);
1475 struct v4l2_subdev *sd, *esd;
1476 int rval = 0;
1477
1478 dev_dbg(dev, "set stream: %d\n", state);
1479
1480 if (!ip->external->entity) {
1481 WARN_ON(1);
1482 return -ENODEV;
1483 }
1484 esd = media_entity_to_v4l2_subdev(ip->external->entity);
1485
1486 if (state) {
1487 rval = media_graph_walk_init(&ip->graph, mdev);
1488 if (rval)
1489 return rval;
1490 rval = media_entity_enum_init(&entities, mdev);
1491 if (rval)
1492 goto out_media_entity_graph_init;
1493 }
1494
1495 if (!state) {
1496 stop_streaming_firmware(av);
1497
1498 /* stop external sub-device now. */
1499 dev_info(dev, "stream off %s\n", ip->external->entity->name);
1500
1501 v4l2_subdev_call(esd, video, s_stream, state);
1502 }
1503
1504 mutex_lock(&mdev->graph_mutex);
1505
1506 media_graph_walk_start(&ip->graph,
1507 &av->vdev.entity);
1508
1509 while ((entity = media_graph_walk_next(&ip->graph))) {
1510 sd = media_entity_to_v4l2_subdev(entity);
1511
1512 /* Non-subdev nodes can be safely ignored here. */
1513 if (!is_media_entity_v4l2_subdev(entity))
1514 continue;
1515
1516 /* Don't start truly external devices quite yet. */
1517 if (strncmp(sd->name, IPU_ISYS_ENTITY_PREFIX,
1518 strlen(IPU_ISYS_ENTITY_PREFIX)) != 0 ||
1519 ip->external->entity == entity)
1520 continue;
1521
1522 dev_dbg(dev, "s_stream %s entity %s\n", state ? "on" : "off",
1523 entity->name);
1524 rval = v4l2_subdev_call(sd, video, s_stream, state);
1525 if (!state)
1526 continue;
1527 if (rval && rval != -ENOIOCTLCMD) {
1528 mutex_unlock(&mdev->graph_mutex);
1529 goto out_media_entity_stop_streaming;
1530 }
1531
1532 media_entity_enum_set(&entities, entity);
1533 }
1534
1535 mutex_unlock(&mdev->graph_mutex);
1536
1537 if (av->aq.css_pin_type == IPU_FW_ISYS_PIN_TYPE_RAW_SOC) {
1538 if (state)
1539 configure_stream_watermark(av);
1540 update_stream_watermark(av, state);
1541 }
1542
1543 /* Oh crap */
1544 if (state) {
1545 rval = start_stream_firmware(av, bl);
1546 if (rval)
1547 goto out_media_entity_stop_streaming;
1548
1549 dev_dbg(dev, "set stream: source %d, stream_handle %d\n",
1550 ip->source, ip->stream_handle);
1551
1552 /* Start external sub-device now. */
1553 dev_info(dev, "stream on %s\n", ip->external->entity->name);
1554
1555 rval = v4l2_subdev_call(esd, video, s_stream, state);
1556 if (rval)
1557 goto out_media_entity_stop_streaming_firmware;
1558 } else {
1559 close_streaming_firmware(av);
1560 }
1561
1562 if (state)
1563 media_entity_enum_cleanup(&entities);
1564 else
1565 media_graph_walk_cleanup(&ip->graph);
1566 av->streaming = state;
1567
1568 return 0;
1569
1570 out_media_entity_stop_streaming_firmware:
1571 stop_streaming_firmware(av);
1572
1573 out_media_entity_stop_streaming:
1574 mutex_lock(&mdev->graph_mutex);
1575
1576 media_graph_walk_start(&ip->graph,
1577 &av->vdev.entity);
1578
1579 while (state && (entity2 = media_graph_walk_next(&ip->graph)) &&
1580 entity2 != entity) {
1581 sd = media_entity_to_v4l2_subdev(entity2);
1582
1583 if (!media_entity_enum_test(&entities, entity2))
1584 continue;
1585
1586 v4l2_subdev_call(sd, video, s_stream, 0);
1587 }
1588
1589 mutex_unlock(&mdev->graph_mutex);
1590
1591 media_entity_enum_cleanup(&entities);
1592
1593 out_media_entity_graph_init:
1594 media_graph_walk_cleanup(&ip->graph);
1595
1596 return rval;
1597 }
1598
1599 #ifdef CONFIG_COMPAT
1600 static long ipu_isys_compat_ioctl(struct file *file, unsigned int cmd,
1601 unsigned long arg)
1602 {
1603 long ret = -ENOIOCTLCMD;
1604 void __user *up = compat_ptr(arg);
1605
1606 /*
1607 * at present, there is not any private IOCTL need to compat handle
1608 */
1609 if (file->f_op->unlocked_ioctl)
1610 ret = file->f_op->unlocked_ioctl(file, cmd, (unsigned long)up);
1611
1612 return ret;
1613 }
1614 #endif
1615
1616 static const struct v4l2_ioctl_ops ioctl_ops_mplane = {
1617 .vidioc_querycap = ipu_isys_vidioc_querycap,
1618 .vidioc_enum_fmt_vid_cap = ipu_isys_vidioc_enum_fmt,
1619 .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt_vid_cap_mplane,
1620 .vidioc_s_fmt_vid_cap_mplane = vidioc_s_fmt_vid_cap_mplane,
1621 .vidioc_try_fmt_vid_cap_mplane = vidioc_try_fmt_vid_cap_mplane,
1622 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1623 .vidioc_create_bufs = vb2_ioctl_create_bufs,
1624 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1625 .vidioc_querybuf = vb2_ioctl_querybuf,
1626 .vidioc_qbuf = vb2_ioctl_qbuf,
1627 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1628 .vidioc_streamon = vb2_ioctl_streamon,
1629 .vidioc_streamoff = vb2_ioctl_streamoff,
1630 .vidioc_expbuf = vb2_ioctl_expbuf,
1631 .vidioc_default = ipu_isys_vidioc_private,
1632 .vidioc_enum_input = vidioc_enum_input,
1633 .vidioc_g_input = vidioc_g_input,
1634 .vidioc_s_input = vidioc_s_input,
1635 };
1636
1637 static const struct media_entity_operations entity_ops = {
1638 .link_validate = link_validate,
1639 };
1640
1641 static const struct v4l2_file_operations isys_fops = {
1642 .owner = THIS_MODULE,
1643 .poll = vb2_fop_poll,
1644 .unlocked_ioctl = video_ioctl2,
1645 #ifdef CONFIG_COMPAT
1646 .compat_ioctl32 = ipu_isys_compat_ioctl,
1647 #endif
1648 .mmap = vb2_fop_mmap,
1649 .open = video_open,
1650 .release = video_release,
1651 };
1652
1653 /*
1654 * Do everything that's needed to initialise things related to video
1655 * buffer queue, video node, and the related media entity. The caller
1656 * is expected to assign isys field and set the name of the video
1657 * device.
1658 */
1659 int ipu_isys_video_init(struct ipu_isys_video *av,
1660 struct media_entity *entity,
1661 unsigned int pad, unsigned long pad_flags,
1662 unsigned int flags)
1663 {
1664 const struct v4l2_ioctl_ops *ioctl_ops = NULL;
1665 int rval;
1666
1667 mutex_init(&av->mutex);
1668 init_completion(&av->ip.stream_open_completion);
1669 init_completion(&av->ip.stream_close_completion);
1670 init_completion(&av->ip.stream_start_completion);
1671 init_completion(&av->ip.stream_stop_completion);
1672 INIT_LIST_HEAD(&av->ip.queues);
1673 spin_lock_init(&av->ip.short_packet_queue_lock);
1674 av->ip.isys = av->isys;
1675
1676 if (!av->watermark) {
1677 av->watermark = kzalloc(sizeof(*av->watermark), GFP_KERNEL);
1678 if (!av->watermark) {
1679 rval = -ENOMEM;
1680 goto out_mutex_destroy;
1681 }
1682 }
1683
1684 av->vdev.device_caps = V4L2_CAP_STREAMING;
1685 if (pad_flags & MEDIA_PAD_FL_SINK) {
1686 av->aq.vbq.type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1687 ioctl_ops = &ioctl_ops_mplane;
1688 av->vdev.device_caps |= V4L2_CAP_VIDEO_CAPTURE_MPLANE;
1689 av->vdev.vfl_dir = VFL_DIR_RX;
1690 } else {
1691 av->aq.vbq.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
1692 av->vdev.vfl_dir = VFL_DIR_TX;
1693 av->vdev.device_caps |= V4L2_CAP_VIDEO_OUTPUT_MPLANE;
1694 }
1695 rval = ipu_isys_queue_init(&av->aq);
1696 if (rval)
1697 goto out_mutex_destroy;
1698
1699 av->pad.flags = pad_flags | MEDIA_PAD_FL_MUST_CONNECT;
1700 rval = media_entity_pads_init(&av->vdev.entity, 1, &av->pad);
1701 if (rval)
1702 goto out_ipu_isys_queue_cleanup;
1703
1704 av->vdev.entity.ops = &entity_ops;
1705 av->vdev.release = video_device_release_empty;
1706 av->vdev.fops = &isys_fops;
1707 av->vdev.v4l2_dev = &av->isys->v4l2_dev;
1708 if (!av->vdev.ioctl_ops)
1709 av->vdev.ioctl_ops = ioctl_ops;
1710 av->vdev.queue = &av->aq.vbq;
1711 av->vdev.lock = &av->mutex;
1712 set_bit(V4L2_FL_USES_V4L2_FH, &av->vdev.flags);
1713 video_set_drvdata(&av->vdev, av);
1714
1715 mutex_lock(&av->mutex);
1716
1717 rval = video_register_device(&av->vdev, VFL_TYPE_VIDEO, -1);
1718 if (rval)
1719 goto out_media_entity_cleanup;
1720
1721 if (pad_flags & MEDIA_PAD_FL_SINK)
1722 rval = media_create_pad_link(entity, pad,
1723 &av->vdev.entity, 0, flags);
1724 else
1725 rval = media_create_pad_link(&av->vdev.entity, 0, entity,
1726 pad, flags);
1727 if (rval) {
1728 dev_info(&av->isys->adev->dev, "can't create link\n");
1729 goto out_media_entity_cleanup;
1730 }
1731
1732 av->pfmt = av->try_fmt_vid_mplane(av, &av->mpix);
1733
1734 mutex_unlock(&av->mutex);
1735
1736 return rval;
1737
1738 out_media_entity_cleanup:
1739 video_unregister_device(&av->vdev);
1740 mutex_unlock(&av->mutex);
1741 media_entity_cleanup(&av->vdev.entity);
1742
1743 out_ipu_isys_queue_cleanup:
1744 ipu_isys_queue_cleanup(&av->aq);
1745
1746 out_mutex_destroy:
1747 kfree(av->watermark);
1748 mutex_destroy(&av->mutex);
1749
1750 return rval;
1751 }
1752
1753 void ipu_isys_video_cleanup(struct ipu_isys_video *av)
1754 {
1755 kfree(av->watermark);
1756 video_unregister_device(&av->vdev);
1757 media_entity_cleanup(&av->vdev.entity);
1758 mutex_destroy(&av->mutex);
1759 ipu_isys_queue_cleanup(&av->aq);
1760 }
Ubuntu Jammy Linux kernel mirror