drivers/media/pci/intel/ipu-isys.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /* Copyright (C) 2013 - 2020 Intel Corporation */
   3
   4 #ifndef IPU_ISYS_H
   5 #define IPU_ISYS_H
   6
   7 #include <linux/pm_qos.h>
   8 #include <linux/spinlock.h>
   9
  10 #include <media/v4l2-device.h>
  11 #include <media/media-device.h>
  12
  13 #include <uapi/linux/ipu-isys.h>
  14
  15 #include "ipu.h"
  16 #include "ipu-isys-media.h"
  17 #include "ipu-isys-csi2.h"
  18 #include "ipu-isys-csi2-be.h"
  19 #include "ipu-isys-video.h"
  20 #include "ipu-pdata.h"
  21 #include "ipu-fw-isys.h"
  22 #include "ipu-platform-isys.h"
  23
  24 #define IPU_ISYS_2600_MEM_LINE_ALIGN    64
  25
  26 /* for TPG */
  27 #define IPU_ISYS_FREQ           533000000UL
  28
  29 /*
  30  * Current message queue configuration. These must be big enough
  31  * so that they never gets full. Queues are located in system memory
  32  */
  33 #define IPU_ISYS_SIZE_RECV_QUEUE 40
  34 #define IPU_ISYS_SIZE_SEND_QUEUE 40
  35 #define IPU_ISYS_SIZE_PROXY_RECV_QUEUE 5
  36 #define IPU_ISYS_SIZE_PROXY_SEND_QUEUE 5
  37 #define IPU_ISYS_NUM_RECV_QUEUE 1
  38
  39 /*
  40  * Device close takes some time from last ack message to actual stopping
  41  * of the SP processor. As long as the SP processor runs we can't proceed with
  42  * clean up of resources.
  43  */
  44 #define IPU_ISYS_OPEN_TIMEOUT_US                1000
  45 #define IPU_ISYS_OPEN_RETRY             1000
  46 #define IPU_ISYS_TURNOFF_DELAY_US               1000
  47 #define IPU_ISYS_TURNOFF_TIMEOUT                1000
  48 #define IPU_LIB_CALL_TIMEOUT_JIFFIES \
  49         msecs_to_jiffies(IPU_LIB_CALL_TIMEOUT_MS)
  50
  51 #define IPU_ISYS_CSI2_LONG_PACKET_HEADER_SIZE   32
  52 #define IPU_ISYS_CSI2_LONG_PACKET_FOOTER_SIZE   32
  53
  54 #define IPU_ISYS_MIN_WIDTH              1U
  55 #define IPU_ISYS_MIN_HEIGHT             1U
  56 #define IPU_ISYS_MAX_WIDTH              16384U
  57 #define IPU_ISYS_MAX_HEIGHT             16384U
  58
  59 #define NR_OF_CSI2_BE_SOC_DEV 1
  60
  61 /* the threshold granularity is 2KB on IPU6 */
  62 #define IPU6_SRAM_GRANULRITY_SHIFT      11
  63 #define IPU6_SRAM_GRANULRITY_SIZE       2048
  64 /* the threshold granularity is 1KB on IPU6SE */
  65 #define IPU6SE_SRAM_GRANULRITY_SHIFT    10
  66 #define IPU6SE_SRAM_GRANULRITY_SIZE     1024
  67
  68 struct task_struct;
  69
  70 struct ltr_did {
  71         union {
  72                 u32 value;
  73                 struct {
  74                         u8 val0;
  75                         u8 val1;
  76                         u8 val2;
  77                         u8 val3;
  78                 } bits;
  79         } lut_ltr;
  80         union {
  81                 u32 value;
  82                 struct {
  83                         u8 th0;
  84                         u8 th1;
  85                         u8 th2;
  86                         u8 th3;
  87                 } bits;
  88         } lut_fill_time;
  89 };
  90
  91 struct isys_iwake_watermark {
  92         bool iwake_enabled;
  93         bool force_iwake_disable;
  94         u32 iwake_threshold;
  95         u64 isys_pixelbuffer_datarate;
  96         struct ltr_did ltrdid;
  97         struct mutex mutex; /* protect whole struct */
  98         struct ipu_isys *isys;
  99         struct list_head video_list;
 100 };
 101 struct ipu_isys_sensor_info {
 102         unsigned int vc1_data_start;
 103         unsigned int vc1_data_end;
 104         unsigned int vc0_data_start;
 105         unsigned int vc0_data_end;
 106         unsigned int vc1_pdaf_start;
 107         unsigned int vc1_pdaf_end;
 108         unsigned int sensor_metadata;
 109 };
 110
 111 /*
 112  * struct ipu_isys
 113  *
 114  * @media_dev: Media device
 115  * @v4l2_dev: V4L2 device
 116  * @adev: ISYS bus device
 117  * @power: Is ISYS powered on or not?
 118  * @isr_bits: Which bits does the ISR handle?
 119  * @power_lock: Serialise access to power (power state in general)
 120  * @csi2_rx_ctrl_cached: cached shared value between all CSI2 receivers
 121  * @lock: serialise access to pipes
 122  * @pipes: pipelines per stream ID
 123  * @fwcom: fw communication layer private pointer
 124  *         or optional external library private pointer
 125  * @line_align: line alignment in memory
 126  * @reset_needed: Isys requires d0i0->i3 transition
 127  * @video_opened: total number of opened file handles on video nodes
 128  * @mutex: serialise access isys video open/release related operations
 129  * @stream_mutex: serialise stream start and stop, queueing requests
 130  * @lib_mutex: optional external library mutex
 131  * @pdata: platform data pointer
 132  * @csi2: CSI-2 receivers
 133  * @csi2_be: CSI-2 back-ends
 134  * @fw: ISYS firmware binary (unsecure firmware)
 135  * @fw_sgt: fw scatterlist
 136  * @pkg_dir: host pointer to pkg_dir
 137  * @pkg_dir_dma_addr: I/O virtual address for pkg_dir
 138  * @pkg_dir_size: size of pkg_dir in bytes
 139  * @short_packet_source: select short packet capture mode
 140  */
 141 struct ipu_isys {
 142         struct media_device media_dev;
 143         struct v4l2_device v4l2_dev;
 144         struct ipu_bus_device *adev;
 145
 146         int power;
 147         spinlock_t power_lock;  /* Serialise access to power */
 148         u32 isr_csi2_bits;
 149         u32 csi2_rx_ctrl_cached;
 150         spinlock_t lock;        /* Serialise access to pipes */
 151         struct ipu_isys_pipeline *pipes[IPU_ISYS_MAX_STREAMS];
 152         void *fwcom;
 153         unsigned int line_align;
 154         bool reset_needed;
 155         bool icache_prefetch;
 156         bool csi2_cse_ipc_not_supported;
 157         unsigned int video_opened;
 158         unsigned int stream_opened;
 159         struct ipu_isys_sensor_info sensor_info;
 160         unsigned int sensor_types[N_IPU_FW_ISYS_SENSOR_TYPE];
 161
 162 #ifdef CONFIG_DEBUG_FS
 163         struct dentry *debugfsdir;
 164 #endif
 165         struct mutex mutex;     /* Serialise isys video open/release related */
 166         struct mutex stream_mutex;      /* Stream start, stop, queueing reqs */
 167         struct mutex lib_mutex; /* Serialise optional external library mutex */
 168
 169         struct ipu_isys_pdata *pdata;
 170
 171         struct ipu_isys_csi2 *csi2;
 172         struct ipu_isys_csi2_be csi2_be;
 173         struct ipu_isys_csi2_be_soc csi2_be_soc[NR_OF_CSI2_BE_SOC_DEV];
 174         const struct firmware *fw;
 175         struct sg_table fw_sgt;
 176
 177         u64 *pkg_dir;
 178         dma_addr_t pkg_dir_dma_addr;
 179         unsigned int pkg_dir_size;
 180
 181         struct list_head requests;
 182         struct pm_qos_request pm_qos;
 183         unsigned int short_packet_source;
 184         struct ipu_isys_csi2_monitor_message *short_packet_trace_buffer;
 185         dma_addr_t short_packet_trace_buffer_dma_addr;
 186         unsigned int short_packet_tracing_count;
 187         struct mutex short_packet_tracing_mutex;        /* For tracing count */
 188         u64 tsc_timer_base;
 189         u64 tunit_timer_base;
 190         spinlock_t listlock;    /* Protect framebuflist */
 191         struct list_head framebuflist;
 192         struct list_head framebuflist_fw;
 193         struct v4l2_async_notifier notifier;
 194         struct isys_iwake_watermark *iwake_watermark;
 195
 196 };
 197
 198 void update_watermark_setting(struct ipu_isys *isys);
 199
 200 struct isys_fw_msgs {
 201         union {
 202                 u64 dummy;
 203                 struct ipu_fw_isys_frame_buff_set_abi frame;
 204                 struct ipu_fw_isys_stream_cfg_data_abi stream;
 205         } fw_msg;
 206         struct list_head head;
 207         dma_addr_t dma_addr;
 208 };
 209
 210 #define to_frame_msg_buf(a) (&(a)->fw_msg.frame)
 211 #define to_stream_cfg_msg_buf(a) (&(a)->fw_msg.stream)
 212 #define to_dma_addr(a) ((a)->dma_addr)
 213
 214 struct isys_fw_msgs *ipu_get_fw_msg_buf(struct ipu_isys_pipeline *ip);
 215 void ipu_put_fw_mgs_buf(struct ipu_isys *isys, u64 data);
 216 void ipu_cleanup_fw_msg_bufs(struct ipu_isys *isys);
 217
 218 extern const struct v4l2_ioctl_ops ipu_isys_ioctl_ops;
 219
 220 void isys_setup_hw(struct ipu_isys *isys);
 221 int isys_isr_one(struct ipu_bus_device *adev);
 222 int ipu_isys_isr_run(void *ptr);
 223 irqreturn_t isys_isr(struct ipu_bus_device *adev);
 224 #ifdef IPU_ISYS_GPC
 225 int ipu_isys_gpc_init_debugfs(struct ipu_isys *isys);
 226 #endif
 227
 228 #endif /* IPU_ISYS_H */