2 * tw68 driver common header file
4 * Much of this code is derived from the cx88 and sa7134 drivers, which
5 * were in turn derived from the bt87x driver. The original work was by
6 * Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
7 * Hans Verkuil, Andy Walls and many others. Their work is gratefully
8 * acknowledged. Full credit goes to them - any problems within this code
11 * Copyright (C) 2009 William M. Brack
13 * Refactored and updated to the latest v4l core frameworks:
15 * Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
28 #include <linux/pci.h>
29 #include <linux/videodev2.h>
30 #include <linux/notifier.h>
31 #include <linux/delay.h>
32 #include <linux/mutex.h>
35 #include <media/v4l2-common.h>
36 #include <media/v4l2-ioctl.h>
37 #include <media/v4l2-ctrls.h>
38 #include <media/v4l2-device.h>
39 #include <media/videobuf2-dma-sg.h>
45 /* system vendor and device ID's */
46 #define PCI_VENDOR_ID_TECHWELL 0x1797
47 #define PCI_DEVICE_ID_6800 0x6800
48 #define PCI_DEVICE_ID_6801 0x6801
49 #define PCI_DEVICE_ID_AUDIO2 0x6802
50 #define PCI_DEVICE_ID_TS3 0x6803
51 #define PCI_DEVICE_ID_6804 0x6804
52 #define PCI_DEVICE_ID_AUDIO5 0x6805
53 #define PCI_DEVICE_ID_TS6 0x6806
55 /* tw6816 based cards */
56 #define PCI_DEVICE_ID_6816_1 0x6810
57 #define PCI_DEVICE_ID_6816_2 0x6811
58 #define PCI_DEVICE_ID_6816_3 0x6812
59 #define PCI_DEVICE_ID_6816_4 0x6813
61 #define TW68_NORMS ( \
62 V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM | \
63 V4L2_STD_PAL_M | V4L2_STD_PAL_Nc | V4L2_STD_PAL_60)
65 #define TW68_VID_INTS (TW68_FFERR | TW68_PABORT | TW68_DMAPERR | \
66 TW68_FFOF | TW68_DMAPI)
67 /* TW6800 chips have trouble with these, so we don't set them for that chip */
68 #define TW68_VID_INTSX (TW68_FDMIS | TW68_HLOCK | TW68_VLOCK)
70 #define TW68_I2C_INTS (TW68_SBERR | TW68_SBDONE | TW68_SBERR2 | \
73 enum tw68_decoder_type
{
80 /* ----------------------------------------------------------- */
97 u32 h_delay0
; /* for TW6800 */
107 /* Techwell specific */
118 /* ----------------------------------------------------------- */
119 /* card configuration */
121 #define TW68_BOARD_NOAUTO UNSET
122 #define TW68_BOARD_UNKNOWN 0
123 #define TW68_BOARD_GENERIC_6802 1
125 #define TW68_MAXBOARDS 16
126 #define TW68_INPUT_MAX 4
128 /* ----------------------------------------------------------- */
129 /* device / file handle status */
131 #define BUFFER_TIMEOUT msecs_to_jiffies(500) /* 0.5 seconds */
133 struct tw68_dev
; /* forward delclaration */
135 /* buffer for one video/vbi/ts frame */
137 struct vb2_buffer vb
;
138 struct list_head list
;
148 u32 fourcc
; /* v4l2 format id */
154 /* global device status */
159 struct v4l2_device v4l2_dev
;
161 /* various device info */
162 enum tw68_decoder_type vdecoder
;
163 struct video_device vdev
;
164 struct v4l2_ctrl_handler hdl
;
169 unsigned char pci_rev
, pci_lat
;
173 /* The irq mask to be used will depend upon the chip type */
177 const struct tw68_format
*fmt
;
178 unsigned width
, height
;
181 struct vb2_queue vidq
;
182 struct list_head active
;
185 /* various v4l controls */
186 const struct tw68_tvnorm
*tvnorm
; /* video */
191 /* ----------------------------------------------------------- */
193 #define tw_readl(reg) readl(dev->lmmio + ((reg) >> 2))
194 #define tw_readb(reg) readb(dev->bmmio + (reg))
195 #define tw_writel(reg, value) writel((value), dev->lmmio + ((reg) >> 2))
196 #define tw_writeb(reg, value) writeb((value), dev->bmmio + (reg))
198 #define tw_andorl(reg, mask, value) \
199 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
200 ((value) & (mask)), dev->lmmio+((reg)>>2))
201 #define tw_andorb(reg, mask, value) \
202 writeb((readb(dev->bmmio + (reg)) & ~(mask)) |\
203 ((value) & (mask)), dev->bmmio+(reg))
204 #define tw_setl(reg, bit) tw_andorl((reg), (bit), (bit))
205 #define tw_setb(reg, bit) tw_andorb((reg), (bit), (bit))
206 #define tw_clearl(reg, bit) \
207 writel((readl(dev->lmmio + ((reg) >> 2)) & ~(bit)), \
208 dev->lmmio + ((reg) >> 2))
209 #define tw_clearb(reg, bit) \
210 writeb((readb(dev->bmmio+(reg)) & ~(bit)), \
213 #define tw_wait(us) { udelay(us); }
215 /* ----------------------------------------------------------- */
218 void tw68_set_tvnorm_hw(struct tw68_dev
*dev
);
220 int tw68_video_init1(struct tw68_dev
*dev
);
221 int tw68_video_init2(struct tw68_dev
*dev
, int video_nr
);
222 void tw68_irq_video_done(struct tw68_dev
*dev
, unsigned long status
);
223 int tw68_video_start_dma(struct tw68_dev
*dev
, struct tw68_buf
*buf
);
225 /* ----------------------------------------------------------- */
228 int tw68_risc_buffer(struct pci_dev
*pci
, struct tw68_buf
*buf
,
229 struct scatterlist
*sglist
, unsigned int top_offset
,
230 unsigned int bottom_offset
, unsigned int bpl
,
231 unsigned int padding
, unsigned int lines
);