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[media] coda: add context ops
[mirror_ubuntu-hirsute-kernel.git] / drivers / media / platform / coda / coda-common.c
1 /*
2 * Coda multi-standard codec IP
3 *
4 * Copyright (C) 2012 Vista Silicon S.L.
5 * Javier Martin, <javier.martin@vista-silicon.com>
6 * Xavier Duret
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14 #include <linux/clk.h>
15 #include <linux/debugfs.h>
16 #include <linux/delay.h>
17 #include <linux/firmware.h>
18 #include <linux/genalloc.h>
19 #include <linux/interrupt.h>
20 #include <linux/io.h>
21 #include <linux/irq.h>
22 #include <linux/kfifo.h>
23 #include <linux/module.h>
24 #include <linux/of_device.h>
25 #include <linux/platform_device.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/slab.h>
28 #include <linux/videodev2.h>
29 #include <linux/of.h>
30 #include <linux/platform_data/coda.h>
31 #include <linux/reset.h>
32
33 #include <media/v4l2-ctrls.h>
34 #include <media/v4l2-device.h>
35 #include <media/v4l2-event.h>
36 #include <media/v4l2-ioctl.h>
37 #include <media/v4l2-mem2mem.h>
38 #include <media/videobuf2-core.h>
39 #include <media/videobuf2-dma-contig.h>
40
41 #include "coda.h"
42 #include "coda_regs.h"
43
44 #define CODA_NAME "coda"
45
46 #define CODADX6_MAX_INSTANCES 4
47
48 #define CODA_PARA_BUF_SIZE (10 * 1024)
49 #define CODA_ISRAM_SIZE (2048 * 2)
50
51 #define CODA7_PS_BUF_SIZE 0x28000
52 #define CODA9_PS_SAVE_SIZE (512 * 1024)
53
54 #define CODA_DEFAULT_GAMMA 4096
55 #define CODA9_DEFAULT_GAMMA 24576 /* 0.75 * 32768 */
56
57 #define MIN_W 176
58 #define MIN_H 144
59
60 #define S_ALIGN 1 /* multiple of 2 */
61 #define W_ALIGN 1 /* multiple of 2 */
62 #define H_ALIGN 1 /* multiple of 2 */
63
64 #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
65
66 static int coda_debug;
67 module_param(coda_debug, int, 0644);
68 MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
69
70 struct coda_fmt {
71 char *name;
72 u32 fourcc;
73 };
74
75 static const u8 coda_filler_nal[14] = { 0x00, 0x00, 0x00, 0x01, 0x0c, 0xff,
76 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 };
77 static const u8 coda_filler_size[8] = { 0, 7, 14, 13, 12, 11, 10, 9 };
78
79 void coda_write(struct coda_dev *dev, u32 data, u32 reg)
80 {
81 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
82 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
83 writel(data, dev->regs_base + reg);
84 }
85
86 unsigned int coda_read(struct coda_dev *dev, u32 reg)
87 {
88 u32 data;
89 data = readl(dev->regs_base + reg);
90 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
91 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
92 return data;
93 }
94
95 static inline unsigned long coda_isbusy(struct coda_dev *dev)
96 {
97 return coda_read(dev, CODA_REG_BIT_BUSY);
98 }
99
100 static inline int coda_is_initialized(struct coda_dev *dev)
101 {
102 return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
103 }
104
105 static int coda_wait_timeout(struct coda_dev *dev)
106 {
107 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
108
109 while (coda_isbusy(dev)) {
110 if (time_after(jiffies, timeout))
111 return -ETIMEDOUT;
112 }
113 return 0;
114 }
115
116 static void coda_command_async(struct coda_ctx *ctx, int cmd)
117 {
118 struct coda_dev *dev = ctx->dev;
119
120 if (dev->devtype->product == CODA_960 ||
121 dev->devtype->product == CODA_7541) {
122 /* Restore context related registers to CODA */
123 coda_write(dev, ctx->bit_stream_param,
124 CODA_REG_BIT_BIT_STREAM_PARAM);
125 coda_write(dev, ctx->frm_dis_flg,
126 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
127 coda_write(dev, ctx->frame_mem_ctrl,
128 CODA_REG_BIT_FRAME_MEM_CTRL);
129 coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
130 }
131
132 if (dev->devtype->product == CODA_960) {
133 coda_write(dev, 1, CODA9_GDI_WPROT_ERR_CLR);
134 coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
135 }
136
137 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
138
139 coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
140 coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
141 coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
142
143 coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
144 }
145
146 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
147 {
148 struct coda_dev *dev = ctx->dev;
149
150 coda_command_async(ctx, cmd);
151 return coda_wait_timeout(dev);
152 }
153
154 static int coda_hw_reset(struct coda_ctx *ctx)
155 {
156 struct coda_dev *dev = ctx->dev;
157 unsigned long timeout;
158 unsigned int idx;
159 int ret;
160
161 if (!dev->rstc)
162 return -ENOENT;
163
164 idx = coda_read(dev, CODA_REG_BIT_RUN_INDEX);
165
166 if (dev->devtype->product == CODA_960) {
167 timeout = jiffies + msecs_to_jiffies(100);
168 coda_write(dev, 0x11, CODA9_GDI_BUS_CTRL);
169 while (coda_read(dev, CODA9_GDI_BUS_STATUS) != 0x77) {
170 if (time_after(jiffies, timeout))
171 return -ETIME;
172 cpu_relax();
173 }
174 }
175
176 ret = reset_control_reset(dev->rstc);
177 if (ret < 0)
178 return ret;
179
180 if (dev->devtype->product == CODA_960)
181 coda_write(dev, 0x00, CODA9_GDI_BUS_CTRL);
182 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
183 coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
184 ret = coda_wait_timeout(dev);
185 coda_write(dev, idx, CODA_REG_BIT_RUN_INDEX);
186
187 return ret;
188 }
189
190 static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
191 enum v4l2_buf_type type)
192 {
193 switch (type) {
194 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
195 return &(ctx->q_data[V4L2_M2M_SRC]);
196 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
197 return &(ctx->q_data[V4L2_M2M_DST]);
198 default:
199 return NULL;
200 }
201 }
202
203 /*
204 * Array of all formats supported by any version of Coda:
205 */
206 static const struct coda_fmt coda_formats[] = {
207 {
208 .name = "YUV 4:2:0 Planar, YCbCr",
209 .fourcc = V4L2_PIX_FMT_YUV420,
210 },
211 {
212 .name = "YUV 4:2:0 Planar, YCrCb",
213 .fourcc = V4L2_PIX_FMT_YVU420,
214 },
215 {
216 .name = "H264 Encoded Stream",
217 .fourcc = V4L2_PIX_FMT_H264,
218 },
219 {
220 .name = "MPEG4 Encoded Stream",
221 .fourcc = V4L2_PIX_FMT_MPEG4,
222 },
223 };
224
225 #define CODA_CODEC(mode, src_fourcc, dst_fourcc, max_w, max_h) \
226 { mode, src_fourcc, dst_fourcc, max_w, max_h }
227
228 /*
229 * Arrays of codecs supported by each given version of Coda:
230 * i.MX27 -> codadx6
231 * i.MX5x -> coda7
232 * i.MX6 -> coda960
233 * Use V4L2_PIX_FMT_YUV420 as placeholder for all supported YUV 4:2:0 variants
234 */
235 static const struct coda_codec codadx6_codecs[] = {
236 CODA_CODEC(CODADX6_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 720, 576),
237 CODA_CODEC(CODADX6_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 720, 576),
238 };
239
240 static const struct coda_codec coda7_codecs[] = {
241 CODA_CODEC(CODA7_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 1280, 720),
242 CODA_CODEC(CODA7_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 1280, 720),
243 CODA_CODEC(CODA7_MODE_DECODE_H264, V4L2_PIX_FMT_H264, V4L2_PIX_FMT_YUV420, 1920, 1080),
244 CODA_CODEC(CODA7_MODE_DECODE_MP4, V4L2_PIX_FMT_MPEG4, V4L2_PIX_FMT_YUV420, 1920, 1080),
245 };
246
247 static const struct coda_codec coda9_codecs[] = {
248 CODA_CODEC(CODA9_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 1920, 1080),
249 CODA_CODEC(CODA9_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 1920, 1080),
250 CODA_CODEC(CODA9_MODE_DECODE_H264, V4L2_PIX_FMT_H264, V4L2_PIX_FMT_YUV420, 1920, 1080),
251 CODA_CODEC(CODA9_MODE_DECODE_MP4, V4L2_PIX_FMT_MPEG4, V4L2_PIX_FMT_YUV420, 1920, 1080),
252 };
253
254 static bool coda_format_is_yuv(u32 fourcc)
255 {
256 switch (fourcc) {
257 case V4L2_PIX_FMT_YUV420:
258 case V4L2_PIX_FMT_YVU420:
259 return true;
260 default:
261 return false;
262 }
263 }
264
265 /*
266 * Normalize all supported YUV 4:2:0 formats to the value used in the codec
267 * tables.
268 */
269 static u32 coda_format_normalize_yuv(u32 fourcc)
270 {
271 return coda_format_is_yuv(fourcc) ? V4L2_PIX_FMT_YUV420 : fourcc;
272 }
273
274 static const struct coda_codec *coda_find_codec(struct coda_dev *dev,
275 int src_fourcc, int dst_fourcc)
276 {
277 const struct coda_codec *codecs = dev->devtype->codecs;
278 int num_codecs = dev->devtype->num_codecs;
279 int k;
280
281 src_fourcc = coda_format_normalize_yuv(src_fourcc);
282 dst_fourcc = coda_format_normalize_yuv(dst_fourcc);
283 if (src_fourcc == dst_fourcc)
284 return NULL;
285
286 for (k = 0; k < num_codecs; k++) {
287 if (codecs[k].src_fourcc == src_fourcc &&
288 codecs[k].dst_fourcc == dst_fourcc)
289 break;
290 }
291
292 if (k == num_codecs)
293 return NULL;
294
295 return &codecs[k];
296 }
297
298 static void coda_get_max_dimensions(struct coda_dev *dev,
299 const struct coda_codec *codec,
300 int *max_w, int *max_h)
301 {
302 const struct coda_codec *codecs = dev->devtype->codecs;
303 int num_codecs = dev->devtype->num_codecs;
304 unsigned int w, h;
305 int k;
306
307 if (codec) {
308 w = codec->max_w;
309 h = codec->max_h;
310 } else {
311 for (k = 0, w = 0, h = 0; k < num_codecs; k++) {
312 w = max(w, codecs[k].max_w);
313 h = max(h, codecs[k].max_h);
314 }
315 }
316
317 if (max_w)
318 *max_w = w;
319 if (max_h)
320 *max_h = h;
321 }
322
323 static char *coda_product_name(int product)
324 {
325 static char buf[9];
326
327 switch (product) {
328 case CODA_DX6:
329 return "CodaDx6";
330 case CODA_7541:
331 return "CODA7541";
332 case CODA_960:
333 return "CODA960";
334 default:
335 snprintf(buf, sizeof(buf), "(0x%04x)", product);
336 return buf;
337 }
338 }
339
340 /*
341 * V4L2 ioctl() operations.
342 */
343 static int coda_querycap(struct file *file, void *priv,
344 struct v4l2_capability *cap)
345 {
346 struct coda_ctx *ctx = fh_to_ctx(priv);
347
348 strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
349 strlcpy(cap->card, coda_product_name(ctx->dev->devtype->product),
350 sizeof(cap->card));
351 strlcpy(cap->bus_info, "platform:" CODA_NAME, sizeof(cap->bus_info));
352 cap->device_caps = V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
353 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
354
355 return 0;
356 }
357
358 static int coda_enum_fmt(struct file *file, void *priv,
359 struct v4l2_fmtdesc *f)
360 {
361 struct coda_ctx *ctx = fh_to_ctx(priv);
362 const struct coda_codec *codecs = ctx->dev->devtype->codecs;
363 const struct coda_fmt *formats = coda_formats;
364 const struct coda_fmt *fmt;
365 int num_codecs = ctx->dev->devtype->num_codecs;
366 int num_formats = ARRAY_SIZE(coda_formats);
367 int i, k, num = 0;
368 bool yuv;
369
370 if (ctx->inst_type == CODA_INST_ENCODER)
371 yuv = (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT);
372 else
373 yuv = (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE);
374
375 for (i = 0; i < num_formats; i++) {
376 /* Skip either raw or compressed formats */
377 if (yuv != coda_format_is_yuv(formats[i].fourcc))
378 continue;
379 /* All uncompressed formats are always supported */
380 if (yuv) {
381 if (num == f->index)
382 break;
383 ++num;
384 continue;
385 }
386 /* Compressed formats may be supported, check the codec list */
387 for (k = 0; k < num_codecs; k++) {
388 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
389 formats[i].fourcc == codecs[k].dst_fourcc)
390 break;
391 if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT &&
392 formats[i].fourcc == codecs[k].src_fourcc)
393 break;
394 }
395 if (k < num_codecs) {
396 if (num == f->index)
397 break;
398 ++num;
399 }
400 }
401
402 if (i < num_formats) {
403 fmt = &formats[i];
404 strlcpy(f->description, fmt->name, sizeof(f->description));
405 f->pixelformat = fmt->fourcc;
406 if (!yuv)
407 f->flags |= V4L2_FMT_FLAG_COMPRESSED;
408 return 0;
409 }
410
411 /* Format not found */
412 return -EINVAL;
413 }
414
415 static int coda_g_fmt(struct file *file, void *priv,
416 struct v4l2_format *f)
417 {
418 struct coda_q_data *q_data;
419 struct coda_ctx *ctx = fh_to_ctx(priv);
420
421 q_data = get_q_data(ctx, f->type);
422 if (!q_data)
423 return -EINVAL;
424
425 f->fmt.pix.field = V4L2_FIELD_NONE;
426 f->fmt.pix.pixelformat = q_data->fourcc;
427 f->fmt.pix.width = q_data->width;
428 f->fmt.pix.height = q_data->height;
429 f->fmt.pix.bytesperline = q_data->bytesperline;
430
431 f->fmt.pix.sizeimage = q_data->sizeimage;
432 f->fmt.pix.colorspace = ctx->colorspace;
433
434 return 0;
435 }
436
437 static int coda_try_fmt(struct coda_ctx *ctx, const struct coda_codec *codec,
438 struct v4l2_format *f)
439 {
440 struct coda_dev *dev = ctx->dev;
441 struct coda_q_data *q_data;
442 unsigned int max_w, max_h;
443 enum v4l2_field field;
444
445 field = f->fmt.pix.field;
446 if (field == V4L2_FIELD_ANY)
447 field = V4L2_FIELD_NONE;
448 else if (V4L2_FIELD_NONE != field)
449 return -EINVAL;
450
451 /* V4L2 specification suggests the driver corrects the format struct
452 * if any of the dimensions is unsupported */
453 f->fmt.pix.field = field;
454
455 coda_get_max_dimensions(dev, codec, &max_w, &max_h);
456 v4l_bound_align_image(&f->fmt.pix.width, MIN_W, max_w, W_ALIGN,
457 &f->fmt.pix.height, MIN_H, max_h, H_ALIGN,
458 S_ALIGN);
459
460 switch (f->fmt.pix.pixelformat) {
461 case V4L2_PIX_FMT_YUV420:
462 case V4L2_PIX_FMT_YVU420:
463 case V4L2_PIX_FMT_H264:
464 case V4L2_PIX_FMT_MPEG4:
465 case V4L2_PIX_FMT_JPEG:
466 break;
467 default:
468 q_data = get_q_data(ctx, f->type);
469 if (!q_data)
470 return -EINVAL;
471 f->fmt.pix.pixelformat = q_data->fourcc;
472 }
473
474 switch (f->fmt.pix.pixelformat) {
475 case V4L2_PIX_FMT_YUV420:
476 case V4L2_PIX_FMT_YVU420:
477 /* Frame stride must be multiple of 8, but 16 for h.264 */
478 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 16);
479 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
480 f->fmt.pix.height * 3 / 2;
481 break;
482 case V4L2_PIX_FMT_H264:
483 case V4L2_PIX_FMT_MPEG4:
484 case V4L2_PIX_FMT_JPEG:
485 f->fmt.pix.bytesperline = 0;
486 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
487 break;
488 default:
489 BUG();
490 }
491
492 return 0;
493 }
494
495 static int coda_try_fmt_vid_cap(struct file *file, void *priv,
496 struct v4l2_format *f)
497 {
498 struct coda_ctx *ctx = fh_to_ctx(priv);
499 const struct coda_codec *codec = NULL;
500 struct vb2_queue *src_vq;
501 int ret;
502
503 /*
504 * If the source format is already fixed, try to find a codec that
505 * converts to the given destination format
506 */
507 src_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
508 if (vb2_is_streaming(src_vq)) {
509 struct coda_q_data *q_data_src;
510
511 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
512 codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
513 f->fmt.pix.pixelformat);
514 if (!codec)
515 return -EINVAL;
516
517 f->fmt.pix.width = q_data_src->width;
518 f->fmt.pix.height = q_data_src->height;
519 } else {
520 /* Otherwise determine codec by encoded format, if possible */
521 codec = coda_find_codec(ctx->dev, V4L2_PIX_FMT_YUV420,
522 f->fmt.pix.pixelformat);
523 }
524
525 f->fmt.pix.colorspace = ctx->colorspace;
526
527 ret = coda_try_fmt(ctx, codec, f);
528 if (ret < 0)
529 return ret;
530
531 /* The h.264 decoder only returns complete 16x16 macroblocks */
532 if (codec && codec->src_fourcc == V4L2_PIX_FMT_H264) {
533 f->fmt.pix.width = f->fmt.pix.width;
534 f->fmt.pix.height = round_up(f->fmt.pix.height, 16);
535 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 16);
536 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
537 f->fmt.pix.height * 3 / 2;
538 }
539
540 return 0;
541 }
542
543 static int coda_try_fmt_vid_out(struct file *file, void *priv,
544 struct v4l2_format *f)
545 {
546 struct coda_ctx *ctx = fh_to_ctx(priv);
547 const struct coda_codec *codec;
548
549 /* Determine codec by encoded format, returns NULL if raw or invalid */
550 codec = coda_find_codec(ctx->dev, f->fmt.pix.pixelformat,
551 V4L2_PIX_FMT_YUV420);
552 if (!codec && ctx->inst_type == CODA_INST_DECODER) {
553 codec = coda_find_codec(ctx->dev, V4L2_PIX_FMT_H264,
554 V4L2_PIX_FMT_YUV420);
555 if (!codec)
556 return -EINVAL;
557 }
558
559 if (!f->fmt.pix.colorspace)
560 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
561
562 return coda_try_fmt(ctx, codec, f);
563 }
564
565 static int coda_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
566 {
567 struct coda_q_data *q_data;
568 struct vb2_queue *vq;
569
570 vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type);
571 if (!vq)
572 return -EINVAL;
573
574 q_data = get_q_data(ctx, f->type);
575 if (!q_data)
576 return -EINVAL;
577
578 if (vb2_is_busy(vq)) {
579 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
580 return -EBUSY;
581 }
582
583 q_data->fourcc = f->fmt.pix.pixelformat;
584 q_data->width = f->fmt.pix.width;
585 q_data->height = f->fmt.pix.height;
586 q_data->bytesperline = f->fmt.pix.bytesperline;
587 q_data->sizeimage = f->fmt.pix.sizeimage;
588 q_data->rect.left = 0;
589 q_data->rect.top = 0;
590 q_data->rect.width = f->fmt.pix.width;
591 q_data->rect.height = f->fmt.pix.height;
592
593 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
594 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
595 f->type, q_data->width, q_data->height, q_data->fourcc);
596
597 return 0;
598 }
599
600 static int coda_s_fmt_vid_cap(struct file *file, void *priv,
601 struct v4l2_format *f)
602 {
603 struct coda_ctx *ctx = fh_to_ctx(priv);
604 int ret;
605
606 ret = coda_try_fmt_vid_cap(file, priv, f);
607 if (ret)
608 return ret;
609
610 return coda_s_fmt(ctx, f);
611 }
612
613 static int coda_s_fmt_vid_out(struct file *file, void *priv,
614 struct v4l2_format *f)
615 {
616 struct coda_ctx *ctx = fh_to_ctx(priv);
617 int ret;
618
619 ret = coda_try_fmt_vid_out(file, priv, f);
620 if (ret)
621 return ret;
622
623 ret = coda_s_fmt(ctx, f);
624 if (ret)
625 ctx->colorspace = f->fmt.pix.colorspace;
626
627 return ret;
628 }
629
630 static int coda_qbuf(struct file *file, void *priv,
631 struct v4l2_buffer *buf)
632 {
633 struct coda_ctx *ctx = fh_to_ctx(priv);
634
635 return v4l2_m2m_qbuf(file, ctx->fh.m2m_ctx, buf);
636 }
637
638 static bool coda_buf_is_end_of_stream(struct coda_ctx *ctx,
639 struct v4l2_buffer *buf)
640 {
641 struct vb2_queue *src_vq;
642
643 src_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
644
645 return ((ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) &&
646 (buf->sequence == (ctx->qsequence - 1)));
647 }
648
649 static int coda_dqbuf(struct file *file, void *priv,
650 struct v4l2_buffer *buf)
651 {
652 struct coda_ctx *ctx = fh_to_ctx(priv);
653 int ret;
654
655 ret = v4l2_m2m_dqbuf(file, ctx->fh.m2m_ctx, buf);
656
657 /* If this is the last capture buffer, emit an end-of-stream event */
658 if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
659 coda_buf_is_end_of_stream(ctx, buf)) {
660 const struct v4l2_event eos_event = {
661 .type = V4L2_EVENT_EOS
662 };
663
664 v4l2_event_queue_fh(&ctx->fh, &eos_event);
665 }
666
667 return ret;
668 }
669
670 static int coda_g_selection(struct file *file, void *fh,
671 struct v4l2_selection *s)
672 {
673 struct coda_ctx *ctx = fh_to_ctx(fh);
674 struct coda_q_data *q_data;
675 struct v4l2_rect r, *rsel;
676
677 q_data = get_q_data(ctx, s->type);
678 if (!q_data)
679 return -EINVAL;
680
681 r.left = 0;
682 r.top = 0;
683 r.width = q_data->width;
684 r.height = q_data->height;
685 rsel = &q_data->rect;
686
687 switch (s->target) {
688 case V4L2_SEL_TGT_CROP_DEFAULT:
689 case V4L2_SEL_TGT_CROP_BOUNDS:
690 rsel = &r;
691 /* fallthrough */
692 case V4L2_SEL_TGT_CROP:
693 if (s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
694 return -EINVAL;
695 break;
696 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
697 case V4L2_SEL_TGT_COMPOSE_PADDED:
698 rsel = &r;
699 /* fallthrough */
700 case V4L2_SEL_TGT_COMPOSE:
701 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
702 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
703 return -EINVAL;
704 break;
705 default:
706 return -EINVAL;
707 }
708
709 s->r = *rsel;
710
711 return 0;
712 }
713
714 static int coda_try_decoder_cmd(struct file *file, void *fh,
715 struct v4l2_decoder_cmd *dc)
716 {
717 if (dc->cmd != V4L2_DEC_CMD_STOP)
718 return -EINVAL;
719
720 if (dc->flags & V4L2_DEC_CMD_STOP_TO_BLACK)
721 return -EINVAL;
722
723 if (!(dc->flags & V4L2_DEC_CMD_STOP_IMMEDIATELY) && (dc->stop.pts != 0))
724 return -EINVAL;
725
726 return 0;
727 }
728
729 static int coda_decoder_cmd(struct file *file, void *fh,
730 struct v4l2_decoder_cmd *dc)
731 {
732 struct coda_ctx *ctx = fh_to_ctx(fh);
733 struct coda_dev *dev = ctx->dev;
734 int ret;
735
736 ret = coda_try_decoder_cmd(file, fh, dc);
737 if (ret < 0)
738 return ret;
739
740 /* Ignore decoder stop command silently in encoder context */
741 if (ctx->inst_type != CODA_INST_DECODER)
742 return 0;
743
744 /* Set the strem-end flag on this context */
745 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
746
747 if ((dev->devtype->product == CODA_960) &&
748 coda_isbusy(dev) &&
749 (ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX))) {
750 /* If this context is currently running, update the hardware flag */
751 coda_write(dev, ctx->bit_stream_param, CODA_REG_BIT_BIT_STREAM_PARAM);
752 }
753 ctx->hold = false;
754 v4l2_m2m_try_schedule(ctx->fh.m2m_ctx);
755
756 return 0;
757 }
758
759 static int coda_subscribe_event(struct v4l2_fh *fh,
760 const struct v4l2_event_subscription *sub)
761 {
762 switch (sub->type) {
763 case V4L2_EVENT_EOS:
764 return v4l2_event_subscribe(fh, sub, 0, NULL);
765 default:
766 return v4l2_ctrl_subscribe_event(fh, sub);
767 }
768 }
769
770 static const struct v4l2_ioctl_ops coda_ioctl_ops = {
771 .vidioc_querycap = coda_querycap,
772
773 .vidioc_enum_fmt_vid_cap = coda_enum_fmt,
774 .vidioc_g_fmt_vid_cap = coda_g_fmt,
775 .vidioc_try_fmt_vid_cap = coda_try_fmt_vid_cap,
776 .vidioc_s_fmt_vid_cap = coda_s_fmt_vid_cap,
777
778 .vidioc_enum_fmt_vid_out = coda_enum_fmt,
779 .vidioc_g_fmt_vid_out = coda_g_fmt,
780 .vidioc_try_fmt_vid_out = coda_try_fmt_vid_out,
781 .vidioc_s_fmt_vid_out = coda_s_fmt_vid_out,
782
783 .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs,
784 .vidioc_querybuf = v4l2_m2m_ioctl_querybuf,
785
786 .vidioc_qbuf = coda_qbuf,
787 .vidioc_expbuf = v4l2_m2m_ioctl_expbuf,
788 .vidioc_dqbuf = coda_dqbuf,
789 .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs,
790
791 .vidioc_streamon = v4l2_m2m_ioctl_streamon,
792 .vidioc_streamoff = v4l2_m2m_ioctl_streamoff,
793
794 .vidioc_g_selection = coda_g_selection,
795
796 .vidioc_try_decoder_cmd = coda_try_decoder_cmd,
797 .vidioc_decoder_cmd = coda_decoder_cmd,
798
799 .vidioc_subscribe_event = coda_subscribe_event,
800 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
801 };
802
803 static int __coda_start_decoding(struct coda_ctx *ctx);
804
805 static inline int coda_get_bitstream_payload(struct coda_ctx *ctx)
806 {
807 return kfifo_len(&ctx->bitstream_fifo);
808 }
809
810 static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
811 {
812 struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
813 struct coda_dev *dev = ctx->dev;
814 u32 rd_ptr;
815
816 rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
817 kfifo->out = (kfifo->in & ~kfifo->mask) |
818 (rd_ptr - ctx->bitstream.paddr);
819 if (kfifo->out > kfifo->in)
820 kfifo->out -= kfifo->mask + 1;
821 }
822
823 static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
824 {
825 struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
826 struct coda_dev *dev = ctx->dev;
827 u32 rd_ptr, wr_ptr;
828
829 rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
830 coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
831 wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
832 coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
833 }
834
835 static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
836 {
837 struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
838 struct coda_dev *dev = ctx->dev;
839 u32 wr_ptr;
840
841 wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
842 coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
843 }
844
845 static int coda_bitstream_queue(struct coda_ctx *ctx, struct vb2_buffer *src_buf)
846 {
847 u32 src_size = vb2_get_plane_payload(src_buf, 0);
848 u32 n;
849
850 n = kfifo_in(&ctx->bitstream_fifo, vb2_plane_vaddr(src_buf, 0), src_size);
851 if (n < src_size)
852 return -ENOSPC;
853
854 dma_sync_single_for_device(&ctx->dev->plat_dev->dev, ctx->bitstream.paddr,
855 ctx->bitstream.size, DMA_TO_DEVICE);
856
857 src_buf->v4l2_buf.sequence = ctx->qsequence++;
858
859 return 0;
860 }
861
862 static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
863 struct vb2_buffer *src_buf)
864 {
865 int ret;
866
867 if (coda_get_bitstream_payload(ctx) +
868 vb2_get_plane_payload(src_buf, 0) + 512 >= ctx->bitstream.size)
869 return false;
870
871 if (vb2_plane_vaddr(src_buf, 0) == NULL) {
872 v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
873 return true;
874 }
875
876 ret = coda_bitstream_queue(ctx, src_buf);
877 if (ret < 0) {
878 v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
879 return false;
880 }
881 /* Sync read pointer to device */
882 if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
883 coda_kfifo_sync_to_device_write(ctx);
884
885 ctx->hold = false;
886
887 return true;
888 }
889
890 static void coda_fill_bitstream(struct coda_ctx *ctx)
891 {
892 struct vb2_buffer *src_buf;
893 struct coda_timestamp *ts;
894
895 while (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) > 0) {
896 src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
897
898 if (coda_bitstream_try_queue(ctx, src_buf)) {
899 /*
900 * Source buffer is queued in the bitstream ringbuffer;
901 * queue the timestamp and mark source buffer as done
902 */
903 src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
904
905 ts = kmalloc(sizeof(*ts), GFP_KERNEL);
906 if (ts) {
907 ts->sequence = src_buf->v4l2_buf.sequence;
908 ts->timecode = src_buf->v4l2_buf.timecode;
909 ts->timestamp = src_buf->v4l2_buf.timestamp;
910 list_add_tail(&ts->list, &ctx->timestamp_list);
911 }
912
913 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
914 } else {
915 break;
916 }
917 }
918 }
919
920 static void coda_set_gdi_regs(struct coda_ctx *ctx)
921 {
922 struct gdi_tiled_map *tiled_map = &ctx->tiled_map;
923 struct coda_dev *dev = ctx->dev;
924 int i;
925
926 for (i = 0; i < 16; i++)
927 coda_write(dev, tiled_map->xy2ca_map[i],
928 CODA9_GDI_XY2_CAS_0 + 4 * i);
929 for (i = 0; i < 4; i++)
930 coda_write(dev, tiled_map->xy2ba_map[i],
931 CODA9_GDI_XY2_BA_0 + 4 * i);
932 for (i = 0; i < 16; i++)
933 coda_write(dev, tiled_map->xy2ra_map[i],
934 CODA9_GDI_XY2_RAS_0 + 4 * i);
935 coda_write(dev, tiled_map->xy2rbc_config, CODA9_GDI_XY2_RBC_CONFIG);
936 for (i = 0; i < 32; i++)
937 coda_write(dev, tiled_map->rbc2axi_map[i],
938 CODA9_GDI_RBC2_AXI_0 + 4 * i);
939 }
940
941 /*
942 * Mem-to-mem operations.
943 */
944 static int coda_prepare_decode(struct coda_ctx *ctx)
945 {
946 struct vb2_buffer *dst_buf;
947 struct coda_dev *dev = ctx->dev;
948 struct coda_q_data *q_data_dst;
949 u32 stridey, height;
950 u32 picture_y, picture_cb, picture_cr;
951
952 dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
953 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
954
955 if (ctx->params.rot_mode & CODA_ROT_90) {
956 stridey = q_data_dst->height;
957 height = q_data_dst->width;
958 } else {
959 stridey = q_data_dst->width;
960 height = q_data_dst->height;
961 }
962
963 /* Try to copy source buffer contents into the bitstream ringbuffer */
964 mutex_lock(&ctx->bitstream_mutex);
965 coda_fill_bitstream(ctx);
966 mutex_unlock(&ctx->bitstream_mutex);
967
968 if (coda_get_bitstream_payload(ctx) < 512 &&
969 (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
970 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
971 "bitstream payload: %d, skipping\n",
972 coda_get_bitstream_payload(ctx));
973 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
974 return -EAGAIN;
975 }
976
977 /* Run coda_start_decoding (again) if not yet initialized */
978 if (!ctx->initialized) {
979 int ret = __coda_start_decoding(ctx);
980 if (ret < 0) {
981 v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
982 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
983 return -EAGAIN;
984 } else {
985 ctx->initialized = 1;
986 }
987 }
988
989 if (dev->devtype->product == CODA_960)
990 coda_set_gdi_regs(ctx);
991
992 /* Set rotator output */
993 picture_y = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
994 if (q_data_dst->fourcc == V4L2_PIX_FMT_YVU420) {
995 /* Switch Cr and Cb for YVU420 format */
996 picture_cr = picture_y + stridey * height;
997 picture_cb = picture_cr + stridey / 2 * height / 2;
998 } else {
999 picture_cb = picture_y + stridey * height;
1000 picture_cr = picture_cb + stridey / 2 * height / 2;
1001 }
1002
1003 if (dev->devtype->product == CODA_960) {
1004 /*
1005 * The CODA960 seems to have an internal list of buffers with
1006 * 64 entries that includes the registered frame buffers as
1007 * well as the rotator buffer output.
1008 * ROT_INDEX needs to be < 0x40, but > ctx->num_internal_frames.
1009 */
1010 coda_write(dev, CODA_MAX_FRAMEBUFFERS + dst_buf->v4l2_buf.index,
1011 CODA9_CMD_DEC_PIC_ROT_INDEX);
1012 coda_write(dev, picture_y, CODA9_CMD_DEC_PIC_ROT_ADDR_Y);
1013 coda_write(dev, picture_cb, CODA9_CMD_DEC_PIC_ROT_ADDR_CB);
1014 coda_write(dev, picture_cr, CODA9_CMD_DEC_PIC_ROT_ADDR_CR);
1015 coda_write(dev, stridey, CODA9_CMD_DEC_PIC_ROT_STRIDE);
1016 } else {
1017 coda_write(dev, picture_y, CODA_CMD_DEC_PIC_ROT_ADDR_Y);
1018 coda_write(dev, picture_cb, CODA_CMD_DEC_PIC_ROT_ADDR_CB);
1019 coda_write(dev, picture_cr, CODA_CMD_DEC_PIC_ROT_ADDR_CR);
1020 coda_write(dev, stridey, CODA_CMD_DEC_PIC_ROT_STRIDE);
1021 }
1022 coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode,
1023 CODA_CMD_DEC_PIC_ROT_MODE);
1024
1025 switch (dev->devtype->product) {
1026 case CODA_DX6:
1027 /* TBD */
1028 case CODA_7541:
1029 coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
1030 break;
1031 case CODA_960:
1032 coda_write(dev, (1 << 10), CODA_CMD_DEC_PIC_OPTION); /* 'hardcode to use interrupt disable mode'? */
1033 break;
1034 }
1035
1036 coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
1037
1038 coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
1039 coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
1040
1041 return 0;
1042 }
1043
1044 static int coda_prepare_encode(struct coda_ctx *ctx)
1045 {
1046 struct coda_q_data *q_data_src, *q_data_dst;
1047 struct vb2_buffer *src_buf, *dst_buf;
1048 struct coda_dev *dev = ctx->dev;
1049 int force_ipicture;
1050 int quant_param = 0;
1051 u32 picture_y, picture_cb, picture_cr;
1052 u32 pic_stream_buffer_addr, pic_stream_buffer_size;
1053 u32 dst_fourcc;
1054
1055 src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
1056 dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1057 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1058 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1059 dst_fourcc = q_data_dst->fourcc;
1060
1061 src_buf->v4l2_buf.sequence = ctx->osequence;
1062 dst_buf->v4l2_buf.sequence = ctx->osequence;
1063 ctx->osequence++;
1064
1065 /*
1066 * Workaround coda firmware BUG that only marks the first
1067 * frame as IDR. This is a problem for some decoders that can't
1068 * recover when a frame is lost.
1069 */
1070 if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
1071 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1072 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1073 } else {
1074 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1075 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1076 }
1077
1078 if (dev->devtype->product == CODA_960)
1079 coda_set_gdi_regs(ctx);
1080
1081 /*
1082 * Copy headers at the beginning of the first frame for H.264 only.
1083 * In MPEG4 they are already copied by the coda.
1084 */
1085 if (src_buf->v4l2_buf.sequence == 0) {
1086 pic_stream_buffer_addr =
1087 vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
1088 ctx->vpu_header_size[0] +
1089 ctx->vpu_header_size[1] +
1090 ctx->vpu_header_size[2];
1091 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
1092 ctx->vpu_header_size[0] -
1093 ctx->vpu_header_size[1] -
1094 ctx->vpu_header_size[2];
1095 memcpy(vb2_plane_vaddr(dst_buf, 0),
1096 &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
1097 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
1098 &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
1099 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
1100 ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
1101 ctx->vpu_header_size[2]);
1102 } else {
1103 pic_stream_buffer_addr =
1104 vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1105 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
1106 }
1107
1108 if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1109 force_ipicture = 1;
1110 switch (dst_fourcc) {
1111 case V4L2_PIX_FMT_H264:
1112 quant_param = ctx->params.h264_intra_qp;
1113 break;
1114 case V4L2_PIX_FMT_MPEG4:
1115 quant_param = ctx->params.mpeg4_intra_qp;
1116 break;
1117 default:
1118 v4l2_warn(&ctx->dev->v4l2_dev,
1119 "cannot set intra qp, fmt not supported\n");
1120 break;
1121 }
1122 } else {
1123 force_ipicture = 0;
1124 switch (dst_fourcc) {
1125 case V4L2_PIX_FMT_H264:
1126 quant_param = ctx->params.h264_inter_qp;
1127 break;
1128 case V4L2_PIX_FMT_MPEG4:
1129 quant_param = ctx->params.mpeg4_inter_qp;
1130 break;
1131 default:
1132 v4l2_warn(&ctx->dev->v4l2_dev,
1133 "cannot set inter qp, fmt not supported\n");
1134 break;
1135 }
1136 }
1137
1138 /* submit */
1139 coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
1140 coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
1141
1142
1143 picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
1144 switch (q_data_src->fourcc) {
1145 case V4L2_PIX_FMT_YVU420:
1146 /* Switch Cb and Cr for YVU420 format */
1147 picture_cr = picture_y + q_data_src->bytesperline *
1148 q_data_src->height;
1149 picture_cb = picture_cr + q_data_src->bytesperline / 2 *
1150 q_data_src->height / 2;
1151 break;
1152 case V4L2_PIX_FMT_YUV420:
1153 default:
1154 picture_cb = picture_y + q_data_src->bytesperline *
1155 q_data_src->height;
1156 picture_cr = picture_cb + q_data_src->bytesperline / 2 *
1157 q_data_src->height / 2;
1158 break;
1159 }
1160
1161 if (dev->devtype->product == CODA_960) {
1162 coda_write(dev, 4/*FIXME: 0*/, CODA9_CMD_ENC_PIC_SRC_INDEX);
1163 coda_write(dev, q_data_src->width, CODA9_CMD_ENC_PIC_SRC_STRIDE);
1164 coda_write(dev, 0, CODA9_CMD_ENC_PIC_SUB_FRAME_SYNC);
1165
1166 coda_write(dev, picture_y, CODA9_CMD_ENC_PIC_SRC_ADDR_Y);
1167 coda_write(dev, picture_cb, CODA9_CMD_ENC_PIC_SRC_ADDR_CB);
1168 coda_write(dev, picture_cr, CODA9_CMD_ENC_PIC_SRC_ADDR_CR);
1169 } else {
1170 coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
1171 coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
1172 coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
1173 }
1174 coda_write(dev, force_ipicture << 1 & 0x2,
1175 CODA_CMD_ENC_PIC_OPTION);
1176
1177 coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
1178 coda_write(dev, pic_stream_buffer_size / 1024,
1179 CODA_CMD_ENC_PIC_BB_SIZE);
1180
1181 if (!ctx->streamon_out) {
1182 /* After streamoff on the output side, set the stream end flag */
1183 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1184 coda_write(dev, ctx->bit_stream_param, CODA_REG_BIT_BIT_STREAM_PARAM);
1185 }
1186
1187 return 0;
1188 }
1189
1190 static void coda_device_run(void *m2m_priv)
1191 {
1192 struct coda_ctx *ctx = m2m_priv;
1193 struct coda_dev *dev = ctx->dev;
1194
1195 queue_work(dev->workqueue, &ctx->pic_run_work);
1196 }
1197
1198 static void coda_free_framebuffers(struct coda_ctx *ctx);
1199 static void coda_free_context_buffers(struct coda_ctx *ctx);
1200
1201 static void coda_seq_end_work(struct work_struct *work)
1202 {
1203 struct coda_ctx *ctx = container_of(work, struct coda_ctx, seq_end_work);
1204 struct coda_dev *dev = ctx->dev;
1205
1206 mutex_lock(&ctx->buffer_mutex);
1207 mutex_lock(&dev->coda_mutex);
1208
1209 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1210 "%d: %s: sent command 'SEQ_END' to coda\n", ctx->idx, __func__);
1211 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1212 v4l2_err(&dev->v4l2_dev,
1213 "CODA_COMMAND_SEQ_END failed\n");
1214 }
1215
1216 kfifo_init(&ctx->bitstream_fifo,
1217 ctx->bitstream.vaddr, ctx->bitstream.size);
1218
1219 coda_free_framebuffers(ctx);
1220 coda_free_context_buffers(ctx);
1221
1222 mutex_unlock(&dev->coda_mutex);
1223 mutex_unlock(&ctx->buffer_mutex);
1224 }
1225
1226 static void coda_finish_decode(struct coda_ctx *ctx);
1227 static void coda_finish_encode(struct coda_ctx *ctx);
1228
1229 static void coda_pic_run_work(struct work_struct *work)
1230 {
1231 struct coda_ctx *ctx = container_of(work, struct coda_ctx, pic_run_work);
1232 struct coda_dev *dev = ctx->dev;
1233 int ret;
1234
1235 mutex_lock(&ctx->buffer_mutex);
1236 mutex_lock(&dev->coda_mutex);
1237
1238 ret = ctx->ops->prepare_run(ctx);
1239 if (ret < 0 && ctx->inst_type == CODA_INST_DECODER) {
1240 mutex_unlock(&dev->coda_mutex);
1241 mutex_unlock(&ctx->buffer_mutex);
1242 /* job_finish scheduled by prepare_decode */
1243 return;
1244 }
1245
1246 if (dev->devtype->product != CODA_DX6)
1247 coda_write(dev, ctx->iram_info.axi_sram_use,
1248 CODA7_REG_BIT_AXI_SRAM_USE);
1249
1250 if (ctx->inst_type == CODA_INST_DECODER)
1251 coda_kfifo_sync_to_device_full(ctx);
1252 coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1253
1254 if (!wait_for_completion_timeout(&ctx->completion, msecs_to_jiffies(1000))) {
1255 dev_err(&dev->plat_dev->dev, "CODA PIC_RUN timeout\n");
1256
1257 ctx->hold = true;
1258
1259 coda_hw_reset(ctx);
1260 } else if (!ctx->aborting) {
1261 ctx->ops->finish_run(ctx);
1262 }
1263
1264 if (ctx->aborting || (!ctx->streamon_cap && !ctx->streamon_out))
1265 queue_work(dev->workqueue, &ctx->seq_end_work);
1266
1267 mutex_unlock(&dev->coda_mutex);
1268 mutex_unlock(&ctx->buffer_mutex);
1269
1270 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1271 }
1272
1273 static int coda_job_ready(void *m2m_priv)
1274 {
1275 struct coda_ctx *ctx = m2m_priv;
1276
1277 /*
1278 * For both 'P' and 'key' frame cases 1 picture
1279 * and 1 frame are needed. In the decoder case,
1280 * the compressed frame can be in the bitstream.
1281 */
1282 if (!v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) &&
1283 ctx->inst_type != CODA_INST_DECODER) {
1284 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1285 "not ready: not enough video buffers.\n");
1286 return 0;
1287 }
1288
1289 if (!v4l2_m2m_num_dst_bufs_ready(ctx->fh.m2m_ctx)) {
1290 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1291 "not ready: not enough video capture buffers.\n");
1292 return 0;
1293 }
1294
1295 if (ctx->hold ||
1296 ((ctx->inst_type == CODA_INST_DECODER) &&
1297 (coda_get_bitstream_payload(ctx) < 512) &&
1298 !(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1299 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1300 "%d: not ready: not enough bitstream data.\n",
1301 ctx->idx);
1302 return 0;
1303 }
1304
1305 if (ctx->aborting) {
1306 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1307 "not ready: aborting\n");
1308 return 0;
1309 }
1310
1311 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1312 "job ready\n");
1313 return 1;
1314 }
1315
1316 static void coda_job_abort(void *priv)
1317 {
1318 struct coda_ctx *ctx = priv;
1319
1320 ctx->aborting = 1;
1321
1322 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1323 "Aborting task\n");
1324 }
1325
1326 static void coda_lock(void *m2m_priv)
1327 {
1328 struct coda_ctx *ctx = m2m_priv;
1329 struct coda_dev *pcdev = ctx->dev;
1330 mutex_lock(&pcdev->dev_mutex);
1331 }
1332
1333 static void coda_unlock(void *m2m_priv)
1334 {
1335 struct coda_ctx *ctx = m2m_priv;
1336 struct coda_dev *pcdev = ctx->dev;
1337 mutex_unlock(&pcdev->dev_mutex);
1338 }
1339
1340 static const struct v4l2_m2m_ops coda_m2m_ops = {
1341 .device_run = coda_device_run,
1342 .job_ready = coda_job_ready,
1343 .job_abort = coda_job_abort,
1344 .lock = coda_lock,
1345 .unlock = coda_unlock,
1346 };
1347
1348 static void coda_set_tiled_map_type(struct coda_ctx *ctx, int tiled_map_type)
1349 {
1350 struct gdi_tiled_map *tiled_map = &ctx->tiled_map;
1351 int luma_map, chro_map, i;
1352
1353 memset(tiled_map, 0, sizeof(*tiled_map));
1354
1355 luma_map = 64;
1356 chro_map = 64;
1357 tiled_map->map_type = tiled_map_type;
1358 for (i = 0; i < 16; i++)
1359 tiled_map->xy2ca_map[i] = luma_map << 8 | chro_map;
1360 for (i = 0; i < 4; i++)
1361 tiled_map->xy2ba_map[i] = luma_map << 8 | chro_map;
1362 for (i = 0; i < 16; i++)
1363 tiled_map->xy2ra_map[i] = luma_map << 8 | chro_map;
1364
1365 if (tiled_map_type == GDI_LINEAR_FRAME_MAP) {
1366 tiled_map->xy2rbc_config = 0;
1367 } else {
1368 dev_err(&ctx->dev->plat_dev->dev, "invalid map type: %d\n",
1369 tiled_map_type);
1370 return;
1371 }
1372 }
1373
1374 static void set_default_params(struct coda_ctx *ctx)
1375 {
1376 u32 src_fourcc, dst_fourcc;
1377 int max_w;
1378 int max_h;
1379
1380 if (ctx->inst_type == CODA_INST_ENCODER) {
1381 src_fourcc = V4L2_PIX_FMT_YUV420;
1382 dst_fourcc = V4L2_PIX_FMT_H264;
1383 } else {
1384 src_fourcc = V4L2_PIX_FMT_H264;
1385 dst_fourcc = V4L2_PIX_FMT_YUV420;
1386 }
1387 ctx->codec = coda_find_codec(ctx->dev, src_fourcc, dst_fourcc);
1388 max_w = ctx->codec->max_w;
1389 max_h = ctx->codec->max_h;
1390
1391 ctx->params.codec_mode = ctx->codec->mode;
1392 ctx->colorspace = V4L2_COLORSPACE_REC709;
1393 ctx->params.framerate = 30;
1394 ctx->aborting = 0;
1395
1396 /* Default formats for output and input queues */
1397 ctx->q_data[V4L2_M2M_SRC].fourcc = ctx->codec->src_fourcc;
1398 ctx->q_data[V4L2_M2M_DST].fourcc = ctx->codec->dst_fourcc;
1399 ctx->q_data[V4L2_M2M_SRC].width = max_w;
1400 ctx->q_data[V4L2_M2M_SRC].height = max_h;
1401 ctx->q_data[V4L2_M2M_DST].width = max_w;
1402 ctx->q_data[V4L2_M2M_DST].height = max_h;
1403 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_YUV420) {
1404 ctx->q_data[V4L2_M2M_SRC].bytesperline = max_w;
1405 ctx->q_data[V4L2_M2M_SRC].sizeimage = (max_w * max_h * 3) / 2;
1406 ctx->q_data[V4L2_M2M_DST].bytesperline = 0;
1407 ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
1408 } else {
1409 ctx->q_data[V4L2_M2M_SRC].bytesperline = 0;
1410 ctx->q_data[V4L2_M2M_SRC].sizeimage = CODA_MAX_FRAME_SIZE;
1411 ctx->q_data[V4L2_M2M_DST].bytesperline = max_w;
1412 ctx->q_data[V4L2_M2M_DST].sizeimage = (max_w * max_h * 3) / 2;
1413 }
1414 ctx->q_data[V4L2_M2M_SRC].rect.width = max_w;
1415 ctx->q_data[V4L2_M2M_SRC].rect.height = max_h;
1416 ctx->q_data[V4L2_M2M_DST].rect.width = max_w;
1417 ctx->q_data[V4L2_M2M_DST].rect.height = max_h;
1418
1419 if (ctx->dev->devtype->product == CODA_960)
1420 coda_set_tiled_map_type(ctx, GDI_LINEAR_FRAME_MAP);
1421 }
1422
1423 /*
1424 * Queue operations
1425 */
1426 static int coda_queue_setup(struct vb2_queue *vq,
1427 const struct v4l2_format *fmt,
1428 unsigned int *nbuffers, unsigned int *nplanes,
1429 unsigned int sizes[], void *alloc_ctxs[])
1430 {
1431 struct coda_ctx *ctx = vb2_get_drv_priv(vq);
1432 struct coda_q_data *q_data;
1433 unsigned int size;
1434
1435 q_data = get_q_data(ctx, vq->type);
1436 size = q_data->sizeimage;
1437
1438 *nplanes = 1;
1439 sizes[0] = size;
1440
1441 alloc_ctxs[0] = ctx->dev->alloc_ctx;
1442
1443 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1444 "get %d buffer(s) of size %d each.\n", *nbuffers, size);
1445
1446 return 0;
1447 }
1448
1449 static int coda_buf_prepare(struct vb2_buffer *vb)
1450 {
1451 struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
1452 struct coda_q_data *q_data;
1453
1454 q_data = get_q_data(ctx, vb->vb2_queue->type);
1455
1456 if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
1457 v4l2_warn(&ctx->dev->v4l2_dev,
1458 "%s data will not fit into plane (%lu < %lu)\n",
1459 __func__, vb2_plane_size(vb, 0),
1460 (long)q_data->sizeimage);
1461 return -EINVAL;
1462 }
1463
1464 return 0;
1465 }
1466
1467 static void coda_buf_queue(struct vb2_buffer *vb)
1468 {
1469 struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
1470 struct coda_dev *dev = ctx->dev;
1471 struct coda_q_data *q_data;
1472
1473 q_data = get_q_data(ctx, vb->vb2_queue->type);
1474
1475 /*
1476 * In the decoder case, immediately try to copy the buffer into the
1477 * bitstream ringbuffer and mark it as ready to be dequeued.
1478 */
1479 if (q_data->fourcc == V4L2_PIX_FMT_H264 &&
1480 vb->vb2_queue->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1481 /*
1482 * For backwards compatibility, queuing an empty buffer marks
1483 * the stream end
1484 */
1485 if (vb2_get_plane_payload(vb, 0) == 0) {
1486 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1487 if ((dev->devtype->product == CODA_960) &&
1488 coda_isbusy(dev) &&
1489 (ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX))) {
1490 /* if this decoder instance is running, set the stream end flag */
1491 coda_write(dev, ctx->bit_stream_param, CODA_REG_BIT_BIT_STREAM_PARAM);
1492 }
1493 }
1494 mutex_lock(&ctx->bitstream_mutex);
1495 v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vb);
1496 if (vb2_is_streaming(vb->vb2_queue))
1497 coda_fill_bitstream(ctx);
1498 mutex_unlock(&ctx->bitstream_mutex);
1499 } else {
1500 v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vb);
1501 }
1502 }
1503
1504 static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
1505 {
1506 struct coda_dev *dev = ctx->dev;
1507 u32 *p = ctx->parabuf.vaddr;
1508
1509 if (dev->devtype->product == CODA_DX6)
1510 p[index] = value;
1511 else
1512 p[index ^ 1] = value;
1513 }
1514
1515 static int coda_alloc_aux_buf(struct coda_dev *dev,
1516 struct coda_aux_buf *buf, size_t size,
1517 const char *name, struct dentry *parent)
1518 {
1519 buf->vaddr = dma_alloc_coherent(&dev->plat_dev->dev, size, &buf->paddr,
1520 GFP_KERNEL);
1521 if (!buf->vaddr)
1522 return -ENOMEM;
1523
1524 buf->size = size;
1525
1526 if (name && parent) {
1527 buf->blob.data = buf->vaddr;
1528 buf->blob.size = size;
1529 buf->dentry = debugfs_create_blob(name, 0644, parent, &buf->blob);
1530 if (!buf->dentry)
1531 dev_warn(&dev->plat_dev->dev,
1532 "failed to create debugfs entry %s\n", name);
1533 }
1534
1535 return 0;
1536 }
1537
1538 static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
1539 struct coda_aux_buf *buf, size_t size,
1540 const char *name)
1541 {
1542 return coda_alloc_aux_buf(ctx->dev, buf, size, name, ctx->debugfs_entry);
1543 }
1544
1545 static void coda_free_aux_buf(struct coda_dev *dev,
1546 struct coda_aux_buf *buf)
1547 {
1548 if (buf->vaddr) {
1549 dma_free_coherent(&dev->plat_dev->dev, buf->size,
1550 buf->vaddr, buf->paddr);
1551 buf->vaddr = NULL;
1552 buf->size = 0;
1553 }
1554 debugfs_remove(buf->dentry);
1555 }
1556
1557 static void coda_free_framebuffers(struct coda_ctx *ctx)
1558 {
1559 int i;
1560
1561 for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
1562 coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
1563 }
1564
1565 static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
1566 {
1567 struct coda_dev *dev = ctx->dev;
1568 int width, height;
1569 dma_addr_t paddr;
1570 int ysize;
1571 int ret;
1572 int i;
1573
1574 if (ctx->codec && (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 ||
1575 ctx->codec->dst_fourcc == V4L2_PIX_FMT_H264)) {
1576 width = round_up(q_data->width, 16);
1577 height = round_up(q_data->height, 16);
1578 } else {
1579 width = round_up(q_data->width, 8);
1580 height = q_data->height;
1581 }
1582 ysize = width * height;
1583
1584 /* Allocate frame buffers */
1585 for (i = 0; i < ctx->num_internal_frames; i++) {
1586 size_t size;
1587 char *name;
1588
1589 size = ysize + ysize / 2;
1590 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
1591 dev->devtype->product != CODA_DX6)
1592 size += ysize / 4;
1593 name = kasprintf(GFP_KERNEL, "fb%d", i);
1594 ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i],
1595 size, name);
1596 kfree(name);
1597 if (ret < 0) {
1598 coda_free_framebuffers(ctx);
1599 return ret;
1600 }
1601 }
1602
1603 /* Register frame buffers in the parameter buffer */
1604 for (i = 0; i < ctx->num_internal_frames; i++) {
1605 paddr = ctx->internal_frames[i].paddr;
1606 coda_parabuf_write(ctx, i * 3 + 0, paddr); /* Y */
1607 coda_parabuf_write(ctx, i * 3 + 1, paddr + ysize); /* Cb */
1608 coda_parabuf_write(ctx, i * 3 + 2, paddr + ysize + ysize/4); /* Cr */
1609
1610 /* mvcol buffer for h.264 */
1611 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
1612 dev->devtype->product != CODA_DX6)
1613 coda_parabuf_write(ctx, 96 + i,
1614 ctx->internal_frames[i].paddr +
1615 ysize + ysize/4 + ysize/4);
1616 }
1617
1618 /* mvcol buffer for mpeg4 */
1619 if ((dev->devtype->product != CODA_DX6) &&
1620 (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4))
1621 coda_parabuf_write(ctx, 97, ctx->internal_frames[i].paddr +
1622 ysize + ysize/4 + ysize/4);
1623
1624 return 0;
1625 }
1626
1627 static int coda_h264_padding(int size, char *p)
1628 {
1629 int nal_size;
1630 int diff;
1631
1632 diff = size - (size & ~0x7);
1633 if (diff == 0)
1634 return 0;
1635
1636 nal_size = coda_filler_size[diff];
1637 memcpy(p, coda_filler_nal, nal_size);
1638
1639 /* Add rbsp stop bit and trailing at the end */
1640 *(p + nal_size - 1) = 0x80;
1641
1642 return nal_size;
1643 }
1644
1645 static phys_addr_t coda_iram_alloc(struct coda_iram_info *iram, size_t size)
1646 {
1647 phys_addr_t ret;
1648
1649 size = round_up(size, 1024);
1650 if (size > iram->remaining)
1651 return 0;
1652 iram->remaining -= size;
1653
1654 ret = iram->next_paddr;
1655 iram->next_paddr += size;
1656
1657 return ret;
1658 }
1659
1660 static void coda_setup_iram(struct coda_ctx *ctx)
1661 {
1662 struct coda_iram_info *iram_info = &ctx->iram_info;
1663 struct coda_dev *dev = ctx->dev;
1664 int mb_width;
1665 int dbk_bits;
1666 int bit_bits;
1667 int ip_bits;
1668
1669 memset(iram_info, 0, sizeof(*iram_info));
1670 iram_info->next_paddr = dev->iram.paddr;
1671 iram_info->remaining = dev->iram.size;
1672
1673 switch (dev->devtype->product) {
1674 case CODA_7541:
1675 dbk_bits = CODA7_USE_HOST_DBK_ENABLE | CODA7_USE_DBK_ENABLE;
1676 bit_bits = CODA7_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
1677 ip_bits = CODA7_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
1678 break;
1679 case CODA_960:
1680 dbk_bits = CODA9_USE_HOST_DBK_ENABLE | CODA9_USE_DBK_ENABLE;
1681 bit_bits = CODA9_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
1682 ip_bits = CODA9_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
1683 break;
1684 default: /* CODA_DX6 */
1685 return;
1686 }
1687
1688 if (ctx->inst_type == CODA_INST_ENCODER) {
1689 struct coda_q_data *q_data_src;
1690
1691 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1692 mb_width = DIV_ROUND_UP(q_data_src->width, 16);
1693
1694 /* Prioritize in case IRAM is too small for everything */
1695 if (dev->devtype->product == CODA_7541) {
1696 iram_info->search_ram_size = round_up(mb_width * 16 *
1697 36 + 2048, 1024);
1698 iram_info->search_ram_paddr = coda_iram_alloc(iram_info,
1699 iram_info->search_ram_size);
1700 if (!iram_info->search_ram_paddr) {
1701 pr_err("IRAM is smaller than the search ram size\n");
1702 goto out;
1703 }
1704 iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE |
1705 CODA7_USE_ME_ENABLE;
1706 }
1707
1708 /* Only H.264BP and H.263P3 are considered */
1709 iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, 64 * mb_width);
1710 iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, 64 * mb_width);
1711 if (!iram_info->buf_dbk_c_use)
1712 goto out;
1713 iram_info->axi_sram_use |= dbk_bits;
1714
1715 iram_info->buf_bit_use = coda_iram_alloc(iram_info, 128 * mb_width);
1716 if (!iram_info->buf_bit_use)
1717 goto out;
1718 iram_info->axi_sram_use |= bit_bits;
1719
1720 iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, 128 * mb_width);
1721 if (!iram_info->buf_ip_ac_dc_use)
1722 goto out;
1723 iram_info->axi_sram_use |= ip_bits;
1724
1725 /* OVL and BTP disabled for encoder */
1726 } else if (ctx->inst_type == CODA_INST_DECODER) {
1727 struct coda_q_data *q_data_dst;
1728
1729 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1730 mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
1731
1732 iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, 128 * mb_width);
1733 iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, 128 * mb_width);
1734 if (!iram_info->buf_dbk_c_use)
1735 goto out;
1736 iram_info->axi_sram_use |= dbk_bits;
1737
1738 iram_info->buf_bit_use = coda_iram_alloc(iram_info, 128 * mb_width);
1739 if (!iram_info->buf_bit_use)
1740 goto out;
1741 iram_info->axi_sram_use |= bit_bits;
1742
1743 iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, 128 * mb_width);
1744 if (!iram_info->buf_ip_ac_dc_use)
1745 goto out;
1746 iram_info->axi_sram_use |= ip_bits;
1747
1748 /* OVL and BTP unused as there is no VC1 support yet */
1749 }
1750
1751 out:
1752 if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
1753 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1754 "IRAM smaller than needed\n");
1755
1756 if (dev->devtype->product == CODA_7541) {
1757 /* TODO - Enabling these causes picture errors on CODA7541 */
1758 if (ctx->inst_type == CODA_INST_DECODER) {
1759 /* fw 1.4.50 */
1760 iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
1761 CODA7_USE_IP_ENABLE);
1762 } else {
1763 /* fw 13.4.29 */
1764 iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
1765 CODA7_USE_HOST_DBK_ENABLE |
1766 CODA7_USE_IP_ENABLE |
1767 CODA7_USE_DBK_ENABLE);
1768 }
1769 }
1770 }
1771
1772 static void coda_free_context_buffers(struct coda_ctx *ctx)
1773 {
1774 struct coda_dev *dev = ctx->dev;
1775
1776 coda_free_aux_buf(dev, &ctx->slicebuf);
1777 coda_free_aux_buf(dev, &ctx->psbuf);
1778 if (dev->devtype->product != CODA_DX6)
1779 coda_free_aux_buf(dev, &ctx->workbuf);
1780 }
1781
1782 static int coda_alloc_context_buffers(struct coda_ctx *ctx,
1783 struct coda_q_data *q_data)
1784 {
1785 struct coda_dev *dev = ctx->dev;
1786 size_t size;
1787 int ret;
1788
1789 if (dev->devtype->product == CODA_DX6)
1790 return 0;
1791
1792 if (ctx->psbuf.vaddr) {
1793 v4l2_err(&dev->v4l2_dev, "psmembuf still allocated\n");
1794 return -EBUSY;
1795 }
1796 if (ctx->slicebuf.vaddr) {
1797 v4l2_err(&dev->v4l2_dev, "slicebuf still allocated\n");
1798 return -EBUSY;
1799 }
1800 if (ctx->workbuf.vaddr) {
1801 v4l2_err(&dev->v4l2_dev, "context buffer still allocated\n");
1802 ret = -EBUSY;
1803 return -ENOMEM;
1804 }
1805
1806 if (q_data->fourcc == V4L2_PIX_FMT_H264) {
1807 /* worst case slice size */
1808 size = (DIV_ROUND_UP(q_data->width, 16) *
1809 DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512;
1810 ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size, "slicebuf");
1811 if (ret < 0) {
1812 v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte slice buffer",
1813 ctx->slicebuf.size);
1814 return ret;
1815 }
1816 }
1817
1818 if (dev->devtype->product == CODA_7541) {
1819 ret = coda_alloc_context_buf(ctx, &ctx->psbuf, CODA7_PS_BUF_SIZE, "psbuf");
1820 if (ret < 0) {
1821 v4l2_err(&dev->v4l2_dev, "failed to allocate psmem buffer");
1822 goto err;
1823 }
1824 }
1825
1826 size = dev->devtype->workbuf_size;
1827 if (dev->devtype->product == CODA_960 &&
1828 q_data->fourcc == V4L2_PIX_FMT_H264)
1829 size += CODA9_PS_SAVE_SIZE;
1830 ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size, "workbuf");
1831 if (ret < 0) {
1832 v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte context buffer",
1833 ctx->workbuf.size);
1834 goto err;
1835 }
1836
1837 return 0;
1838
1839 err:
1840 coda_free_context_buffers(ctx);
1841 return ret;
1842 }
1843
1844 static int __coda_start_decoding(struct coda_ctx *ctx)
1845 {
1846 struct coda_q_data *q_data_src, *q_data_dst;
1847 u32 bitstream_buf, bitstream_size;
1848 struct coda_dev *dev = ctx->dev;
1849 int width, height;
1850 u32 src_fourcc;
1851 u32 val;
1852 int ret;
1853
1854 /* Start decoding */
1855 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1856 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1857 bitstream_buf = ctx->bitstream.paddr;
1858 bitstream_size = ctx->bitstream.size;
1859 src_fourcc = q_data_src->fourcc;
1860
1861 coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1862
1863 /* Update coda bitstream read and write pointers from kfifo */
1864 coda_kfifo_sync_to_device_full(ctx);
1865
1866 ctx->display_idx = -1;
1867 ctx->frm_dis_flg = 0;
1868 coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1869
1870 coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE,
1871 CODA_REG_BIT_BIT_STREAM_PARAM);
1872
1873 coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
1874 coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
1875 val = 0;
1876 if ((dev->devtype->product == CODA_7541) ||
1877 (dev->devtype->product == CODA_960))
1878 val |= CODA_REORDER_ENABLE;
1879 coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
1880
1881 ctx->params.codec_mode = ctx->codec->mode;
1882 if (dev->devtype->product == CODA_960 &&
1883 src_fourcc == V4L2_PIX_FMT_MPEG4)
1884 ctx->params.codec_mode_aux = CODA_MP4_AUX_MPEG4;
1885 else
1886 ctx->params.codec_mode_aux = 0;
1887 if (src_fourcc == V4L2_PIX_FMT_H264) {
1888 if (dev->devtype->product == CODA_7541) {
1889 coda_write(dev, ctx->psbuf.paddr,
1890 CODA_CMD_DEC_SEQ_PS_BB_START);
1891 coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
1892 CODA_CMD_DEC_SEQ_PS_BB_SIZE);
1893 }
1894 if (dev->devtype->product == CODA_960) {
1895 coda_write(dev, 0, CODA_CMD_DEC_SEQ_X264_MV_EN);
1896 coda_write(dev, 512, CODA_CMD_DEC_SEQ_SPP_CHUNK_SIZE);
1897 }
1898 }
1899 if (dev->devtype->product != CODA_960) {
1900 coda_write(dev, 0, CODA_CMD_DEC_SEQ_SRC_SIZE);
1901 }
1902
1903 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1904 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1905 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1906 return -ETIMEDOUT;
1907 }
1908
1909 /* Update kfifo out pointer from coda bitstream read pointer */
1910 coda_kfifo_sync_from_device(ctx);
1911
1912 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1913
1914 if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
1915 v4l2_err(&dev->v4l2_dev,
1916 "CODA_COMMAND_SEQ_INIT failed, error code = %d\n",
1917 coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
1918 return -EAGAIN;
1919 }
1920
1921 val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
1922 if (dev->devtype->product == CODA_DX6) {
1923 width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
1924 height = val & CODADX6_PICHEIGHT_MASK;
1925 } else {
1926 width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
1927 height = val & CODA7_PICHEIGHT_MASK;
1928 }
1929
1930 if (width > q_data_dst->width || height > q_data_dst->height) {
1931 v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
1932 width, height, q_data_dst->width, q_data_dst->height);
1933 return -EINVAL;
1934 }
1935
1936 width = round_up(width, 16);
1937 height = round_up(height, 16);
1938
1939 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n",
1940 __func__, ctx->idx, width, height);
1941
1942 ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED);
1943 if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
1944 v4l2_err(&dev->v4l2_dev,
1945 "not enough framebuffers to decode (%d < %d)\n",
1946 CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
1947 return -EINVAL;
1948 }
1949
1950 if (src_fourcc == V4L2_PIX_FMT_H264) {
1951 u32 left_right;
1952 u32 top_bottom;
1953
1954 left_right = coda_read(dev, CODA_RET_DEC_SEQ_CROP_LEFT_RIGHT);
1955 top_bottom = coda_read(dev, CODA_RET_DEC_SEQ_CROP_TOP_BOTTOM);
1956
1957 q_data_dst->rect.left = (left_right >> 10) & 0x3ff;
1958 q_data_dst->rect.top = (top_bottom >> 10) & 0x3ff;
1959 q_data_dst->rect.width = width - q_data_dst->rect.left -
1960 (left_right & 0x3ff);
1961 q_data_dst->rect.height = height - q_data_dst->rect.top -
1962 (top_bottom & 0x3ff);
1963 }
1964
1965 ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
1966 if (ret < 0)
1967 return ret;
1968
1969 /* Tell the decoder how many frame buffers we allocated. */
1970 coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1971 coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE);
1972
1973 if (dev->devtype->product != CODA_DX6) {
1974 /* Set secondary AXI IRAM */
1975 coda_setup_iram(ctx);
1976
1977 coda_write(dev, ctx->iram_info.buf_bit_use,
1978 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1979 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1980 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1981 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1982 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1983 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1984 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1985 coda_write(dev, ctx->iram_info.buf_ovl_use,
1986 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1987 if (dev->devtype->product == CODA_960)
1988 coda_write(dev, ctx->iram_info.buf_btp_use,
1989 CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
1990 }
1991
1992 if (dev->devtype->product == CODA_960) {
1993 coda_write(dev, -1, CODA9_CMD_SET_FRAME_DELAY);
1994
1995 coda_write(dev, 0x20262024, CODA9_CMD_SET_FRAME_CACHE_SIZE);
1996 coda_write(dev, 2 << CODA9_CACHE_PAGEMERGE_OFFSET |
1997 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET |
1998 8 << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET |
1999 8 << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET,
2000 CODA9_CMD_SET_FRAME_CACHE_CONFIG);
2001 }
2002
2003 if (src_fourcc == V4L2_PIX_FMT_H264) {
2004 coda_write(dev, ctx->slicebuf.paddr,
2005 CODA_CMD_SET_FRAME_SLICE_BB_START);
2006 coda_write(dev, ctx->slicebuf.size / 1024,
2007 CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
2008 }
2009
2010 if (dev->devtype->product == CODA_7541) {
2011 int max_mb_x = 1920 / 16;
2012 int max_mb_y = 1088 / 16;
2013 int max_mb_num = max_mb_x * max_mb_y;
2014
2015 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
2016 CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
2017 } else if (dev->devtype->product == CODA_960) {
2018 int max_mb_x = 1920 / 16;
2019 int max_mb_y = 1088 / 16;
2020 int max_mb_num = max_mb_x * max_mb_y;
2021
2022 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
2023 CODA9_CMD_SET_FRAME_MAX_DEC_SIZE);
2024 }
2025
2026 if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
2027 v4l2_err(&ctx->dev->v4l2_dev,
2028 "CODA_COMMAND_SET_FRAME_BUF timeout\n");
2029 return -ETIMEDOUT;
2030 }
2031
2032 return 0;
2033 }
2034
2035 static int coda_start_decoding(struct coda_ctx *ctx)
2036 {
2037 struct coda_dev *dev = ctx->dev;
2038 int ret;
2039
2040 mutex_lock(&dev->coda_mutex);
2041 ret = __coda_start_decoding(ctx);
2042 mutex_unlock(&dev->coda_mutex);
2043
2044 return ret;
2045 }
2046
2047 static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf,
2048 int header_code, u8 *header, int *size)
2049 {
2050 struct coda_dev *dev = ctx->dev;
2051 size_t bufsize;
2052 int ret;
2053 int i;
2054
2055 if (dev->devtype->product == CODA_960)
2056 memset(vb2_plane_vaddr(buf, 0), 0, 64);
2057
2058 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0),
2059 CODA_CMD_ENC_HEADER_BB_START);
2060 bufsize = vb2_plane_size(buf, 0);
2061 if (dev->devtype->product == CODA_960)
2062 bufsize /= 1024;
2063 coda_write(dev, bufsize, CODA_CMD_ENC_HEADER_BB_SIZE);
2064 coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
2065 ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
2066 if (ret < 0) {
2067 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
2068 return ret;
2069 }
2070
2071 if (dev->devtype->product == CODA_960) {
2072 for (i = 63; i > 0; i--)
2073 if (((char *)vb2_plane_vaddr(buf, 0))[i] != 0)
2074 break;
2075 *size = i + 1;
2076 } else {
2077 *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
2078 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
2079 }
2080 memcpy(header, vb2_plane_vaddr(buf, 0), *size);
2081
2082 return 0;
2083 }
2084
2085 static int coda_start_encoding(struct coda_ctx *ctx);
2086
2087 static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
2088 {
2089 struct coda_ctx *ctx = vb2_get_drv_priv(q);
2090 struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
2091 struct coda_q_data *q_data_src, *q_data_dst;
2092 u32 dst_fourcc;
2093 int ret = 0;
2094
2095 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2096 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
2097 if (q_data_src->fourcc == V4L2_PIX_FMT_H264) {
2098 /* copy the buffers that where queued before streamon */
2099 mutex_lock(&ctx->bitstream_mutex);
2100 coda_fill_bitstream(ctx);
2101 mutex_unlock(&ctx->bitstream_mutex);
2102
2103 if (coda_get_bitstream_payload(ctx) < 512)
2104 return -EINVAL;
2105 } else {
2106 if (count < 1)
2107 return -EINVAL;
2108 }
2109
2110 ctx->streamon_out = 1;
2111 } else {
2112 if (count < 1)
2113 return -EINVAL;
2114
2115 ctx->streamon_cap = 1;
2116 }
2117
2118 /* Don't start the coda unless both queues are on */
2119 if (!(ctx->streamon_out & ctx->streamon_cap))
2120 return 0;
2121
2122 /* Allow decoder device_run with no new buffers queued */
2123 if (ctx->inst_type == CODA_INST_DECODER)
2124 v4l2_m2m_set_src_buffered(ctx->fh.m2m_ctx, true);
2125
2126 ctx->gopcounter = ctx->params.gop_size - 1;
2127 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2128 dst_fourcc = q_data_dst->fourcc;
2129
2130 ctx->codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
2131 q_data_dst->fourcc);
2132 if (!ctx->codec) {
2133 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
2134 return -EINVAL;
2135 }
2136
2137 /* Allocate per-instance buffers */
2138 ret = coda_alloc_context_buffers(ctx, q_data_src);
2139 if (ret < 0)
2140 return ret;
2141
2142 ret = ctx->ops->start_streaming(ctx);
2143 if (ctx->inst_type == CODA_INST_DECODER) {
2144 if (ret == -EAGAIN)
2145 return 0;
2146 else if (ret < 0)
2147 return ret;
2148 }
2149
2150 ctx->initialized = 1;
2151 return ret;
2152 }
2153
2154 static int coda_start_encoding(struct coda_ctx *ctx)
2155 {
2156 struct coda_dev *dev = ctx->dev;
2157 struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
2158 struct coda_q_data *q_data_src, *q_data_dst;
2159 u32 bitstream_buf, bitstream_size;
2160 struct vb2_buffer *buf;
2161 int gamma, ret, value;
2162 u32 dst_fourcc;
2163
2164 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2165 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2166 dst_fourcc = q_data_dst->fourcc;
2167
2168 buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
2169 bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
2170 bitstream_size = q_data_dst->sizeimage;
2171
2172 if (!coda_is_initialized(dev)) {
2173 v4l2_err(v4l2_dev, "coda is not initialized.\n");
2174 return -EFAULT;
2175 }
2176
2177 mutex_lock(&dev->coda_mutex);
2178
2179 coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
2180 coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
2181 coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
2182 switch (dev->devtype->product) {
2183 case CODA_DX6:
2184 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
2185 CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
2186 break;
2187 case CODA_960:
2188 coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
2189 /* fallthrough */
2190 case CODA_7541:
2191 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
2192 CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
2193 break;
2194 }
2195
2196 value = coda_read(dev, CODA_REG_BIT_FRAME_MEM_CTRL);
2197 value &= ~(1 << 2 | 0x7 << 9);
2198 ctx->frame_mem_ctrl = value;
2199 coda_write(dev, value, CODA_REG_BIT_FRAME_MEM_CTRL);
2200
2201 if (dev->devtype->product == CODA_DX6) {
2202 /* Configure the coda */
2203 coda_write(dev, dev->iram.paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
2204 }
2205
2206 /* Could set rotation here if needed */
2207 switch (dev->devtype->product) {
2208 case CODA_DX6:
2209 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
2210 value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
2211 break;
2212 case CODA_7541:
2213 if (dst_fourcc == V4L2_PIX_FMT_H264) {
2214 value = (round_up(q_data_src->width, 16) &
2215 CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
2216 value |= (round_up(q_data_src->height, 16) &
2217 CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
2218 break;
2219 }
2220 /* fallthrough */
2221 case CODA_960:
2222 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
2223 value |= (q_data_src->height & CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
2224 }
2225 coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
2226 coda_write(dev, ctx->params.framerate,
2227 CODA_CMD_ENC_SEQ_SRC_F_RATE);
2228
2229 ctx->params.codec_mode = ctx->codec->mode;
2230 switch (dst_fourcc) {
2231 case V4L2_PIX_FMT_MPEG4:
2232 if (dev->devtype->product == CODA_960)
2233 coda_write(dev, CODA9_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
2234 else
2235 coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
2236 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
2237 break;
2238 case V4L2_PIX_FMT_H264:
2239 if (dev->devtype->product == CODA_960)
2240 coda_write(dev, CODA9_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
2241 else
2242 coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
2243 if (ctx->params.h264_deblk_enabled) {
2244 value = ((ctx->params.h264_deblk_alpha &
2245 CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK) <<
2246 CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) |
2247 ((ctx->params.h264_deblk_beta &
2248 CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) <<
2249 CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET);
2250 } else {
2251 value = 1 << CODA_264PARAM_DISABLEDEBLK_OFFSET;
2252 }
2253 coda_write(dev, value, CODA_CMD_ENC_SEQ_264_PARA);
2254 break;
2255 default:
2256 v4l2_err(v4l2_dev,
2257 "dst format (0x%08x) invalid.\n", dst_fourcc);
2258 ret = -EINVAL;
2259 goto out;
2260 }
2261
2262 switch (ctx->params.slice_mode) {
2263 case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
2264 value = 0;
2265 break;
2266 case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
2267 value = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
2268 value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
2269 value |= 1 & CODA_SLICING_MODE_MASK;
2270 break;
2271 case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
2272 value = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
2273 value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
2274 value |= 1 & CODA_SLICING_MODE_MASK;
2275 break;
2276 }
2277 coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
2278 value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
2279 coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
2280
2281 if (ctx->params.bitrate) {
2282 /* Rate control enabled */
2283 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
2284 value |= 1 & CODA_RATECONTROL_ENABLE_MASK;
2285 if (dev->devtype->product == CODA_960)
2286 value |= BIT(31); /* disable autoskip */
2287 } else {
2288 value = 0;
2289 }
2290 coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
2291
2292 coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
2293 coda_write(dev, ctx->params.intra_refresh,
2294 CODA_CMD_ENC_SEQ_INTRA_REFRESH);
2295
2296 coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
2297 coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
2298
2299
2300 value = 0;
2301 if (dev->devtype->product == CODA_960)
2302 gamma = CODA9_DEFAULT_GAMMA;
2303 else
2304 gamma = CODA_DEFAULT_GAMMA;
2305 if (gamma > 0) {
2306 coda_write(dev, (gamma & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET,
2307 CODA_CMD_ENC_SEQ_RC_GAMMA);
2308 }
2309
2310 if (ctx->params.h264_min_qp || ctx->params.h264_max_qp) {
2311 coda_write(dev,
2312 ctx->params.h264_min_qp << CODA_QPMIN_OFFSET |
2313 ctx->params.h264_max_qp << CODA_QPMAX_OFFSET,
2314 CODA_CMD_ENC_SEQ_RC_QP_MIN_MAX);
2315 }
2316 if (dev->devtype->product == CODA_960) {
2317 if (ctx->params.h264_max_qp)
2318 value |= 1 << CODA9_OPTION_RCQPMAX_OFFSET;
2319 if (CODA_DEFAULT_GAMMA > 0)
2320 value |= 1 << CODA9_OPTION_GAMMA_OFFSET;
2321 } else {
2322 if (CODA_DEFAULT_GAMMA > 0) {
2323 if (dev->devtype->product == CODA_DX6)
2324 value |= 1 << CODADX6_OPTION_GAMMA_OFFSET;
2325 else
2326 value |= 1 << CODA7_OPTION_GAMMA_OFFSET;
2327 }
2328 if (ctx->params.h264_min_qp)
2329 value |= 1 << CODA7_OPTION_RCQPMIN_OFFSET;
2330 if (ctx->params.h264_max_qp)
2331 value |= 1 << CODA7_OPTION_RCQPMAX_OFFSET;
2332 }
2333 coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
2334
2335 coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_INTERVAL_MODE);
2336
2337 coda_setup_iram(ctx);
2338
2339 if (dst_fourcc == V4L2_PIX_FMT_H264) {
2340 switch (dev->devtype->product) {
2341 case CODA_DX6:
2342 value = FMO_SLICE_SAVE_BUF_SIZE << 7;
2343 coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
2344 break;
2345 case CODA_7541:
2346 coda_write(dev, ctx->iram_info.search_ram_paddr,
2347 CODA7_CMD_ENC_SEQ_SEARCH_BASE);
2348 coda_write(dev, ctx->iram_info.search_ram_size,
2349 CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
2350 break;
2351 case CODA_960:
2352 coda_write(dev, 0, CODA9_CMD_ENC_SEQ_ME_OPTION);
2353 coda_write(dev, 0, CODA9_CMD_ENC_SEQ_INTRA_WEIGHT);
2354 }
2355 }
2356
2357 ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
2358 if (ret < 0) {
2359 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
2360 goto out;
2361 }
2362
2363 if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
2364 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
2365 ret = -EFAULT;
2366 goto out;
2367 }
2368
2369 if (dev->devtype->product == CODA_960)
2370 ctx->num_internal_frames = 4;
2371 else
2372 ctx->num_internal_frames = 2;
2373 ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
2374 if (ret < 0) {
2375 v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
2376 goto out;
2377 }
2378
2379 coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
2380 coda_write(dev, q_data_src->bytesperline,
2381 CODA_CMD_SET_FRAME_BUF_STRIDE);
2382 if (dev->devtype->product == CODA_7541) {
2383 coda_write(dev, q_data_src->bytesperline,
2384 CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
2385 }
2386 if (dev->devtype->product != CODA_DX6) {
2387 coda_write(dev, ctx->iram_info.buf_bit_use,
2388 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
2389 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
2390 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
2391 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
2392 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
2393 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
2394 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
2395 coda_write(dev, ctx->iram_info.buf_ovl_use,
2396 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
2397 if (dev->devtype->product == CODA_960) {
2398 coda_write(dev, ctx->iram_info.buf_btp_use,
2399 CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
2400
2401 /* FIXME */
2402 coda_write(dev, ctx->internal_frames[2].paddr, CODA9_CMD_SET_FRAME_SUBSAMP_A);
2403 coda_write(dev, ctx->internal_frames[3].paddr, CODA9_CMD_SET_FRAME_SUBSAMP_B);
2404 }
2405 }
2406
2407 ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
2408 if (ret < 0) {
2409 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
2410 goto out;
2411 }
2412
2413 /* Save stream headers */
2414 buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
2415 switch (dst_fourcc) {
2416 case V4L2_PIX_FMT_H264:
2417 /*
2418 * Get SPS in the first frame and copy it to an
2419 * intermediate buffer.
2420 */
2421 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
2422 &ctx->vpu_header[0][0],
2423 &ctx->vpu_header_size[0]);
2424 if (ret < 0)
2425 goto out;
2426
2427 /*
2428 * Get PPS in the first frame and copy it to an
2429 * intermediate buffer.
2430 */
2431 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
2432 &ctx->vpu_header[1][0],
2433 &ctx->vpu_header_size[1]);
2434 if (ret < 0)
2435 goto out;
2436
2437 /*
2438 * Length of H.264 headers is variable and thus it might not be
2439 * aligned for the coda to append the encoded frame. In that is
2440 * the case a filler NAL must be added to header 2.
2441 */
2442 ctx->vpu_header_size[2] = coda_h264_padding(
2443 (ctx->vpu_header_size[0] +
2444 ctx->vpu_header_size[1]),
2445 ctx->vpu_header[2]);
2446 break;
2447 case V4L2_PIX_FMT_MPEG4:
2448 /*
2449 * Get VOS in the first frame and copy it to an
2450 * intermediate buffer
2451 */
2452 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
2453 &ctx->vpu_header[0][0],
2454 &ctx->vpu_header_size[0]);
2455 if (ret < 0)
2456 goto out;
2457
2458 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
2459 &ctx->vpu_header[1][0],
2460 &ctx->vpu_header_size[1]);
2461 if (ret < 0)
2462 goto out;
2463
2464 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
2465 &ctx->vpu_header[2][0],
2466 &ctx->vpu_header_size[2]);
2467 if (ret < 0)
2468 goto out;
2469 break;
2470 default:
2471 /* No more formats need to save headers at the moment */
2472 break;
2473 }
2474
2475 out:
2476 mutex_unlock(&dev->coda_mutex);
2477 return ret;
2478 }
2479
2480 static void coda_stop_streaming(struct vb2_queue *q)
2481 {
2482 struct coda_ctx *ctx = vb2_get_drv_priv(q);
2483 struct coda_dev *dev = ctx->dev;
2484
2485 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
2486 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2487 "%s: output\n", __func__);
2488 ctx->streamon_out = 0;
2489
2490 if (ctx->inst_type == CODA_INST_DECODER &&
2491 coda_isbusy(dev) && ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX)) {
2492 /* if this decoder instance is running, set the stream end flag */
2493 if (dev->devtype->product == CODA_960) {
2494 u32 val = coda_read(dev, CODA_REG_BIT_BIT_STREAM_PARAM);
2495
2496 val |= CODA_BIT_STREAM_END_FLAG;
2497 coda_write(dev, val, CODA_REG_BIT_BIT_STREAM_PARAM);
2498 ctx->bit_stream_param = val;
2499 }
2500 }
2501 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
2502
2503 ctx->isequence = 0;
2504 } else {
2505 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2506 "%s: capture\n", __func__);
2507 ctx->streamon_cap = 0;
2508
2509 ctx->osequence = 0;
2510 ctx->sequence_offset = 0;
2511 }
2512
2513 if (!ctx->streamon_out && !ctx->streamon_cap) {
2514 struct coda_timestamp *ts;
2515
2516 while (!list_empty(&ctx->timestamp_list)) {
2517 ts = list_first_entry(&ctx->timestamp_list,
2518 struct coda_timestamp, list);
2519 list_del(&ts->list);
2520 kfree(ts);
2521 }
2522 kfifo_init(&ctx->bitstream_fifo,
2523 ctx->bitstream.vaddr, ctx->bitstream.size);
2524 ctx->runcounter = 0;
2525 }
2526 }
2527
2528 static const struct vb2_ops coda_qops = {
2529 .queue_setup = coda_queue_setup,
2530 .buf_prepare = coda_buf_prepare,
2531 .buf_queue = coda_buf_queue,
2532 .start_streaming = coda_start_streaming,
2533 .stop_streaming = coda_stop_streaming,
2534 .wait_prepare = vb2_ops_wait_prepare,
2535 .wait_finish = vb2_ops_wait_finish,
2536 };
2537
2538 static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
2539 {
2540 struct coda_ctx *ctx =
2541 container_of(ctrl->handler, struct coda_ctx, ctrls);
2542
2543 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2544 "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
2545
2546 switch (ctrl->id) {
2547 case V4L2_CID_HFLIP:
2548 if (ctrl->val)
2549 ctx->params.rot_mode |= CODA_MIR_HOR;
2550 else
2551 ctx->params.rot_mode &= ~CODA_MIR_HOR;
2552 break;
2553 case V4L2_CID_VFLIP:
2554 if (ctrl->val)
2555 ctx->params.rot_mode |= CODA_MIR_VER;
2556 else
2557 ctx->params.rot_mode &= ~CODA_MIR_VER;
2558 break;
2559 case V4L2_CID_MPEG_VIDEO_BITRATE:
2560 ctx->params.bitrate = ctrl->val / 1000;
2561 break;
2562 case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
2563 ctx->params.gop_size = ctrl->val;
2564 break;
2565 case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
2566 ctx->params.h264_intra_qp = ctrl->val;
2567 break;
2568 case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
2569 ctx->params.h264_inter_qp = ctrl->val;
2570 break;
2571 case V4L2_CID_MPEG_VIDEO_H264_MIN_QP:
2572 ctx->params.h264_min_qp = ctrl->val;
2573 break;
2574 case V4L2_CID_MPEG_VIDEO_H264_MAX_QP:
2575 ctx->params.h264_max_qp = ctrl->val;
2576 break;
2577 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA:
2578 ctx->params.h264_deblk_alpha = ctrl->val;
2579 break;
2580 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA:
2581 ctx->params.h264_deblk_beta = ctrl->val;
2582 break;
2583 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE:
2584 ctx->params.h264_deblk_enabled = (ctrl->val ==
2585 V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED);
2586 break;
2587 case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
2588 ctx->params.mpeg4_intra_qp = ctrl->val;
2589 break;
2590 case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
2591 ctx->params.mpeg4_inter_qp = ctrl->val;
2592 break;
2593 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
2594 ctx->params.slice_mode = ctrl->val;
2595 break;
2596 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
2597 ctx->params.slice_max_mb = ctrl->val;
2598 break;
2599 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
2600 ctx->params.slice_max_bits = ctrl->val * 8;
2601 break;
2602 case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
2603 break;
2604 case V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB:
2605 ctx->params.intra_refresh = ctrl->val;
2606 break;
2607 default:
2608 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2609 "Invalid control, id=%d, val=%d\n",
2610 ctrl->id, ctrl->val);
2611 return -EINVAL;
2612 }
2613
2614 return 0;
2615 }
2616
2617 static const struct v4l2_ctrl_ops coda_ctrl_ops = {
2618 .s_ctrl = coda_s_ctrl,
2619 };
2620
2621 static int coda_ctrls_setup(struct coda_ctx *ctx)
2622 {
2623 v4l2_ctrl_handler_init(&ctx->ctrls, 9);
2624
2625 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2626 V4L2_CID_HFLIP, 0, 1, 1, 0);
2627 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2628 V4L2_CID_VFLIP, 0, 1, 1, 0);
2629 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2630 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
2631 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2632 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
2633 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2634 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 0, 51, 1, 25);
2635 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2636 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 0, 51, 1, 25);
2637 if (ctx->dev->devtype->product != CODA_960) {
2638 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2639 V4L2_CID_MPEG_VIDEO_H264_MIN_QP, 0, 51, 1, 12);
2640 }
2641 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2642 V4L2_CID_MPEG_VIDEO_H264_MAX_QP, 0, 51, 1, 51);
2643 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2644 V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA, 0, 15, 1, 0);
2645 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2646 V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA, 0, 15, 1, 0);
2647 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2648 V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE,
2649 V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED, 0x0,
2650 V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED);
2651 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2652 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
2653 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2654 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
2655 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2656 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
2657 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0,
2658 V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE);
2659 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2660 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
2661 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2662 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1, 500);
2663 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2664 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
2665 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
2666 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
2667 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
2668 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2669 V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB, 0, 1920 * 1088 / 256, 1, 0);
2670
2671 if (ctx->ctrls.error) {
2672 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
2673 ctx->ctrls.error);
2674 return -EINVAL;
2675 }
2676
2677 return v4l2_ctrl_handler_setup(&ctx->ctrls);
2678 }
2679
2680 static int coda_queue_init(struct coda_ctx *ctx, struct vb2_queue *vq)
2681 {
2682 vq->drv_priv = ctx;
2683 vq->ops = &coda_qops;
2684 vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
2685 vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
2686 vq->lock = &ctx->dev->dev_mutex;
2687
2688 return vb2_queue_init(vq);
2689 }
2690
2691 static int coda_encoder_queue_init(void *priv, struct vb2_queue *src_vq,
2692 struct vb2_queue *dst_vq)
2693 {
2694 int ret;
2695
2696 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
2697 src_vq->io_modes = VB2_DMABUF | VB2_MMAP;
2698 src_vq->mem_ops = &vb2_dma_contig_memops;
2699
2700 ret = coda_queue_init(priv, src_vq);
2701 if (ret)
2702 return ret;
2703
2704 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2705 dst_vq->io_modes = VB2_DMABUF | VB2_MMAP;
2706 dst_vq->mem_ops = &vb2_dma_contig_memops;
2707
2708 return coda_queue_init(priv, dst_vq);
2709 }
2710
2711 static int coda_decoder_queue_init(void *priv, struct vb2_queue *src_vq,
2712 struct vb2_queue *dst_vq)
2713 {
2714 int ret;
2715
2716 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
2717 src_vq->io_modes = VB2_DMABUF | VB2_MMAP;
2718 src_vq->mem_ops = &vb2_dma_contig_memops;
2719
2720 ret = coda_queue_init(priv, src_vq);
2721 if (ret)
2722 return ret;
2723
2724 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2725 dst_vq->io_modes = VB2_DMABUF | VB2_MMAP;
2726 dst_vq->mem_ops = &vb2_dma_contig_memops;
2727
2728 return coda_queue_init(priv, dst_vq);
2729 }
2730
2731 static int coda_next_free_instance(struct coda_dev *dev)
2732 {
2733 int idx = ffz(dev->instance_mask);
2734
2735 if ((idx < 0) ||
2736 (dev->devtype->product == CODA_DX6 && idx > CODADX6_MAX_INSTANCES))
2737 return -EBUSY;
2738
2739 return idx;
2740 }
2741
2742 static int coda_open(struct file *file, enum coda_inst_type inst_type,
2743 const struct coda_context_ops *ctx_ops)
2744 {
2745 struct coda_dev *dev = video_drvdata(file);
2746 struct coda_ctx *ctx = NULL;
2747 char *name;
2748 int ret;
2749 int idx;
2750
2751 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
2752 if (!ctx)
2753 return -ENOMEM;
2754
2755 idx = coda_next_free_instance(dev);
2756 if (idx < 0) {
2757 ret = idx;
2758 goto err_coda_max;
2759 }
2760 set_bit(idx, &dev->instance_mask);
2761
2762 name = kasprintf(GFP_KERNEL, "context%d", idx);
2763 ctx->debugfs_entry = debugfs_create_dir(name, dev->debugfs_root);
2764 kfree(name);
2765
2766 ctx->inst_type = inst_type;
2767 ctx->ops = ctx_ops;
2768 init_completion(&ctx->completion);
2769 INIT_WORK(&ctx->pic_run_work, coda_pic_run_work);
2770 INIT_WORK(&ctx->seq_end_work, ctx->ops->seq_end_work);
2771 v4l2_fh_init(&ctx->fh, video_devdata(file));
2772 file->private_data = &ctx->fh;
2773 v4l2_fh_add(&ctx->fh);
2774 ctx->dev = dev;
2775 ctx->idx = idx;
2776 switch (dev->devtype->product) {
2777 case CODA_7541:
2778 case CODA_960:
2779 ctx->reg_idx = 0;
2780 break;
2781 default:
2782 ctx->reg_idx = idx;
2783 }
2784
2785 /* Power up and upload firmware if necessary */
2786 ret = pm_runtime_get_sync(&dev->plat_dev->dev);
2787 if (ret < 0) {
2788 v4l2_err(&dev->v4l2_dev, "failed to power up: %d\n", ret);
2789 goto err_pm_get;
2790 }
2791
2792 ret = clk_prepare_enable(dev->clk_per);
2793 if (ret)
2794 goto err_clk_per;
2795
2796 ret = clk_prepare_enable(dev->clk_ahb);
2797 if (ret)
2798 goto err_clk_ahb;
2799
2800 set_default_params(ctx);
2801 ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
2802 ctx->ops->queue_init);
2803 if (IS_ERR(ctx->fh.m2m_ctx)) {
2804 ret = PTR_ERR(ctx->fh.m2m_ctx);
2805
2806 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
2807 __func__, ret);
2808 goto err_ctx_init;
2809 }
2810
2811 ret = coda_ctrls_setup(ctx);
2812 if (ret) {
2813 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
2814 goto err_ctrls_setup;
2815 }
2816
2817 ctx->fh.ctrl_handler = &ctx->ctrls;
2818
2819 ret = coda_alloc_context_buf(ctx, &ctx->parabuf, CODA_PARA_BUF_SIZE,
2820 "parabuf");
2821 if (ret < 0) {
2822 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
2823 goto err_dma_alloc;
2824 }
2825
2826 ctx->bitstream.size = CODA_MAX_FRAME_SIZE;
2827 ctx->bitstream.vaddr = dma_alloc_writecombine(&dev->plat_dev->dev,
2828 ctx->bitstream.size, &ctx->bitstream.paddr, GFP_KERNEL);
2829 if (!ctx->bitstream.vaddr) {
2830 v4l2_err(&dev->v4l2_dev, "failed to allocate bitstream ringbuffer");
2831 ret = -ENOMEM;
2832 goto err_dma_writecombine;
2833 }
2834 kfifo_init(&ctx->bitstream_fifo,
2835 ctx->bitstream.vaddr, ctx->bitstream.size);
2836 mutex_init(&ctx->bitstream_mutex);
2837 mutex_init(&ctx->buffer_mutex);
2838 INIT_LIST_HEAD(&ctx->timestamp_list);
2839
2840 coda_lock(ctx);
2841 list_add(&ctx->list, &dev->instances);
2842 coda_unlock(ctx);
2843
2844 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
2845 ctx->idx, ctx);
2846
2847 return 0;
2848
2849 err_dma_writecombine:
2850 coda_free_context_buffers(ctx);
2851 if (ctx->dev->devtype->product == CODA_DX6)
2852 coda_free_aux_buf(dev, &ctx->workbuf);
2853 coda_free_aux_buf(dev, &ctx->parabuf);
2854 err_dma_alloc:
2855 v4l2_ctrl_handler_free(&ctx->ctrls);
2856 err_ctrls_setup:
2857 v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
2858 err_ctx_init:
2859 clk_disable_unprepare(dev->clk_ahb);
2860 err_clk_ahb:
2861 clk_disable_unprepare(dev->clk_per);
2862 err_clk_per:
2863 pm_runtime_put_sync(&dev->plat_dev->dev);
2864 err_pm_get:
2865 v4l2_fh_del(&ctx->fh);
2866 v4l2_fh_exit(&ctx->fh);
2867 clear_bit(ctx->idx, &dev->instance_mask);
2868 err_coda_max:
2869 kfree(ctx);
2870 return ret;
2871 }
2872
2873 struct coda_context_ops coda_encode_ops = {
2874 .queue_init = coda_encoder_queue_init,
2875 .start_streaming = coda_start_encoding,
2876 .prepare_run = coda_prepare_encode,
2877 .finish_run = coda_finish_encode,
2878 .seq_end_work = coda_seq_end_work,
2879 };
2880
2881 struct coda_context_ops coda_decode_ops = {
2882 .queue_init = coda_decoder_queue_init,
2883 .start_streaming = coda_start_decoding,
2884 .prepare_run = coda_prepare_decode,
2885 .finish_run = coda_finish_decode,
2886 .seq_end_work = coda_seq_end_work
2887 };
2888
2889 static int coda_encoder_open(struct file *file)
2890 {
2891 return coda_open(file, CODA_INST_ENCODER, &coda_encode_ops);
2892 }
2893
2894 static int coda_decoder_open(struct file *file)
2895 {
2896 return coda_open(file, CODA_INST_DECODER, &coda_decode_ops);
2897 }
2898
2899 static int coda_release(struct file *file)
2900 {
2901 struct coda_dev *dev = video_drvdata(file);
2902 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
2903
2904 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
2905 ctx);
2906
2907 debugfs_remove_recursive(ctx->debugfs_entry);
2908
2909 /* If this instance is running, call .job_abort and wait for it to end */
2910 v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
2911
2912 /* In case the instance was not running, we still need to call SEQ_END */
2913 if (ctx->initialized) {
2914 queue_work(dev->workqueue, &ctx->seq_end_work);
2915 flush_work(&ctx->seq_end_work);
2916 }
2917
2918 coda_free_framebuffers(ctx);
2919
2920 coda_lock(ctx);
2921 list_del(&ctx->list);
2922 coda_unlock(ctx);
2923
2924 dma_free_writecombine(&dev->plat_dev->dev, ctx->bitstream.size,
2925 ctx->bitstream.vaddr, ctx->bitstream.paddr);
2926 coda_free_context_buffers(ctx);
2927 if (ctx->dev->devtype->product == CODA_DX6)
2928 coda_free_aux_buf(dev, &ctx->workbuf);
2929
2930 coda_free_aux_buf(dev, &ctx->parabuf);
2931 v4l2_ctrl_handler_free(&ctx->ctrls);
2932 clk_disable_unprepare(dev->clk_ahb);
2933 clk_disable_unprepare(dev->clk_per);
2934 pm_runtime_put_sync(&dev->plat_dev->dev);
2935 v4l2_fh_del(&ctx->fh);
2936 v4l2_fh_exit(&ctx->fh);
2937 clear_bit(ctx->idx, &dev->instance_mask);
2938 kfree(ctx);
2939
2940 return 0;
2941 }
2942
2943 static const struct v4l2_file_operations coda_encoder_fops = {
2944 .owner = THIS_MODULE,
2945 .open = coda_encoder_open,
2946 .release = coda_release,
2947 .poll = v4l2_m2m_fop_poll,
2948 .unlocked_ioctl = video_ioctl2,
2949 .mmap = v4l2_m2m_fop_mmap,
2950 };
2951
2952 static const struct v4l2_file_operations coda_decoder_fops = {
2953 .owner = THIS_MODULE,
2954 .open = coda_decoder_open,
2955 .release = coda_release,
2956 .poll = v4l2_m2m_fop_poll,
2957 .unlocked_ioctl = video_ioctl2,
2958 .mmap = v4l2_m2m_fop_mmap,
2959 };
2960
2961 static void coda_finish_decode(struct coda_ctx *ctx)
2962 {
2963 struct coda_dev *dev = ctx->dev;
2964 struct coda_q_data *q_data_src;
2965 struct coda_q_data *q_data_dst;
2966 struct vb2_buffer *dst_buf;
2967 struct coda_timestamp *ts;
2968 int width, height;
2969 int decoded_idx;
2970 int display_idx;
2971 u32 src_fourcc;
2972 int success;
2973 u32 err_mb;
2974 u32 val;
2975
2976 dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
2977
2978 /* Update kfifo out pointer from coda bitstream read pointer */
2979 coda_kfifo_sync_from_device(ctx);
2980
2981 /*
2982 * in stream-end mode, the read pointer can overshoot the write pointer
2983 * by up to 512 bytes
2984 */
2985 if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
2986 if (coda_get_bitstream_payload(ctx) >= CODA_MAX_FRAME_SIZE - 512)
2987 kfifo_init(&ctx->bitstream_fifo,
2988 ctx->bitstream.vaddr, ctx->bitstream.size);
2989 }
2990
2991 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2992 src_fourcc = q_data_src->fourcc;
2993
2994 val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
2995 if (val != 1)
2996 pr_err("DEC_PIC_SUCCESS = %d\n", val);
2997
2998 success = val & 0x1;
2999 if (!success)
3000 v4l2_err(&dev->v4l2_dev, "decode failed\n");
3001
3002 if (src_fourcc == V4L2_PIX_FMT_H264) {
3003 if (val & (1 << 3))
3004 v4l2_err(&dev->v4l2_dev,
3005 "insufficient PS buffer space (%d bytes)\n",
3006 ctx->psbuf.size);
3007 if (val & (1 << 2))
3008 v4l2_err(&dev->v4l2_dev,
3009 "insufficient slice buffer space (%d bytes)\n",
3010 ctx->slicebuf.size);
3011 }
3012
3013 val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
3014 width = (val >> 16) & 0xffff;
3015 height = val & 0xffff;
3016
3017 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
3018
3019 /* frame crop information */
3020 if (src_fourcc == V4L2_PIX_FMT_H264) {
3021 u32 left_right;
3022 u32 top_bottom;
3023
3024 left_right = coda_read(dev, CODA_RET_DEC_PIC_CROP_LEFT_RIGHT);
3025 top_bottom = coda_read(dev, CODA_RET_DEC_PIC_CROP_TOP_BOTTOM);
3026
3027 if (left_right == 0xffffffff && top_bottom == 0xffffffff) {
3028 /* Keep current crop information */
3029 } else {
3030 struct v4l2_rect *rect = &q_data_dst->rect;
3031
3032 rect->left = left_right >> 16 & 0xffff;
3033 rect->top = top_bottom >> 16 & 0xffff;
3034 rect->width = width - rect->left -
3035 (left_right & 0xffff);
3036 rect->height = height - rect->top -
3037 (top_bottom & 0xffff);
3038 }
3039 } else {
3040 /* no cropping */
3041 }
3042
3043 err_mb = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
3044 if (err_mb > 0)
3045 v4l2_err(&dev->v4l2_dev,
3046 "errors in %d macroblocks\n", err_mb);
3047
3048 if (dev->devtype->product == CODA_7541) {
3049 val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
3050 if (val == 0) {
3051 /* not enough bitstream data */
3052 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
3053 "prescan failed: %d\n", val);
3054 ctx->hold = true;
3055 return;
3056 }
3057 }
3058
3059 ctx->frm_dis_flg = coda_read(dev, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
3060
3061 /*
3062 * The previous display frame was copied out by the rotator,
3063 * now it can be overwritten again
3064 */
3065 if (ctx->display_idx >= 0 &&
3066 ctx->display_idx < ctx->num_internal_frames) {
3067 ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
3068 coda_write(dev, ctx->frm_dis_flg,
3069 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
3070 }
3071
3072 /*
3073 * The index of the last decoded frame, not necessarily in
3074 * display order, and the index of the next display frame.
3075 * The latter could have been decoded in a previous run.
3076 */
3077 decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
3078 display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
3079
3080 if (decoded_idx == -1) {
3081 /* no frame was decoded, but we might have a display frame */
3082 if (display_idx >= 0 && display_idx < ctx->num_internal_frames)
3083 ctx->sequence_offset++;
3084 else if (ctx->display_idx < 0)
3085 ctx->hold = true;
3086 } else if (decoded_idx == -2) {
3087 /* no frame was decoded, we still return the remaining buffers */
3088 } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
3089 v4l2_err(&dev->v4l2_dev,
3090 "decoded frame index out of range: %d\n", decoded_idx);
3091 } else {
3092 ts = list_first_entry(&ctx->timestamp_list,
3093 struct coda_timestamp, list);
3094 list_del(&ts->list);
3095 val = coda_read(dev, CODA_RET_DEC_PIC_FRAME_NUM) - 1;
3096 val -= ctx->sequence_offset;
3097 if (val != (ts->sequence & 0xffff)) {
3098 v4l2_err(&dev->v4l2_dev,
3099 "sequence number mismatch (%d(%d) != %d)\n",
3100 val, ctx->sequence_offset, ts->sequence);
3101 }
3102 ctx->frame_timestamps[decoded_idx] = *ts;
3103 kfree(ts);
3104
3105 val = coda_read(dev, CODA_RET_DEC_PIC_TYPE) & 0x7;
3106 if (val == 0)
3107 ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_KEYFRAME;
3108 else if (val == 1)
3109 ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_PFRAME;
3110 else
3111 ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_BFRAME;
3112
3113 ctx->frame_errors[decoded_idx] = err_mb;
3114 }
3115
3116 if (display_idx == -1) {
3117 /*
3118 * no more frames to be decoded, but there could still
3119 * be rotator output to dequeue
3120 */
3121 ctx->hold = true;
3122 } else if (display_idx == -3) {
3123 /* possibly prescan failure */
3124 } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
3125 v4l2_err(&dev->v4l2_dev,
3126 "presentation frame index out of range: %d\n",
3127 display_idx);
3128 }
3129
3130 /* If a frame was copied out, return it */
3131 if (ctx->display_idx >= 0 &&
3132 ctx->display_idx < ctx->num_internal_frames) {
3133 dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
3134 dst_buf->v4l2_buf.sequence = ctx->osequence++;
3135
3136 dst_buf->v4l2_buf.flags &= ~(V4L2_BUF_FLAG_KEYFRAME |
3137 V4L2_BUF_FLAG_PFRAME |
3138 V4L2_BUF_FLAG_BFRAME);
3139 dst_buf->v4l2_buf.flags |= ctx->frame_types[ctx->display_idx];
3140 ts = &ctx->frame_timestamps[ctx->display_idx];
3141 dst_buf->v4l2_buf.timecode = ts->timecode;
3142 dst_buf->v4l2_buf.timestamp = ts->timestamp;
3143
3144 vb2_set_plane_payload(dst_buf, 0, width * height * 3 / 2);
3145
3146 v4l2_m2m_buf_done(dst_buf, ctx->frame_errors[display_idx] ?
3147 VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
3148
3149 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
3150 "job finished: decoding frame (%d) (%s)\n",
3151 dst_buf->v4l2_buf.sequence,
3152 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
3153 "KEYFRAME" : "PFRAME");
3154 } else {
3155 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
3156 "job finished: no frame decoded\n");
3157 }
3158
3159 /* The rotator will copy the current display frame next time */
3160 ctx->display_idx = display_idx;
3161 }
3162
3163 static void coda_finish_encode(struct coda_ctx *ctx)
3164 {
3165 struct vb2_buffer *src_buf, *dst_buf;
3166 struct coda_dev *dev = ctx->dev;
3167 u32 wr_ptr, start_ptr;
3168
3169 src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
3170 dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
3171
3172 /* Get results from the coda */
3173 start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
3174 wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
3175
3176 /* Calculate bytesused field */
3177 if (dst_buf->v4l2_buf.sequence == 0) {
3178 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr +
3179 ctx->vpu_header_size[0] +
3180 ctx->vpu_header_size[1] +
3181 ctx->vpu_header_size[2]);
3182 } else {
3183 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr);
3184 }
3185
3186 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
3187 wr_ptr - start_ptr);
3188
3189 coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
3190 coda_read(dev, CODA_RET_ENC_PIC_FLAG);
3191
3192 if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0) {
3193 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
3194 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
3195 } else {
3196 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
3197 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
3198 }
3199
3200 dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp;
3201 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
3202 dst_buf->v4l2_buf.flags |=
3203 src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
3204 dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode;
3205
3206 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
3207
3208 dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
3209 v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
3210
3211 ctx->gopcounter--;
3212 if (ctx->gopcounter < 0)
3213 ctx->gopcounter = ctx->params.gop_size - 1;
3214
3215 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
3216 "job finished: encoding frame (%d) (%s)\n",
3217 dst_buf->v4l2_buf.sequence,
3218 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
3219 "KEYFRAME" : "PFRAME");
3220 }
3221
3222 static irqreturn_t coda_irq_handler(int irq, void *data)
3223 {
3224 struct coda_dev *dev = data;
3225 struct coda_ctx *ctx;
3226
3227 /* read status register to attend the IRQ */
3228 coda_read(dev, CODA_REG_BIT_INT_STATUS);
3229 coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
3230 CODA_REG_BIT_INT_CLEAR);
3231
3232 ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
3233 if (ctx == NULL) {
3234 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
3235 mutex_unlock(&dev->coda_mutex);
3236 return IRQ_HANDLED;
3237 }
3238
3239 if (ctx->aborting) {
3240 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
3241 "task has been aborted\n");
3242 }
3243
3244 if (coda_isbusy(ctx->dev)) {
3245 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
3246 "coda is still busy!!!!\n");
3247 return IRQ_NONE;
3248 }
3249
3250 complete(&ctx->completion);
3251
3252 return IRQ_HANDLED;
3253 }
3254
3255 static u32 coda_supported_firmwares[] = {
3256 CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
3257 CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
3258 CODA_FIRMWARE_VERNUM(CODA_960, 2, 1, 5),
3259 };
3260
3261 static bool coda_firmware_supported(u32 vernum)
3262 {
3263 int i;
3264
3265 for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
3266 if (vernum == coda_supported_firmwares[i])
3267 return true;
3268 return false;
3269 }
3270
3271 static int coda_hw_init(struct coda_dev *dev)
3272 {
3273 u32 data;
3274 u16 *p;
3275 int i, ret;
3276
3277 ret = clk_prepare_enable(dev->clk_per);
3278 if (ret)
3279 goto err_clk_per;
3280
3281 ret = clk_prepare_enable(dev->clk_ahb);
3282 if (ret)
3283 goto err_clk_ahb;
3284
3285 if (dev->rstc)
3286 reset_control_reset(dev->rstc);
3287
3288 /*
3289 * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
3290 * The 16-bit chars in the code buffer are in memory access
3291 * order, re-sort them to CODA order for register download.
3292 * Data in this SRAM survives a reboot.
3293 */
3294 p = (u16 *)dev->codebuf.vaddr;
3295 if (dev->devtype->product == CODA_DX6) {
3296 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
3297 data = CODA_DOWN_ADDRESS_SET(i) |
3298 CODA_DOWN_DATA_SET(p[i ^ 1]);
3299 coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
3300 }
3301 } else {
3302 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
3303 data = CODA_DOWN_ADDRESS_SET(i) |
3304 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
3305 3 - (i % 4)]);
3306 coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
3307 }
3308 }
3309
3310 /* Clear registers */
3311 for (i = 0; i < 64; i++)
3312 coda_write(dev, 0, CODA_REG_BIT_CODE_BUF_ADDR + i * 4);
3313
3314 /* Tell the BIT where to find everything it needs */
3315 if (dev->devtype->product == CODA_960 ||
3316 dev->devtype->product == CODA_7541) {
3317 coda_write(dev, dev->tempbuf.paddr,
3318 CODA_REG_BIT_TEMP_BUF_ADDR);
3319 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
3320 } else {
3321 coda_write(dev, dev->workbuf.paddr,
3322 CODA_REG_BIT_WORK_BUF_ADDR);
3323 }
3324 coda_write(dev, dev->codebuf.paddr,
3325 CODA_REG_BIT_CODE_BUF_ADDR);
3326 coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
3327
3328 /* Set default values */
3329 switch (dev->devtype->product) {
3330 case CODA_DX6:
3331 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
3332 break;
3333 default:
3334 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
3335 }
3336 if (dev->devtype->product == CODA_960)
3337 coda_write(dev, 1 << 12, CODA_REG_BIT_FRAME_MEM_CTRL);
3338 else
3339 coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
3340
3341 if (dev->devtype->product != CODA_DX6)
3342 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
3343
3344 coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
3345 CODA_REG_BIT_INT_ENABLE);
3346
3347 /* Reset VPU and start processor */
3348 data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
3349 data |= CODA_REG_RESET_ENABLE;
3350 coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
3351 udelay(10);
3352 data &= ~CODA_REG_RESET_ENABLE;
3353 coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
3354 coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
3355
3356 clk_disable_unprepare(dev->clk_ahb);
3357 clk_disable_unprepare(dev->clk_per);
3358
3359 return 0;
3360
3361 err_clk_ahb:
3362 clk_disable_unprepare(dev->clk_per);
3363 err_clk_per:
3364 return ret;
3365 }
3366
3367 static int coda_check_firmware(struct coda_dev *dev)
3368 {
3369 u16 product, major, minor, release;
3370 u32 data;
3371 int ret;
3372
3373 ret = clk_prepare_enable(dev->clk_per);
3374 if (ret)
3375 goto err_clk_per;
3376
3377 ret = clk_prepare_enable(dev->clk_ahb);
3378 if (ret)
3379 goto err_clk_ahb;
3380
3381 coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
3382 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
3383 coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
3384 coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
3385 coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
3386 if (coda_wait_timeout(dev)) {
3387 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
3388 ret = -EIO;
3389 goto err_run_cmd;
3390 }
3391
3392 if (dev->devtype->product == CODA_960) {
3393 data = coda_read(dev, CODA9_CMD_FIRMWARE_CODE_REV);
3394 v4l2_info(&dev->v4l2_dev, "Firmware code revision: %d\n",
3395 data);
3396 }
3397
3398 /* Check we are compatible with the loaded firmware */
3399 data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
3400 product = CODA_FIRMWARE_PRODUCT(data);
3401 major = CODA_FIRMWARE_MAJOR(data);
3402 minor = CODA_FIRMWARE_MINOR(data);
3403 release = CODA_FIRMWARE_RELEASE(data);
3404
3405 clk_disable_unprepare(dev->clk_per);
3406 clk_disable_unprepare(dev->clk_ahb);
3407
3408 if (product != dev->devtype->product) {
3409 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
3410 " Version: %u.%u.%u\n",
3411 coda_product_name(dev->devtype->product),
3412 coda_product_name(product), major, minor, release);
3413 return -EINVAL;
3414 }
3415
3416 v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
3417 coda_product_name(product));
3418
3419 if (coda_firmware_supported(data)) {
3420 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
3421 major, minor, release);
3422 } else {
3423 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
3424 "%u.%u.%u\n", major, minor, release);
3425 }
3426
3427 return 0;
3428
3429 err_run_cmd:
3430 clk_disable_unprepare(dev->clk_ahb);
3431 err_clk_ahb:
3432 clk_disable_unprepare(dev->clk_per);
3433 err_clk_per:
3434 return ret;
3435 }
3436
3437 static int coda_register_device(struct coda_dev *dev, struct video_device *vfd)
3438 {
3439 vfd->release = video_device_release_empty,
3440 vfd->lock = &dev->dev_mutex;
3441 vfd->v4l2_dev = &dev->v4l2_dev;
3442 vfd->vfl_dir = VFL_DIR_M2M;
3443 video_set_drvdata(vfd, dev);
3444
3445 return video_register_device(vfd, VFL_TYPE_GRABBER, 0);
3446 }
3447
3448 static void coda_fw_callback(const struct firmware *fw, void *context)
3449 {
3450 struct coda_dev *dev = context;
3451 struct platform_device *pdev = dev->plat_dev;
3452 int ret;
3453
3454 if (!fw) {
3455 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
3456 return;
3457 }
3458
3459 /* allocate auxiliary per-device code buffer for the BIT processor */
3460 ret = coda_alloc_aux_buf(dev, &dev->codebuf, fw->size, "codebuf",
3461 dev->debugfs_root);
3462 if (ret < 0) {
3463 dev_err(&pdev->dev, "failed to allocate code buffer\n");
3464 return;
3465 }
3466
3467 /* Copy the whole firmware image to the code buffer */
3468 memcpy(dev->codebuf.vaddr, fw->data, fw->size);
3469 release_firmware(fw);
3470
3471 if (pm_runtime_enabled(&pdev->dev) && pdev->dev.pm_domain) {
3472 /*
3473 * Enabling power temporarily will cause coda_hw_init to be
3474 * called via coda_runtime_resume by the pm domain.
3475 */
3476 ret = pm_runtime_get_sync(&dev->plat_dev->dev);
3477 if (ret < 0) {
3478 v4l2_err(&dev->v4l2_dev, "failed to power on: %d\n",
3479 ret);
3480 return;
3481 }
3482
3483 ret = coda_check_firmware(dev);
3484 if (ret < 0)
3485 return;
3486
3487 pm_runtime_put_sync(&dev->plat_dev->dev);
3488 } else {
3489 /*
3490 * If runtime pm is disabled or pm_domain is not set,
3491 * initialize once manually.
3492 */
3493 ret = coda_hw_init(dev);
3494 if (ret < 0) {
3495 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
3496 return;
3497 }
3498
3499 ret = coda_check_firmware(dev);
3500 if (ret < 0)
3501 return;
3502 }
3503
3504 dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
3505 if (IS_ERR(dev->alloc_ctx)) {
3506 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
3507 return;
3508 }
3509
3510 dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
3511 if (IS_ERR(dev->m2m_dev)) {
3512 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
3513 goto rel_ctx;
3514 }
3515
3516 dev->vfd[0].fops = &coda_encoder_fops,
3517 dev->vfd[0].ioctl_ops = &coda_ioctl_ops;
3518 snprintf(dev->vfd[0].name, sizeof(dev->vfd[0].name), "coda-encoder");
3519 ret = coda_register_device(dev, &dev->vfd[0]);
3520 if (ret) {
3521 v4l2_err(&dev->v4l2_dev,
3522 "Failed to register encoder video device\n");
3523 goto rel_m2m;
3524 }
3525
3526 dev->vfd[1].fops = &coda_decoder_fops,
3527 dev->vfd[1].ioctl_ops = &coda_ioctl_ops;
3528 snprintf(dev->vfd[1].name, sizeof(dev->vfd[1].name), "coda-decoder");
3529 ret = coda_register_device(dev, &dev->vfd[1]);
3530 if (ret) {
3531 v4l2_err(&dev->v4l2_dev,
3532 "Failed to register decoder video device\n");
3533 goto rel_m2m;
3534 }
3535
3536 v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video[%d-%d]\n",
3537 dev->vfd[0].num, dev->vfd[1].num);
3538
3539 return;
3540
3541 rel_m2m:
3542 v4l2_m2m_release(dev->m2m_dev);
3543 rel_ctx:
3544 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
3545 }
3546
3547 static int coda_firmware_request(struct coda_dev *dev)
3548 {
3549 char *fw = dev->devtype->firmware;
3550
3551 dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
3552 coda_product_name(dev->devtype->product));
3553
3554 return request_firmware_nowait(THIS_MODULE, true,
3555 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
3556 }
3557
3558 enum coda_platform {
3559 CODA_IMX27,
3560 CODA_IMX53,
3561 CODA_IMX6Q,
3562 CODA_IMX6DL,
3563 };
3564
3565 static const struct coda_devtype coda_devdata[] = {
3566 [CODA_IMX27] = {
3567 .firmware = "v4l-codadx6-imx27.bin",
3568 .product = CODA_DX6,
3569 .codecs = codadx6_codecs,
3570 .num_codecs = ARRAY_SIZE(codadx6_codecs),
3571 .workbuf_size = 288 * 1024 + FMO_SLICE_SAVE_BUF_SIZE * 8 * 1024,
3572 .iram_size = 0xb000,
3573 },
3574 [CODA_IMX53] = {
3575 .firmware = "v4l-coda7541-imx53.bin",
3576 .product = CODA_7541,
3577 .codecs = coda7_codecs,
3578 .num_codecs = ARRAY_SIZE(coda7_codecs),
3579 .workbuf_size = 128 * 1024,
3580 .tempbuf_size = 304 * 1024,
3581 .iram_size = 0x14000,
3582 },
3583 [CODA_IMX6Q] = {
3584 .firmware = "v4l-coda960-imx6q.bin",
3585 .product = CODA_960,
3586 .codecs = coda9_codecs,
3587 .num_codecs = ARRAY_SIZE(coda9_codecs),
3588 .workbuf_size = 80 * 1024,
3589 .tempbuf_size = 204 * 1024,
3590 .iram_size = 0x21000,
3591 },
3592 [CODA_IMX6DL] = {
3593 .firmware = "v4l-coda960-imx6dl.bin",
3594 .product = CODA_960,
3595 .codecs = coda9_codecs,
3596 .num_codecs = ARRAY_SIZE(coda9_codecs),
3597 .workbuf_size = 80 * 1024,
3598 .tempbuf_size = 204 * 1024,
3599 .iram_size = 0x20000,
3600 },
3601 };
3602
3603 static struct platform_device_id coda_platform_ids[] = {
3604 { .name = "coda-imx27", .driver_data = CODA_IMX27 },
3605 { .name = "coda-imx53", .driver_data = CODA_IMX53 },
3606 { /* sentinel */ }
3607 };
3608 MODULE_DEVICE_TABLE(platform, coda_platform_ids);
3609
3610 #ifdef CONFIG_OF
3611 static const struct of_device_id coda_dt_ids[] = {
3612 { .compatible = "fsl,imx27-vpu", .data = &coda_devdata[CODA_IMX27] },
3613 { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
3614 { .compatible = "fsl,imx6q-vpu", .data = &coda_devdata[CODA_IMX6Q] },
3615 { .compatible = "fsl,imx6dl-vpu", .data = &coda_devdata[CODA_IMX6DL] },
3616 { /* sentinel */ }
3617 };
3618 MODULE_DEVICE_TABLE(of, coda_dt_ids);
3619 #endif
3620
3621 static int coda_probe(struct platform_device *pdev)
3622 {
3623 const struct of_device_id *of_id =
3624 of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
3625 const struct platform_device_id *pdev_id;
3626 struct coda_platform_data *pdata = pdev->dev.platform_data;
3627 struct device_node *np = pdev->dev.of_node;
3628 struct gen_pool *pool;
3629 struct coda_dev *dev;
3630 struct resource *res;
3631 int ret, irq;
3632
3633 dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
3634 if (!dev) {
3635 dev_err(&pdev->dev, "Not enough memory for %s\n",
3636 CODA_NAME);
3637 return -ENOMEM;
3638 }
3639
3640 spin_lock_init(&dev->irqlock);
3641 INIT_LIST_HEAD(&dev->instances);
3642
3643 dev->plat_dev = pdev;
3644 dev->clk_per = devm_clk_get(&pdev->dev, "per");
3645 if (IS_ERR(dev->clk_per)) {
3646 dev_err(&pdev->dev, "Could not get per clock\n");
3647 return PTR_ERR(dev->clk_per);
3648 }
3649
3650 dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
3651 if (IS_ERR(dev->clk_ahb)) {
3652 dev_err(&pdev->dev, "Could not get ahb clock\n");
3653 return PTR_ERR(dev->clk_ahb);
3654 }
3655
3656 /* Get memory for physical registers */
3657 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3658 dev->regs_base = devm_ioremap_resource(&pdev->dev, res);
3659 if (IS_ERR(dev->regs_base))
3660 return PTR_ERR(dev->regs_base);
3661
3662 /* IRQ */
3663 irq = platform_get_irq(pdev, 0);
3664 if (irq < 0) {
3665 dev_err(&pdev->dev, "failed to get irq resource\n");
3666 return irq;
3667 }
3668
3669 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, coda_irq_handler,
3670 IRQF_ONESHOT, dev_name(&pdev->dev), dev);
3671 if (ret < 0) {
3672 dev_err(&pdev->dev, "failed to request irq: %d\n", ret);
3673 return ret;
3674 }
3675
3676 dev->rstc = devm_reset_control_get_optional(&pdev->dev, NULL);
3677 if (IS_ERR(dev->rstc)) {
3678 ret = PTR_ERR(dev->rstc);
3679 if (ret == -ENOENT || ret == -ENOSYS) {
3680 dev->rstc = NULL;
3681 } else {
3682 dev_err(&pdev->dev, "failed get reset control: %d\n", ret);
3683 return ret;
3684 }
3685 }
3686
3687 /* Get IRAM pool from device tree or platform data */
3688 pool = of_get_named_gen_pool(np, "iram", 0);
3689 if (!pool && pdata)
3690 pool = dev_get_gen_pool(pdata->iram_dev);
3691 if (!pool) {
3692 dev_err(&pdev->dev, "iram pool not available\n");
3693 return -ENOMEM;
3694 }
3695 dev->iram_pool = pool;
3696
3697 ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
3698 if (ret)
3699 return ret;
3700
3701 mutex_init(&dev->dev_mutex);
3702 mutex_init(&dev->coda_mutex);
3703
3704 pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
3705
3706 if (of_id) {
3707 dev->devtype = of_id->data;
3708 } else if (pdev_id) {
3709 dev->devtype = &coda_devdata[pdev_id->driver_data];
3710 } else {
3711 v4l2_device_unregister(&dev->v4l2_dev);
3712 return -EINVAL;
3713 }
3714
3715 dev->debugfs_root = debugfs_create_dir("coda", NULL);
3716 if (!dev->debugfs_root)
3717 dev_warn(&pdev->dev, "failed to create debugfs root\n");
3718
3719 /* allocate auxiliary per-device buffers for the BIT processor */
3720 if (dev->devtype->product == CODA_DX6) {
3721 ret = coda_alloc_aux_buf(dev, &dev->workbuf,
3722 dev->devtype->workbuf_size, "workbuf",
3723 dev->debugfs_root);
3724 if (ret < 0) {
3725 dev_err(&pdev->dev, "failed to allocate work buffer\n");
3726 v4l2_device_unregister(&dev->v4l2_dev);
3727 return ret;
3728 }
3729 }
3730
3731 if (dev->devtype->tempbuf_size) {
3732 ret = coda_alloc_aux_buf(dev, &dev->tempbuf,
3733 dev->devtype->tempbuf_size, "tempbuf",
3734 dev->debugfs_root);
3735 if (ret < 0) {
3736 dev_err(&pdev->dev, "failed to allocate temp buffer\n");
3737 v4l2_device_unregister(&dev->v4l2_dev);
3738 return ret;
3739 }
3740 }
3741
3742 dev->iram.size = dev->devtype->iram_size;
3743 dev->iram.vaddr = gen_pool_dma_alloc(dev->iram_pool, dev->iram.size,
3744 &dev->iram.paddr);
3745 if (!dev->iram.vaddr) {
3746 dev_err(&pdev->dev, "unable to alloc iram\n");
3747 return -ENOMEM;
3748 }
3749
3750 dev->iram.blob.data = dev->iram.vaddr;
3751 dev->iram.blob.size = dev->iram.size;
3752 dev->iram.dentry = debugfs_create_blob("iram", 0644, dev->debugfs_root,
3753 &dev->iram.blob);
3754
3755 dev->workqueue = alloc_workqueue("coda", WQ_UNBOUND | WQ_MEM_RECLAIM, 1);
3756 if (!dev->workqueue) {
3757 dev_err(&pdev->dev, "unable to alloc workqueue\n");
3758 return -ENOMEM;
3759 }
3760
3761 platform_set_drvdata(pdev, dev);
3762
3763 pm_runtime_enable(&pdev->dev);
3764
3765 return coda_firmware_request(dev);
3766 }
3767
3768 static int coda_remove(struct platform_device *pdev)
3769 {
3770 struct coda_dev *dev = platform_get_drvdata(pdev);
3771
3772 video_unregister_device(&dev->vfd[0]);
3773 video_unregister_device(&dev->vfd[1]);
3774 if (dev->m2m_dev)
3775 v4l2_m2m_release(dev->m2m_dev);
3776 pm_runtime_disable(&pdev->dev);
3777 if (dev->alloc_ctx)
3778 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
3779 v4l2_device_unregister(&dev->v4l2_dev);
3780 destroy_workqueue(dev->workqueue);
3781 if (dev->iram.vaddr)
3782 gen_pool_free(dev->iram_pool, (unsigned long)dev->iram.vaddr,
3783 dev->iram.size);
3784 coda_free_aux_buf(dev, &dev->codebuf);
3785 coda_free_aux_buf(dev, &dev->tempbuf);
3786 coda_free_aux_buf(dev, &dev->workbuf);
3787 debugfs_remove_recursive(dev->debugfs_root);
3788 return 0;
3789 }
3790
3791 #ifdef CONFIG_PM_RUNTIME
3792 static int coda_runtime_resume(struct device *dev)
3793 {
3794 struct coda_dev *cdev = dev_get_drvdata(dev);
3795 int ret = 0;
3796
3797 if (dev->pm_domain && cdev->codebuf.vaddr) {
3798 ret = coda_hw_init(cdev);
3799 if (ret)
3800 v4l2_err(&cdev->v4l2_dev, "HW initialization failed\n");
3801 }
3802
3803 return ret;
3804 }
3805 #endif
3806
3807 static const struct dev_pm_ops coda_pm_ops = {
3808 SET_RUNTIME_PM_OPS(NULL, coda_runtime_resume, NULL)
3809 };
3810
3811 static struct platform_driver coda_driver = {
3812 .probe = coda_probe,
3813 .remove = coda_remove,
3814 .driver = {
3815 .name = CODA_NAME,
3816 .owner = THIS_MODULE,
3817 .of_match_table = of_match_ptr(coda_dt_ids),
3818 .pm = &coda_pm_ops,
3819 },
3820 .id_table = coda_platform_ids,
3821 };
3822
3823 module_platform_driver(coda_driver);
3824
3825 MODULE_LICENSE("GPL");
3826 MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
3827 MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");
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