drivers/media/platform/davinci/vpbe_venc_regs.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (C) 2006-2010 Texas Instruments Inc
   4  */
   5 #ifndef _VPBE_VENC_REGS_H
   6 #define _VPBE_VENC_REGS_H
   7
   8 /* VPBE Video Encoder / Digital LCD Subsystem Registers (VENC) */
   9 #define VENC_VMOD                               0x00
  10 #define VENC_VIDCTL                             0x04
  11 #define VENC_VDPRO                              0x08
  12 #define VENC_SYNCCTL                            0x0C
  13 #define VENC_HSPLS                              0x10
  14 #define VENC_VSPLS                              0x14
  15 #define VENC_HINT                               0x18
  16 #define VENC_HSTART                             0x1C
  17 #define VENC_HVALID                             0x20
  18 #define VENC_VINT                               0x24
  19 #define VENC_VSTART                             0x28
  20 #define VENC_VVALID                             0x2C
  21 #define VENC_HSDLY                              0x30
  22 #define VENC_VSDLY                              0x34
  23 #define VENC_YCCCTL                             0x38
  24 #define VENC_RGBCTL                             0x3C
  25 #define VENC_RGBCLP                             0x40
  26 #define VENC_LINECTL                            0x44
  27 #define VENC_CULLLINE                           0x48
  28 #define VENC_LCDOUT                             0x4C
  29 #define VENC_BRTS                               0x50
  30 #define VENC_BRTW                               0x54
  31 #define VENC_ACCTL                              0x58
  32 #define VENC_PWMP                               0x5C
  33 #define VENC_PWMW                               0x60
  34 #define VENC_DCLKCTL                            0x64
  35 #define VENC_DCLKPTN0                           0x68
  36 #define VENC_DCLKPTN1                           0x6C
  37 #define VENC_DCLKPTN2                           0x70
  38 #define VENC_DCLKPTN3                           0x74
  39 #define VENC_DCLKPTN0A                          0x78
  40 #define VENC_DCLKPTN1A                          0x7C
  41 #define VENC_DCLKPTN2A                          0x80
  42 #define VENC_DCLKPTN3A                          0x84
  43 #define VENC_DCLKHS                             0x88
  44 #define VENC_DCLKHSA                            0x8C
  45 #define VENC_DCLKHR                             0x90
  46 #define VENC_DCLKVS                             0x94
  47 #define VENC_DCLKVR                             0x98
  48 #define VENC_CAPCTL                             0x9C
  49 #define VENC_CAPDO                              0xA0
  50 #define VENC_CAPDE                              0xA4
  51 #define VENC_ATR0                               0xA8
  52 #define VENC_ATR1                               0xAC
  53 #define VENC_ATR2                               0xB0
  54 #define VENC_VSTAT                              0xB8
  55 #define VENC_RAMADR                             0xBC
  56 #define VENC_RAMPORT                            0xC0
  57 #define VENC_DACTST                             0xC4
  58 #define VENC_YCOLVL                             0xC8
  59 #define VENC_SCPROG                             0xCC
  60 #define VENC_CVBS                               0xDC
  61 #define VENC_CMPNT                              0xE0
  62 #define VENC_ETMG0                              0xE4
  63 #define VENC_ETMG1                              0xE8
  64 #define VENC_ETMG2                              0xEC
  65 #define VENC_ETMG3                              0xF0
  66 #define VENC_DACSEL                             0xF4
  67 #define VENC_ARGBX0                             0x100
  68 #define VENC_ARGBX1                             0x104
  69 #define VENC_ARGBX2                             0x108
  70 #define VENC_ARGBX3                             0x10C
  71 #define VENC_ARGBX4                             0x110
  72 #define VENC_DRGBX0                             0x114
  73 #define VENC_DRGBX1                             0x118
  74 #define VENC_DRGBX2                             0x11C
  75 #define VENC_DRGBX3                             0x120
  76 #define VENC_DRGBX4                             0x124
  77 #define VENC_VSTARTA                            0x128
  78 #define VENC_OSDCLK0                            0x12C
  79 #define VENC_OSDCLK1                            0x130
  80 #define VENC_HVLDCL0                            0x134
  81 #define VENC_HVLDCL1                            0x138
  82 #define VENC_OSDHADV                            0x13C
  83 #define VENC_CLKCTL                             0x140
  84 #define VENC_GAMCTL                             0x144
  85 #define VENC_XHINTVL                            0x174
  86
  87 /* bit definitions */
  88 #define VPBE_PCR_VENC_DIV                       (1 << 1)
  89 #define VPBE_PCR_CLK_OFF                        (1 << 0)
  90
  91 #define VENC_VMOD_VDMD_SHIFT                    12
  92 #define VENC_VMOD_VDMD_YCBCR16                  0
  93 #define VENC_VMOD_VDMD_YCBCR8                   1
  94 #define VENC_VMOD_VDMD_RGB666                   2
  95 #define VENC_VMOD_VDMD_RGB8                     3
  96 #define VENC_VMOD_VDMD_EPSON                    4
  97 #define VENC_VMOD_VDMD_CASIO                    5
  98 #define VENC_VMOD_VDMD_UDISPQVGA                6
  99 #define VENC_VMOD_VDMD_STNLCD                   7
 100 #define VENC_VMOD_VIE_SHIFT                     1
 101 #define VENC_VMOD_VDMD                          (7 << 12)
 102 #define VENC_VMOD_ITLCL                         (1 << 11)
 103 #define VENC_VMOD_ITLC                          (1 << 10)
 104 #define VENC_VMOD_NSIT                          (1 << 9)
 105 #define VENC_VMOD_HDMD                          (1 << 8)
 106 #define VENC_VMOD_TVTYP_SHIFT                   6
 107 #define VENC_VMOD_TVTYP                         (3 << 6)
 108 #define VENC_VMOD_SLAVE                         (1 << 5)
 109 #define VENC_VMOD_VMD                           (1 << 4)
 110 #define VENC_VMOD_BLNK                          (1 << 3)
 111 #define VENC_VMOD_VIE                           (1 << 1)
 112 #define VENC_VMOD_VENC                          (1 << 0)
 113
 114 /* VMOD TVTYP options for HDMD=0 */
 115 #define SDTV_NTSC                               0
 116 #define SDTV_PAL                                1
 117 /* VMOD TVTYP options for HDMD=1 */
 118 #define HDTV_525P                               0
 119 #define HDTV_625P                               1
 120 #define HDTV_1080I                              2
 121 #define HDTV_720P                               3
 122
 123 #define VENC_VIDCTL_VCLKP                       (1 << 14)
 124 #define VENC_VIDCTL_VCLKE_SHIFT                 13
 125 #define VENC_VIDCTL_VCLKE                       (1 << 13)
 126 #define VENC_VIDCTL_VCLKZ_SHIFT                 12
 127 #define VENC_VIDCTL_VCLKZ                       (1 << 12)
 128 #define VENC_VIDCTL_SYDIR_SHIFT                 8
 129 #define VENC_VIDCTL_SYDIR                       (1 << 8)
 130 #define VENC_VIDCTL_DOMD_SHIFT                  4
 131 #define VENC_VIDCTL_DOMD                        (3 << 4)
 132 #define VENC_VIDCTL_YCDIR_SHIFT                 0
 133 #define VENC_VIDCTL_YCDIR                       (1 << 0)
 134
 135 #define VENC_VDPRO_ATYCC_SHIFT                  5
 136 #define VENC_VDPRO_ATYCC                        (1 << 5)
 137 #define VENC_VDPRO_ATCOM_SHIFT                  4
 138 #define VENC_VDPRO_ATCOM                        (1 << 4)
 139 #define VENC_VDPRO_DAFRQ                        (1 << 3)
 140 #define VENC_VDPRO_DAUPS                        (1 << 2)
 141 #define VENC_VDPRO_CUPS                         (1 << 1)
 142 #define VENC_VDPRO_YUPS                         (1 << 0)
 143
 144 #define VENC_SYNCCTL_VPL_SHIFT                  3
 145 #define VENC_SYNCCTL_VPL                        (1 << 3)
 146 #define VENC_SYNCCTL_HPL_SHIFT                  2
 147 #define VENC_SYNCCTL_HPL                        (1 << 2)
 148 #define VENC_SYNCCTL_SYEV_SHIFT                 1
 149 #define VENC_SYNCCTL_SYEV                       (1 << 1)
 150 #define VENC_SYNCCTL_SYEH_SHIFT                 0
 151 #define VENC_SYNCCTL_SYEH                       (1 << 0)
 152 #define VENC_SYNCCTL_OVD_SHIFT                  14
 153 #define VENC_SYNCCTL_OVD                        (1 << 14)
 154
 155 #define VENC_DCLKCTL_DCKEC_SHIFT                11
 156 #define VENC_DCLKCTL_DCKEC                      (1 << 11)
 157 #define VENC_DCLKCTL_DCKPW_SHIFT                0
 158 #define VENC_DCLKCTL_DCKPW                      (0x3f << 0)
 159
 160 #define VENC_VSTAT_FIDST                        (1 << 4)
 161
 162 #define VENC_CMPNT_MRGB_SHIFT                   14
 163 #define VENC_CMPNT_MRGB                         (1 << 14)
 164
 165 #endif                          /* _VPBE_VENC_REGS_H */