2 * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
5 * Samsung EXYNOS5 SoC series G-Scaler driver
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published
9 * by the Free Software Foundation, either version 2 of the License,
10 * or (at your option) any later version.
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/errno.h>
17 #include <linux/bug.h>
18 #include <linux/interrupt.h>
19 #include <linux/workqueue.h>
20 #include <linux/device.h>
21 #include <linux/platform_device.h>
22 #include <linux/list.h>
24 #include <linux/slab.h>
25 #include <linux/clk.h>
27 #include <media/v4l2-ioctl.h>
31 #define GSC_CLOCK_GATE_NAME "gscl"
33 static const struct gsc_fmt gsc_formats
[] = {
36 .pixelformat
= V4L2_PIX_FMT_RGB565X
,
42 .name
= "XRGB-8-8-8-8, 32 bpp",
43 .pixelformat
= V4L2_PIX_FMT_RGB32
,
49 .name
= "YUV 4:2:2 packed, YCbYCr",
50 .pixelformat
= V4L2_PIX_FMT_YUYV
,
57 .mbus_code
= MEDIA_BUS_FMT_YUYV8_2X8
,
59 .name
= "YUV 4:2:2 packed, CbYCrY",
60 .pixelformat
= V4L2_PIX_FMT_UYVY
,
67 .mbus_code
= MEDIA_BUS_FMT_UYVY8_2X8
,
69 .name
= "YUV 4:2:2 packed, CrYCbY",
70 .pixelformat
= V4L2_PIX_FMT_VYUY
,
77 .mbus_code
= MEDIA_BUS_FMT_VYUY8_2X8
,
79 .name
= "YUV 4:2:2 packed, YCrYCb",
80 .pixelformat
= V4L2_PIX_FMT_YVYU
,
87 .mbus_code
= MEDIA_BUS_FMT_YVYU8_2X8
,
89 .name
= "YUV 4:4:4 planar, YCbYCr",
90 .pixelformat
= V4L2_PIX_FMT_YUV32
,
98 .name
= "YUV 4:2:2 planar, Y/Cb/Cr",
99 .pixelformat
= V4L2_PIX_FMT_YUV422P
,
107 .name
= "YUV 4:2:2 planar, Y/CbCr",
108 .pixelformat
= V4L2_PIX_FMT_NV16
,
116 .name
= "YUV 4:2:2 planar, Y/CrCb",
117 .pixelformat
= V4L2_PIX_FMT_NV61
,
125 .name
= "YUV 4:2:0 planar, YCbCr",
126 .pixelformat
= V4L2_PIX_FMT_YUV420
,
134 .name
= "YUV 4:2:0 planar, YCrCb",
135 .pixelformat
= V4L2_PIX_FMT_YVU420
,
144 .name
= "YUV 4:2:0 planar, Y/CbCr",
145 .pixelformat
= V4L2_PIX_FMT_NV12
,
153 .name
= "YUV 4:2:0 planar, Y/CrCb",
154 .pixelformat
= V4L2_PIX_FMT_NV21
,
162 .name
= "YUV 4:2:0 non-contig. 2p, Y/CbCr",
163 .pixelformat
= V4L2_PIX_FMT_NV12M
,
171 .name
= "YUV 4:2:0 non-contig. 3p, Y/Cb/Cr",
172 .pixelformat
= V4L2_PIX_FMT_YUV420M
,
173 .depth
= { 8, 2, 2 },
180 .name
= "YUV 4:2:0 non-contig. 3p, Y/Cr/Cb",
181 .pixelformat
= V4L2_PIX_FMT_YVU420M
,
182 .depth
= { 8, 2, 2 },
189 .name
= "YUV 4:2:0 n.c. 2p, Y/CbCr tiled",
190 .pixelformat
= V4L2_PIX_FMT_NV12MT_16X16
,
200 const struct gsc_fmt
*get_format(int index
)
202 if (index
>= ARRAY_SIZE(gsc_formats
))
205 return (struct gsc_fmt
*)&gsc_formats
[index
];
208 const struct gsc_fmt
*find_fmt(u32
*pixelformat
, u32
*mbus_code
, u32 index
)
210 const struct gsc_fmt
*fmt
, *def_fmt
= NULL
;
213 if (index
>= ARRAY_SIZE(gsc_formats
))
216 for (i
= 0; i
< ARRAY_SIZE(gsc_formats
); ++i
) {
218 if (pixelformat
&& fmt
->pixelformat
== *pixelformat
)
220 if (mbus_code
&& fmt
->mbus_code
== *mbus_code
)
229 void gsc_set_frame_size(struct gsc_frame
*frame
, int width
, int height
)
231 frame
->f_width
= width
;
232 frame
->f_height
= height
;
233 frame
->crop
.width
= width
;
234 frame
->crop
.height
= height
;
235 frame
->crop
.left
= 0;
239 int gsc_cal_prescaler_ratio(struct gsc_variant
*var
, u32 src
, u32 dst
,
242 if ((dst
> src
) || (dst
>= src
/ var
->poly_sc_down_max
)) {
247 if ((src
/ var
->poly_sc_down_max
/ var
->pre_sc_down_max
) > dst
) {
248 pr_err("Exceeded maximum downscaling ratio (1/16))");
252 *ratio
= (dst
> (src
/ 8)) ? 2 : 4;
257 void gsc_get_prescaler_shfactor(u32 hratio
, u32 vratio
, u32
*sh
)
259 if (hratio
== 4 && vratio
== 4)
261 else if ((hratio
== 4 && vratio
== 2) ||
262 (hratio
== 2 && vratio
== 4))
264 else if ((hratio
== 4 && vratio
== 1) ||
265 (hratio
== 1 && vratio
== 4) ||
266 (hratio
== 2 && vratio
== 2))
268 else if (hratio
== 1 && vratio
== 1)
274 void gsc_check_src_scale_info(struct gsc_variant
*var
,
275 struct gsc_frame
*s_frame
, u32
*wratio
,
276 u32 tx
, u32 ty
, u32
*hratio
)
278 int remainder
= 0, walign
, halign
;
280 if (is_yuv420(s_frame
->fmt
->color
)) {
281 walign
= GSC_SC_ALIGN_4
;
282 halign
= GSC_SC_ALIGN_4
;
283 } else if (is_yuv422(s_frame
->fmt
->color
)) {
284 walign
= GSC_SC_ALIGN_4
;
285 halign
= GSC_SC_ALIGN_2
;
287 walign
= GSC_SC_ALIGN_2
;
288 halign
= GSC_SC_ALIGN_2
;
291 remainder
= s_frame
->crop
.width
% (*wratio
* walign
);
293 s_frame
->crop
.width
-= remainder
;
294 gsc_cal_prescaler_ratio(var
, s_frame
->crop
.width
, tx
, wratio
);
295 pr_info("cropped src width size is recalculated from %d to %d",
296 s_frame
->crop
.width
+ remainder
, s_frame
->crop
.width
);
299 remainder
= s_frame
->crop
.height
% (*hratio
* halign
);
301 s_frame
->crop
.height
-= remainder
;
302 gsc_cal_prescaler_ratio(var
, s_frame
->crop
.height
, ty
, hratio
);
303 pr_info("cropped src height size is recalculated from %d to %d",
304 s_frame
->crop
.height
+ remainder
, s_frame
->crop
.height
);
308 int gsc_enum_fmt_mplane(struct v4l2_fmtdesc
*f
)
310 const struct gsc_fmt
*fmt
;
312 fmt
= find_fmt(NULL
, NULL
, f
->index
);
316 strlcpy(f
->description
, fmt
->name
, sizeof(f
->description
));
317 f
->pixelformat
= fmt
->pixelformat
;
322 static int get_plane_info(struct gsc_frame
*frm
, u32 addr
, u32
*index
, u32
*ret_addr
)
324 if (frm
->addr
.y
== addr
) {
326 *ret_addr
= frm
->addr
.y
;
327 } else if (frm
->addr
.cb
== addr
) {
329 *ret_addr
= frm
->addr
.cb
;
330 } else if (frm
->addr
.cr
== addr
) {
332 *ret_addr
= frm
->addr
.cr
;
334 pr_err("Plane address is wrong");
340 void gsc_set_prefbuf(struct gsc_dev
*gsc
, struct gsc_frame
*frm
)
342 u32 f_chk_addr
, f_chk_len
, s_chk_addr
, s_chk_len
;
343 f_chk_addr
= f_chk_len
= s_chk_addr
= s_chk_len
= 0;
345 f_chk_addr
= frm
->addr
.y
;
346 f_chk_len
= frm
->payload
[0];
347 if (frm
->fmt
->num_planes
== 2) {
348 s_chk_addr
= frm
->addr
.cb
;
349 s_chk_len
= frm
->payload
[1];
350 } else if (frm
->fmt
->num_planes
== 3) {
351 u32 low_addr
, low_plane
, mid_addr
, mid_plane
;
352 u32 high_addr
, high_plane
;
355 t_min
= min3(frm
->addr
.y
, frm
->addr
.cb
, frm
->addr
.cr
);
356 if (get_plane_info(frm
, t_min
, &low_plane
, &low_addr
))
358 t_max
= max3(frm
->addr
.y
, frm
->addr
.cb
, frm
->addr
.cr
);
359 if (get_plane_info(frm
, t_max
, &high_plane
, &high_addr
))
362 mid_plane
= 3 - (low_plane
+ high_plane
);
364 mid_addr
= frm
->addr
.y
;
365 else if (mid_plane
== 1)
366 mid_addr
= frm
->addr
.cb
;
367 else if (mid_plane
== 2)
368 mid_addr
= frm
->addr
.cr
;
372 f_chk_addr
= low_addr
;
373 if (mid_addr
+ frm
->payload
[mid_plane
] - low_addr
>
374 high_addr
+ frm
->payload
[high_plane
] - mid_addr
) {
375 f_chk_len
= frm
->payload
[low_plane
];
376 s_chk_addr
= mid_addr
;
377 s_chk_len
= high_addr
+
378 frm
->payload
[high_plane
] - mid_addr
;
380 f_chk_len
= mid_addr
+
381 frm
->payload
[mid_plane
] - low_addr
;
382 s_chk_addr
= high_addr
;
383 s_chk_len
= frm
->payload
[high_plane
];
386 pr_debug("f_addr = 0x%08x, f_len = %d, s_addr = 0x%08x, s_len = %d\n",
387 f_chk_addr
, f_chk_len
, s_chk_addr
, s_chk_len
);
390 int gsc_try_fmt_mplane(struct gsc_ctx
*ctx
, struct v4l2_format
*f
)
392 struct gsc_dev
*gsc
= ctx
->gsc_dev
;
393 struct gsc_variant
*variant
= gsc
->variant
;
394 struct v4l2_pix_format_mplane
*pix_mp
= &f
->fmt
.pix_mp
;
395 const struct gsc_fmt
*fmt
;
396 u32 max_w
, max_h
, mod_x
, mod_y
;
397 u32 min_w
, min_h
, tmp_w
, tmp_h
;
400 pr_debug("user put w: %d, h: %d", pix_mp
->width
, pix_mp
->height
);
402 fmt
= find_fmt(&pix_mp
->pixelformat
, NULL
, 0);
404 pr_err("pixelformat format (0x%X) invalid\n",
405 pix_mp
->pixelformat
);
409 if (pix_mp
->field
== V4L2_FIELD_ANY
)
410 pix_mp
->field
= V4L2_FIELD_NONE
;
411 else if (pix_mp
->field
!= V4L2_FIELD_NONE
) {
412 pr_err("Not supported field order(%d)\n", pix_mp
->field
);
416 max_w
= variant
->pix_max
->target_rot_dis_w
;
417 max_h
= variant
->pix_max
->target_rot_dis_h
;
419 mod_x
= ffs(variant
->pix_align
->org_w
) - 1;
420 if (is_yuv420(fmt
->color
))
421 mod_y
= ffs(variant
->pix_align
->org_h
) - 1;
423 mod_y
= ffs(variant
->pix_align
->org_h
) - 2;
425 if (V4L2_TYPE_IS_OUTPUT(f
->type
)) {
426 min_w
= variant
->pix_min
->org_w
;
427 min_h
= variant
->pix_min
->org_h
;
429 min_w
= variant
->pix_min
->target_rot_dis_w
;
430 min_h
= variant
->pix_min
->target_rot_dis_h
;
433 pr_debug("mod_x: %d, mod_y: %d, max_w: %d, max_h = %d",
434 mod_x
, mod_y
, max_w
, max_h
);
436 /* To check if image size is modified to adjust parameter against
437 hardware abilities */
438 tmp_w
= pix_mp
->width
;
439 tmp_h
= pix_mp
->height
;
441 v4l_bound_align_image(&pix_mp
->width
, min_w
, max_w
, mod_x
,
442 &pix_mp
->height
, min_h
, max_h
, mod_y
, 0);
443 if (tmp_w
!= pix_mp
->width
|| tmp_h
!= pix_mp
->height
)
444 pr_info("Image size has been modified from %dx%d to %dx%d",
445 tmp_w
, tmp_h
, pix_mp
->width
, pix_mp
->height
);
447 pix_mp
->num_planes
= fmt
->num_planes
;
449 if (pix_mp
->width
>= 1280) /* HD */
450 pix_mp
->colorspace
= V4L2_COLORSPACE_REC709
;
452 pix_mp
->colorspace
= V4L2_COLORSPACE_SMPTE170M
;
455 for (i
= 0; i
< pix_mp
->num_planes
; ++i
) {
456 int bpl
= (pix_mp
->width
* fmt
->depth
[i
]) >> 3;
457 pix_mp
->plane_fmt
[i
].bytesperline
= bpl
;
458 pix_mp
->plane_fmt
[i
].sizeimage
= bpl
* pix_mp
->height
;
460 pr_debug("[%d]: bpl: %d, sizeimage: %d",
461 i
, bpl
, pix_mp
->plane_fmt
[i
].sizeimage
);
467 int gsc_g_fmt_mplane(struct gsc_ctx
*ctx
, struct v4l2_format
*f
)
469 struct gsc_frame
*frame
;
470 struct v4l2_pix_format_mplane
*pix_mp
;
473 frame
= ctx_get_frame(ctx
, f
->type
);
475 return PTR_ERR(frame
);
477 pix_mp
= &f
->fmt
.pix_mp
;
479 pix_mp
->width
= frame
->f_width
;
480 pix_mp
->height
= frame
->f_height
;
481 pix_mp
->field
= V4L2_FIELD_NONE
;
482 pix_mp
->pixelformat
= frame
->fmt
->pixelformat
;
483 pix_mp
->colorspace
= V4L2_COLORSPACE_REC709
;
484 pix_mp
->num_planes
= frame
->fmt
->num_planes
;
486 for (i
= 0; i
< pix_mp
->num_planes
; ++i
) {
487 pix_mp
->plane_fmt
[i
].bytesperline
= (frame
->f_width
*
488 frame
->fmt
->depth
[i
]) / 8;
489 pix_mp
->plane_fmt
[i
].sizeimage
=
490 pix_mp
->plane_fmt
[i
].bytesperline
* frame
->f_height
;
496 void gsc_check_crop_change(u32 tmp_w
, u32 tmp_h
, u32
*w
, u32
*h
)
498 if (tmp_w
!= *w
|| tmp_h
!= *h
) {
499 pr_info("Cropped size has been modified from %dx%d to %dx%d",
500 *w
, *h
, tmp_w
, tmp_h
);
506 int gsc_g_crop(struct gsc_ctx
*ctx
, struct v4l2_crop
*cr
)
508 struct gsc_frame
*frame
;
510 frame
= ctx_get_frame(ctx
, cr
->type
);
512 return PTR_ERR(frame
);
519 int gsc_try_crop(struct gsc_ctx
*ctx
, struct v4l2_crop
*cr
)
522 struct gsc_dev
*gsc
= ctx
->gsc_dev
;
523 struct gsc_variant
*variant
= gsc
->variant
;
524 u32 mod_x
= 0, mod_y
= 0, tmp_w
, tmp_h
;
525 u32 min_w
, min_h
, max_w
, max_h
;
527 if (cr
->c
.top
< 0 || cr
->c
.left
< 0) {
528 pr_err("doesn't support negative values for top & left\n");
531 pr_debug("user put w: %d, h: %d", cr
->c
.width
, cr
->c
.height
);
533 if (cr
->type
== V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE
)
535 else if (cr
->type
== V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE
)
543 tmp_h
= cr
->c
.height
;
545 if (V4L2_TYPE_IS_OUTPUT(cr
->type
)) {
546 if ((is_yuv422(f
->fmt
->color
) && f
->fmt
->num_comp
== 1) ||
547 is_rgb(f
->fmt
->color
))
551 if ((is_yuv422(f
->fmt
->color
) && f
->fmt
->num_comp
== 3) ||
552 is_yuv420(f
->fmt
->color
))
557 if (is_yuv420(f
->fmt
->color
) || is_yuv422(f
->fmt
->color
))
558 mod_x
= ffs(variant
->pix_align
->target_w
) - 1;
559 if (is_yuv420(f
->fmt
->color
))
560 mod_y
= ffs(variant
->pix_align
->target_h
) - 1;
561 if (ctx
->gsc_ctrls
.rotate
->val
== 90 ||
562 ctx
->gsc_ctrls
.rotate
->val
== 270) {
565 min_w
= variant
->pix_min
->target_rot_en_w
;
566 min_h
= variant
->pix_min
->target_rot_en_h
;
567 tmp_w
= cr
->c
.height
;
570 min_w
= variant
->pix_min
->target_rot_dis_w
;
571 min_h
= variant
->pix_min
->target_rot_dis_h
;
574 pr_debug("mod_x: %d, mod_y: %d, min_w: %d, min_h = %d",
575 mod_x
, mod_y
, min_w
, min_h
);
576 pr_debug("tmp_w : %d, tmp_h : %d", tmp_w
, tmp_h
);
578 v4l_bound_align_image(&tmp_w
, min_w
, max_w
, mod_x
,
579 &tmp_h
, min_h
, max_h
, mod_y
, 0);
581 if (!V4L2_TYPE_IS_OUTPUT(cr
->type
) &&
582 (ctx
->gsc_ctrls
.rotate
->val
== 90 ||
583 ctx
->gsc_ctrls
.rotate
->val
== 270))
584 gsc_check_crop_change(tmp_h
, tmp_w
,
585 &cr
->c
.width
, &cr
->c
.height
);
587 gsc_check_crop_change(tmp_w
, tmp_h
,
588 &cr
->c
.width
, &cr
->c
.height
);
591 /* adjust left/top if cropping rectangle is out of bounds */
592 /* Need to add code to algin left value with 2's multiple */
593 if (cr
->c
.left
+ tmp_w
> max_w
)
594 cr
->c
.left
= max_w
- tmp_w
;
595 if (cr
->c
.top
+ tmp_h
> max_h
)
596 cr
->c
.top
= max_h
- tmp_h
;
598 if ((is_yuv420(f
->fmt
->color
) || is_yuv422(f
->fmt
->color
)) &&
602 pr_debug("Aligned l:%d, t:%d, w:%d, h:%d, f_w: %d, f_h: %d",
603 cr
->c
.left
, cr
->c
.top
, cr
->c
.width
, cr
->c
.height
, max_w
, max_h
);
608 int gsc_check_scaler_ratio(struct gsc_variant
*var
, int sw
, int sh
, int dw
,
609 int dh
, int rot
, int out_path
)
611 int tmp_w
, tmp_h
, sc_down_max
;
613 if (out_path
== GSC_DMA
)
614 sc_down_max
= var
->sc_down_max
;
616 sc_down_max
= var
->local_sc_down
;
618 if (rot
== 90 || rot
== 270) {
626 if ((sw
/ tmp_w
) > sc_down_max
||
627 (sh
/ tmp_h
) > sc_down_max
||
628 (tmp_w
/ sw
) > var
->sc_up_max
||
629 (tmp_h
/ sh
) > var
->sc_up_max
)
635 int gsc_set_scaler_info(struct gsc_ctx
*ctx
)
637 struct gsc_scaler
*sc
= &ctx
->scaler
;
638 struct gsc_frame
*s_frame
= &ctx
->s_frame
;
639 struct gsc_frame
*d_frame
= &ctx
->d_frame
;
640 struct gsc_variant
*variant
= ctx
->gsc_dev
->variant
;
641 struct device
*dev
= &ctx
->gsc_dev
->pdev
->dev
;
645 ret
= gsc_check_scaler_ratio(variant
, s_frame
->crop
.width
,
646 s_frame
->crop
.height
, d_frame
->crop
.width
, d_frame
->crop
.height
,
647 ctx
->gsc_ctrls
.rotate
->val
, ctx
->out_path
);
649 pr_err("out of scaler range");
653 if (ctx
->gsc_ctrls
.rotate
->val
== 90 ||
654 ctx
->gsc_ctrls
.rotate
->val
== 270) {
655 ty
= d_frame
->crop
.width
;
656 tx
= d_frame
->crop
.height
;
658 tx
= d_frame
->crop
.width
;
659 ty
= d_frame
->crop
.height
;
662 if (tx
<= 0 || ty
<= 0) {
663 dev_err(dev
, "Invalid target size: %dx%d", tx
, ty
);
667 ret
= gsc_cal_prescaler_ratio(variant
, s_frame
->crop
.width
,
668 tx
, &sc
->pre_hratio
);
670 pr_err("Horizontal scale ratio is out of range");
674 ret
= gsc_cal_prescaler_ratio(variant
, s_frame
->crop
.height
,
675 ty
, &sc
->pre_vratio
);
677 pr_err("Vertical scale ratio is out of range");
681 gsc_check_src_scale_info(variant
, s_frame
, &sc
->pre_hratio
,
682 tx
, ty
, &sc
->pre_vratio
);
684 gsc_get_prescaler_shfactor(sc
->pre_hratio
, sc
->pre_vratio
,
687 sc
->main_hratio
= (s_frame
->crop
.width
<< 16) / tx
;
688 sc
->main_vratio
= (s_frame
->crop
.height
<< 16) / ty
;
690 pr_debug("scaler input/output size : sx = %d, sy = %d, tx = %d, ty = %d",
691 s_frame
->crop
.width
, s_frame
->crop
.height
, tx
, ty
);
692 pr_debug("scaler ratio info : pre_shfactor : %d, pre_h : %d",
693 sc
->pre_shfactor
, sc
->pre_hratio
);
694 pr_debug("pre_v :%d, main_h : %d, main_v : %d",
695 sc
->pre_vratio
, sc
->main_hratio
, sc
->main_vratio
);
700 static int __gsc_s_ctrl(struct gsc_ctx
*ctx
, struct v4l2_ctrl
*ctrl
)
702 struct gsc_dev
*gsc
= ctx
->gsc_dev
;
703 struct gsc_variant
*variant
= gsc
->variant
;
704 unsigned int flags
= GSC_DST_FMT
| GSC_SRC_FMT
;
707 if (ctrl
->flags
& V4L2_CTRL_FLAG_INACTIVE
)
712 ctx
->hflip
= ctrl
->val
;
716 ctx
->vflip
= ctrl
->val
;
719 case V4L2_CID_ROTATE
:
720 if ((ctx
->state
& flags
) == flags
) {
721 ret
= gsc_check_scaler_ratio(variant
,
722 ctx
->s_frame
.crop
.width
,
723 ctx
->s_frame
.crop
.height
,
724 ctx
->d_frame
.crop
.width
,
725 ctx
->d_frame
.crop
.height
,
726 ctx
->gsc_ctrls
.rotate
->val
,
733 ctx
->rotation
= ctrl
->val
;
736 case V4L2_CID_ALPHA_COMPONENT
:
737 ctx
->d_frame
.alpha
= ctrl
->val
;
741 ctx
->state
|= GSC_PARAMS
;
745 static int gsc_s_ctrl(struct v4l2_ctrl
*ctrl
)
747 struct gsc_ctx
*ctx
= ctrl_to_ctx(ctrl
);
751 spin_lock_irqsave(&ctx
->gsc_dev
->slock
, flags
);
752 ret
= __gsc_s_ctrl(ctx
, ctrl
);
753 spin_unlock_irqrestore(&ctx
->gsc_dev
->slock
, flags
);
758 static const struct v4l2_ctrl_ops gsc_ctrl_ops
= {
759 .s_ctrl
= gsc_s_ctrl
,
762 int gsc_ctrls_create(struct gsc_ctx
*ctx
)
764 if (ctx
->ctrls_rdy
) {
765 pr_err("Control handler of this context was created already");
769 v4l2_ctrl_handler_init(&ctx
->ctrl_handler
, GSC_MAX_CTRL_NUM
);
771 ctx
->gsc_ctrls
.rotate
= v4l2_ctrl_new_std(&ctx
->ctrl_handler
,
772 &gsc_ctrl_ops
, V4L2_CID_ROTATE
, 0, 270, 90, 0);
773 ctx
->gsc_ctrls
.hflip
= v4l2_ctrl_new_std(&ctx
->ctrl_handler
,
774 &gsc_ctrl_ops
, V4L2_CID_HFLIP
, 0, 1, 1, 0);
775 ctx
->gsc_ctrls
.vflip
= v4l2_ctrl_new_std(&ctx
->ctrl_handler
,
776 &gsc_ctrl_ops
, V4L2_CID_VFLIP
, 0, 1, 1, 0);
777 ctx
->gsc_ctrls
.global_alpha
= v4l2_ctrl_new_std(&ctx
->ctrl_handler
,
778 &gsc_ctrl_ops
, V4L2_CID_ALPHA_COMPONENT
, 0, 255, 1, 0);
780 ctx
->ctrls_rdy
= ctx
->ctrl_handler
.error
== 0;
782 if (ctx
->ctrl_handler
.error
) {
783 int err
= ctx
->ctrl_handler
.error
;
784 v4l2_ctrl_handler_free(&ctx
->ctrl_handler
);
785 pr_err("Failed to create G-Scaler control handlers");
792 void gsc_ctrls_delete(struct gsc_ctx
*ctx
)
794 if (ctx
->ctrls_rdy
) {
795 v4l2_ctrl_handler_free(&ctx
->ctrl_handler
);
796 ctx
->ctrls_rdy
= false;
800 /* The color format (num_comp, num_planes) must be already configured. */
801 int gsc_prepare_addr(struct gsc_ctx
*ctx
, struct vb2_buffer
*vb
,
802 struct gsc_frame
*frame
, struct gsc_addr
*addr
)
807 if ((vb
== NULL
) || (frame
== NULL
))
810 pix_size
= frame
->f_width
* frame
->f_height
;
812 pr_debug("num_planes= %d, num_comp= %d, pix_size= %d",
813 frame
->fmt
->num_planes
, frame
->fmt
->num_comp
, pix_size
);
815 addr
->y
= vb2_dma_contig_plane_dma_addr(vb
, 0);
817 if (frame
->fmt
->num_planes
== 1) {
818 switch (frame
->fmt
->num_comp
) {
824 /* decompose Y into Y/Cb */
825 addr
->cb
= (dma_addr_t
)(addr
->y
+ pix_size
);
829 /* decompose Y into Y/Cb/Cr */
830 addr
->cb
= (dma_addr_t
)(addr
->y
+ pix_size
);
831 if (GSC_YUV420
== frame
->fmt
->color
)
832 addr
->cr
= (dma_addr_t
)(addr
->cb
835 addr
->cr
= (dma_addr_t
)(addr
->cb
839 pr_err("Invalid the number of color planes");
843 if (frame
->fmt
->num_planes
>= 2)
844 addr
->cb
= vb2_dma_contig_plane_dma_addr(vb
, 1);
846 if (frame
->fmt
->num_planes
== 3)
847 addr
->cr
= vb2_dma_contig_plane_dma_addr(vb
, 2);
850 if ((frame
->fmt
->pixelformat
== V4L2_PIX_FMT_VYUY
) ||
851 (frame
->fmt
->pixelformat
== V4L2_PIX_FMT_YVYU
) ||
852 (frame
->fmt
->pixelformat
== V4L2_PIX_FMT_NV61
) ||
853 (frame
->fmt
->pixelformat
== V4L2_PIX_FMT_YVU420
) ||
854 (frame
->fmt
->pixelformat
== V4L2_PIX_FMT_NV21
) ||
855 (frame
->fmt
->pixelformat
== V4L2_PIX_FMT_YVU420M
))
856 swap(addr
->cb
, addr
->cr
);
858 pr_debug("ADDR: y= %pad cb= %pad cr= %pad ret= %d",
859 &addr
->y
, &addr
->cb
, &addr
->cr
, ret
);
864 static irqreturn_t
gsc_irq_handler(int irq
, void *priv
)
866 struct gsc_dev
*gsc
= priv
;
870 gsc_irq
= gsc_hw_get_irq_status(gsc
);
871 gsc_hw_clear_irq(gsc
, gsc_irq
);
873 if (gsc_irq
== GSC_IRQ_OVERRUN
) {
874 pr_err("Local path input over-run interrupt has occurred!\n");
878 spin_lock(&gsc
->slock
);
880 if (test_and_clear_bit(ST_M2M_PEND
, &gsc
->state
)) {
882 gsc_hw_enable_control(gsc
, false);
884 if (test_and_clear_bit(ST_M2M_SUSPENDING
, &gsc
->state
)) {
885 set_bit(ST_M2M_SUSPENDED
, &gsc
->state
);
886 wake_up(&gsc
->irq_queue
);
889 ctx
= v4l2_m2m_get_curr_priv(gsc
->m2m
.m2m_dev
);
891 if (!ctx
|| !ctx
->m2m_ctx
)
894 spin_unlock(&gsc
->slock
);
895 gsc_m2m_job_finish(ctx
, VB2_BUF_STATE_DONE
);
897 /* wake_up job_abort, stop_streaming */
898 if (ctx
->state
& GSC_CTX_STOP_REQ
) {
899 ctx
->state
&= ~GSC_CTX_STOP_REQ
;
900 wake_up(&gsc
->irq_queue
);
906 spin_unlock(&gsc
->slock
);
910 static struct gsc_pix_max gsc_v_100_max
= {
911 .org_scaler_bypass_w
= 8192,
912 .org_scaler_bypass_h
= 8192,
913 .org_scaler_input_w
= 4800,
914 .org_scaler_input_h
= 3344,
915 .real_rot_dis_w
= 4800,
916 .real_rot_dis_h
= 3344,
917 .real_rot_en_w
= 2047,
918 .real_rot_en_h
= 2047,
919 .target_rot_dis_w
= 4800,
920 .target_rot_dis_h
= 3344,
921 .target_rot_en_w
= 2016,
922 .target_rot_en_h
= 2016,
925 static struct gsc_pix_min gsc_v_100_min
= {
930 .target_rot_dis_w
= 64,
931 .target_rot_dis_h
= 32,
932 .target_rot_en_w
= 32,
933 .target_rot_en_h
= 16,
936 static struct gsc_pix_align gsc_v_100_align
= {
938 .org_w
= 16, /* yuv420 : 16, others : 8 */
939 .offset_h
= 2, /* yuv420/422 : 2, others : 1 */
940 .real_w
= 16, /* yuv420/422 : 4~16, others : 2~8 */
941 .real_h
= 16, /* yuv420 : 4~16, others : 1 */
942 .target_w
= 2, /* yuv420/422 : 2, others : 1 */
943 .target_h
= 2, /* yuv420 : 2, others : 1 */
946 static struct gsc_variant gsc_v_100_variant
= {
947 .pix_max
= &gsc_v_100_max
,
948 .pix_min
= &gsc_v_100_min
,
949 .pix_align
= &gsc_v_100_align
,
954 .poly_sc_down_max
= 4,
955 .pre_sc_down_max
= 4,
959 static struct gsc_driverdata gsc_v_100_drvdata
= {
961 [0] = &gsc_v_100_variant
,
962 [1] = &gsc_v_100_variant
,
963 [2] = &gsc_v_100_variant
,
964 [3] = &gsc_v_100_variant
,
967 .lclk_frequency
= 266000000UL,
970 static const struct of_device_id exynos_gsc_match
[] = {
972 .compatible
= "samsung,exynos5-gsc",
973 .data
= &gsc_v_100_drvdata
,
977 MODULE_DEVICE_TABLE(of
, exynos_gsc_match
);
979 static void *gsc_get_drv_data(struct platform_device
*pdev
)
981 struct gsc_driverdata
*driver_data
= NULL
;
982 const struct of_device_id
*match
;
984 match
= of_match_node(exynos_gsc_match
, pdev
->dev
.of_node
);
986 driver_data
= (struct gsc_driverdata
*)match
->data
;
991 static void gsc_clk_put(struct gsc_dev
*gsc
)
993 if (!IS_ERR(gsc
->clock
))
994 clk_unprepare(gsc
->clock
);
997 static int gsc_clk_get(struct gsc_dev
*gsc
)
1001 dev_dbg(&gsc
->pdev
->dev
, "gsc_clk_get Called\n");
1003 gsc
->clock
= devm_clk_get(&gsc
->pdev
->dev
, GSC_CLOCK_GATE_NAME
);
1004 if (IS_ERR(gsc
->clock
)) {
1005 dev_err(&gsc
->pdev
->dev
, "failed to get clock~~~: %s\n",
1006 GSC_CLOCK_GATE_NAME
);
1007 return PTR_ERR(gsc
->clock
);
1010 ret
= clk_prepare(gsc
->clock
);
1012 dev_err(&gsc
->pdev
->dev
, "clock prepare failed for clock: %s\n",
1013 GSC_CLOCK_GATE_NAME
);
1014 gsc
->clock
= ERR_PTR(-EINVAL
);
1021 static int gsc_m2m_suspend(struct gsc_dev
*gsc
)
1023 unsigned long flags
;
1026 spin_lock_irqsave(&gsc
->slock
, flags
);
1027 if (!gsc_m2m_pending(gsc
)) {
1028 spin_unlock_irqrestore(&gsc
->slock
, flags
);
1031 clear_bit(ST_M2M_SUSPENDED
, &gsc
->state
);
1032 set_bit(ST_M2M_SUSPENDING
, &gsc
->state
);
1033 spin_unlock_irqrestore(&gsc
->slock
, flags
);
1035 timeout
= wait_event_timeout(gsc
->irq_queue
,
1036 test_bit(ST_M2M_SUSPENDED
, &gsc
->state
),
1037 GSC_SHUTDOWN_TIMEOUT
);
1039 clear_bit(ST_M2M_SUSPENDING
, &gsc
->state
);
1040 return timeout
== 0 ? -EAGAIN
: 0;
1043 static int gsc_m2m_resume(struct gsc_dev
*gsc
)
1045 struct gsc_ctx
*ctx
;
1046 unsigned long flags
;
1048 spin_lock_irqsave(&gsc
->slock
, flags
);
1049 /* Clear for full H/W setup in first run after resume */
1051 gsc
->m2m
.ctx
= NULL
;
1052 spin_unlock_irqrestore(&gsc
->slock
, flags
);
1054 if (test_and_clear_bit(ST_M2M_SUSPENDED
, &gsc
->state
))
1055 gsc_m2m_job_finish(ctx
, VB2_BUF_STATE_ERROR
);
1060 static int gsc_probe(struct platform_device
*pdev
)
1062 struct gsc_dev
*gsc
;
1063 struct resource
*res
;
1064 struct gsc_driverdata
*drv_data
= gsc_get_drv_data(pdev
);
1065 struct device
*dev
= &pdev
->dev
;
1068 gsc
= devm_kzalloc(dev
, sizeof(struct gsc_dev
), GFP_KERNEL
);
1072 ret
= of_alias_get_id(pdev
->dev
.of_node
, "gsc");
1077 if (gsc
->id
>= drv_data
->num_entities
) {
1078 dev_err(dev
, "Invalid platform device id: %d\n", gsc
->id
);
1082 gsc
->variant
= drv_data
->variant
[gsc
->id
];
1085 init_waitqueue_head(&gsc
->irq_queue
);
1086 spin_lock_init(&gsc
->slock
);
1087 mutex_init(&gsc
->lock
);
1088 gsc
->clock
= ERR_PTR(-EINVAL
);
1090 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1091 gsc
->regs
= devm_ioremap_resource(dev
, res
);
1092 if (IS_ERR(gsc
->regs
))
1093 return PTR_ERR(gsc
->regs
);
1095 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
1097 dev_err(dev
, "failed to get IRQ resource\n");
1101 ret
= gsc_clk_get(gsc
);
1105 ret
= devm_request_irq(dev
, res
->start
, gsc_irq_handler
,
1106 0, pdev
->name
, gsc
);
1108 dev_err(dev
, "failed to install irq (%d)\n", ret
);
1112 ret
= v4l2_device_register(dev
, &gsc
->v4l2_dev
);
1116 ret
= gsc_register_m2m_device(gsc
);
1120 platform_set_drvdata(pdev
, gsc
);
1121 pm_runtime_enable(dev
);
1122 ret
= pm_runtime_get_sync(&pdev
->dev
);
1126 vb2_dma_contig_set_max_seg_size(dev
, DMA_BIT_MASK(32));
1128 dev_dbg(dev
, "gsc-%d registered successfully\n", gsc
->id
);
1130 pm_runtime_put(dev
);
1134 gsc_unregister_m2m_device(gsc
);
1136 v4l2_device_unregister(&gsc
->v4l2_dev
);
1142 static int gsc_remove(struct platform_device
*pdev
)
1144 struct gsc_dev
*gsc
= platform_get_drvdata(pdev
);
1146 gsc_unregister_m2m_device(gsc
);
1147 v4l2_device_unregister(&gsc
->v4l2_dev
);
1149 vb2_dma_contig_clear_max_seg_size(&pdev
->dev
);
1150 pm_runtime_disable(&pdev
->dev
);
1153 dev_dbg(&pdev
->dev
, "%s driver unloaded\n", pdev
->name
);
1157 static int gsc_runtime_resume(struct device
*dev
)
1159 struct gsc_dev
*gsc
= dev_get_drvdata(dev
);
1162 pr_debug("gsc%d: state: 0x%lx", gsc
->id
, gsc
->state
);
1164 ret
= clk_enable(gsc
->clock
);
1168 gsc_hw_set_sw_reset(gsc
);
1169 gsc_wait_reset(gsc
);
1171 return gsc_m2m_resume(gsc
);
1174 static int gsc_runtime_suspend(struct device
*dev
)
1176 struct gsc_dev
*gsc
= dev_get_drvdata(dev
);
1179 ret
= gsc_m2m_suspend(gsc
);
1181 clk_disable(gsc
->clock
);
1183 pr_debug("gsc%d: state: 0x%lx", gsc
->id
, gsc
->state
);
1187 static int gsc_resume(struct device
*dev
)
1189 struct gsc_dev
*gsc
= dev_get_drvdata(dev
);
1190 unsigned long flags
;
1192 pr_debug("gsc%d: state: 0x%lx", gsc
->id
, gsc
->state
);
1194 /* Do not resume if the device was idle before system suspend */
1195 spin_lock_irqsave(&gsc
->slock
, flags
);
1196 if (!test_and_clear_bit(ST_SUSPEND
, &gsc
->state
) ||
1197 !gsc_m2m_opened(gsc
)) {
1198 spin_unlock_irqrestore(&gsc
->slock
, flags
);
1201 spin_unlock_irqrestore(&gsc
->slock
, flags
);
1203 if (!pm_runtime_suspended(dev
))
1204 return gsc_runtime_resume(dev
);
1209 static int gsc_suspend(struct device
*dev
)
1211 struct gsc_dev
*gsc
= dev_get_drvdata(dev
);
1213 pr_debug("gsc%d: state: 0x%lx", gsc
->id
, gsc
->state
);
1215 if (test_and_set_bit(ST_SUSPEND
, &gsc
->state
))
1218 if (!pm_runtime_suspended(dev
))
1219 return gsc_runtime_suspend(dev
);
1224 static const struct dev_pm_ops gsc_pm_ops
= {
1225 .suspend
= gsc_suspend
,
1226 .resume
= gsc_resume
,
1227 .runtime_suspend
= gsc_runtime_suspend
,
1228 .runtime_resume
= gsc_runtime_resume
,
1231 static struct platform_driver gsc_driver
= {
1233 .remove
= gsc_remove
,
1235 .name
= GSC_MODULE_NAME
,
1237 .of_match_table
= exynos_gsc_match
,
1241 module_platform_driver(gsc_driver
);
1243 MODULE_AUTHOR("Hyunwong Kim <khw0178.kim@samsung.com>");
1244 MODULE_DESCRIPTION("Samsung EXYNOS5 Soc series G-Scaler driver");
1245 MODULE_LICENSE("GPL");