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1 /*
2 * Driver for Microtune MT2131 "QAM/8VSB single chip tuner"
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/module.h>
23 #include <linux/delay.h>
24 #include <linux/dvb/frontend.h>
25 #include <linux/i2c.h>
26 #include <linux/slab.h>
27
28 #include "dvb_frontend.h"
29
30 #include "mt2131.h"
31 #include "mt2131_priv.h"
32
33 static int debug;
34 module_param(debug, int, 0644);
35 MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
36
37 #define dprintk(level,fmt, arg...) if (debug >= level) \
38 printk(KERN_INFO "%s: " fmt, "mt2131", ## arg)
39
40 static u8 mt2131_config1[] = {
41 0x01,
42 0x50, 0x00, 0x50, 0x80, 0x00, 0x49, 0xfa, 0x88,
43 0x08, 0x77, 0x41, 0x04, 0x00, 0x00, 0x00, 0x32,
44 0x7f, 0xda, 0x4c, 0x00, 0x10, 0xaa, 0x78, 0x80,
45 0xff, 0x68, 0xa0, 0xff, 0xdd, 0x00, 0x00
46 };
47
48 static u8 mt2131_config2[] = {
49 0x10,
50 0x7f, 0xc8, 0x0a, 0x5f, 0x00, 0x04
51 };
52
53 static int mt2131_readreg(struct mt2131_priv *priv, u8 reg, u8 *val)
54 {
55 struct i2c_msg msg[2] = {
56 { .addr = priv->cfg->i2c_address, .flags = 0,
57 .buf = &reg, .len = 1 },
58 { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD,
59 .buf = val, .len = 1 },
60 };
61
62 if (i2c_transfer(priv->i2c, msg, 2) != 2) {
63 printk(KERN_WARNING "mt2131 I2C read failed\n");
64 return -EREMOTEIO;
65 }
66 return 0;
67 }
68
69 static int mt2131_writereg(struct mt2131_priv *priv, u8 reg, u8 val)
70 {
71 u8 buf[2] = { reg, val };
72 struct i2c_msg msg = { .addr = priv->cfg->i2c_address, .flags = 0,
73 .buf = buf, .len = 2 };
74
75 if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
76 printk(KERN_WARNING "mt2131 I2C write failed\n");
77 return -EREMOTEIO;
78 }
79 return 0;
80 }
81
82 static int mt2131_writeregs(struct mt2131_priv *priv,u8 *buf, u8 len)
83 {
84 struct i2c_msg msg = { .addr = priv->cfg->i2c_address,
85 .flags = 0, .buf = buf, .len = len };
86
87 if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
88 printk(KERN_WARNING "mt2131 I2C write failed (len=%i)\n",
89 (int)len);
90 return -EREMOTEIO;
91 }
92 return 0;
93 }
94
95 static int mt2131_set_params(struct dvb_frontend *fe)
96 {
97 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
98 struct mt2131_priv *priv;
99 int ret=0, i;
100 u32 freq;
101 u8 if_band_center;
102 u32 f_lo1, f_lo2;
103 u32 div1, num1, div2, num2;
104 u8 b[8];
105 u8 lockval = 0;
106
107 priv = fe->tuner_priv;
108
109 freq = c->frequency / 1000; /* Hz -> kHz */
110 dprintk(1, "%s() freq=%d\n", __func__, freq);
111
112 f_lo1 = freq + MT2131_IF1 * 1000;
113 f_lo1 = (f_lo1 / 250) * 250;
114 f_lo2 = f_lo1 - freq - MT2131_IF2;
115
116 priv->frequency = (f_lo1 - f_lo2 - MT2131_IF2) * 1000;
117
118 /* Frequency LO1 = 16MHz * (DIV1 + NUM1/8192 ) */
119 num1 = f_lo1 * 64 / (MT2131_FREF / 128);
120 div1 = num1 / 8192;
121 num1 &= 0x1fff;
122
123 /* Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 ) */
124 num2 = f_lo2 * 64 / (MT2131_FREF / 128);
125 div2 = num2 / 8192;
126 num2 &= 0x1fff;
127
128 if (freq <= 82500) if_band_center = 0x00; else
129 if (freq <= 137500) if_band_center = 0x01; else
130 if (freq <= 192500) if_band_center = 0x02; else
131 if (freq <= 247500) if_band_center = 0x03; else
132 if (freq <= 302500) if_band_center = 0x04; else
133 if (freq <= 357500) if_band_center = 0x05; else
134 if (freq <= 412500) if_band_center = 0x06; else
135 if (freq <= 467500) if_band_center = 0x07; else
136 if (freq <= 522500) if_band_center = 0x08; else
137 if (freq <= 577500) if_band_center = 0x09; else
138 if (freq <= 632500) if_band_center = 0x0A; else
139 if (freq <= 687500) if_band_center = 0x0B; else
140 if (freq <= 742500) if_band_center = 0x0C; else
141 if (freq <= 797500) if_band_center = 0x0D; else
142 if (freq <= 852500) if_band_center = 0x0E; else
143 if (freq <= 907500) if_band_center = 0x0F; else
144 if (freq <= 962500) if_band_center = 0x10; else
145 if (freq <= 1017500) if_band_center = 0x11; else
146 if (freq <= 1072500) if_band_center = 0x12; else if_band_center = 0x13;
147
148 b[0] = 1;
149 b[1] = (num1 >> 5) & 0xFF;
150 b[2] = (num1 & 0x1F);
151 b[3] = div1;
152 b[4] = (num2 >> 5) & 0xFF;
153 b[5] = num2 & 0x1F;
154 b[6] = div2;
155
156 dprintk(1, "IF1: %dMHz IF2: %dMHz\n", MT2131_IF1, MT2131_IF2);
157 dprintk(1, "PLL freq=%dkHz band=%d\n", (int)freq, (int)if_band_center);
158 dprintk(1, "PLL f_lo1=%dkHz f_lo2=%dkHz\n", (int)f_lo1, (int)f_lo2);
159 dprintk(1, "PLL div1=%d num1=%d div2=%d num2=%d\n",
160 (int)div1, (int)num1, (int)div2, (int)num2);
161 dprintk(1, "PLL [1..6]: %2x %2x %2x %2x %2x %2x\n",
162 (int)b[1], (int)b[2], (int)b[3], (int)b[4], (int)b[5],
163 (int)b[6]);
164
165 ret = mt2131_writeregs(priv,b,7);
166 if (ret < 0)
167 return ret;
168
169 mt2131_writereg(priv, 0x0b, if_band_center);
170
171 /* Wait for lock */
172 i = 0;
173 do {
174 mt2131_readreg(priv, 0x08, &lockval);
175 if ((lockval & 0x88) == 0x88)
176 break;
177 msleep(4);
178 i++;
179 } while (i < 10);
180
181 return ret;
182 }
183
184 static int mt2131_get_frequency(struct dvb_frontend *fe, u32 *frequency)
185 {
186 struct mt2131_priv *priv = fe->tuner_priv;
187 dprintk(1, "%s()\n", __func__);
188 *frequency = priv->frequency;
189 return 0;
190 }
191
192 static int mt2131_get_status(struct dvb_frontend *fe, u32 *status)
193 {
194 struct mt2131_priv *priv = fe->tuner_priv;
195 u8 lock_status = 0;
196 u8 afc_status = 0;
197
198 *status = 0;
199
200 mt2131_readreg(priv, 0x08, &lock_status);
201 if ((lock_status & 0x88) == 0x88)
202 *status = TUNER_STATUS_LOCKED;
203
204 mt2131_readreg(priv, 0x09, &afc_status);
205 dprintk(1, "%s() - LO Status = 0x%x, AFC Status = 0x%x\n",
206 __func__, lock_status, afc_status);
207
208 return 0;
209 }
210
211 static int mt2131_init(struct dvb_frontend *fe)
212 {
213 struct mt2131_priv *priv = fe->tuner_priv;
214 int ret;
215 dprintk(1, "%s()\n", __func__);
216
217 if ((ret = mt2131_writeregs(priv, mt2131_config1,
218 sizeof(mt2131_config1))) < 0)
219 return ret;
220
221 mt2131_writereg(priv, 0x0b, 0x09);
222 mt2131_writereg(priv, 0x15, 0x47);
223 mt2131_writereg(priv, 0x07, 0xf2);
224 mt2131_writereg(priv, 0x0b, 0x01);
225
226 if ((ret = mt2131_writeregs(priv, mt2131_config2,
227 sizeof(mt2131_config2))) < 0)
228 return ret;
229
230 return ret;
231 }
232
233 static void mt2131_release(struct dvb_frontend *fe)
234 {
235 dprintk(1, "%s()\n", __func__);
236 kfree(fe->tuner_priv);
237 fe->tuner_priv = NULL;
238 }
239
240 static const struct dvb_tuner_ops mt2131_tuner_ops = {
241 .info = {
242 .name = "Microtune MT2131",
243 .frequency_min = 48000000,
244 .frequency_max = 860000000,
245 .frequency_step = 50000,
246 },
247
248 .release = mt2131_release,
249 .init = mt2131_init,
250
251 .set_params = mt2131_set_params,
252 .get_frequency = mt2131_get_frequency,
253 .get_status = mt2131_get_status
254 };
255
256 struct dvb_frontend * mt2131_attach(struct dvb_frontend *fe,
257 struct i2c_adapter *i2c,
258 struct mt2131_config *cfg, u16 if1)
259 {
260 struct mt2131_priv *priv = NULL;
261 u8 id = 0;
262
263 dprintk(1, "%s()\n", __func__);
264
265 priv = kzalloc(sizeof(struct mt2131_priv), GFP_KERNEL);
266 if (priv == NULL)
267 return NULL;
268
269 priv->cfg = cfg;
270 priv->i2c = i2c;
271
272 if (mt2131_readreg(priv, 0, &id) != 0) {
273 kfree(priv);
274 return NULL;
275 }
276 if ( (id != 0x3E) && (id != 0x3F) ) {
277 printk(KERN_ERR "MT2131: Device not found at addr 0x%02x\n",
278 cfg->i2c_address);
279 kfree(priv);
280 return NULL;
281 }
282
283 printk(KERN_INFO "MT2131: successfully identified at address 0x%02x\n",
284 cfg->i2c_address);
285 memcpy(&fe->ops.tuner_ops, &mt2131_tuner_ops,
286 sizeof(struct dvb_tuner_ops));
287
288 fe->tuner_priv = priv;
289 return fe;
290 }
291 EXPORT_SYMBOL(mt2131_attach);
292
293 MODULE_AUTHOR("Steven Toth");
294 MODULE_DESCRIPTION("Microtune MT2131 silicon tuner driver");
295 MODULE_LICENSE("GPL");