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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/livep...
[mirror_ubuntu-artful-kernel.git] / drivers / media / usb / gspca / ov519.c
1 /**
2 * OV519 driver
3 *
4 * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6 *
7 * This module is adapted from the ov51x-jpeg package, which itself
8 * was adapted from the ov511 driver.
9 *
10 * Original copyright for the ov511 driver is:
11 *
12 * Copyright (c) 1999-2006 Mark W. McClelland
13 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
14 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
15 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
16 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
17 * Changes by Claudio Matsuoka <claudio@conectiva.com>
18 *
19 * ov51x-jpeg original copyright is:
20 *
21 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
22 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
23 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
37 *
38 */
39
40 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
41
42 #define MODULE_NAME "ov519"
43
44 #include <linux/input.h>
45 #include "gspca.h"
46
47 /* The jpeg_hdr is used by w996Xcf only */
48 /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
49 #define CONEX_CAM
50 #include "jpeg.h"
51
52 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
53 MODULE_DESCRIPTION("OV519 USB Camera Driver");
54 MODULE_LICENSE("GPL");
55
56 /* global parameters */
57 static int frame_rate;
58
59 /* Number of times to retry a failed I2C transaction. Increase this if you
60 * are getting "Failed to read sensor ID..." */
61 static int i2c_detect_tries = 10;
62
63 /* ov519 device descriptor */
64 struct sd {
65 struct gspca_dev gspca_dev; /* !! must be the first item */
66
67 struct v4l2_ctrl *jpegqual;
68 struct v4l2_ctrl *freq;
69 struct { /* h/vflip control cluster */
70 struct v4l2_ctrl *hflip;
71 struct v4l2_ctrl *vflip;
72 };
73 struct { /* autobrightness/brightness control cluster */
74 struct v4l2_ctrl *autobright;
75 struct v4l2_ctrl *brightness;
76 };
77
78 u8 revision;
79
80 u8 packet_nr;
81
82 char bridge;
83 #define BRIDGE_OV511 0
84 #define BRIDGE_OV511PLUS 1
85 #define BRIDGE_OV518 2
86 #define BRIDGE_OV518PLUS 3
87 #define BRIDGE_OV519 4 /* = ov530 */
88 #define BRIDGE_OVFX2 5
89 #define BRIDGE_W9968CF 6
90 #define BRIDGE_MASK 7
91
92 char invert_led;
93 #define BRIDGE_INVERT_LED 8
94
95 char snapshot_pressed;
96 char snapshot_needs_reset;
97
98 /* Determined by sensor type */
99 u8 sif;
100
101 #define QUALITY_MIN 50
102 #define QUALITY_MAX 70
103 #define QUALITY_DEF 50
104
105 u8 stopped; /* Streaming is temporarily paused */
106 u8 first_frame;
107
108 u8 frame_rate; /* current Framerate */
109 u8 clockdiv; /* clockdiv override */
110
111 s8 sensor; /* Type of image sensor chip (SEN_*) */
112
113 u8 sensor_addr;
114 u16 sensor_width;
115 u16 sensor_height;
116 s16 sensor_reg_cache[256];
117
118 u8 jpeg_hdr[JPEG_HDR_SZ];
119 };
120 enum sensors {
121 SEN_OV2610,
122 SEN_OV2610AE,
123 SEN_OV3610,
124 SEN_OV6620,
125 SEN_OV6630,
126 SEN_OV66308AF,
127 SEN_OV7610,
128 SEN_OV7620,
129 SEN_OV7620AE,
130 SEN_OV7640,
131 SEN_OV7648,
132 SEN_OV7660,
133 SEN_OV7670,
134 SEN_OV76BE,
135 SEN_OV8610,
136 SEN_OV9600,
137 };
138
139 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
140 the ov sensors which is already present here. When we have the time we
141 really should move the sensor drivers to v4l2 sub drivers. */
142 #include "w996Xcf.c"
143
144 /* table of the disabled controls */
145 struct ctrl_valid {
146 unsigned int has_brightness:1;
147 unsigned int has_contrast:1;
148 unsigned int has_exposure:1;
149 unsigned int has_autogain:1;
150 unsigned int has_sat:1;
151 unsigned int has_hvflip:1;
152 unsigned int has_autobright:1;
153 unsigned int has_freq:1;
154 };
155
156 static const struct ctrl_valid valid_controls[] = {
157 [SEN_OV2610] = {
158 .has_exposure = 1,
159 .has_autogain = 1,
160 },
161 [SEN_OV2610AE] = {
162 .has_exposure = 1,
163 .has_autogain = 1,
164 },
165 [SEN_OV3610] = {
166 /* No controls */
167 },
168 [SEN_OV6620] = {
169 .has_brightness = 1,
170 .has_contrast = 1,
171 .has_sat = 1,
172 .has_autobright = 1,
173 .has_freq = 1,
174 },
175 [SEN_OV6630] = {
176 .has_brightness = 1,
177 .has_contrast = 1,
178 .has_sat = 1,
179 .has_autobright = 1,
180 .has_freq = 1,
181 },
182 [SEN_OV66308AF] = {
183 .has_brightness = 1,
184 .has_contrast = 1,
185 .has_sat = 1,
186 .has_autobright = 1,
187 .has_freq = 1,
188 },
189 [SEN_OV7610] = {
190 .has_brightness = 1,
191 .has_contrast = 1,
192 .has_sat = 1,
193 .has_autobright = 1,
194 .has_freq = 1,
195 },
196 [SEN_OV7620] = {
197 .has_brightness = 1,
198 .has_contrast = 1,
199 .has_sat = 1,
200 .has_autobright = 1,
201 .has_freq = 1,
202 },
203 [SEN_OV7620AE] = {
204 .has_brightness = 1,
205 .has_contrast = 1,
206 .has_sat = 1,
207 .has_autobright = 1,
208 .has_freq = 1,
209 },
210 [SEN_OV7640] = {
211 .has_brightness = 1,
212 .has_sat = 1,
213 .has_freq = 1,
214 },
215 [SEN_OV7648] = {
216 .has_brightness = 1,
217 .has_sat = 1,
218 .has_freq = 1,
219 },
220 [SEN_OV7660] = {
221 .has_brightness = 1,
222 .has_contrast = 1,
223 .has_sat = 1,
224 .has_hvflip = 1,
225 .has_freq = 1,
226 },
227 [SEN_OV7670] = {
228 .has_brightness = 1,
229 .has_contrast = 1,
230 .has_hvflip = 1,
231 .has_freq = 1,
232 },
233 [SEN_OV76BE] = {
234 .has_brightness = 1,
235 .has_contrast = 1,
236 .has_sat = 1,
237 .has_autobright = 1,
238 .has_freq = 1,
239 },
240 [SEN_OV8610] = {
241 .has_brightness = 1,
242 .has_contrast = 1,
243 .has_sat = 1,
244 .has_autobright = 1,
245 },
246 [SEN_OV9600] = {
247 .has_exposure = 1,
248 .has_autogain = 1,
249 },
250 };
251
252 static const struct v4l2_pix_format ov519_vga_mode[] = {
253 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
254 .bytesperline = 320,
255 .sizeimage = 320 * 240 * 3 / 8 + 590,
256 .colorspace = V4L2_COLORSPACE_JPEG,
257 .priv = 1},
258 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
259 .bytesperline = 640,
260 .sizeimage = 640 * 480 * 3 / 8 + 590,
261 .colorspace = V4L2_COLORSPACE_JPEG,
262 .priv = 0},
263 };
264 static const struct v4l2_pix_format ov519_sif_mode[] = {
265 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
266 .bytesperline = 160,
267 .sizeimage = 160 * 120 * 3 / 8 + 590,
268 .colorspace = V4L2_COLORSPACE_JPEG,
269 .priv = 3},
270 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
271 .bytesperline = 176,
272 .sizeimage = 176 * 144 * 3 / 8 + 590,
273 .colorspace = V4L2_COLORSPACE_JPEG,
274 .priv = 1},
275 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
276 .bytesperline = 320,
277 .sizeimage = 320 * 240 * 3 / 8 + 590,
278 .colorspace = V4L2_COLORSPACE_JPEG,
279 .priv = 2},
280 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
281 .bytesperline = 352,
282 .sizeimage = 352 * 288 * 3 / 8 + 590,
283 .colorspace = V4L2_COLORSPACE_JPEG,
284 .priv = 0},
285 };
286
287 /* Note some of the sizeimage values for the ov511 / ov518 may seem
288 larger then necessary, however they need to be this big as the ov511 /
289 ov518 always fills the entire isoc frame, using 0 padding bytes when
290 it doesn't have any data. So with low framerates the amount of data
291 transferred can become quite large (libv4l will remove all the 0 padding
292 in userspace). */
293 static const struct v4l2_pix_format ov518_vga_mode[] = {
294 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
295 .bytesperline = 320,
296 .sizeimage = 320 * 240 * 3,
297 .colorspace = V4L2_COLORSPACE_JPEG,
298 .priv = 1},
299 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
300 .bytesperline = 640,
301 .sizeimage = 640 * 480 * 2,
302 .colorspace = V4L2_COLORSPACE_JPEG,
303 .priv = 0},
304 };
305 static const struct v4l2_pix_format ov518_sif_mode[] = {
306 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
307 .bytesperline = 160,
308 .sizeimage = 70000,
309 .colorspace = V4L2_COLORSPACE_JPEG,
310 .priv = 3},
311 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
312 .bytesperline = 176,
313 .sizeimage = 70000,
314 .colorspace = V4L2_COLORSPACE_JPEG,
315 .priv = 1},
316 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
317 .bytesperline = 320,
318 .sizeimage = 320 * 240 * 3,
319 .colorspace = V4L2_COLORSPACE_JPEG,
320 .priv = 2},
321 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
322 .bytesperline = 352,
323 .sizeimage = 352 * 288 * 3,
324 .colorspace = V4L2_COLORSPACE_JPEG,
325 .priv = 0},
326 };
327
328 static const struct v4l2_pix_format ov511_vga_mode[] = {
329 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
330 .bytesperline = 320,
331 .sizeimage = 320 * 240 * 3,
332 .colorspace = V4L2_COLORSPACE_JPEG,
333 .priv = 1},
334 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
335 .bytesperline = 640,
336 .sizeimage = 640 * 480 * 2,
337 .colorspace = V4L2_COLORSPACE_JPEG,
338 .priv = 0},
339 };
340 static const struct v4l2_pix_format ov511_sif_mode[] = {
341 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
342 .bytesperline = 160,
343 .sizeimage = 70000,
344 .colorspace = V4L2_COLORSPACE_JPEG,
345 .priv = 3},
346 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
347 .bytesperline = 176,
348 .sizeimage = 70000,
349 .colorspace = V4L2_COLORSPACE_JPEG,
350 .priv = 1},
351 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
352 .bytesperline = 320,
353 .sizeimage = 320 * 240 * 3,
354 .colorspace = V4L2_COLORSPACE_JPEG,
355 .priv = 2},
356 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
357 .bytesperline = 352,
358 .sizeimage = 352 * 288 * 3,
359 .colorspace = V4L2_COLORSPACE_JPEG,
360 .priv = 0},
361 };
362
363 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
364 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
365 .bytesperline = 800,
366 .sizeimage = 800 * 600,
367 .colorspace = V4L2_COLORSPACE_SRGB,
368 .priv = 1},
369 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
370 .bytesperline = 1600,
371 .sizeimage = 1600 * 1200,
372 .colorspace = V4L2_COLORSPACE_SRGB},
373 };
374 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
375 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
376 .bytesperline = 640,
377 .sizeimage = 640 * 480,
378 .colorspace = V4L2_COLORSPACE_SRGB,
379 .priv = 1},
380 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
381 .bytesperline = 800,
382 .sizeimage = 800 * 600,
383 .colorspace = V4L2_COLORSPACE_SRGB,
384 .priv = 1},
385 {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
386 .bytesperline = 1024,
387 .sizeimage = 1024 * 768,
388 .colorspace = V4L2_COLORSPACE_SRGB,
389 .priv = 1},
390 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
391 .bytesperline = 1600,
392 .sizeimage = 1600 * 1200,
393 .colorspace = V4L2_COLORSPACE_SRGB,
394 .priv = 0},
395 {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
396 .bytesperline = 2048,
397 .sizeimage = 2048 * 1536,
398 .colorspace = V4L2_COLORSPACE_SRGB,
399 .priv = 0},
400 };
401 static const struct v4l2_pix_format ovfx2_ov9600_mode[] = {
402 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
403 .bytesperline = 640,
404 .sizeimage = 640 * 480,
405 .colorspace = V4L2_COLORSPACE_SRGB,
406 .priv = 1},
407 {1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
408 .bytesperline = 1280,
409 .sizeimage = 1280 * 1024,
410 .colorspace = V4L2_COLORSPACE_SRGB},
411 };
412
413 /* Registers common to OV511 / OV518 */
414 #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
415 #define R51x_SYS_RESET 0x50
416 /* Reset type flags */
417 #define OV511_RESET_OMNICE 0x08
418 #define R51x_SYS_INIT 0x53
419 #define R51x_SYS_SNAP 0x52
420 #define R51x_SYS_CUST_ID 0x5f
421 #define R51x_COMP_LUT_BEGIN 0x80
422
423 /* OV511 Camera interface register numbers */
424 #define R511_CAM_DELAY 0x10
425 #define R511_CAM_EDGE 0x11
426 #define R511_CAM_PXCNT 0x12
427 #define R511_CAM_LNCNT 0x13
428 #define R511_CAM_PXDIV 0x14
429 #define R511_CAM_LNDIV 0x15
430 #define R511_CAM_UV_EN 0x16
431 #define R511_CAM_LINE_MODE 0x17
432 #define R511_CAM_OPTS 0x18
433
434 #define R511_SNAP_FRAME 0x19
435 #define R511_SNAP_PXCNT 0x1a
436 #define R511_SNAP_LNCNT 0x1b
437 #define R511_SNAP_PXDIV 0x1c
438 #define R511_SNAP_LNDIV 0x1d
439 #define R511_SNAP_UV_EN 0x1e
440 #define R511_SNAP_OPTS 0x1f
441
442 #define R511_DRAM_FLOW_CTL 0x20
443 #define R511_FIFO_OPTS 0x31
444 #define R511_I2C_CTL 0x40
445 #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
446 #define R511_COMP_EN 0x78
447 #define R511_COMP_LUT_EN 0x79
448
449 /* OV518 Camera interface register numbers */
450 #define R518_GPIO_OUT 0x56 /* OV518(+) only */
451 #define R518_GPIO_CTL 0x57 /* OV518(+) only */
452
453 /* OV519 Camera interface register numbers */
454 #define OV519_R10_H_SIZE 0x10
455 #define OV519_R11_V_SIZE 0x11
456 #define OV519_R12_X_OFFSETL 0x12
457 #define OV519_R13_X_OFFSETH 0x13
458 #define OV519_R14_Y_OFFSETL 0x14
459 #define OV519_R15_Y_OFFSETH 0x15
460 #define OV519_R16_DIVIDER 0x16
461 #define OV519_R20_DFR 0x20
462 #define OV519_R25_FORMAT 0x25
463
464 /* OV519 System Controller register numbers */
465 #define OV519_R51_RESET1 0x51
466 #define OV519_R54_EN_CLK1 0x54
467 #define OV519_R57_SNAPSHOT 0x57
468
469 #define OV519_GPIO_DATA_OUT0 0x71
470 #define OV519_GPIO_IO_CTRL0 0x72
471
472 /*#define OV511_ENDPOINT_ADDRESS 1 * Isoc endpoint number */
473
474 /*
475 * The FX2 chip does not give us a zero length read at end of frame.
476 * It does, however, give a short read at the end of a frame, if
477 * necessary, rather than run two frames together.
478 *
479 * By choosing the right bulk transfer size, we are guaranteed to always
480 * get a short read for the last read of each frame. Frame sizes are
481 * always a composite number (width * height, or a multiple) so if we
482 * choose a prime number, we are guaranteed that the last read of a
483 * frame will be short.
484 *
485 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
486 * otherwise EOVERFLOW "babbling" errors occur. I have not been able
487 * to figure out why. [PMiller]
488 *
489 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
490 *
491 * It isn't enough to know the number of bytes per frame, in case we
492 * have data dropouts or buffer overruns (even though the FX2 double
493 * buffers, there are some pretty strict real time constraints for
494 * isochronous transfer for larger frame sizes).
495 */
496 /*jfm: this value does not work for 800x600 - see isoc_init */
497 #define OVFX2_BULK_SIZE (13 * 4096)
498
499 /* I2C registers */
500 #define R51x_I2C_W_SID 0x41
501 #define R51x_I2C_SADDR_3 0x42
502 #define R51x_I2C_SADDR_2 0x43
503 #define R51x_I2C_R_SID 0x44
504 #define R51x_I2C_DATA 0x45
505 #define R518_I2C_CTL 0x47 /* OV518(+) only */
506 #define OVFX2_I2C_ADDR 0x00
507
508 /* I2C ADDRESSES */
509 #define OV7xx0_SID 0x42
510 #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
511 #define OV8xx0_SID 0xa0
512 #define OV6xx0_SID 0xc0
513
514 /* OV7610 registers */
515 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
516 #define OV7610_REG_BLUE 0x01 /* blue channel balance */
517 #define OV7610_REG_RED 0x02 /* red channel balance */
518 #define OV7610_REG_SAT 0x03 /* saturation */
519 #define OV8610_REG_HUE 0x04 /* 04 reserved */
520 #define OV7610_REG_CNT 0x05 /* Y contrast */
521 #define OV7610_REG_BRT 0x06 /* Y brightness */
522 #define OV7610_REG_COM_C 0x14 /* misc common regs */
523 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
524 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
525 #define OV7610_REG_COM_I 0x29 /* misc settings */
526
527 /* OV7660 and OV7670 registers */
528 #define OV7670_R00_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
529 #define OV7670_R01_BLUE 0x01 /* blue gain */
530 #define OV7670_R02_RED 0x02 /* red gain */
531 #define OV7670_R03_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
532 #define OV7670_R04_COM1 0x04 /* Control 1 */
533 /*#define OV7670_R07_AECHH 0x07 * AEC MS 5 bits */
534 #define OV7670_R0C_COM3 0x0c /* Control 3 */
535 #define OV7670_R0D_COM4 0x0d /* Control 4 */
536 #define OV7670_R0E_COM5 0x0e /* All "reserved" */
537 #define OV7670_R0F_COM6 0x0f /* Control 6 */
538 #define OV7670_R10_AECH 0x10 /* More bits of AEC value */
539 #define OV7670_R11_CLKRC 0x11 /* Clock control */
540 #define OV7670_R12_COM7 0x12 /* Control 7 */
541 #define OV7670_COM7_FMT_VGA 0x00
542 /*#define OV7670_COM7_YUV 0x00 * YUV */
543 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
544 #define OV7670_COM7_FMT_MASK 0x38
545 #define OV7670_COM7_RESET 0x80 /* Register reset */
546 #define OV7670_R13_COM8 0x13 /* Control 8 */
547 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
548 #define OV7670_COM8_AWB 0x02 /* White balance enable */
549 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
550 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
551 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
552 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
553 #define OV7670_R14_COM9 0x14 /* Control 9 - gain ceiling */
554 #define OV7670_R15_COM10 0x15 /* Control 10 */
555 #define OV7670_R17_HSTART 0x17 /* Horiz start high bits */
556 #define OV7670_R18_HSTOP 0x18 /* Horiz stop high bits */
557 #define OV7670_R19_VSTART 0x19 /* Vert start high bits */
558 #define OV7670_R1A_VSTOP 0x1a /* Vert stop high bits */
559 #define OV7670_R1E_MVFP 0x1e /* Mirror / vflip */
560 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
561 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
562 #define OV7670_R24_AEW 0x24 /* AGC upper limit */
563 #define OV7670_R25_AEB 0x25 /* AGC lower limit */
564 #define OV7670_R26_VPT 0x26 /* AGC/AEC fast mode op region */
565 #define OV7670_R32_HREF 0x32 /* HREF pieces */
566 #define OV7670_R3A_TSLB 0x3a /* lots of stuff */
567 #define OV7670_R3B_COM11 0x3b /* Control 11 */
568 #define OV7670_COM11_EXP 0x02
569 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
570 #define OV7670_R3C_COM12 0x3c /* Control 12 */
571 #define OV7670_R3D_COM13 0x3d /* Control 13 */
572 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
573 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
574 #define OV7670_R3E_COM14 0x3e /* Control 14 */
575 #define OV7670_R3F_EDGE 0x3f /* Edge enhancement factor */
576 #define OV7670_R40_COM15 0x40 /* Control 15 */
577 /*#define OV7670_COM15_R00FF 0xc0 * 00 to FF */
578 #define OV7670_R41_COM16 0x41 /* Control 16 */
579 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
580 /* end of ov7660 common registers */
581 #define OV7670_R55_BRIGHT 0x55 /* Brightness */
582 #define OV7670_R56_CONTRAS 0x56 /* Contrast control */
583 #define OV7670_R69_GFIX 0x69 /* Fix gain control */
584 /*#define OV7670_R8C_RGB444 0x8c * RGB 444 control */
585 #define OV7670_R9F_HAECC1 0x9f /* Hist AEC/AGC control 1 */
586 #define OV7670_RA0_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
587 #define OV7670_RA5_BD50MAX 0xa5 /* 50hz banding step limit */
588 #define OV7670_RA6_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
589 #define OV7670_RA7_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
590 #define OV7670_RA8_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
591 #define OV7670_RA9_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
592 #define OV7670_RAA_HAECC7 0xaa /* Hist AEC/AGC control 7 */
593 #define OV7670_RAB_BD60MAX 0xab /* 60hz banding step limit */
594
595 struct ov_regvals {
596 u8 reg;
597 u8 val;
598 };
599 struct ov_i2c_regvals {
600 u8 reg;
601 u8 val;
602 };
603
604 /* Settings for OV2610 camera chip */
605 static const struct ov_i2c_regvals norm_2610[] = {
606 { 0x12, 0x80 }, /* reset */
607 };
608
609 static const struct ov_i2c_regvals norm_2610ae[] = {
610 {0x12, 0x80}, /* reset */
611 {0x13, 0xcd},
612 {0x09, 0x01},
613 {0x0d, 0x00},
614 {0x11, 0x80},
615 {0x12, 0x20}, /* 1600x1200 */
616 {0x33, 0x0c},
617 {0x35, 0x90},
618 {0x36, 0x37},
619 /* ms-win traces */
620 {0x11, 0x83}, /* clock / 3 ? */
621 {0x2d, 0x00}, /* 60 Hz filter */
622 {0x24, 0xb0}, /* normal colors */
623 {0x25, 0x90},
624 {0x10, 0x43},
625 };
626
627 static const struct ov_i2c_regvals norm_3620b[] = {
628 /*
629 * From the datasheet: "Note that after writing to register COMH
630 * (0x12) to change the sensor mode, registers related to the
631 * sensor’s cropping window will be reset back to their default
632 * values."
633 *
634 * "wait 4096 external clock ... to make sure the sensor is
635 * stable and ready to access registers" i.e. 160us at 24MHz
636 */
637 { 0x12, 0x80 }, /* COMH reset */
638 { 0x12, 0x00 }, /* QXGA, master */
639
640 /*
641 * 11 CLKRC "Clock Rate Control"
642 * [7] internal frequency doublers: on
643 * [6] video port mode: master
644 * [5:0] clock divider: 1
645 */
646 { 0x11, 0x80 },
647
648 /*
649 * 13 COMI "Common Control I"
650 * = 192 (0xC0) 11000000
651 * COMI[7] "AEC speed selection"
652 * = 1 (0x01) 1....... "Faster AEC correction"
653 * COMI[6] "AEC speed step selection"
654 * = 1 (0x01) .1...... "Big steps, fast"
655 * COMI[5] "Banding filter on off"
656 * = 0 (0x00) ..0..... "Off"
657 * COMI[4] "Banding filter option"
658 * = 0 (0x00) ...0.... "Main clock is 48 MHz and
659 * the PLL is ON"
660 * COMI[3] "Reserved"
661 * = 0 (0x00) ....0...
662 * COMI[2] "AGC auto manual control selection"
663 * = 0 (0x00) .....0.. "Manual"
664 * COMI[1] "AWB auto manual control selection"
665 * = 0 (0x00) ......0. "Manual"
666 * COMI[0] "Exposure control"
667 * = 0 (0x00) .......0 "Manual"
668 */
669 { 0x13, 0xc0 },
670
671 /*
672 * 09 COMC "Common Control C"
673 * = 8 (0x08) 00001000
674 * COMC[7:5] "Reserved"
675 * = 0 (0x00) 000.....
676 * COMC[4] "Sleep Mode Enable"
677 * = 0 (0x00) ...0.... "Normal mode"
678 * COMC[3:2] "Sensor sampling reset timing selection"
679 * = 2 (0x02) ....10.. "Longer reset time"
680 * COMC[1:0] "Output drive current select"
681 * = 0 (0x00) ......00 "Weakest"
682 */
683 { 0x09, 0x08 },
684
685 /*
686 * 0C COMD "Common Control D"
687 * = 8 (0x08) 00001000
688 * COMD[7] "Reserved"
689 * = 0 (0x00) 0.......
690 * COMD[6] "Swap MSB and LSB at the output port"
691 * = 0 (0x00) .0...... "False"
692 * COMD[5:3] "Reserved"
693 * = 1 (0x01) ..001...
694 * COMD[2] "Output Average On Off"
695 * = 0 (0x00) .....0.. "Output Normal"
696 * COMD[1] "Sensor precharge voltage selection"
697 * = 0 (0x00) ......0. "Selects internal
698 * reference precharge
699 * voltage"
700 * COMD[0] "Snapshot option"
701 * = 0 (0x00) .......0 "Enable live video output
702 * after snapshot sequence"
703 */
704 { 0x0c, 0x08 },
705
706 /*
707 * 0D COME "Common Control E"
708 * = 161 (0xA1) 10100001
709 * COME[7] "Output average option"
710 * = 1 (0x01) 1....... "Output average of 4 pixels"
711 * COME[6] "Anti-blooming control"
712 * = 0 (0x00) .0...... "Off"
713 * COME[5:3] "Reserved"
714 * = 4 (0x04) ..100...
715 * COME[2] "Clock output power down pin status"
716 * = 0 (0x00) .....0.. "Tri-state data output pin
717 * on power down"
718 * COME[1] "Data output pin status selection at power down"
719 * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
720 * HREF, and CHSYNC pins on
721 * power down"
722 * COME[0] "Auto zero circuit select"
723 * = 1 (0x01) .......1 "On"
724 */
725 { 0x0d, 0xa1 },
726
727 /*
728 * 0E COMF "Common Control F"
729 * = 112 (0x70) 01110000
730 * COMF[7] "System clock selection"
731 * = 0 (0x00) 0....... "Use 24 MHz system clock"
732 * COMF[6:4] "Reserved"
733 * = 7 (0x07) .111....
734 * COMF[3] "Manual auto negative offset canceling selection"
735 * = 0 (0x00) ....0... "Auto detect negative
736 * offset and cancel it"
737 * COMF[2:0] "Reserved"
738 * = 0 (0x00) .....000
739 */
740 { 0x0e, 0x70 },
741
742 /*
743 * 0F COMG "Common Control G"
744 * = 66 (0x42) 01000010
745 * COMG[7] "Optical black output selection"
746 * = 0 (0x00) 0....... "Disable"
747 * COMG[6] "Black level calibrate selection"
748 * = 1 (0x01) .1...... "Use optical black pixels
749 * to calibrate"
750 * COMG[5:4] "Reserved"
751 * = 0 (0x00) ..00....
752 * COMG[3] "Channel offset adjustment"
753 * = 0 (0x00) ....0... "Disable offset adjustment"
754 * COMG[2] "ADC black level calibration option"
755 * = 0 (0x00) .....0.. "Use B/G line and G/R
756 * line to calibrate each
757 * channel's black level"
758 * COMG[1] "Reserved"
759 * = 1 (0x01) ......1.
760 * COMG[0] "ADC black level calibration enable"
761 * = 0 (0x00) .......0 "Disable"
762 */
763 { 0x0f, 0x42 },
764
765 /*
766 * 14 COMJ "Common Control J"
767 * = 198 (0xC6) 11000110
768 * COMJ[7:6] "AGC gain ceiling"
769 * = 3 (0x03) 11...... "8x"
770 * COMJ[5:4] "Reserved"
771 * = 0 (0x00) ..00....
772 * COMJ[3] "Auto banding filter"
773 * = 0 (0x00) ....0... "Banding filter is always
774 * on off depending on
775 * COMI[5] setting"
776 * COMJ[2] "VSYNC drop option"
777 * = 1 (0x01) .....1.. "SYNC is dropped if frame
778 * data is dropped"
779 * COMJ[1] "Frame data drop"
780 * = 1 (0x01) ......1. "Drop frame data if
781 * exposure is not within
782 * tolerance. In AEC mode,
783 * data is normally dropped
784 * when data is out of
785 * range."
786 * COMJ[0] "Reserved"
787 * = 0 (0x00) .......0
788 */
789 { 0x14, 0xc6 },
790
791 /*
792 * 15 COMK "Common Control K"
793 * = 2 (0x02) 00000010
794 * COMK[7] "CHSYNC pin output swap"
795 * = 0 (0x00) 0....... "CHSYNC"
796 * COMK[6] "HREF pin output swap"
797 * = 0 (0x00) .0...... "HREF"
798 * COMK[5] "PCLK output selection"
799 * = 0 (0x00) ..0..... "PCLK always output"
800 * COMK[4] "PCLK edge selection"
801 * = 0 (0x00) ...0.... "Data valid on falling edge"
802 * COMK[3] "HREF output polarity"
803 * = 0 (0x00) ....0... "positive"
804 * COMK[2] "Reserved"
805 * = 0 (0x00) .....0..
806 * COMK[1] "VSYNC polarity"
807 * = 1 (0x01) ......1. "negative"
808 * COMK[0] "HSYNC polarity"
809 * = 0 (0x00) .......0 "positive"
810 */
811 { 0x15, 0x02 },
812
813 /*
814 * 33 CHLF "Current Control"
815 * = 9 (0x09) 00001001
816 * CHLF[7:6] "Sensor current control"
817 * = 0 (0x00) 00......
818 * CHLF[5] "Sensor current range control"
819 * = 0 (0x00) ..0..... "normal range"
820 * CHLF[4] "Sensor current"
821 * = 0 (0x00) ...0.... "normal current"
822 * CHLF[3] "Sensor buffer current control"
823 * = 1 (0x01) ....1... "half current"
824 * CHLF[2] "Column buffer current control"
825 * = 0 (0x00) .....0.. "normal current"
826 * CHLF[1] "Analog DSP current control"
827 * = 0 (0x00) ......0. "normal current"
828 * CHLF[1] "ADC current control"
829 * = 0 (0x00) ......0. "normal current"
830 */
831 { 0x33, 0x09 },
832
833 /*
834 * 34 VBLM "Blooming Control"
835 * = 80 (0x50) 01010000
836 * VBLM[7] "Hard soft reset switch"
837 * = 0 (0x00) 0....... "Hard reset"
838 * VBLM[6:4] "Blooming voltage selection"
839 * = 5 (0x05) .101....
840 * VBLM[3:0] "Sensor current control"
841 * = 0 (0x00) ....0000
842 */
843 { 0x34, 0x50 },
844
845 /*
846 * 36 VCHG "Sensor Precharge Voltage Control"
847 * = 0 (0x00) 00000000
848 * VCHG[7] "Reserved"
849 * = 0 (0x00) 0.......
850 * VCHG[6:4] "Sensor precharge voltage control"
851 * = 0 (0x00) .000....
852 * VCHG[3:0] "Sensor array common reference"
853 * = 0 (0x00) ....0000
854 */
855 { 0x36, 0x00 },
856
857 /*
858 * 37 ADC "ADC Reference Control"
859 * = 4 (0x04) 00000100
860 * ADC[7:4] "Reserved"
861 * = 0 (0x00) 0000....
862 * ADC[3] "ADC input signal range"
863 * = 0 (0x00) ....0... "Input signal 1.0x"
864 * ADC[2:0] "ADC range control"
865 * = 4 (0x04) .....100
866 */
867 { 0x37, 0x04 },
868
869 /*
870 * 38 ACOM "Analog Common Ground"
871 * = 82 (0x52) 01010010
872 * ACOM[7] "Analog gain control"
873 * = 0 (0x00) 0....... "Gain 1x"
874 * ACOM[6] "Analog black level calibration"
875 * = 1 (0x01) .1...... "On"
876 * ACOM[5:0] "Reserved"
877 * = 18 (0x12) ..010010
878 */
879 { 0x38, 0x52 },
880
881 /*
882 * 3A FREFA "Internal Reference Adjustment"
883 * = 0 (0x00) 00000000
884 * FREFA[7:0] "Range"
885 * = 0 (0x00) 00000000
886 */
887 { 0x3a, 0x00 },
888
889 /*
890 * 3C FVOPT "Internal Reference Adjustment"
891 * = 31 (0x1F) 00011111
892 * FVOPT[7:0] "Range"
893 * = 31 (0x1F) 00011111
894 */
895 { 0x3c, 0x1f },
896
897 /*
898 * 44 Undocumented = 0 (0x00) 00000000
899 * 44[7:0] "It's a secret"
900 * = 0 (0x00) 00000000
901 */
902 { 0x44, 0x00 },
903
904 /*
905 * 40 Undocumented = 0 (0x00) 00000000
906 * 40[7:0] "It's a secret"
907 * = 0 (0x00) 00000000
908 */
909 { 0x40, 0x00 },
910
911 /*
912 * 41 Undocumented = 0 (0x00) 00000000
913 * 41[7:0] "It's a secret"
914 * = 0 (0x00) 00000000
915 */
916 { 0x41, 0x00 },
917
918 /*
919 * 42 Undocumented = 0 (0x00) 00000000
920 * 42[7:0] "It's a secret"
921 * = 0 (0x00) 00000000
922 */
923 { 0x42, 0x00 },
924
925 /*
926 * 43 Undocumented = 0 (0x00) 00000000
927 * 43[7:0] "It's a secret"
928 * = 0 (0x00) 00000000
929 */
930 { 0x43, 0x00 },
931
932 /*
933 * 45 Undocumented = 128 (0x80) 10000000
934 * 45[7:0] "It's a secret"
935 * = 128 (0x80) 10000000
936 */
937 { 0x45, 0x80 },
938
939 /*
940 * 48 Undocumented = 192 (0xC0) 11000000
941 * 48[7:0] "It's a secret"
942 * = 192 (0xC0) 11000000
943 */
944 { 0x48, 0xc0 },
945
946 /*
947 * 49 Undocumented = 25 (0x19) 00011001
948 * 49[7:0] "It's a secret"
949 * = 25 (0x19) 00011001
950 */
951 { 0x49, 0x19 },
952
953 /*
954 * 4B Undocumented = 128 (0x80) 10000000
955 * 4B[7:0] "It's a secret"
956 * = 128 (0x80) 10000000
957 */
958 { 0x4b, 0x80 },
959
960 /*
961 * 4D Undocumented = 196 (0xC4) 11000100
962 * 4D[7:0] "It's a secret"
963 * = 196 (0xC4) 11000100
964 */
965 { 0x4d, 0xc4 },
966
967 /*
968 * 35 VREF "Reference Voltage Control"
969 * = 76 (0x4c) 01001100
970 * VREF[7:5] "Column high reference control"
971 * = 2 (0x02) 010..... "higher voltage"
972 * VREF[4:2] "Column low reference control"
973 * = 3 (0x03) ...011.. "Highest voltage"
974 * VREF[1:0] "Reserved"
975 * = 0 (0x00) ......00
976 */
977 { 0x35, 0x4c },
978
979 /*
980 * 3D Undocumented = 0 (0x00) 00000000
981 * 3D[7:0] "It's a secret"
982 * = 0 (0x00) 00000000
983 */
984 { 0x3d, 0x00 },
985
986 /*
987 * 3E Undocumented = 0 (0x00) 00000000
988 * 3E[7:0] "It's a secret"
989 * = 0 (0x00) 00000000
990 */
991 { 0x3e, 0x00 },
992
993 /*
994 * 3B FREFB "Internal Reference Adjustment"
995 * = 24 (0x18) 00011000
996 * FREFB[7:0] "Range"
997 * = 24 (0x18) 00011000
998 */
999 { 0x3b, 0x18 },
1000
1001 /*
1002 * 33 CHLF "Current Control"
1003 * = 25 (0x19) 00011001
1004 * CHLF[7:6] "Sensor current control"
1005 * = 0 (0x00) 00......
1006 * CHLF[5] "Sensor current range control"
1007 * = 0 (0x00) ..0..... "normal range"
1008 * CHLF[4] "Sensor current"
1009 * = 1 (0x01) ...1.... "double current"
1010 * CHLF[3] "Sensor buffer current control"
1011 * = 1 (0x01) ....1... "half current"
1012 * CHLF[2] "Column buffer current control"
1013 * = 0 (0x00) .....0.. "normal current"
1014 * CHLF[1] "Analog DSP current control"
1015 * = 0 (0x00) ......0. "normal current"
1016 * CHLF[1] "ADC current control"
1017 * = 0 (0x00) ......0. "normal current"
1018 */
1019 { 0x33, 0x19 },
1020
1021 /*
1022 * 34 VBLM "Blooming Control"
1023 * = 90 (0x5A) 01011010
1024 * VBLM[7] "Hard soft reset switch"
1025 * = 0 (0x00) 0....... "Hard reset"
1026 * VBLM[6:4] "Blooming voltage selection"
1027 * = 5 (0x05) .101....
1028 * VBLM[3:0] "Sensor current control"
1029 * = 10 (0x0A) ....1010
1030 */
1031 { 0x34, 0x5a },
1032
1033 /*
1034 * 3B FREFB "Internal Reference Adjustment"
1035 * = 0 (0x00) 00000000
1036 * FREFB[7:0] "Range"
1037 * = 0 (0x00) 00000000
1038 */
1039 { 0x3b, 0x00 },
1040
1041 /*
1042 * 33 CHLF "Current Control"
1043 * = 9 (0x09) 00001001
1044 * CHLF[7:6] "Sensor current control"
1045 * = 0 (0x00) 00......
1046 * CHLF[5] "Sensor current range control"
1047 * = 0 (0x00) ..0..... "normal range"
1048 * CHLF[4] "Sensor current"
1049 * = 0 (0x00) ...0.... "normal current"
1050 * CHLF[3] "Sensor buffer current control"
1051 * = 1 (0x01) ....1... "half current"
1052 * CHLF[2] "Column buffer current control"
1053 * = 0 (0x00) .....0.. "normal current"
1054 * CHLF[1] "Analog DSP current control"
1055 * = 0 (0x00) ......0. "normal current"
1056 * CHLF[1] "ADC current control"
1057 * = 0 (0x00) ......0. "normal current"
1058 */
1059 { 0x33, 0x09 },
1060
1061 /*
1062 * 34 VBLM "Blooming Control"
1063 * = 80 (0x50) 01010000
1064 * VBLM[7] "Hard soft reset switch"
1065 * = 0 (0x00) 0....... "Hard reset"
1066 * VBLM[6:4] "Blooming voltage selection"
1067 * = 5 (0x05) .101....
1068 * VBLM[3:0] "Sensor current control"
1069 * = 0 (0x00) ....0000
1070 */
1071 { 0x34, 0x50 },
1072
1073 /*
1074 * 12 COMH "Common Control H"
1075 * = 64 (0x40) 01000000
1076 * COMH[7] "SRST"
1077 * = 0 (0x00) 0....... "No-op"
1078 * COMH[6:4] "Resolution selection"
1079 * = 4 (0x04) .100.... "XGA"
1080 * COMH[3] "Master slave selection"
1081 * = 0 (0x00) ....0... "Master mode"
1082 * COMH[2] "Internal B/R channel option"
1083 * = 0 (0x00) .....0.. "B/R use same channel"
1084 * COMH[1] "Color bar test pattern"
1085 * = 0 (0x00) ......0. "Off"
1086 * COMH[0] "Reserved"
1087 * = 0 (0x00) .......0
1088 */
1089 { 0x12, 0x40 },
1090
1091 /*
1092 * 17 HREFST "Horizontal window start"
1093 * = 31 (0x1F) 00011111
1094 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1095 * = 31 (0x1F) 00011111
1096 */
1097 { 0x17, 0x1f },
1098
1099 /*
1100 * 18 HREFEND "Horizontal window end"
1101 * = 95 (0x5F) 01011111
1102 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1103 * = 95 (0x5F) 01011111
1104 */
1105 { 0x18, 0x5f },
1106
1107 /*
1108 * 19 VSTRT "Vertical window start"
1109 * = 0 (0x00) 00000000
1110 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1111 * = 0 (0x00) 00000000
1112 */
1113 { 0x19, 0x00 },
1114
1115 /*
1116 * 1A VEND "Vertical window end"
1117 * = 96 (0x60) 01100000
1118 * VEND[7:0] "Vertical Window End, 8 MSBs"
1119 * = 96 (0x60) 01100000
1120 */
1121 { 0x1a, 0x60 },
1122
1123 /*
1124 * 32 COMM "Common Control M"
1125 * = 18 (0x12) 00010010
1126 * COMM[7:6] "Pixel clock divide option"
1127 * = 0 (0x00) 00...... "/1"
1128 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1129 * = 2 (0x02) ..010...
1130 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1131 * = 2 (0x02) .....010
1132 */
1133 { 0x32, 0x12 },
1134
1135 /*
1136 * 03 COMA "Common Control A"
1137 * = 74 (0x4A) 01001010
1138 * COMA[7:4] "AWB Update Threshold"
1139 * = 4 (0x04) 0100....
1140 * COMA[3:2] "Vertical window end line control 2 LSBs"
1141 * = 2 (0x02) ....10..
1142 * COMA[1:0] "Vertical window start line control 2 LSBs"
1143 * = 2 (0x02) ......10
1144 */
1145 { 0x03, 0x4a },
1146
1147 /*
1148 * 11 CLKRC "Clock Rate Control"
1149 * = 128 (0x80) 10000000
1150 * CLKRC[7] "Internal frequency doublers on off seclection"
1151 * = 1 (0x01) 1....... "On"
1152 * CLKRC[6] "Digital video master slave selection"
1153 * = 0 (0x00) .0...... "Master mode, sensor
1154 * provides PCLK"
1155 * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1156 * = 0 (0x00) ..000000
1157 */
1158 { 0x11, 0x80 },
1159
1160 /*
1161 * 12 COMH "Common Control H"
1162 * = 0 (0x00) 00000000
1163 * COMH[7] "SRST"
1164 * = 0 (0x00) 0....... "No-op"
1165 * COMH[6:4] "Resolution selection"
1166 * = 0 (0x00) .000.... "QXGA"
1167 * COMH[3] "Master slave selection"
1168 * = 0 (0x00) ....0... "Master mode"
1169 * COMH[2] "Internal B/R channel option"
1170 * = 0 (0x00) .....0.. "B/R use same channel"
1171 * COMH[1] "Color bar test pattern"
1172 * = 0 (0x00) ......0. "Off"
1173 * COMH[0] "Reserved"
1174 * = 0 (0x00) .......0
1175 */
1176 { 0x12, 0x00 },
1177
1178 /*
1179 * 12 COMH "Common Control H"
1180 * = 64 (0x40) 01000000
1181 * COMH[7] "SRST"
1182 * = 0 (0x00) 0....... "No-op"
1183 * COMH[6:4] "Resolution selection"
1184 * = 4 (0x04) .100.... "XGA"
1185 * COMH[3] "Master slave selection"
1186 * = 0 (0x00) ....0... "Master mode"
1187 * COMH[2] "Internal B/R channel option"
1188 * = 0 (0x00) .....0.. "B/R use same channel"
1189 * COMH[1] "Color bar test pattern"
1190 * = 0 (0x00) ......0. "Off"
1191 * COMH[0] "Reserved"
1192 * = 0 (0x00) .......0
1193 */
1194 { 0x12, 0x40 },
1195
1196 /*
1197 * 17 HREFST "Horizontal window start"
1198 * = 31 (0x1F) 00011111
1199 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1200 * = 31 (0x1F) 00011111
1201 */
1202 { 0x17, 0x1f },
1203
1204 /*
1205 * 18 HREFEND "Horizontal window end"
1206 * = 95 (0x5F) 01011111
1207 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1208 * = 95 (0x5F) 01011111
1209 */
1210 { 0x18, 0x5f },
1211
1212 /*
1213 * 19 VSTRT "Vertical window start"
1214 * = 0 (0x00) 00000000
1215 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1216 * = 0 (0x00) 00000000
1217 */
1218 { 0x19, 0x00 },
1219
1220 /*
1221 * 1A VEND "Vertical window end"
1222 * = 96 (0x60) 01100000
1223 * VEND[7:0] "Vertical Window End, 8 MSBs"
1224 * = 96 (0x60) 01100000
1225 */
1226 { 0x1a, 0x60 },
1227
1228 /*
1229 * 32 COMM "Common Control M"
1230 * = 18 (0x12) 00010010
1231 * COMM[7:6] "Pixel clock divide option"
1232 * = 0 (0x00) 00...... "/1"
1233 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1234 * = 2 (0x02) ..010...
1235 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1236 * = 2 (0x02) .....010
1237 */
1238 { 0x32, 0x12 },
1239
1240 /*
1241 * 03 COMA "Common Control A"
1242 * = 74 (0x4A) 01001010
1243 * COMA[7:4] "AWB Update Threshold"
1244 * = 4 (0x04) 0100....
1245 * COMA[3:2] "Vertical window end line control 2 LSBs"
1246 * = 2 (0x02) ....10..
1247 * COMA[1:0] "Vertical window start line control 2 LSBs"
1248 * = 2 (0x02) ......10
1249 */
1250 { 0x03, 0x4a },
1251
1252 /*
1253 * 02 RED "Red Gain Control"
1254 * = 175 (0xAF) 10101111
1255 * RED[7] "Action"
1256 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1257 * RED[6:0] "Value"
1258 * = 47 (0x2F) .0101111
1259 */
1260 { 0x02, 0xaf },
1261
1262 /*
1263 * 2D ADDVSL "VSYNC Pulse Width"
1264 * = 210 (0xD2) 11010010
1265 * ADDVSL[7:0] "VSYNC pulse width, LSB"
1266 * = 210 (0xD2) 11010010
1267 */
1268 { 0x2d, 0xd2 },
1269
1270 /*
1271 * 00 GAIN = 24 (0x18) 00011000
1272 * GAIN[7:6] "Reserved"
1273 * = 0 (0x00) 00......
1274 * GAIN[5] "Double"
1275 * = 0 (0x00) ..0..... "False"
1276 * GAIN[4] "Double"
1277 * = 1 (0x01) ...1.... "True"
1278 * GAIN[3:0] "Range"
1279 * = 8 (0x08) ....1000
1280 */
1281 { 0x00, 0x18 },
1282
1283 /*
1284 * 01 BLUE "Blue Gain Control"
1285 * = 240 (0xF0) 11110000
1286 * BLUE[7] "Action"
1287 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1288 * BLUE[6:0] "Value"
1289 * = 112 (0x70) .1110000
1290 */
1291 { 0x01, 0xf0 },
1292
1293 /*
1294 * 10 AEC "Automatic Exposure Control"
1295 * = 10 (0x0A) 00001010
1296 * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1297 * = 10 (0x0A) 00001010
1298 */
1299 { 0x10, 0x0a },
1300
1301 { 0xe1, 0x67 },
1302 { 0xe3, 0x03 },
1303 { 0xe4, 0x26 },
1304 { 0xe5, 0x3e },
1305 { 0xf8, 0x01 },
1306 { 0xff, 0x01 },
1307 };
1308
1309 static const struct ov_i2c_regvals norm_6x20[] = {
1310 { 0x12, 0x80 }, /* reset */
1311 { 0x11, 0x01 },
1312 { 0x03, 0x60 },
1313 { 0x05, 0x7f }, /* For when autoadjust is off */
1314 { 0x07, 0xa8 },
1315 /* The ratio of 0x0c and 0x0d controls the white point */
1316 { 0x0c, 0x24 },
1317 { 0x0d, 0x24 },
1318 { 0x0f, 0x15 }, /* COMS */
1319 { 0x10, 0x75 }, /* AEC Exposure time */
1320 { 0x12, 0x24 }, /* Enable AGC */
1321 { 0x14, 0x04 },
1322 /* 0x16: 0x06 helps frame stability with moving objects */
1323 { 0x16, 0x06 },
1324 /* { 0x20, 0x30 }, * Aperture correction enable */
1325 { 0x26, 0xb2 }, /* BLC enable */
1326 /* 0x28: 0x05 Selects RGB format if RGB on */
1327 { 0x28, 0x05 },
1328 { 0x2a, 0x04 }, /* Disable framerate adjust */
1329 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
1330 { 0x2d, 0x85 },
1331 { 0x33, 0xa0 }, /* Color Processing Parameter */
1332 { 0x34, 0xd2 }, /* Max A/D range */
1333 { 0x38, 0x8b },
1334 { 0x39, 0x40 },
1335
1336 { 0x3c, 0x39 }, /* Enable AEC mode changing */
1337 { 0x3c, 0x3c }, /* Change AEC mode */
1338 { 0x3c, 0x24 }, /* Disable AEC mode changing */
1339
1340 { 0x3d, 0x80 },
1341 /* These next two registers (0x4a, 0x4b) are undocumented.
1342 * They control the color balance */
1343 { 0x4a, 0x80 },
1344 { 0x4b, 0x80 },
1345 { 0x4d, 0xd2 }, /* This reduces noise a bit */
1346 { 0x4e, 0xc1 },
1347 { 0x4f, 0x04 },
1348 /* Do 50-53 have any effect? */
1349 /* Toggle 0x12[2] off and on here? */
1350 };
1351
1352 static const struct ov_i2c_regvals norm_6x30[] = {
1353 { 0x12, 0x80 }, /* Reset */
1354 { 0x00, 0x1f }, /* Gain */
1355 { 0x01, 0x99 }, /* Blue gain */
1356 { 0x02, 0x7c }, /* Red gain */
1357 { 0x03, 0xc0 }, /* Saturation */
1358 { 0x05, 0x0a }, /* Contrast */
1359 { 0x06, 0x95 }, /* Brightness */
1360 { 0x07, 0x2d }, /* Sharpness */
1361 { 0x0c, 0x20 },
1362 { 0x0d, 0x20 },
1363 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1364 { 0x0f, 0x05 },
1365 { 0x10, 0x9a },
1366 { 0x11, 0x00 }, /* Pixel clock = fastest */
1367 { 0x12, 0x24 }, /* Enable AGC and AWB */
1368 { 0x13, 0x21 },
1369 { 0x14, 0x80 },
1370 { 0x15, 0x01 },
1371 { 0x16, 0x03 },
1372 { 0x17, 0x38 },
1373 { 0x18, 0xea },
1374 { 0x19, 0x04 },
1375 { 0x1a, 0x93 },
1376 { 0x1b, 0x00 },
1377 { 0x1e, 0xc4 },
1378 { 0x1f, 0x04 },
1379 { 0x20, 0x20 },
1380 { 0x21, 0x10 },
1381 { 0x22, 0x88 },
1382 { 0x23, 0xc0 }, /* Crystal circuit power level */
1383 { 0x25, 0x9a }, /* Increase AEC black ratio */
1384 { 0x26, 0xb2 }, /* BLC enable */
1385 { 0x27, 0xa2 },
1386 { 0x28, 0x00 },
1387 { 0x29, 0x00 },
1388 { 0x2a, 0x84 }, /* 60 Hz power */
1389 { 0x2b, 0xa8 }, /* 60 Hz power */
1390 { 0x2c, 0xa0 },
1391 { 0x2d, 0x95 }, /* Enable auto-brightness */
1392 { 0x2e, 0x88 },
1393 { 0x33, 0x26 },
1394 { 0x34, 0x03 },
1395 { 0x36, 0x8f },
1396 { 0x37, 0x80 },
1397 { 0x38, 0x83 },
1398 { 0x39, 0x80 },
1399 { 0x3a, 0x0f },
1400 { 0x3b, 0x3c },
1401 { 0x3c, 0x1a },
1402 { 0x3d, 0x80 },
1403 { 0x3e, 0x80 },
1404 { 0x3f, 0x0e },
1405 { 0x40, 0x00 }, /* White bal */
1406 { 0x41, 0x00 }, /* White bal */
1407 { 0x42, 0x80 },
1408 { 0x43, 0x3f }, /* White bal */
1409 { 0x44, 0x80 },
1410 { 0x45, 0x20 },
1411 { 0x46, 0x20 },
1412 { 0x47, 0x80 },
1413 { 0x48, 0x7f },
1414 { 0x49, 0x00 },
1415 { 0x4a, 0x00 },
1416 { 0x4b, 0x80 },
1417 { 0x4c, 0xd0 },
1418 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1419 { 0x4e, 0x40 },
1420 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1421 { 0x50, 0xff },
1422 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1423 { 0x55, 0xff },
1424 { 0x56, 0x12 },
1425 { 0x57, 0x81 },
1426 { 0x58, 0x75 },
1427 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1428 { 0x5a, 0x2c },
1429 { 0x5b, 0x0f }, /* AWB chrominance levels */
1430 { 0x5c, 0x10 },
1431 { 0x3d, 0x80 },
1432 { 0x27, 0xa6 },
1433 { 0x12, 0x20 }, /* Toggle AWB */
1434 { 0x12, 0x24 },
1435 };
1436
1437 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1438 *
1439 * Register 0x0f in the 7610 has the following effects:
1440 *
1441 * 0x85 (AEC method 1): Best overall, good contrast range
1442 * 0x45 (AEC method 2): Very overexposed
1443 * 0xa5 (spec sheet default): Ok, but the black level is
1444 * shifted resulting in loss of contrast
1445 * 0x05 (old driver setting): very overexposed, too much
1446 * contrast
1447 */
1448 static const struct ov_i2c_regvals norm_7610[] = {
1449 { 0x10, 0xff },
1450 { 0x16, 0x06 },
1451 { 0x28, 0x24 },
1452 { 0x2b, 0xac },
1453 { 0x12, 0x00 },
1454 { 0x38, 0x81 },
1455 { 0x28, 0x24 }, /* 0c */
1456 { 0x0f, 0x85 }, /* lg's setting */
1457 { 0x15, 0x01 },
1458 { 0x20, 0x1c },
1459 { 0x23, 0x2a },
1460 { 0x24, 0x10 },
1461 { 0x25, 0x8a },
1462 { 0x26, 0xa2 },
1463 { 0x27, 0xc2 },
1464 { 0x2a, 0x04 },
1465 { 0x2c, 0xfe },
1466 { 0x2d, 0x93 },
1467 { 0x30, 0x71 },
1468 { 0x31, 0x60 },
1469 { 0x32, 0x26 },
1470 { 0x33, 0x20 },
1471 { 0x34, 0x48 },
1472 { 0x12, 0x24 },
1473 { 0x11, 0x01 },
1474 { 0x0c, 0x24 },
1475 { 0x0d, 0x24 },
1476 };
1477
1478 static const struct ov_i2c_regvals norm_7620[] = {
1479 { 0x12, 0x80 }, /* reset */
1480 { 0x00, 0x00 }, /* gain */
1481 { 0x01, 0x80 }, /* blue gain */
1482 { 0x02, 0x80 }, /* red gain */
1483 { 0x03, 0xc0 }, /* OV7670_R03_VREF */
1484 { 0x06, 0x60 },
1485 { 0x07, 0x00 },
1486 { 0x0c, 0x24 },
1487 { 0x0c, 0x24 },
1488 { 0x0d, 0x24 },
1489 { 0x11, 0x01 },
1490 { 0x12, 0x24 },
1491 { 0x13, 0x01 },
1492 { 0x14, 0x84 },
1493 { 0x15, 0x01 },
1494 { 0x16, 0x03 },
1495 { 0x17, 0x2f },
1496 { 0x18, 0xcf },
1497 { 0x19, 0x06 },
1498 { 0x1a, 0xf5 },
1499 { 0x1b, 0x00 },
1500 { 0x20, 0x18 },
1501 { 0x21, 0x80 },
1502 { 0x22, 0x80 },
1503 { 0x23, 0x00 },
1504 { 0x26, 0xa2 },
1505 { 0x27, 0xea },
1506 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1507 { 0x29, 0x00 },
1508 { 0x2a, 0x10 },
1509 { 0x2b, 0x00 },
1510 { 0x2c, 0x88 },
1511 { 0x2d, 0x91 },
1512 { 0x2e, 0x80 },
1513 { 0x2f, 0x44 },
1514 { 0x60, 0x27 },
1515 { 0x61, 0x02 },
1516 { 0x62, 0x5f },
1517 { 0x63, 0xd5 },
1518 { 0x64, 0x57 },
1519 { 0x65, 0x83 },
1520 { 0x66, 0x55 },
1521 { 0x67, 0x92 },
1522 { 0x68, 0xcf },
1523 { 0x69, 0x76 },
1524 { 0x6a, 0x22 },
1525 { 0x6b, 0x00 },
1526 { 0x6c, 0x02 },
1527 { 0x6d, 0x44 },
1528 { 0x6e, 0x80 },
1529 { 0x6f, 0x1d },
1530 { 0x70, 0x8b },
1531 { 0x71, 0x00 },
1532 { 0x72, 0x14 },
1533 { 0x73, 0x54 },
1534 { 0x74, 0x00 },
1535 { 0x75, 0x8e },
1536 { 0x76, 0x00 },
1537 { 0x77, 0xff },
1538 { 0x78, 0x80 },
1539 { 0x79, 0x80 },
1540 { 0x7a, 0x80 },
1541 { 0x7b, 0xe2 },
1542 { 0x7c, 0x00 },
1543 };
1544
1545 /* 7640 and 7648. The defaults should be OK for most registers. */
1546 static const struct ov_i2c_regvals norm_7640[] = {
1547 { 0x12, 0x80 },
1548 { 0x12, 0x14 },
1549 };
1550
1551 static const struct ov_regvals init_519_ov7660[] = {
1552 { 0x5d, 0x03 }, /* Turn off suspend mode */
1553 { 0x53, 0x9b }, /* 0x9f enables the (unused) microcontroller */
1554 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1555 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1556 { 0xa3, 0x18 },
1557 { 0xa4, 0x04 },
1558 { 0xa5, 0x28 },
1559 { 0x37, 0x00 }, /* SetUsbInit */
1560 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1561 /* Enable both fields, YUV Input, disable defect comp (why?) */
1562 { 0x20, 0x0c }, /* 0x0d does U <-> V swap */
1563 { 0x21, 0x38 },
1564 { 0x22, 0x1d },
1565 { 0x17, 0x50 }, /* undocumented */
1566 { 0x37, 0x00 }, /* undocumented */
1567 { 0x40, 0xff }, /* I2C timeout counter */
1568 { 0x46, 0x00 }, /* I2C clock prescaler */
1569 };
1570 static const struct ov_i2c_regvals norm_7660[] = {
1571 {OV7670_R12_COM7, OV7670_COM7_RESET},
1572 {OV7670_R11_CLKRC, 0x81},
1573 {0x92, 0x00}, /* DM_LNL */
1574 {0x93, 0x00}, /* DM_LNH */
1575 {0x9d, 0x4c}, /* BD50ST */
1576 {0x9e, 0x3f}, /* BD60ST */
1577 {OV7670_R3B_COM11, 0x02},
1578 {OV7670_R13_COM8, 0xf5},
1579 {OV7670_R10_AECH, 0x00},
1580 {OV7670_R00_GAIN, 0x00},
1581 {OV7670_R01_BLUE, 0x7c},
1582 {OV7670_R02_RED, 0x9d},
1583 {OV7670_R12_COM7, 0x00},
1584 {OV7670_R04_COM1, 00},
1585 {OV7670_R18_HSTOP, 0x01},
1586 {OV7670_R17_HSTART, 0x13},
1587 {OV7670_R32_HREF, 0x92},
1588 {OV7670_R19_VSTART, 0x02},
1589 {OV7670_R1A_VSTOP, 0x7a},
1590 {OV7670_R03_VREF, 0x00},
1591 {OV7670_R0E_COM5, 0x04},
1592 {OV7670_R0F_COM6, 0x62},
1593 {OV7670_R15_COM10, 0x00},
1594 {0x16, 0x02}, /* RSVD */
1595 {0x1b, 0x00}, /* PSHFT */
1596 {OV7670_R1E_MVFP, 0x01},
1597 {0x29, 0x3c}, /* RSVD */
1598 {0x33, 0x00}, /* CHLF */
1599 {0x34, 0x07}, /* ARBLM */
1600 {0x35, 0x84}, /* RSVD */
1601 {0x36, 0x00}, /* RSVD */
1602 {0x37, 0x04}, /* ADC */
1603 {0x39, 0x43}, /* OFON */
1604 {OV7670_R3A_TSLB, 0x00},
1605 {OV7670_R3C_COM12, 0x6c},
1606 {OV7670_R3D_COM13, 0x98},
1607 {OV7670_R3F_EDGE, 0x23},
1608 {OV7670_R40_COM15, 0xc1},
1609 {OV7670_R41_COM16, 0x22},
1610 {0x6b, 0x0a}, /* DBLV */
1611 {0xa1, 0x08}, /* RSVD */
1612 {0x69, 0x80}, /* HV */
1613 {0x43, 0xf0}, /* RSVD.. */
1614 {0x44, 0x10},
1615 {0x45, 0x78},
1616 {0x46, 0xa8},
1617 {0x47, 0x60},
1618 {0x48, 0x80},
1619 {0x59, 0xba},
1620 {0x5a, 0x9a},
1621 {0x5b, 0x22},
1622 {0x5c, 0xb9},
1623 {0x5d, 0x9b},
1624 {0x5e, 0x10},
1625 {0x5f, 0xe0},
1626 {0x60, 0x85},
1627 {0x61, 0x60},
1628 {0x9f, 0x9d}, /* RSVD */
1629 {0xa0, 0xa0}, /* DSPC2 */
1630 {0x4f, 0x60}, /* matrix */
1631 {0x50, 0x64},
1632 {0x51, 0x04},
1633 {0x52, 0x18},
1634 {0x53, 0x3c},
1635 {0x54, 0x54},
1636 {0x55, 0x40},
1637 {0x56, 0x40},
1638 {0x57, 0x40},
1639 {0x58, 0x0d}, /* matrix sign */
1640 {0x8b, 0xcc}, /* RSVD */
1641 {0x8c, 0xcc},
1642 {0x8d, 0xcf},
1643 {0x6c, 0x40}, /* gamma curve */
1644 {0x6d, 0xe0},
1645 {0x6e, 0xa0},
1646 {0x6f, 0x80},
1647 {0x70, 0x70},
1648 {0x71, 0x80},
1649 {0x72, 0x60},
1650 {0x73, 0x60},
1651 {0x74, 0x50},
1652 {0x75, 0x40},
1653 {0x76, 0x38},
1654 {0x77, 0x3c},
1655 {0x78, 0x32},
1656 {0x79, 0x1a},
1657 {0x7a, 0x28},
1658 {0x7b, 0x24},
1659 {0x7c, 0x04}, /* gamma curve */
1660 {0x7d, 0x12},
1661 {0x7e, 0x26},
1662 {0x7f, 0x46},
1663 {0x80, 0x54},
1664 {0x81, 0x64},
1665 {0x82, 0x70},
1666 {0x83, 0x7c},
1667 {0x84, 0x86},
1668 {0x85, 0x8e},
1669 {0x86, 0x9c},
1670 {0x87, 0xab},
1671 {0x88, 0xc4},
1672 {0x89, 0xd1},
1673 {0x8a, 0xe5},
1674 {OV7670_R14_COM9, 0x1e},
1675 {OV7670_R24_AEW, 0x80},
1676 {OV7670_R25_AEB, 0x72},
1677 {OV7670_R26_VPT, 0xb3},
1678 {0x62, 0x80}, /* LCC1 */
1679 {0x63, 0x80}, /* LCC2 */
1680 {0x64, 0x06}, /* LCC3 */
1681 {0x65, 0x00}, /* LCC4 */
1682 {0x66, 0x01}, /* LCC5 */
1683 {0x94, 0x0e}, /* RSVD.. */
1684 {0x95, 0x14},
1685 {OV7670_R13_COM8, OV7670_COM8_FASTAEC
1686 | OV7670_COM8_AECSTEP
1687 | OV7670_COM8_BFILT
1688 | 0x10
1689 | OV7670_COM8_AGC
1690 | OV7670_COM8_AWB
1691 | OV7670_COM8_AEC},
1692 {0xa1, 0xc8}
1693 };
1694 static const struct ov_i2c_regvals norm_9600[] = {
1695 {0x12, 0x80},
1696 {0x0c, 0x28},
1697 {0x11, 0x80},
1698 {0x13, 0xb5},
1699 {0x14, 0x3e},
1700 {0x1b, 0x04},
1701 {0x24, 0xb0},
1702 {0x25, 0x90},
1703 {0x26, 0x94},
1704 {0x35, 0x90},
1705 {0x37, 0x07},
1706 {0x38, 0x08},
1707 {0x01, 0x8e},
1708 {0x02, 0x85}
1709 };
1710
1711 /* 7670. Defaults taken from OmniVision provided data,
1712 * as provided by Jonathan Corbet of OLPC */
1713 static const struct ov_i2c_regvals norm_7670[] = {
1714 { OV7670_R12_COM7, OV7670_COM7_RESET },
1715 { OV7670_R3A_TSLB, 0x04 }, /* OV */
1716 { OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1717 { OV7670_R11_CLKRC, 0x01 },
1718 /*
1719 * Set the hardware window. These values from OV don't entirely
1720 * make sense - hstop is less than hstart. But they work...
1721 */
1722 { OV7670_R17_HSTART, 0x13 },
1723 { OV7670_R18_HSTOP, 0x01 },
1724 { OV7670_R32_HREF, 0xb6 },
1725 { OV7670_R19_VSTART, 0x02 },
1726 { OV7670_R1A_VSTOP, 0x7a },
1727 { OV7670_R03_VREF, 0x0a },
1728
1729 { OV7670_R0C_COM3, 0x00 },
1730 { OV7670_R3E_COM14, 0x00 },
1731 /* Mystery scaling numbers */
1732 { 0x70, 0x3a },
1733 { 0x71, 0x35 },
1734 { 0x72, 0x11 },
1735 { 0x73, 0xf0 },
1736 { 0xa2, 0x02 },
1737 /* { OV7670_R15_COM10, 0x0 }, */
1738
1739 /* Gamma curve values */
1740 { 0x7a, 0x20 },
1741 { 0x7b, 0x10 },
1742 { 0x7c, 0x1e },
1743 { 0x7d, 0x35 },
1744 { 0x7e, 0x5a },
1745 { 0x7f, 0x69 },
1746 { 0x80, 0x76 },
1747 { 0x81, 0x80 },
1748 { 0x82, 0x88 },
1749 { 0x83, 0x8f },
1750 { 0x84, 0x96 },
1751 { 0x85, 0xa3 },
1752 { 0x86, 0xaf },
1753 { 0x87, 0xc4 },
1754 { 0x88, 0xd7 },
1755 { 0x89, 0xe8 },
1756
1757 /* AGC and AEC parameters. Note we start by disabling those features,
1758 then turn them only after tweaking the values. */
1759 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1760 | OV7670_COM8_AECSTEP
1761 | OV7670_COM8_BFILT },
1762 { OV7670_R00_GAIN, 0x00 },
1763 { OV7670_R10_AECH, 0x00 },
1764 { OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
1765 { OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1766 { OV7670_RA5_BD50MAX, 0x05 },
1767 { OV7670_RAB_BD60MAX, 0x07 },
1768 { OV7670_R24_AEW, 0x95 },
1769 { OV7670_R25_AEB, 0x33 },
1770 { OV7670_R26_VPT, 0xe3 },
1771 { OV7670_R9F_HAECC1, 0x78 },
1772 { OV7670_RA0_HAECC2, 0x68 },
1773 { 0xa1, 0x03 }, /* magic */
1774 { OV7670_RA6_HAECC3, 0xd8 },
1775 { OV7670_RA7_HAECC4, 0xd8 },
1776 { OV7670_RA8_HAECC5, 0xf0 },
1777 { OV7670_RA9_HAECC6, 0x90 },
1778 { OV7670_RAA_HAECC7, 0x94 },
1779 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1780 | OV7670_COM8_AECSTEP
1781 | OV7670_COM8_BFILT
1782 | OV7670_COM8_AGC
1783 | OV7670_COM8_AEC },
1784
1785 /* Almost all of these are magic "reserved" values. */
1786 { OV7670_R0E_COM5, 0x61 },
1787 { OV7670_R0F_COM6, 0x4b },
1788 { 0x16, 0x02 },
1789 { OV7670_R1E_MVFP, 0x07 },
1790 { 0x21, 0x02 },
1791 { 0x22, 0x91 },
1792 { 0x29, 0x07 },
1793 { 0x33, 0x0b },
1794 { 0x35, 0x0b },
1795 { 0x37, 0x1d },
1796 { 0x38, 0x71 },
1797 { 0x39, 0x2a },
1798 { OV7670_R3C_COM12, 0x78 },
1799 { 0x4d, 0x40 },
1800 { 0x4e, 0x20 },
1801 { OV7670_R69_GFIX, 0x00 },
1802 { 0x6b, 0x4a },
1803 { 0x74, 0x10 },
1804 { 0x8d, 0x4f },
1805 { 0x8e, 0x00 },
1806 { 0x8f, 0x00 },
1807 { 0x90, 0x00 },
1808 { 0x91, 0x00 },
1809 { 0x96, 0x00 },
1810 { 0x9a, 0x00 },
1811 { 0xb0, 0x84 },
1812 { 0xb1, 0x0c },
1813 { 0xb2, 0x0e },
1814 { 0xb3, 0x82 },
1815 { 0xb8, 0x0a },
1816
1817 /* More reserved magic, some of which tweaks white balance */
1818 { 0x43, 0x0a },
1819 { 0x44, 0xf0 },
1820 { 0x45, 0x34 },
1821 { 0x46, 0x58 },
1822 { 0x47, 0x28 },
1823 { 0x48, 0x3a },
1824 { 0x59, 0x88 },
1825 { 0x5a, 0x88 },
1826 { 0x5b, 0x44 },
1827 { 0x5c, 0x67 },
1828 { 0x5d, 0x49 },
1829 { 0x5e, 0x0e },
1830 { 0x6c, 0x0a },
1831 { 0x6d, 0x55 },
1832 { 0x6e, 0x11 },
1833 { 0x6f, 0x9f }, /* "9e for advance AWB" */
1834 { 0x6a, 0x40 },
1835 { OV7670_R01_BLUE, 0x40 },
1836 { OV7670_R02_RED, 0x60 },
1837 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1838 | OV7670_COM8_AECSTEP
1839 | OV7670_COM8_BFILT
1840 | OV7670_COM8_AGC
1841 | OV7670_COM8_AEC
1842 | OV7670_COM8_AWB },
1843
1844 /* Matrix coefficients */
1845 { 0x4f, 0x80 },
1846 { 0x50, 0x80 },
1847 { 0x51, 0x00 },
1848 { 0x52, 0x22 },
1849 { 0x53, 0x5e },
1850 { 0x54, 0x80 },
1851 { 0x58, 0x9e },
1852
1853 { OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
1854 { OV7670_R3F_EDGE, 0x00 },
1855 { 0x75, 0x05 },
1856 { 0x76, 0xe1 },
1857 { 0x4c, 0x00 },
1858 { 0x77, 0x01 },
1859 { OV7670_R3D_COM13, OV7670_COM13_GAMMA
1860 | OV7670_COM13_UVSAT
1861 | 2}, /* was 3 */
1862 { 0x4b, 0x09 },
1863 { 0xc9, 0x60 },
1864 { OV7670_R41_COM16, 0x38 },
1865 { 0x56, 0x40 },
1866
1867 { 0x34, 0x11 },
1868 { OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1869 { 0xa4, 0x88 },
1870 { 0x96, 0x00 },
1871 { 0x97, 0x30 },
1872 { 0x98, 0x20 },
1873 { 0x99, 0x30 },
1874 { 0x9a, 0x84 },
1875 { 0x9b, 0x29 },
1876 { 0x9c, 0x03 },
1877 { 0x9d, 0x4c },
1878 { 0x9e, 0x3f },
1879 { 0x78, 0x04 },
1880
1881 /* Extra-weird stuff. Some sort of multiplexor register */
1882 { 0x79, 0x01 },
1883 { 0xc8, 0xf0 },
1884 { 0x79, 0x0f },
1885 { 0xc8, 0x00 },
1886 { 0x79, 0x10 },
1887 { 0xc8, 0x7e },
1888 { 0x79, 0x0a },
1889 { 0xc8, 0x80 },
1890 { 0x79, 0x0b },
1891 { 0xc8, 0x01 },
1892 { 0x79, 0x0c },
1893 { 0xc8, 0x0f },
1894 { 0x79, 0x0d },
1895 { 0xc8, 0x20 },
1896 { 0x79, 0x09 },
1897 { 0xc8, 0x80 },
1898 { 0x79, 0x02 },
1899 { 0xc8, 0xc0 },
1900 { 0x79, 0x03 },
1901 { 0xc8, 0x40 },
1902 { 0x79, 0x05 },
1903 { 0xc8, 0x30 },
1904 { 0x79, 0x26 },
1905 };
1906
1907 static const struct ov_i2c_regvals norm_8610[] = {
1908 { 0x12, 0x80 },
1909 { 0x00, 0x00 },
1910 { 0x01, 0x80 },
1911 { 0x02, 0x80 },
1912 { 0x03, 0xc0 },
1913 { 0x04, 0x30 },
1914 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1915 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1916 { 0x0a, 0x86 },
1917 { 0x0b, 0xb0 },
1918 { 0x0c, 0x20 },
1919 { 0x0d, 0x20 },
1920 { 0x11, 0x01 },
1921 { 0x12, 0x25 },
1922 { 0x13, 0x01 },
1923 { 0x14, 0x04 },
1924 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1925 { 0x16, 0x03 },
1926 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1927 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1928 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1929 { 0x1a, 0xf5 },
1930 { 0x1b, 0x00 },
1931 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1932 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1933 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1934 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1935 { 0x26, 0xa2 },
1936 { 0x27, 0xea },
1937 { 0x28, 0x00 },
1938 { 0x29, 0x00 },
1939 { 0x2a, 0x80 },
1940 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1941 { 0x2c, 0xac },
1942 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1943 { 0x2e, 0x80 },
1944 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1945 { 0x4c, 0x00 },
1946 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1947 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1948 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1949 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1950 { 0x63, 0xff },
1951 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1952 * maybe thats wrong */
1953 { 0x65, 0x00 },
1954 { 0x66, 0x55 },
1955 { 0x67, 0xb0 },
1956 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1957 { 0x69, 0x02 },
1958 { 0x6a, 0x22 },
1959 { 0x6b, 0x00 },
1960 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1961 * deleting bit7 colors the first images red */
1962 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1963 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1964 { 0x6f, 0x01 },
1965 { 0x70, 0x8b },
1966 { 0x71, 0x00 },
1967 { 0x72, 0x14 },
1968 { 0x73, 0x54 },
1969 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
1970 { 0x75, 0x0e },
1971 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
1972 { 0x77, 0xff },
1973 { 0x78, 0x80 },
1974 { 0x79, 0x80 },
1975 { 0x7a, 0x80 },
1976 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
1977 { 0x7c, 0x00 },
1978 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
1979 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
1980 { 0x7f, 0xfb },
1981 { 0x80, 0x28 },
1982 { 0x81, 0x00 },
1983 { 0x82, 0x23 },
1984 { 0x83, 0x0b },
1985 { 0x84, 0x00 },
1986 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
1987 { 0x86, 0xc9 },
1988 { 0x87, 0x00 },
1989 { 0x88, 0x00 },
1990 { 0x89, 0x01 },
1991 { 0x12, 0x20 },
1992 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
1993 };
1994
1995 static unsigned char ov7670_abs_to_sm(unsigned char v)
1996 {
1997 if (v > 127)
1998 return v & 0x7f;
1999 return (128 - v) | 0x80;
2000 }
2001
2002 /* Write a OV519 register */
2003 static void reg_w(struct sd *sd, u16 index, u16 value)
2004 {
2005 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2006 int ret, req = 0;
2007
2008 if (sd->gspca_dev.usb_err < 0)
2009 return;
2010
2011 /* Avoid things going to fast for the bridge with a xhci host */
2012 udelay(150);
2013
2014 switch (sd->bridge) {
2015 case BRIDGE_OV511:
2016 case BRIDGE_OV511PLUS:
2017 req = 2;
2018 break;
2019 case BRIDGE_OVFX2:
2020 req = 0x0a;
2021 /* fall through */
2022 case BRIDGE_W9968CF:
2023 PDEBUG(D_USBO, "SET %02x %04x %04x",
2024 req, value, index);
2025 ret = usb_control_msg(sd->gspca_dev.dev,
2026 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2027 req,
2028 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2029 value, index, NULL, 0, 500);
2030 goto leave;
2031 default:
2032 req = 1;
2033 }
2034
2035 PDEBUG(D_USBO, "SET %02x 0000 %04x %02x",
2036 req, index, value);
2037 sd->gspca_dev.usb_buf[0] = value;
2038 ret = usb_control_msg(sd->gspca_dev.dev,
2039 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2040 req,
2041 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2042 0, index,
2043 sd->gspca_dev.usb_buf, 1, 500);
2044 leave:
2045 if (ret < 0) {
2046 PERR("reg_w %02x failed %d\n", index, ret);
2047 sd->gspca_dev.usb_err = ret;
2048 return;
2049 }
2050 }
2051
2052 /* Read from a OV519 register, note not valid for the w9968cf!! */
2053 /* returns: negative is error, pos or zero is data */
2054 static int reg_r(struct sd *sd, u16 index)
2055 {
2056 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2057 int ret;
2058 int req;
2059
2060 if (sd->gspca_dev.usb_err < 0)
2061 return -1;
2062
2063 switch (sd->bridge) {
2064 case BRIDGE_OV511:
2065 case BRIDGE_OV511PLUS:
2066 req = 3;
2067 break;
2068 case BRIDGE_OVFX2:
2069 req = 0x0b;
2070 break;
2071 default:
2072 req = 1;
2073 }
2074
2075 /* Avoid things going to fast for the bridge with a xhci host */
2076 udelay(150);
2077 ret = usb_control_msg(sd->gspca_dev.dev,
2078 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2079 req,
2080 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2081 0, index, sd->gspca_dev.usb_buf, 1, 500);
2082
2083 if (ret >= 0) {
2084 ret = sd->gspca_dev.usb_buf[0];
2085 PDEBUG(D_USBI, "GET %02x 0000 %04x %02x",
2086 req, index, ret);
2087 } else {
2088 PERR("reg_r %02x failed %d\n", index, ret);
2089 sd->gspca_dev.usb_err = ret;
2090 }
2091
2092 return ret;
2093 }
2094
2095 /* Read 8 values from a OV519 register */
2096 static int reg_r8(struct sd *sd,
2097 u16 index)
2098 {
2099 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2100 int ret;
2101
2102 if (sd->gspca_dev.usb_err < 0)
2103 return -1;
2104
2105 /* Avoid things going to fast for the bridge with a xhci host */
2106 udelay(150);
2107 ret = usb_control_msg(sd->gspca_dev.dev,
2108 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2109 1, /* REQ_IO */
2110 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2111 0, index, sd->gspca_dev.usb_buf, 8, 500);
2112
2113 if (ret >= 0) {
2114 ret = sd->gspca_dev.usb_buf[0];
2115 } else {
2116 PERR("reg_r8 %02x failed %d\n", index, ret);
2117 sd->gspca_dev.usb_err = ret;
2118 }
2119
2120 return ret;
2121 }
2122
2123 /*
2124 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
2125 * the same position as 1's in "mask" are cleared and set to "value". Bits
2126 * that are in the same position as 0's in "mask" are preserved, regardless
2127 * of their respective state in "value".
2128 */
2129 static void reg_w_mask(struct sd *sd,
2130 u16 index,
2131 u8 value,
2132 u8 mask)
2133 {
2134 int ret;
2135 u8 oldval;
2136
2137 if (mask != 0xff) {
2138 value &= mask; /* Enforce mask on value */
2139 ret = reg_r(sd, index);
2140 if (ret < 0)
2141 return;
2142
2143 oldval = ret & ~mask; /* Clear the masked bits */
2144 value |= oldval; /* Set the desired bits */
2145 }
2146 reg_w(sd, index, value);
2147 }
2148
2149 /*
2150 * Writes multiple (n) byte value to a single register. Only valid with certain
2151 * registers (0x30 and 0xc4 - 0xce).
2152 */
2153 static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
2154 {
2155 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2156 int ret;
2157
2158 if (sd->gspca_dev.usb_err < 0)
2159 return;
2160
2161 *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
2162
2163 /* Avoid things going to fast for the bridge with a xhci host */
2164 udelay(150);
2165 ret = usb_control_msg(sd->gspca_dev.dev,
2166 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2167 1 /* REG_IO */,
2168 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2169 0, index,
2170 sd->gspca_dev.usb_buf, n, 500);
2171 if (ret < 0) {
2172 PERR("reg_w32 %02x failed %d\n", index, ret);
2173 sd->gspca_dev.usb_err = ret;
2174 }
2175 }
2176
2177 static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
2178 {
2179 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2180 int rc, retries;
2181
2182 PDEBUG(D_USBO, "ov511_i2c_w %02x %02x", reg, value);
2183
2184 /* Three byte write cycle */
2185 for (retries = 6; ; ) {
2186 /* Select camera register */
2187 reg_w(sd, R51x_I2C_SADDR_3, reg);
2188
2189 /* Write "value" to I2C data port of OV511 */
2190 reg_w(sd, R51x_I2C_DATA, value);
2191
2192 /* Initiate 3-byte write cycle */
2193 reg_w(sd, R511_I2C_CTL, 0x01);
2194
2195 do {
2196 rc = reg_r(sd, R511_I2C_CTL);
2197 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2198
2199 if (rc < 0)
2200 return;
2201
2202 if ((rc & 2) == 0) /* Ack? */
2203 break;
2204 if (--retries < 0) {
2205 PDEBUG(D_USBO, "i2c write retries exhausted");
2206 return;
2207 }
2208 }
2209 }
2210
2211 static int ov511_i2c_r(struct sd *sd, u8 reg)
2212 {
2213 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2214 int rc, value, retries;
2215
2216 /* Two byte write cycle */
2217 for (retries = 6; ; ) {
2218 /* Select camera register */
2219 reg_w(sd, R51x_I2C_SADDR_2, reg);
2220
2221 /* Initiate 2-byte write cycle */
2222 reg_w(sd, R511_I2C_CTL, 0x03);
2223
2224 do {
2225 rc = reg_r(sd, R511_I2C_CTL);
2226 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2227
2228 if (rc < 0)
2229 return rc;
2230
2231 if ((rc & 2) == 0) /* Ack? */
2232 break;
2233
2234 /* I2C abort */
2235 reg_w(sd, R511_I2C_CTL, 0x10);
2236
2237 if (--retries < 0) {
2238 PDEBUG(D_USBI, "i2c write retries exhausted");
2239 return -1;
2240 }
2241 }
2242
2243 /* Two byte read cycle */
2244 for (retries = 6; ; ) {
2245 /* Initiate 2-byte read cycle */
2246 reg_w(sd, R511_I2C_CTL, 0x05);
2247
2248 do {
2249 rc = reg_r(sd, R511_I2C_CTL);
2250 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2251
2252 if (rc < 0)
2253 return rc;
2254
2255 if ((rc & 2) == 0) /* Ack? */
2256 break;
2257
2258 /* I2C abort */
2259 reg_w(sd, R511_I2C_CTL, 0x10);
2260
2261 if (--retries < 0) {
2262 PDEBUG(D_USBI, "i2c read retries exhausted");
2263 return -1;
2264 }
2265 }
2266
2267 value = reg_r(sd, R51x_I2C_DATA);
2268
2269 PDEBUG(D_USBI, "ov511_i2c_r %02x %02x", reg, value);
2270
2271 /* This is needed to make i2c_w() work */
2272 reg_w(sd, R511_I2C_CTL, 0x05);
2273
2274 return value;
2275 }
2276
2277 /*
2278 * The OV518 I2C I/O procedure is different, hence, this function.
2279 * This is normally only called from i2c_w(). Note that this function
2280 * always succeeds regardless of whether the sensor is present and working.
2281 */
2282 static void ov518_i2c_w(struct sd *sd,
2283 u8 reg,
2284 u8 value)
2285 {
2286 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2287
2288 PDEBUG(D_USBO, "ov518_i2c_w %02x %02x", reg, value);
2289
2290 /* Select camera register */
2291 reg_w(sd, R51x_I2C_SADDR_3, reg);
2292
2293 /* Write "value" to I2C data port of OV511 */
2294 reg_w(sd, R51x_I2C_DATA, value);
2295
2296 /* Initiate 3-byte write cycle */
2297 reg_w(sd, R518_I2C_CTL, 0x01);
2298
2299 /* wait for write complete */
2300 msleep(4);
2301 reg_r8(sd, R518_I2C_CTL);
2302 }
2303
2304 /*
2305 * returns: negative is error, pos or zero is data
2306 *
2307 * The OV518 I2C I/O procedure is different, hence, this function.
2308 * This is normally only called from i2c_r(). Note that this function
2309 * always succeeds regardless of whether the sensor is present and working.
2310 */
2311 static int ov518_i2c_r(struct sd *sd, u8 reg)
2312 {
2313 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2314 int value;
2315
2316 /* Select camera register */
2317 reg_w(sd, R51x_I2C_SADDR_2, reg);
2318
2319 /* Initiate 2-byte write cycle */
2320 reg_w(sd, R518_I2C_CTL, 0x03);
2321 reg_r8(sd, R518_I2C_CTL);
2322
2323 /* Initiate 2-byte read cycle */
2324 reg_w(sd, R518_I2C_CTL, 0x05);
2325 reg_r8(sd, R518_I2C_CTL);
2326
2327 value = reg_r(sd, R51x_I2C_DATA);
2328 PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value);
2329 return value;
2330 }
2331
2332 static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
2333 {
2334 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2335 int ret;
2336
2337 if (sd->gspca_dev.usb_err < 0)
2338 return;
2339
2340 ret = usb_control_msg(sd->gspca_dev.dev,
2341 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2342 0x02,
2343 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2344 (u16) value, (u16) reg, NULL, 0, 500);
2345
2346 if (ret < 0) {
2347 PERR("ovfx2_i2c_w %02x failed %d\n", reg, ret);
2348 sd->gspca_dev.usb_err = ret;
2349 }
2350
2351 PDEBUG(D_USBO, "ovfx2_i2c_w %02x %02x", reg, value);
2352 }
2353
2354 static int ovfx2_i2c_r(struct sd *sd, u8 reg)
2355 {
2356 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2357 int ret;
2358
2359 if (sd->gspca_dev.usb_err < 0)
2360 return -1;
2361
2362 ret = usb_control_msg(sd->gspca_dev.dev,
2363 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2364 0x03,
2365 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2366 0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
2367
2368 if (ret >= 0) {
2369 ret = sd->gspca_dev.usb_buf[0];
2370 PDEBUG(D_USBI, "ovfx2_i2c_r %02x %02x", reg, ret);
2371 } else {
2372 PERR("ovfx2_i2c_r %02x failed %d\n", reg, ret);
2373 sd->gspca_dev.usb_err = ret;
2374 }
2375
2376 return ret;
2377 }
2378
2379 static void i2c_w(struct sd *sd, u8 reg, u8 value)
2380 {
2381 if (sd->sensor_reg_cache[reg] == value)
2382 return;
2383
2384 switch (sd->bridge) {
2385 case BRIDGE_OV511:
2386 case BRIDGE_OV511PLUS:
2387 ov511_i2c_w(sd, reg, value);
2388 break;
2389 case BRIDGE_OV518:
2390 case BRIDGE_OV518PLUS:
2391 case BRIDGE_OV519:
2392 ov518_i2c_w(sd, reg, value);
2393 break;
2394 case BRIDGE_OVFX2:
2395 ovfx2_i2c_w(sd, reg, value);
2396 break;
2397 case BRIDGE_W9968CF:
2398 w9968cf_i2c_w(sd, reg, value);
2399 break;
2400 }
2401
2402 if (sd->gspca_dev.usb_err >= 0) {
2403 /* Up on sensor reset empty the register cache */
2404 if (reg == 0x12 && (value & 0x80))
2405 memset(sd->sensor_reg_cache, -1,
2406 sizeof(sd->sensor_reg_cache));
2407 else
2408 sd->sensor_reg_cache[reg] = value;
2409 }
2410 }
2411
2412 static int i2c_r(struct sd *sd, u8 reg)
2413 {
2414 int ret = -1;
2415
2416 if (sd->sensor_reg_cache[reg] != -1)
2417 return sd->sensor_reg_cache[reg];
2418
2419 switch (sd->bridge) {
2420 case BRIDGE_OV511:
2421 case BRIDGE_OV511PLUS:
2422 ret = ov511_i2c_r(sd, reg);
2423 break;
2424 case BRIDGE_OV518:
2425 case BRIDGE_OV518PLUS:
2426 case BRIDGE_OV519:
2427 ret = ov518_i2c_r(sd, reg);
2428 break;
2429 case BRIDGE_OVFX2:
2430 ret = ovfx2_i2c_r(sd, reg);
2431 break;
2432 case BRIDGE_W9968CF:
2433 ret = w9968cf_i2c_r(sd, reg);
2434 break;
2435 }
2436
2437 if (ret >= 0)
2438 sd->sensor_reg_cache[reg] = ret;
2439
2440 return ret;
2441 }
2442
2443 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2444 * the same position as 1's in "mask" are cleared and set to "value". Bits
2445 * that are in the same position as 0's in "mask" are preserved, regardless
2446 * of their respective state in "value".
2447 */
2448 static void i2c_w_mask(struct sd *sd,
2449 u8 reg,
2450 u8 value,
2451 u8 mask)
2452 {
2453 int rc;
2454 u8 oldval;
2455
2456 value &= mask; /* Enforce mask on value */
2457 rc = i2c_r(sd, reg);
2458 if (rc < 0)
2459 return;
2460 oldval = rc & ~mask; /* Clear the masked bits */
2461 value |= oldval; /* Set the desired bits */
2462 i2c_w(sd, reg, value);
2463 }
2464
2465 /* Temporarily stops OV511 from functioning. Must do this before changing
2466 * registers while the camera is streaming */
2467 static inline void ov51x_stop(struct sd *sd)
2468 {
2469 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2470
2471 PDEBUG(D_STREAM, "stopping");
2472 sd->stopped = 1;
2473 switch (sd->bridge) {
2474 case BRIDGE_OV511:
2475 case BRIDGE_OV511PLUS:
2476 reg_w(sd, R51x_SYS_RESET, 0x3d);
2477 break;
2478 case BRIDGE_OV518:
2479 case BRIDGE_OV518PLUS:
2480 reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2481 break;
2482 case BRIDGE_OV519:
2483 reg_w(sd, OV519_R51_RESET1, 0x0f);
2484 reg_w(sd, OV519_R51_RESET1, 0x00);
2485 reg_w(sd, 0x22, 0x00); /* FRAR */
2486 break;
2487 case BRIDGE_OVFX2:
2488 reg_w_mask(sd, 0x0f, 0x00, 0x02);
2489 break;
2490 case BRIDGE_W9968CF:
2491 reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2492 break;
2493 }
2494 }
2495
2496 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2497 * actually stopped (for performance). */
2498 static inline void ov51x_restart(struct sd *sd)
2499 {
2500 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2501
2502 PDEBUG(D_STREAM, "restarting");
2503 if (!sd->stopped)
2504 return;
2505 sd->stopped = 0;
2506
2507 /* Reinitialize the stream */
2508 switch (sd->bridge) {
2509 case BRIDGE_OV511:
2510 case BRIDGE_OV511PLUS:
2511 reg_w(sd, R51x_SYS_RESET, 0x00);
2512 break;
2513 case BRIDGE_OV518:
2514 case BRIDGE_OV518PLUS:
2515 reg_w(sd, 0x2f, 0x80);
2516 reg_w(sd, R51x_SYS_RESET, 0x00);
2517 break;
2518 case BRIDGE_OV519:
2519 reg_w(sd, OV519_R51_RESET1, 0x0f);
2520 reg_w(sd, OV519_R51_RESET1, 0x00);
2521 reg_w(sd, 0x22, 0x1d); /* FRAR */
2522 break;
2523 case BRIDGE_OVFX2:
2524 reg_w_mask(sd, 0x0f, 0x02, 0x02);
2525 break;
2526 case BRIDGE_W9968CF:
2527 reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2528 break;
2529 }
2530 }
2531
2532 static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
2533
2534 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2535 * is synchronized. Returns <0 on failure.
2536 */
2537 static int init_ov_sensor(struct sd *sd, u8 slave)
2538 {
2539 int i;
2540 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2541
2542 ov51x_set_slave_ids(sd, slave);
2543
2544 /* Reset the sensor */
2545 i2c_w(sd, 0x12, 0x80);
2546
2547 /* Wait for it to initialize */
2548 msleep(150);
2549
2550 for (i = 0; i < i2c_detect_tries; i++) {
2551 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2552 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2553 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2554 return 0;
2555 }
2556
2557 /* Reset the sensor */
2558 i2c_w(sd, 0x12, 0x80);
2559
2560 /* Wait for it to initialize */
2561 msleep(150);
2562
2563 /* Dummy read to sync I2C */
2564 if (i2c_r(sd, 0x00) < 0)
2565 return -1;
2566 }
2567 return -1;
2568 }
2569
2570 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2571 * and the read slave will be set to (slave + 1).
2572 * This should not be called from outside the i2c I/O functions.
2573 * Sets I2C read and write slave IDs. Returns <0 for error
2574 */
2575 static void ov51x_set_slave_ids(struct sd *sd,
2576 u8 slave)
2577 {
2578 switch (sd->bridge) {
2579 case BRIDGE_OVFX2:
2580 reg_w(sd, OVFX2_I2C_ADDR, slave);
2581 return;
2582 case BRIDGE_W9968CF:
2583 sd->sensor_addr = slave;
2584 return;
2585 }
2586
2587 reg_w(sd, R51x_I2C_W_SID, slave);
2588 reg_w(sd, R51x_I2C_R_SID, slave + 1);
2589 }
2590
2591 static void write_regvals(struct sd *sd,
2592 const struct ov_regvals *regvals,
2593 int n)
2594 {
2595 while (--n >= 0) {
2596 reg_w(sd, regvals->reg, regvals->val);
2597 regvals++;
2598 }
2599 }
2600
2601 static void write_i2c_regvals(struct sd *sd,
2602 const struct ov_i2c_regvals *regvals,
2603 int n)
2604 {
2605 while (--n >= 0) {
2606 i2c_w(sd, regvals->reg, regvals->val);
2607 regvals++;
2608 }
2609 }
2610
2611 /****************************************************************************
2612 *
2613 * OV511 and sensor configuration
2614 *
2615 ***************************************************************************/
2616
2617 /* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */
2618 static void ov_hires_configure(struct sd *sd)
2619 {
2620 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2621 int high, low;
2622
2623 if (sd->bridge != BRIDGE_OVFX2) {
2624 PERR("error hires sensors only supported with ovfx2\n");
2625 return;
2626 }
2627
2628 PDEBUG(D_PROBE, "starting ov hires configuration");
2629
2630 /* Detect sensor (sub)type */
2631 high = i2c_r(sd, 0x0a);
2632 low = i2c_r(sd, 0x0b);
2633 /* info("%x, %x", high, low); */
2634 switch (high) {
2635 case 0x96:
2636 switch (low) {
2637 case 0x40:
2638 PDEBUG(D_PROBE, "Sensor is a OV2610");
2639 sd->sensor = SEN_OV2610;
2640 return;
2641 case 0x41:
2642 PDEBUG(D_PROBE, "Sensor is a OV2610AE");
2643 sd->sensor = SEN_OV2610AE;
2644 return;
2645 case 0xb1:
2646 PDEBUG(D_PROBE, "Sensor is a OV9600");
2647 sd->sensor = SEN_OV9600;
2648 return;
2649 }
2650 break;
2651 case 0x36:
2652 if ((low & 0x0f) == 0x00) {
2653 PDEBUG(D_PROBE, "Sensor is a OV3610");
2654 sd->sensor = SEN_OV3610;
2655 return;
2656 }
2657 break;
2658 }
2659 PERR("Error unknown sensor type: %02x%02x\n", high, low);
2660 }
2661
2662 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2663 * the same register settings as the OV8610, since they are very similar.
2664 */
2665 static void ov8xx0_configure(struct sd *sd)
2666 {
2667 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2668 int rc;
2669
2670 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2671
2672 /* Detect sensor (sub)type */
2673 rc = i2c_r(sd, OV7610_REG_COM_I);
2674 if (rc < 0) {
2675 PERR("Error detecting sensor type");
2676 return;
2677 }
2678 if ((rc & 3) == 1)
2679 sd->sensor = SEN_OV8610;
2680 else
2681 PERR("Unknown image sensor version: %d\n", rc & 3);
2682 }
2683
2684 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2685 * the same register settings as the OV7610, since they are very similar.
2686 */
2687 static void ov7xx0_configure(struct sd *sd)
2688 {
2689 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2690 int rc, high, low;
2691
2692 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2693
2694 /* Detect sensor (sub)type */
2695 rc = i2c_r(sd, OV7610_REG_COM_I);
2696
2697 /* add OV7670 here
2698 * it appears to be wrongly detected as a 7610 by default */
2699 if (rc < 0) {
2700 PERR("Error detecting sensor type\n");
2701 return;
2702 }
2703 if ((rc & 3) == 3) {
2704 /* quick hack to make OV7670s work */
2705 high = i2c_r(sd, 0x0a);
2706 low = i2c_r(sd, 0x0b);
2707 /* info("%x, %x", high, low); */
2708 if (high == 0x76 && (low & 0xf0) == 0x70) {
2709 PDEBUG(D_PROBE, "Sensor is an OV76%02x", low);
2710 sd->sensor = SEN_OV7670;
2711 } else {
2712 PDEBUG(D_PROBE, "Sensor is an OV7610");
2713 sd->sensor = SEN_OV7610;
2714 }
2715 } else if ((rc & 3) == 1) {
2716 /* I don't know what's different about the 76BE yet. */
2717 if (i2c_r(sd, 0x15) & 1) {
2718 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2719 sd->sensor = SEN_OV7620AE;
2720 } else {
2721 PDEBUG(D_PROBE, "Sensor is an OV76BE");
2722 sd->sensor = SEN_OV76BE;
2723 }
2724 } else if ((rc & 3) == 0) {
2725 /* try to read product id registers */
2726 high = i2c_r(sd, 0x0a);
2727 if (high < 0) {
2728 PERR("Error detecting camera chip PID\n");
2729 return;
2730 }
2731 low = i2c_r(sd, 0x0b);
2732 if (low < 0) {
2733 PERR("Error detecting camera chip VER\n");
2734 return;
2735 }
2736 if (high == 0x76) {
2737 switch (low) {
2738 case 0x30:
2739 PERR("Sensor is an OV7630/OV7635\n");
2740 PERR("7630 is not supported by this driver\n");
2741 return;
2742 case 0x40:
2743 PDEBUG(D_PROBE, "Sensor is an OV7645");
2744 sd->sensor = SEN_OV7640; /* FIXME */
2745 break;
2746 case 0x45:
2747 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2748 sd->sensor = SEN_OV7640; /* FIXME */
2749 break;
2750 case 0x48:
2751 PDEBUG(D_PROBE, "Sensor is an OV7648");
2752 sd->sensor = SEN_OV7648;
2753 break;
2754 case 0x60:
2755 PDEBUG(D_PROBE, "Sensor is a OV7660");
2756 sd->sensor = SEN_OV7660;
2757 break;
2758 default:
2759 PERR("Unknown sensor: 0x76%02x\n", low);
2760 return;
2761 }
2762 } else {
2763 PDEBUG(D_PROBE, "Sensor is an OV7620");
2764 sd->sensor = SEN_OV7620;
2765 }
2766 } else {
2767 PERR("Unknown image sensor version: %d\n", rc & 3);
2768 }
2769 }
2770
2771 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2772 static void ov6xx0_configure(struct sd *sd)
2773 {
2774 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2775 int rc;
2776
2777 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2778
2779 /* Detect sensor (sub)type */
2780 rc = i2c_r(sd, OV7610_REG_COM_I);
2781 if (rc < 0) {
2782 PERR("Error detecting sensor type\n");
2783 return;
2784 }
2785
2786 /* Ugh. The first two bits are the version bits, but
2787 * the entire register value must be used. I guess OVT
2788 * underestimated how many variants they would make. */
2789 switch (rc) {
2790 case 0x00:
2791 sd->sensor = SEN_OV6630;
2792 pr_warn("WARNING: Sensor is an OV66308. Your camera may have been misdetected in previous driver versions.\n");
2793 break;
2794 case 0x01:
2795 sd->sensor = SEN_OV6620;
2796 PDEBUG(D_PROBE, "Sensor is an OV6620");
2797 break;
2798 case 0x02:
2799 sd->sensor = SEN_OV6630;
2800 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2801 break;
2802 case 0x03:
2803 sd->sensor = SEN_OV66308AF;
2804 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2805 break;
2806 case 0x90:
2807 sd->sensor = SEN_OV6630;
2808 pr_warn("WARNING: Sensor is an OV66307. Your camera may have been misdetected in previous driver versions.\n");
2809 break;
2810 default:
2811 PERR("FATAL: Unknown sensor version: 0x%02x\n", rc);
2812 return;
2813 }
2814
2815 /* Set sensor-specific vars */
2816 sd->sif = 1;
2817 }
2818
2819 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2820 static void ov51x_led_control(struct sd *sd, int on)
2821 {
2822 if (sd->invert_led)
2823 on = !on;
2824
2825 switch (sd->bridge) {
2826 /* OV511 has no LED control */
2827 case BRIDGE_OV511PLUS:
2828 reg_w(sd, R511_SYS_LED_CTL, on);
2829 break;
2830 case BRIDGE_OV518:
2831 case BRIDGE_OV518PLUS:
2832 reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02);
2833 break;
2834 case BRIDGE_OV519:
2835 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1);
2836 break;
2837 }
2838 }
2839
2840 static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2841 {
2842 struct sd *sd = (struct sd *) gspca_dev;
2843
2844 if (!sd->snapshot_needs_reset)
2845 return;
2846
2847 /* Note it is important that we clear sd->snapshot_needs_reset,
2848 before actually clearing the snapshot state in the bridge
2849 otherwise we might race with the pkt_scan interrupt handler */
2850 sd->snapshot_needs_reset = 0;
2851
2852 switch (sd->bridge) {
2853 case BRIDGE_OV511:
2854 case BRIDGE_OV511PLUS:
2855 reg_w(sd, R51x_SYS_SNAP, 0x02);
2856 reg_w(sd, R51x_SYS_SNAP, 0x00);
2857 break;
2858 case BRIDGE_OV518:
2859 case BRIDGE_OV518PLUS:
2860 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2861 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2862 break;
2863 case BRIDGE_OV519:
2864 reg_w(sd, R51x_SYS_RESET, 0x40);
2865 reg_w(sd, R51x_SYS_RESET, 0x00);
2866 break;
2867 }
2868 }
2869
2870 static void ov51x_upload_quan_tables(struct sd *sd)
2871 {
2872 const unsigned char yQuanTable511[] = {
2873 0, 1, 1, 2, 2, 3, 3, 4,
2874 1, 1, 1, 2, 2, 3, 4, 4,
2875 1, 1, 2, 2, 3, 4, 4, 4,
2876 2, 2, 2, 3, 4, 4, 4, 4,
2877 2, 2, 3, 4, 4, 5, 5, 5,
2878 3, 3, 4, 4, 5, 5, 5, 5,
2879 3, 4, 4, 4, 5, 5, 5, 5,
2880 4, 4, 4, 4, 5, 5, 5, 5
2881 };
2882
2883 const unsigned char uvQuanTable511[] = {
2884 0, 2, 2, 3, 4, 4, 4, 4,
2885 2, 2, 2, 4, 4, 4, 4, 4,
2886 2, 2, 3, 4, 4, 4, 4, 4,
2887 3, 4, 4, 4, 4, 4, 4, 4,
2888 4, 4, 4, 4, 4, 4, 4, 4,
2889 4, 4, 4, 4, 4, 4, 4, 4,
2890 4, 4, 4, 4, 4, 4, 4, 4,
2891 4, 4, 4, 4, 4, 4, 4, 4
2892 };
2893
2894 /* OV518 quantization tables are 8x4 (instead of 8x8) */
2895 const unsigned char yQuanTable518[] = {
2896 5, 4, 5, 6, 6, 7, 7, 7,
2897 5, 5, 5, 5, 6, 7, 7, 7,
2898 6, 6, 6, 6, 7, 7, 7, 8,
2899 7, 7, 6, 7, 7, 7, 8, 8
2900 };
2901 const unsigned char uvQuanTable518[] = {
2902 6, 6, 6, 7, 7, 7, 7, 7,
2903 6, 6, 6, 7, 7, 7, 7, 7,
2904 6, 6, 6, 7, 7, 7, 7, 8,
2905 7, 7, 7, 7, 7, 7, 8, 8
2906 };
2907
2908 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2909 const unsigned char *pYTable, *pUVTable;
2910 unsigned char val0, val1;
2911 int i, size, reg = R51x_COMP_LUT_BEGIN;
2912
2913 PDEBUG(D_PROBE, "Uploading quantization tables");
2914
2915 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2916 pYTable = yQuanTable511;
2917 pUVTable = uvQuanTable511;
2918 size = 32;
2919 } else {
2920 pYTable = yQuanTable518;
2921 pUVTable = uvQuanTable518;
2922 size = 16;
2923 }
2924
2925 for (i = 0; i < size; i++) {
2926 val0 = *pYTable++;
2927 val1 = *pYTable++;
2928 val0 &= 0x0f;
2929 val1 &= 0x0f;
2930 val0 |= val1 << 4;
2931 reg_w(sd, reg, val0);
2932
2933 val0 = *pUVTable++;
2934 val1 = *pUVTable++;
2935 val0 &= 0x0f;
2936 val1 &= 0x0f;
2937 val0 |= val1 << 4;
2938 reg_w(sd, reg + size, val0);
2939
2940 reg++;
2941 }
2942 }
2943
2944 /* This initializes the OV511/OV511+ and the sensor */
2945 static void ov511_configure(struct gspca_dev *gspca_dev)
2946 {
2947 struct sd *sd = (struct sd *) gspca_dev;
2948
2949 /* For 511 and 511+ */
2950 const struct ov_regvals init_511[] = {
2951 { R51x_SYS_RESET, 0x7f },
2952 { R51x_SYS_INIT, 0x01 },
2953 { R51x_SYS_RESET, 0x7f },
2954 { R51x_SYS_INIT, 0x01 },
2955 { R51x_SYS_RESET, 0x3f },
2956 { R51x_SYS_INIT, 0x01 },
2957 { R51x_SYS_RESET, 0x3d },
2958 };
2959
2960 const struct ov_regvals norm_511[] = {
2961 { R511_DRAM_FLOW_CTL, 0x01 },
2962 { R51x_SYS_SNAP, 0x00 },
2963 { R51x_SYS_SNAP, 0x02 },
2964 { R51x_SYS_SNAP, 0x00 },
2965 { R511_FIFO_OPTS, 0x1f },
2966 { R511_COMP_EN, 0x00 },
2967 { R511_COMP_LUT_EN, 0x03 },
2968 };
2969
2970 const struct ov_regvals norm_511_p[] = {
2971 { R511_DRAM_FLOW_CTL, 0xff },
2972 { R51x_SYS_SNAP, 0x00 },
2973 { R51x_SYS_SNAP, 0x02 },
2974 { R51x_SYS_SNAP, 0x00 },
2975 { R511_FIFO_OPTS, 0xff },
2976 { R511_COMP_EN, 0x00 },
2977 { R511_COMP_LUT_EN, 0x03 },
2978 };
2979
2980 const struct ov_regvals compress_511[] = {
2981 { 0x70, 0x1f },
2982 { 0x71, 0x05 },
2983 { 0x72, 0x06 },
2984 { 0x73, 0x06 },
2985 { 0x74, 0x14 },
2986 { 0x75, 0x03 },
2987 { 0x76, 0x04 },
2988 { 0x77, 0x04 },
2989 };
2990
2991 PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
2992
2993 write_regvals(sd, init_511, ARRAY_SIZE(init_511));
2994
2995 switch (sd->bridge) {
2996 case BRIDGE_OV511:
2997 write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
2998 break;
2999 case BRIDGE_OV511PLUS:
3000 write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
3001 break;
3002 }
3003
3004 /* Init compression */
3005 write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
3006
3007 ov51x_upload_quan_tables(sd);
3008 }
3009
3010 /* This initializes the OV518/OV518+ and the sensor */
3011 static void ov518_configure(struct gspca_dev *gspca_dev)
3012 {
3013 struct sd *sd = (struct sd *) gspca_dev;
3014
3015 /* For 518 and 518+ */
3016 const struct ov_regvals init_518[] = {
3017 { R51x_SYS_RESET, 0x40 },
3018 { R51x_SYS_INIT, 0xe1 },
3019 { R51x_SYS_RESET, 0x3e },
3020 { R51x_SYS_INIT, 0xe1 },
3021 { R51x_SYS_RESET, 0x00 },
3022 { R51x_SYS_INIT, 0xe1 },
3023 { 0x46, 0x00 },
3024 { 0x5d, 0x03 },
3025 };
3026
3027 const struct ov_regvals norm_518[] = {
3028 { R51x_SYS_SNAP, 0x02 }, /* Reset */
3029 { R51x_SYS_SNAP, 0x01 }, /* Enable */
3030 { 0x31, 0x0f },
3031 { 0x5d, 0x03 },
3032 { 0x24, 0x9f },
3033 { 0x25, 0x90 },
3034 { 0x20, 0x00 },
3035 { 0x51, 0x04 },
3036 { 0x71, 0x19 },
3037 { 0x2f, 0x80 },
3038 };
3039
3040 const struct ov_regvals norm_518_p[] = {
3041 { R51x_SYS_SNAP, 0x02 }, /* Reset */
3042 { R51x_SYS_SNAP, 0x01 }, /* Enable */
3043 { 0x31, 0x0f },
3044 { 0x5d, 0x03 },
3045 { 0x24, 0x9f },
3046 { 0x25, 0x90 },
3047 { 0x20, 0x60 },
3048 { 0x51, 0x02 },
3049 { 0x71, 0x19 },
3050 { 0x40, 0xff },
3051 { 0x41, 0x42 },
3052 { 0x46, 0x00 },
3053 { 0x33, 0x04 },
3054 { 0x21, 0x19 },
3055 { 0x3f, 0x10 },
3056 { 0x2f, 0x80 },
3057 };
3058
3059 /* First 5 bits of custom ID reg are a revision ID on OV518 */
3060 sd->revision = reg_r(sd, R51x_SYS_CUST_ID) & 0x1f;
3061 PDEBUG(D_PROBE, "Device revision %d", sd->revision);
3062
3063 write_regvals(sd, init_518, ARRAY_SIZE(init_518));
3064
3065 /* Set LED GPIO pin to output mode */
3066 reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
3067
3068 switch (sd->bridge) {
3069 case BRIDGE_OV518:
3070 write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
3071 break;
3072 case BRIDGE_OV518PLUS:
3073 write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
3074 break;
3075 }
3076
3077 ov51x_upload_quan_tables(sd);
3078
3079 reg_w(sd, 0x2f, 0x80);
3080 }
3081
3082 static void ov519_configure(struct sd *sd)
3083 {
3084 static const struct ov_regvals init_519[] = {
3085 { 0x5a, 0x6d }, /* EnableSystem */
3086 { 0x53, 0x9b }, /* don't enable the microcontroller */
3087 { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
3088 { 0x5d, 0x03 },
3089 { 0x49, 0x01 },
3090 { 0x48, 0x00 },
3091 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
3092 * detection will fail. This deserves further investigation. */
3093 { OV519_GPIO_IO_CTRL0, 0xee },
3094 { OV519_R51_RESET1, 0x0f },
3095 { OV519_R51_RESET1, 0x00 },
3096 { 0x22, 0x00 },
3097 /* windows reads 0x55 at this point*/
3098 };
3099
3100 write_regvals(sd, init_519, ARRAY_SIZE(init_519));
3101 }
3102
3103 static void ovfx2_configure(struct sd *sd)
3104 {
3105 static const struct ov_regvals init_fx2[] = {
3106 { 0x00, 0x60 },
3107 { 0x02, 0x01 },
3108 { 0x0f, 0x1d },
3109 { 0xe9, 0x82 },
3110 { 0xea, 0xc7 },
3111 { 0xeb, 0x10 },
3112 { 0xec, 0xf6 },
3113 };
3114
3115 sd->stopped = 1;
3116
3117 write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
3118 }
3119
3120 /* set the mode */
3121 /* This function works for ov7660 only */
3122 static void ov519_set_mode(struct sd *sd)
3123 {
3124 static const struct ov_regvals bridge_ov7660[2][10] = {
3125 {{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
3126 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3127 {0x25, 0x01}, {0x26, 0x00}},
3128 {{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
3129 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3130 {0x25, 0x03}, {0x26, 0x00}}
3131 };
3132 static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
3133 {{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
3134 {{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}}
3135 };
3136 static const struct ov_i2c_regvals sensor_ov7660_2[] = {
3137 {OV7670_R17_HSTART, 0x13},
3138 {OV7670_R18_HSTOP, 0x01},
3139 {OV7670_R32_HREF, 0x92},
3140 {OV7670_R19_VSTART, 0x02},
3141 {OV7670_R1A_VSTOP, 0x7a},
3142 {OV7670_R03_VREF, 0x00},
3143 /* {0x33, 0x00}, */
3144 /* {0x34, 0x07}, */
3145 /* {0x36, 0x00}, */
3146 /* {0x6b, 0x0a}, */
3147 };
3148
3149 write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
3150 ARRAY_SIZE(bridge_ov7660[0]));
3151 write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
3152 ARRAY_SIZE(sensor_ov7660[0]));
3153 write_i2c_regvals(sd, sensor_ov7660_2,
3154 ARRAY_SIZE(sensor_ov7660_2));
3155 }
3156
3157 /* set the frame rate */
3158 /* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */
3159 static void ov519_set_fr(struct sd *sd)
3160 {
3161 int fr;
3162 u8 clock;
3163 /* frame rate table with indices:
3164 * - mode = 0: 320x240, 1: 640x480
3165 * - fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
3166 * - reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
3167 */
3168 static const u8 fr_tb[2][6][3] = {
3169 {{0x04, 0xff, 0x00},
3170 {0x04, 0x1f, 0x00},
3171 {0x04, 0x1b, 0x00},
3172 {0x04, 0x15, 0x00},
3173 {0x04, 0x09, 0x00},
3174 {0x04, 0x01, 0x00}},
3175 {{0x0c, 0xff, 0x00},
3176 {0x0c, 0x1f, 0x00},
3177 {0x0c, 0x1b, 0x00},
3178 {0x04, 0xff, 0x01},
3179 {0x04, 0x1f, 0x01},
3180 {0x04, 0x1b, 0x01}},
3181 };
3182
3183 if (frame_rate > 0)
3184 sd->frame_rate = frame_rate;
3185 if (sd->frame_rate >= 30)
3186 fr = 0;
3187 else if (sd->frame_rate >= 25)
3188 fr = 1;
3189 else if (sd->frame_rate >= 20)
3190 fr = 2;
3191 else if (sd->frame_rate >= 15)
3192 fr = 3;
3193 else if (sd->frame_rate >= 10)
3194 fr = 4;
3195 else
3196 fr = 5;
3197 reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
3198 reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
3199 clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
3200 if (sd->sensor == SEN_OV7660)
3201 clock |= 0x80; /* enable double clock */
3202 ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
3203 }
3204
3205 static void setautogain(struct gspca_dev *gspca_dev, s32 val)
3206 {
3207 struct sd *sd = (struct sd *) gspca_dev;
3208
3209 i2c_w_mask(sd, 0x13, val ? 0x05 : 0x00, 0x05);
3210 }
3211
3212 /* this function is called at probe time */
3213 static int sd_config(struct gspca_dev *gspca_dev,
3214 const struct usb_device_id *id)
3215 {
3216 struct sd *sd = (struct sd *) gspca_dev;
3217 struct cam *cam = &gspca_dev->cam;
3218
3219 sd->bridge = id->driver_info & BRIDGE_MASK;
3220 sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
3221
3222 switch (sd->bridge) {
3223 case BRIDGE_OV511:
3224 case BRIDGE_OV511PLUS:
3225 cam->cam_mode = ov511_vga_mode;
3226 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3227 break;
3228 case BRIDGE_OV518:
3229 case BRIDGE_OV518PLUS:
3230 cam->cam_mode = ov518_vga_mode;
3231 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3232 break;
3233 case BRIDGE_OV519:
3234 cam->cam_mode = ov519_vga_mode;
3235 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3236 break;
3237 case BRIDGE_OVFX2:
3238 cam->cam_mode = ov519_vga_mode;
3239 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3240 cam->bulk_size = OVFX2_BULK_SIZE;
3241 cam->bulk_nurbs = MAX_NURBS;
3242 cam->bulk = 1;
3243 break;
3244 case BRIDGE_W9968CF:
3245 cam->cam_mode = w9968cf_vga_mode;
3246 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3247 break;
3248 }
3249
3250 sd->frame_rate = 15;
3251
3252 return 0;
3253 }
3254
3255 /* this function is called at probe and resume time */
3256 static int sd_init(struct gspca_dev *gspca_dev)
3257 {
3258 struct sd *sd = (struct sd *) gspca_dev;
3259 struct cam *cam = &gspca_dev->cam;
3260
3261 switch (sd->bridge) {
3262 case BRIDGE_OV511:
3263 case BRIDGE_OV511PLUS:
3264 ov511_configure(gspca_dev);
3265 break;
3266 case BRIDGE_OV518:
3267 case BRIDGE_OV518PLUS:
3268 ov518_configure(gspca_dev);
3269 break;
3270 case BRIDGE_OV519:
3271 ov519_configure(sd);
3272 break;
3273 case BRIDGE_OVFX2:
3274 ovfx2_configure(sd);
3275 break;
3276 case BRIDGE_W9968CF:
3277 w9968cf_configure(sd);
3278 break;
3279 }
3280
3281 /* The OV519 must be more aggressive about sensor detection since
3282 * I2C write will never fail if the sensor is not present. We have
3283 * to try to initialize the sensor to detect its presence */
3284 sd->sensor = -1;
3285
3286 /* Test for 76xx */
3287 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3288 ov7xx0_configure(sd);
3289
3290 /* Test for 6xx0 */
3291 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3292 ov6xx0_configure(sd);
3293
3294 /* Test for 8xx0 */
3295 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3296 ov8xx0_configure(sd);
3297
3298 /* Test for 3xxx / 2xxx */
3299 } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3300 ov_hires_configure(sd);
3301 } else {
3302 PERR("Can't determine sensor slave IDs\n");
3303 goto error;
3304 }
3305
3306 if (sd->sensor < 0)
3307 goto error;
3308
3309 ov51x_led_control(sd, 0); /* turn LED off */
3310
3311 switch (sd->bridge) {
3312 case BRIDGE_OV511:
3313 case BRIDGE_OV511PLUS:
3314 if (sd->sif) {
3315 cam->cam_mode = ov511_sif_mode;
3316 cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3317 }
3318 break;
3319 case BRIDGE_OV518:
3320 case BRIDGE_OV518PLUS:
3321 if (sd->sif) {
3322 cam->cam_mode = ov518_sif_mode;
3323 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3324 }
3325 break;
3326 case BRIDGE_OV519:
3327 if (sd->sif) {
3328 cam->cam_mode = ov519_sif_mode;
3329 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3330 }
3331 break;
3332 case BRIDGE_OVFX2:
3333 switch (sd->sensor) {
3334 case SEN_OV2610:
3335 case SEN_OV2610AE:
3336 cam->cam_mode = ovfx2_ov2610_mode;
3337 cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3338 break;
3339 case SEN_OV3610:
3340 cam->cam_mode = ovfx2_ov3610_mode;
3341 cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3342 break;
3343 case SEN_OV9600:
3344 cam->cam_mode = ovfx2_ov9600_mode;
3345 cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode);
3346 break;
3347 default:
3348 if (sd->sif) {
3349 cam->cam_mode = ov519_sif_mode;
3350 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3351 }
3352 break;
3353 }
3354 break;
3355 case BRIDGE_W9968CF:
3356 if (sd->sif)
3357 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1;
3358
3359 /* w9968cf needs initialisation once the sensor is known */
3360 w9968cf_init(sd);
3361 break;
3362 }
3363
3364 /* initialize the sensor */
3365 switch (sd->sensor) {
3366 case SEN_OV2610:
3367 write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));
3368
3369 /* Enable autogain, autoexpo, awb, bandfilter */
3370 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3371 break;
3372 case SEN_OV2610AE:
3373 write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae));
3374
3375 /* enable autoexpo */
3376 i2c_w_mask(sd, 0x13, 0x05, 0x05);
3377 break;
3378 case SEN_OV3610:
3379 write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));
3380
3381 /* Enable autogain, autoexpo, awb, bandfilter */
3382 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3383 break;
3384 case SEN_OV6620:
3385 write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
3386 break;
3387 case SEN_OV6630:
3388 case SEN_OV66308AF:
3389 write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
3390 break;
3391 default:
3392 /* case SEN_OV7610: */
3393 /* case SEN_OV76BE: */
3394 write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
3395 i2c_w_mask(sd, 0x0e, 0x00, 0x40);
3396 break;
3397 case SEN_OV7620:
3398 case SEN_OV7620AE:
3399 write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
3400 break;
3401 case SEN_OV7640:
3402 case SEN_OV7648:
3403 write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
3404 break;
3405 case SEN_OV7660:
3406 i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
3407 msleep(14);
3408 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
3409 write_regvals(sd, init_519_ov7660,
3410 ARRAY_SIZE(init_519_ov7660));
3411 write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
3412 sd->gspca_dev.curr_mode = 1; /* 640x480 */
3413 ov519_set_mode(sd);
3414 ov519_set_fr(sd);
3415 sd_reset_snapshot(gspca_dev);
3416 ov51x_restart(sd);
3417 ov51x_stop(sd); /* not in win traces */
3418 ov51x_led_control(sd, 0);
3419 break;
3420 case SEN_OV7670:
3421 write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
3422 break;
3423 case SEN_OV8610:
3424 write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
3425 break;
3426 case SEN_OV9600:
3427 write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600));
3428
3429 /* enable autoexpo */
3430 /* i2c_w_mask(sd, 0x13, 0x05, 0x05); */
3431 break;
3432 }
3433 return gspca_dev->usb_err;
3434 error:
3435 PERR("OV519 Config failed");
3436 return -EINVAL;
3437 }
3438
3439 /* function called at start time before URB creation */
3440 static int sd_isoc_init(struct gspca_dev *gspca_dev)
3441 {
3442 struct sd *sd = (struct sd *) gspca_dev;
3443
3444 switch (sd->bridge) {
3445 case BRIDGE_OVFX2:
3446 if (gspca_dev->pixfmt.width != 800)
3447 gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE;
3448 else
3449 gspca_dev->cam.bulk_size = 7 * 4096;
3450 break;
3451 }
3452 return 0;
3453 }
3454
3455 /* Set up the OV511/OV511+ with the given image parameters.
3456 *
3457 * Do not put any sensor-specific code in here (including I2C I/O functions)
3458 */
3459 static void ov511_mode_init_regs(struct sd *sd)
3460 {
3461 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3462 int hsegs, vsegs, packet_size, fps, needed;
3463 int interlaced = 0;
3464 struct usb_host_interface *alt;
3465 struct usb_interface *intf;
3466
3467 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3468 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3469 if (!alt) {
3470 PERR("Couldn't get altsetting\n");
3471 sd->gspca_dev.usb_err = -EIO;
3472 return;
3473 }
3474
3475 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3476 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3477
3478 reg_w(sd, R511_CAM_UV_EN, 0x01);
3479 reg_w(sd, R511_SNAP_UV_EN, 0x01);
3480 reg_w(sd, R511_SNAP_OPTS, 0x03);
3481
3482 /* Here I'm assuming that snapshot size == image size.
3483 * I hope that's always true. --claudio
3484 */
3485 hsegs = (sd->gspca_dev.pixfmt.width >> 3) - 1;
3486 vsegs = (sd->gspca_dev.pixfmt.height >> 3) - 1;
3487
3488 reg_w(sd, R511_CAM_PXCNT, hsegs);
3489 reg_w(sd, R511_CAM_LNCNT, vsegs);
3490 reg_w(sd, R511_CAM_PXDIV, 0x00);
3491 reg_w(sd, R511_CAM_LNDIV, 0x00);
3492
3493 /* YUV420, low pass filter on */
3494 reg_w(sd, R511_CAM_OPTS, 0x03);
3495
3496 /* Snapshot additions */
3497 reg_w(sd, R511_SNAP_PXCNT, hsegs);
3498 reg_w(sd, R511_SNAP_LNCNT, vsegs);
3499 reg_w(sd, R511_SNAP_PXDIV, 0x00);
3500 reg_w(sd, R511_SNAP_LNDIV, 0x00);
3501
3502 /******** Set the framerate ********/
3503 if (frame_rate > 0)
3504 sd->frame_rate = frame_rate;
3505
3506 switch (sd->sensor) {
3507 case SEN_OV6620:
3508 /* No framerate control, doesn't like higher rates yet */
3509 sd->clockdiv = 3;
3510 break;
3511
3512 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3513 for more sensors we need to do this for them too */
3514 case SEN_OV7620:
3515 case SEN_OV7620AE:
3516 case SEN_OV7640:
3517 case SEN_OV7648:
3518 case SEN_OV76BE:
3519 if (sd->gspca_dev.pixfmt.width == 320)
3520 interlaced = 1;
3521 /* Fall through */
3522 case SEN_OV6630:
3523 case SEN_OV7610:
3524 case SEN_OV7670:
3525 switch (sd->frame_rate) {
3526 case 30:
3527 case 25:
3528 /* Not enough bandwidth to do 640x480 @ 30 fps */
3529 if (sd->gspca_dev.pixfmt.width != 640) {
3530 sd->clockdiv = 0;
3531 break;
3532 }
3533 /* Fall through for 640x480 case */
3534 default:
3535 /* case 20: */
3536 /* case 15: */
3537 sd->clockdiv = 1;
3538 break;
3539 case 10:
3540 sd->clockdiv = 2;
3541 break;
3542 case 5:
3543 sd->clockdiv = 5;
3544 break;
3545 }
3546 if (interlaced) {
3547 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3548 /* Higher then 10 does not work */
3549 if (sd->clockdiv > 10)
3550 sd->clockdiv = 10;
3551 }
3552 break;
3553
3554 case SEN_OV8610:
3555 /* No framerate control ?? */
3556 sd->clockdiv = 0;
3557 break;
3558 }
3559
3560 /* Check if we have enough bandwidth to disable compression */
3561 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3562 needed = fps * sd->gspca_dev.pixfmt.width *
3563 sd->gspca_dev.pixfmt.height * 3 / 2;
3564 /* 1000 isoc packets/sec */
3565 if (needed > 1000 * packet_size) {
3566 /* Enable Y and UV quantization and compression */
3567 reg_w(sd, R511_COMP_EN, 0x07);
3568 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3569 } else {
3570 reg_w(sd, R511_COMP_EN, 0x06);
3571 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3572 }
3573
3574 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3575 reg_w(sd, R51x_SYS_RESET, 0);
3576 }
3577
3578 /* Sets up the OV518/OV518+ with the given image parameters
3579 *
3580 * OV518 needs a completely different approach, until we can figure out what
3581 * the individual registers do. Also, only 15 FPS is supported now.
3582 *
3583 * Do not put any sensor-specific code in here (including I2C I/O functions)
3584 */
3585 static void ov518_mode_init_regs(struct sd *sd)
3586 {
3587 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3588 int hsegs, vsegs, packet_size;
3589 struct usb_host_interface *alt;
3590 struct usb_interface *intf;
3591
3592 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3593 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3594 if (!alt) {
3595 PERR("Couldn't get altsetting\n");
3596 sd->gspca_dev.usb_err = -EIO;
3597 return;
3598 }
3599
3600 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3601 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3602
3603 /******** Set the mode ********/
3604 reg_w(sd, 0x2b, 0);
3605 reg_w(sd, 0x2c, 0);
3606 reg_w(sd, 0x2d, 0);
3607 reg_w(sd, 0x2e, 0);
3608 reg_w(sd, 0x3b, 0);
3609 reg_w(sd, 0x3c, 0);
3610 reg_w(sd, 0x3d, 0);
3611 reg_w(sd, 0x3e, 0);
3612
3613 if (sd->bridge == BRIDGE_OV518) {
3614 /* Set 8-bit (YVYU) input format */
3615 reg_w_mask(sd, 0x20, 0x08, 0x08);
3616
3617 /* Set 12-bit (4:2:0) output format */
3618 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3619 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3620 } else {
3621 reg_w(sd, 0x28, 0x80);
3622 reg_w(sd, 0x38, 0x80);
3623 }
3624
3625 hsegs = sd->gspca_dev.pixfmt.width / 16;
3626 vsegs = sd->gspca_dev.pixfmt.height / 4;
3627
3628 reg_w(sd, 0x29, hsegs);
3629 reg_w(sd, 0x2a, vsegs);
3630
3631 reg_w(sd, 0x39, hsegs);
3632 reg_w(sd, 0x3a, vsegs);
3633
3634 /* Windows driver does this here; who knows why */
3635 reg_w(sd, 0x2f, 0x80);
3636
3637 /******** Set the framerate ********/
3638 if (sd->bridge == BRIDGE_OV518PLUS && sd->revision == 0 &&
3639 sd->sensor == SEN_OV7620AE)
3640 sd->clockdiv = 0;
3641 else
3642 sd->clockdiv = 1;
3643
3644 /* Mode independent, but framerate dependent, regs */
3645 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3646 reg_w(sd, 0x51, 0x04);
3647 reg_w(sd, 0x22, 0x18);
3648 reg_w(sd, 0x23, 0xff);
3649
3650 if (sd->bridge == BRIDGE_OV518PLUS) {
3651 switch (sd->sensor) {
3652 case SEN_OV7620AE:
3653 /*
3654 * HdG: 640x480 needs special handling on device
3655 * revision 2, we check for device revison > 0 to
3656 * avoid regressions, as we don't know the correct
3657 * thing todo for revision 1.
3658 *
3659 * Also this likely means we don't need to
3660 * differentiate between the OV7620 and OV7620AE,
3661 * earlier testing hitting this same problem likely
3662 * happened to be with revision < 2 cams using an
3663 * OV7620 and revision 2 cams using an OV7620AE.
3664 */
3665 if (sd->revision > 0 &&
3666 sd->gspca_dev.pixfmt.width == 640) {
3667 reg_w(sd, 0x20, 0x60);
3668 reg_w(sd, 0x21, 0x1f);
3669 } else {
3670 reg_w(sd, 0x20, 0x00);
3671 reg_w(sd, 0x21, 0x19);
3672 }
3673 break;
3674 case SEN_OV7620:
3675 reg_w(sd, 0x20, 0x00);
3676 reg_w(sd, 0x21, 0x19);
3677 break;
3678 default:
3679 reg_w(sd, 0x21, 0x19);
3680 }
3681 } else
3682 reg_w(sd, 0x71, 0x17); /* Compression-related? */
3683
3684 /* FIXME: Sensor-specific */
3685 /* Bit 5 is what matters here. Of course, it is "reserved" */
3686 i2c_w(sd, 0x54, 0x23);
3687
3688 reg_w(sd, 0x2f, 0x80);
3689
3690 if (sd->bridge == BRIDGE_OV518PLUS) {
3691 reg_w(sd, 0x24, 0x94);
3692 reg_w(sd, 0x25, 0x90);
3693 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3694 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
3695 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
3696 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
3697 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
3698 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
3699 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
3700 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
3701 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
3702 } else {
3703 reg_w(sd, 0x24, 0x9f);
3704 reg_w(sd, 0x25, 0x90);
3705 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3706 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
3707 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
3708 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
3709 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
3710 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
3711 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
3712 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
3713 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
3714 }
3715
3716 reg_w(sd, 0x2f, 0x80);
3717 }
3718
3719 /* Sets up the OV519 with the given image parameters
3720 *
3721 * OV519 needs a completely different approach, until we can figure out what
3722 * the individual registers do.
3723 *
3724 * Do not put any sensor-specific code in here (including I2C I/O functions)
3725 */
3726 static void ov519_mode_init_regs(struct sd *sd)
3727 {
3728 static const struct ov_regvals mode_init_519_ov7670[] = {
3729 { 0x5d, 0x03 }, /* Turn off suspend mode */
3730 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3731 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3732 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3733 { 0xa3, 0x18 },
3734 { 0xa4, 0x04 },
3735 { 0xa5, 0x28 },
3736 { 0x37, 0x00 }, /* SetUsbInit */
3737 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3738 /* Enable both fields, YUV Input, disable defect comp (why?) */
3739 { 0x20, 0x0c },
3740 { 0x21, 0x38 },
3741 { 0x22, 0x1d },
3742 { 0x17, 0x50 }, /* undocumented */
3743 { 0x37, 0x00 }, /* undocumented */
3744 { 0x40, 0xff }, /* I2C timeout counter */
3745 { 0x46, 0x00 }, /* I2C clock prescaler */
3746 { 0x59, 0x04 }, /* new from windrv 090403 */
3747 { 0xff, 0x00 }, /* undocumented */
3748 /* windows reads 0x55 at this point, why? */
3749 };
3750
3751 static const struct ov_regvals mode_init_519[] = {
3752 { 0x5d, 0x03 }, /* Turn off suspend mode */
3753 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3754 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3755 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3756 { 0xa3, 0x18 },
3757 { 0xa4, 0x04 },
3758 { 0xa5, 0x28 },
3759 { 0x37, 0x00 }, /* SetUsbInit */
3760 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3761 /* Enable both fields, YUV Input, disable defect comp (why?) */
3762 { 0x22, 0x1d },
3763 { 0x17, 0x50 }, /* undocumented */
3764 { 0x37, 0x00 }, /* undocumented */
3765 { 0x40, 0xff }, /* I2C timeout counter */
3766 { 0x46, 0x00 }, /* I2C clock prescaler */
3767 { 0x59, 0x04 }, /* new from windrv 090403 */
3768 { 0xff, 0x00 }, /* undocumented */
3769 /* windows reads 0x55 at this point, why? */
3770 };
3771
3772 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3773
3774 /******** Set the mode ********/
3775 switch (sd->sensor) {
3776 default:
3777 write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
3778 if (sd->sensor == SEN_OV7640 ||
3779 sd->sensor == SEN_OV7648) {
3780 /* Select 8-bit input mode */
3781 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3782 }
3783 break;
3784 case SEN_OV7660:
3785 return; /* done by ov519_set_mode/fr() */
3786 case SEN_OV7670:
3787 write_regvals(sd, mode_init_519_ov7670,
3788 ARRAY_SIZE(mode_init_519_ov7670));
3789 break;
3790 }
3791
3792 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.pixfmt.width >> 4);
3793 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.pixfmt.height >> 3);
3794 if (sd->sensor == SEN_OV7670 &&
3795 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3796 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3797 else if (sd->sensor == SEN_OV7648 &&
3798 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3799 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3800 else
3801 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3802 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
3803 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
3804 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
3805 reg_w(sd, OV519_R16_DIVIDER, 0x00);
3806 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
3807 reg_w(sd, 0x26, 0x00); /* Undocumented */
3808
3809 /******** Set the framerate ********/
3810 if (frame_rate > 0)
3811 sd->frame_rate = frame_rate;
3812
3813 /* FIXME: These are only valid at the max resolution. */
3814 sd->clockdiv = 0;
3815 switch (sd->sensor) {
3816 case SEN_OV7640:
3817 case SEN_OV7648:
3818 switch (sd->frame_rate) {
3819 default:
3820 /* case 30: */
3821 reg_w(sd, 0xa4, 0x0c);
3822 reg_w(sd, 0x23, 0xff);
3823 break;
3824 case 25:
3825 reg_w(sd, 0xa4, 0x0c);
3826 reg_w(sd, 0x23, 0x1f);
3827 break;
3828 case 20:
3829 reg_w(sd, 0xa4, 0x0c);
3830 reg_w(sd, 0x23, 0x1b);
3831 break;
3832 case 15:
3833 reg_w(sd, 0xa4, 0x04);
3834 reg_w(sd, 0x23, 0xff);
3835 sd->clockdiv = 1;
3836 break;
3837 case 10:
3838 reg_w(sd, 0xa4, 0x04);
3839 reg_w(sd, 0x23, 0x1f);
3840 sd->clockdiv = 1;
3841 break;
3842 case 5:
3843 reg_w(sd, 0xa4, 0x04);
3844 reg_w(sd, 0x23, 0x1b);
3845 sd->clockdiv = 1;
3846 break;
3847 }
3848 break;
3849 case SEN_OV8610:
3850 switch (sd->frame_rate) {
3851 default: /* 15 fps */
3852 /* case 15: */
3853 reg_w(sd, 0xa4, 0x06);
3854 reg_w(sd, 0x23, 0xff);
3855 break;
3856 case 10:
3857 reg_w(sd, 0xa4, 0x06);
3858 reg_w(sd, 0x23, 0x1f);
3859 break;
3860 case 5:
3861 reg_w(sd, 0xa4, 0x06);
3862 reg_w(sd, 0x23, 0x1b);
3863 break;
3864 }
3865 break;
3866 case SEN_OV7670: /* guesses, based on 7640 */
3867 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3868 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3869 reg_w(sd, 0xa4, 0x10);
3870 switch (sd->frame_rate) {
3871 case 30:
3872 reg_w(sd, 0x23, 0xff);
3873 break;
3874 case 20:
3875 reg_w(sd, 0x23, 0x1b);
3876 break;
3877 default:
3878 /* case 15: */
3879 reg_w(sd, 0x23, 0xff);
3880 sd->clockdiv = 1;
3881 break;
3882 }
3883 break;
3884 }
3885 }
3886
3887 static void mode_init_ov_sensor_regs(struct sd *sd)
3888 {
3889 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3890 int qvga, xstart, xend, ystart, yend;
3891 u8 v;
3892
3893 qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
3894
3895 /******** Mode (VGA/QVGA) and sensor specific regs ********/
3896 switch (sd->sensor) {
3897 case SEN_OV2610:
3898 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3899 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3900 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3901 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3902 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3903 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3904 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3905 return;
3906 case SEN_OV2610AE: {
3907 u8 v;
3908
3909 /* frame rates:
3910 * 10fps / 5 fps for 1600x1200
3911 * 40fps / 20fps for 800x600
3912 */
3913 v = 80;
3914 if (qvga) {
3915 if (sd->frame_rate < 25)
3916 v = 0x81;
3917 } else {
3918 if (sd->frame_rate < 10)
3919 v = 0x81;
3920 }
3921 i2c_w(sd, 0x11, v);
3922 i2c_w(sd, 0x12, qvga ? 0x60 : 0x20);
3923 return;
3924 }
3925 case SEN_OV3610:
3926 if (qvga) {
3927 xstart = (1040 - gspca_dev->pixfmt.width) / 2 +
3928 (0x1f << 4);
3929 ystart = (776 - gspca_dev->pixfmt.height) / 2;
3930 } else {
3931 xstart = (2076 - gspca_dev->pixfmt.width) / 2 +
3932 (0x10 << 4);
3933 ystart = (1544 - gspca_dev->pixfmt.height) / 2;
3934 }
3935 xend = xstart + gspca_dev->pixfmt.width;
3936 yend = ystart + gspca_dev->pixfmt.height;
3937 /* Writing to the COMH register resets the other windowing regs
3938 to their default values, so we must do this first. */
3939 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3940 i2c_w_mask(sd, 0x32,
3941 (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3942 0x3f);
3943 i2c_w_mask(sd, 0x03,
3944 (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3945 0x0f);
3946 i2c_w(sd, 0x17, xstart >> 4);
3947 i2c_w(sd, 0x18, xend >> 4);
3948 i2c_w(sd, 0x19, ystart >> 3);
3949 i2c_w(sd, 0x1a, yend >> 3);
3950 return;
3951 case SEN_OV8610:
3952 /* For OV8610 qvga means qsvga */
3953 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3954 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3955 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3956 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3957 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3958 break;
3959 case SEN_OV7610:
3960 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3961 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3962 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3963 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3964 break;
3965 case SEN_OV7620:
3966 case SEN_OV7620AE:
3967 case SEN_OV76BE:
3968 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3969 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3970 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3971 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3972 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3973 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3974 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3975 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3976 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3977 if (sd->sensor == SEN_OV76BE)
3978 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3979 break;
3980 case SEN_OV7640:
3981 case SEN_OV7648:
3982 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3983 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3984 /* Setting this undocumented bit in qvga mode removes a very
3985 annoying vertical shaking of the image */
3986 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3987 /* Unknown */
3988 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3989 /* Allow higher automatic gain (to allow higher framerates) */
3990 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3991 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
3992 break;
3993 case SEN_OV7670:
3994 /* set COM7_FMT_VGA or COM7_FMT_QVGA
3995 * do we need to set anything else?
3996 * HSTART etc are set in set_ov_sensor_window itself */
3997 i2c_w_mask(sd, OV7670_R12_COM7,
3998 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
3999 OV7670_COM7_FMT_MASK);
4000 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4001 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
4002 OV7670_COM8_AWB);
4003 if (qvga) { /* QVGA from ov7670.c by
4004 * Jonathan Corbet */
4005 xstart = 164;
4006 xend = 28;
4007 ystart = 14;
4008 yend = 494;
4009 } else { /* VGA */
4010 xstart = 158;
4011 xend = 14;
4012 ystart = 10;
4013 yend = 490;
4014 }
4015 /* OV7670 hardware window registers are split across
4016 * multiple locations */
4017 i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
4018 i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
4019 v = i2c_r(sd, OV7670_R32_HREF);
4020 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
4021 msleep(10); /* need to sleep between read and write to
4022 * same reg! */
4023 i2c_w(sd, OV7670_R32_HREF, v);
4024
4025 i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
4026 i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
4027 v = i2c_r(sd, OV7670_R03_VREF);
4028 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
4029 msleep(10); /* need to sleep between read and write to
4030 * same reg! */
4031 i2c_w(sd, OV7670_R03_VREF, v);
4032 break;
4033 case SEN_OV6620:
4034 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4035 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4036 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4037 break;
4038 case SEN_OV6630:
4039 case SEN_OV66308AF:
4040 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4041 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4042 break;
4043 case SEN_OV9600: {
4044 const struct ov_i2c_regvals *vals;
4045 static const struct ov_i2c_regvals sxga_15[] = {
4046 {0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4047 };
4048 static const struct ov_i2c_regvals sxga_7_5[] = {
4049 {0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4050 };
4051 static const struct ov_i2c_regvals vga_30[] = {
4052 {0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60}
4053 };
4054 static const struct ov_i2c_regvals vga_15[] = {
4055 {0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70}
4056 };
4057
4058 /* frame rates:
4059 * 15fps / 7.5 fps for 1280x1024
4060 * 30fps / 15fps for 640x480
4061 */
4062 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40);
4063 if (qvga)
4064 vals = sd->frame_rate < 30 ? vga_15 : vga_30;
4065 else
4066 vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15;
4067 write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15));
4068 return;
4069 }
4070 default:
4071 return;
4072 }
4073
4074 /******** Clock programming ********/
4075 i2c_w(sd, 0x11, sd->clockdiv);
4076 }
4077
4078 /* this function works for bridge ov519 and sensors ov7660 and ov7670 only */
4079 static void sethvflip(struct gspca_dev *gspca_dev, s32 hflip, s32 vflip)
4080 {
4081 struct sd *sd = (struct sd *) gspca_dev;
4082
4083 if (sd->gspca_dev.streaming)
4084 reg_w(sd, OV519_R51_RESET1, 0x0f); /* block stream */
4085 i2c_w_mask(sd, OV7670_R1E_MVFP,
4086 OV7670_MVFP_MIRROR * hflip | OV7670_MVFP_VFLIP * vflip,
4087 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
4088 if (sd->gspca_dev.streaming)
4089 reg_w(sd, OV519_R51_RESET1, 0x00); /* restart stream */
4090 }
4091
4092 static void set_ov_sensor_window(struct sd *sd)
4093 {
4094 struct gspca_dev *gspca_dev;
4095 int qvga, crop;
4096 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
4097
4098 /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
4099 switch (sd->sensor) {
4100 case SEN_OV2610:
4101 case SEN_OV2610AE:
4102 case SEN_OV3610:
4103 case SEN_OV7670:
4104 case SEN_OV9600:
4105 mode_init_ov_sensor_regs(sd);
4106 return;
4107 case SEN_OV7660:
4108 ov519_set_mode(sd);
4109 ov519_set_fr(sd);
4110 return;
4111 }
4112
4113 gspca_dev = &sd->gspca_dev;
4114 qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
4115 crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
4116
4117 /* The different sensor ICs handle setting up of window differently.
4118 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
4119 switch (sd->sensor) {
4120 case SEN_OV8610:
4121 hwsbase = 0x1e;
4122 hwebase = 0x1e;
4123 vwsbase = 0x02;
4124 vwebase = 0x02;
4125 break;
4126 case SEN_OV7610:
4127 case SEN_OV76BE:
4128 hwsbase = 0x38;
4129 hwebase = 0x3a;
4130 vwsbase = vwebase = 0x05;
4131 break;
4132 case SEN_OV6620:
4133 case SEN_OV6630:
4134 case SEN_OV66308AF:
4135 hwsbase = 0x38;
4136 hwebase = 0x3a;
4137 vwsbase = 0x05;
4138 vwebase = 0x06;
4139 if (sd->sensor == SEN_OV66308AF && qvga)
4140 /* HDG: this fixes U and V getting swapped */
4141 hwsbase++;
4142 if (crop) {
4143 hwsbase += 8;
4144 hwebase += 8;
4145 vwsbase += 11;
4146 vwebase += 11;
4147 }
4148 break;
4149 case SEN_OV7620:
4150 case SEN_OV7620AE:
4151 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
4152 hwebase = 0x2f;
4153 vwsbase = vwebase = 0x05;
4154 break;
4155 case SEN_OV7640:
4156 case SEN_OV7648:
4157 hwsbase = 0x1a;
4158 hwebase = 0x1a;
4159 vwsbase = vwebase = 0x03;
4160 break;
4161 default:
4162 return;
4163 }
4164
4165 switch (sd->sensor) {
4166 case SEN_OV6620:
4167 case SEN_OV6630:
4168 case SEN_OV66308AF:
4169 if (qvga) { /* QCIF */
4170 hwscale = 0;
4171 vwscale = 0;
4172 } else { /* CIF */
4173 hwscale = 1;
4174 vwscale = 1; /* The datasheet says 0;
4175 * it's wrong */
4176 }
4177 break;
4178 case SEN_OV8610:
4179 if (qvga) { /* QSVGA */
4180 hwscale = 1;
4181 vwscale = 1;
4182 } else { /* SVGA */
4183 hwscale = 2;
4184 vwscale = 2;
4185 }
4186 break;
4187 default: /* SEN_OV7xx0 */
4188 if (qvga) { /* QVGA */
4189 hwscale = 1;
4190 vwscale = 0;
4191 } else { /* VGA */
4192 hwscale = 2;
4193 vwscale = 1;
4194 }
4195 }
4196
4197 mode_init_ov_sensor_regs(sd);
4198
4199 i2c_w(sd, 0x17, hwsbase);
4200 i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
4201 i2c_w(sd, 0x19, vwsbase);
4202 i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
4203 }
4204
4205 /* -- start the camera -- */
4206 static int sd_start(struct gspca_dev *gspca_dev)
4207 {
4208 struct sd *sd = (struct sd *) gspca_dev;
4209
4210 /* Default for most bridges, allow bridge_mode_init_regs to override */
4211 sd->sensor_width = sd->gspca_dev.pixfmt.width;
4212 sd->sensor_height = sd->gspca_dev.pixfmt.height;
4213
4214 switch (sd->bridge) {
4215 case BRIDGE_OV511:
4216 case BRIDGE_OV511PLUS:
4217 ov511_mode_init_regs(sd);
4218 break;
4219 case BRIDGE_OV518:
4220 case BRIDGE_OV518PLUS:
4221 ov518_mode_init_regs(sd);
4222 break;
4223 case BRIDGE_OV519:
4224 ov519_mode_init_regs(sd);
4225 break;
4226 /* case BRIDGE_OVFX2: nothing to do */
4227 case BRIDGE_W9968CF:
4228 w9968cf_mode_init_regs(sd);
4229 break;
4230 }
4231
4232 set_ov_sensor_window(sd);
4233
4234 /* Force clear snapshot state in case the snapshot button was
4235 pressed while we weren't streaming */
4236 sd->snapshot_needs_reset = 1;
4237 sd_reset_snapshot(gspca_dev);
4238
4239 sd->first_frame = 3;
4240
4241 ov51x_restart(sd);
4242 ov51x_led_control(sd, 1);
4243 return gspca_dev->usb_err;
4244 }
4245
4246 static void sd_stopN(struct gspca_dev *gspca_dev)
4247 {
4248 struct sd *sd = (struct sd *) gspca_dev;
4249
4250 ov51x_stop(sd);
4251 ov51x_led_control(sd, 0);
4252 }
4253
4254 static void sd_stop0(struct gspca_dev *gspca_dev)
4255 {
4256 struct sd *sd = (struct sd *) gspca_dev;
4257
4258 if (!sd->gspca_dev.present)
4259 return;
4260 if (sd->bridge == BRIDGE_W9968CF)
4261 w9968cf_stop0(sd);
4262
4263 #if IS_ENABLED(CONFIG_INPUT)
4264 /* If the last button state is pressed, release it now! */
4265 if (sd->snapshot_pressed) {
4266 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
4267 input_sync(gspca_dev->input_dev);
4268 sd->snapshot_pressed = 0;
4269 }
4270 #endif
4271 if (sd->bridge == BRIDGE_OV519)
4272 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
4273 }
4274
4275 static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
4276 {
4277 struct sd *sd = (struct sd *) gspca_dev;
4278
4279 if (sd->snapshot_pressed != state) {
4280 #if IS_ENABLED(CONFIG_INPUT)
4281 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
4282 input_sync(gspca_dev->input_dev);
4283 #endif
4284 if (state)
4285 sd->snapshot_needs_reset = 1;
4286
4287 sd->snapshot_pressed = state;
4288 } else {
4289 /* On the ov511 / ov519 we need to reset the button state
4290 multiple times, as resetting does not work as long as the
4291 button stays pressed */
4292 switch (sd->bridge) {
4293 case BRIDGE_OV511:
4294 case BRIDGE_OV511PLUS:
4295 case BRIDGE_OV519:
4296 if (state)
4297 sd->snapshot_needs_reset = 1;
4298 break;
4299 }
4300 }
4301 }
4302
4303 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
4304 u8 *in, /* isoc packet */
4305 int len) /* iso packet length */
4306 {
4307 struct sd *sd = (struct sd *) gspca_dev;
4308
4309 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
4310 * byte non-zero. The EOF packet has image width/height in the
4311 * 10th and 11th bytes. The 9th byte is given as follows:
4312 *
4313 * bit 7: EOF
4314 * 6: compression enabled
4315 * 5: 422/420/400 modes
4316 * 4: 422/420/400 modes
4317 * 3: 1
4318 * 2: snapshot button on
4319 * 1: snapshot frame
4320 * 0: even/odd field
4321 */
4322 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
4323 (in[8] & 0x08)) {
4324 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4325 if (in[8] & 0x80) {
4326 /* Frame end */
4327 if ((in[9] + 1) * 8 != gspca_dev->pixfmt.width ||
4328 (in[10] + 1) * 8 != gspca_dev->pixfmt.height) {
4329 PERR("Invalid frame size, got: %dx%d, requested: %dx%d\n",
4330 (in[9] + 1) * 8, (in[10] + 1) * 8,
4331 gspca_dev->pixfmt.width,
4332 gspca_dev->pixfmt.height);
4333 gspca_dev->last_packet_type = DISCARD_PACKET;
4334 return;
4335 }
4336 /* Add 11 byte footer to frame, might be useful */
4337 gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4338 return;
4339 } else {
4340 /* Frame start */
4341 gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4342 sd->packet_nr = 0;
4343 }
4344 }
4345
4346 /* Ignore the packet number */
4347 len--;
4348
4349 /* intermediate packet */
4350 gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4351 }
4352
4353 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4354 u8 *data, /* isoc packet */
4355 int len) /* iso packet length */
4356 {
4357 struct sd *sd = (struct sd *) gspca_dev;
4358
4359 /* A false positive here is likely, until OVT gives me
4360 * the definitive SOF/EOF format */
4361 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4362 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4363 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4364 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4365 sd->packet_nr = 0;
4366 }
4367
4368 if (gspca_dev->last_packet_type == DISCARD_PACKET)
4369 return;
4370
4371 /* Does this device use packet numbers ? */
4372 if (len & 7) {
4373 len--;
4374 if (sd->packet_nr == data[len])
4375 sd->packet_nr++;
4376 /* The last few packets of the frame (which are all 0's
4377 except that they may contain part of the footer), are
4378 numbered 0 */
4379 else if (sd->packet_nr == 0 || data[len]) {
4380 PERR("Invalid packet nr: %d (expect: %d)",
4381 (int)data[len], (int)sd->packet_nr);
4382 gspca_dev->last_packet_type = DISCARD_PACKET;
4383 return;
4384 }
4385 }
4386
4387 /* intermediate packet */
4388 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4389 }
4390
4391 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4392 u8 *data, /* isoc packet */
4393 int len) /* iso packet length */
4394 {
4395 /* Header of ov519 is 16 bytes:
4396 * Byte Value Description
4397 * 0 0xff magic
4398 * 1 0xff magic
4399 * 2 0xff magic
4400 * 3 0xXX 0x50 = SOF, 0x51 = EOF
4401 * 9 0xXX 0x01 initial frame without data,
4402 * 0x00 standard frame with image
4403 * 14 Lo in EOF: length of image data / 8
4404 * 15 Hi
4405 */
4406
4407 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4408 switch (data[3]) {
4409 case 0x50: /* start of frame */
4410 /* Don't check the button state here, as the state
4411 usually (always ?) changes at EOF and checking it
4412 here leads to unnecessary snapshot state resets. */
4413 #define HDRSZ 16
4414 data += HDRSZ;
4415 len -= HDRSZ;
4416 #undef HDRSZ
4417 if (data[0] == 0xff || data[1] == 0xd8)
4418 gspca_frame_add(gspca_dev, FIRST_PACKET,
4419 data, len);
4420 else
4421 gspca_dev->last_packet_type = DISCARD_PACKET;
4422 return;
4423 case 0x51: /* end of frame */
4424 ov51x_handle_button(gspca_dev, data[11] & 1);
4425 if (data[9] != 0)
4426 gspca_dev->last_packet_type = DISCARD_PACKET;
4427 gspca_frame_add(gspca_dev, LAST_PACKET,
4428 NULL, 0);
4429 return;
4430 }
4431 }
4432
4433 /* intermediate packet */
4434 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4435 }
4436
4437 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4438 u8 *data, /* isoc packet */
4439 int len) /* iso packet length */
4440 {
4441 struct sd *sd = (struct sd *) gspca_dev;
4442
4443 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4444
4445 /* A short read signals EOF */
4446 if (len < gspca_dev->cam.bulk_size) {
4447 /* If the frame is short, and it is one of the first ones
4448 the sensor and bridge are still syncing, so drop it. */
4449 if (sd->first_frame) {
4450 sd->first_frame--;
4451 if (gspca_dev->image_len <
4452 sd->gspca_dev.pixfmt.width *
4453 sd->gspca_dev.pixfmt.height)
4454 gspca_dev->last_packet_type = DISCARD_PACKET;
4455 }
4456 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4457 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4458 }
4459 }
4460
4461 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4462 u8 *data, /* isoc packet */
4463 int len) /* iso packet length */
4464 {
4465 struct sd *sd = (struct sd *) gspca_dev;
4466
4467 switch (sd->bridge) {
4468 case BRIDGE_OV511:
4469 case BRIDGE_OV511PLUS:
4470 ov511_pkt_scan(gspca_dev, data, len);
4471 break;
4472 case BRIDGE_OV518:
4473 case BRIDGE_OV518PLUS:
4474 ov518_pkt_scan(gspca_dev, data, len);
4475 break;
4476 case BRIDGE_OV519:
4477 ov519_pkt_scan(gspca_dev, data, len);
4478 break;
4479 case BRIDGE_OVFX2:
4480 ovfx2_pkt_scan(gspca_dev, data, len);
4481 break;
4482 case BRIDGE_W9968CF:
4483 w9968cf_pkt_scan(gspca_dev, data, len);
4484 break;
4485 }
4486 }
4487
4488 /* -- management routines -- */
4489
4490 static void setbrightness(struct gspca_dev *gspca_dev, s32 val)
4491 {
4492 struct sd *sd = (struct sd *) gspca_dev;
4493 static const struct ov_i2c_regvals brit_7660[][7] = {
4494 {{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90},
4495 {0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}},
4496 {{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1},
4497 {0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}},
4498 {{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2},
4499 {0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}},
4500 {{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3},
4501 {0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}},
4502 {{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3},
4503 {0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}},
4504 {{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3},
4505 {0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}},
4506 {{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4},
4507 {0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}}
4508 };
4509
4510 switch (sd->sensor) {
4511 case SEN_OV8610:
4512 case SEN_OV7610:
4513 case SEN_OV76BE:
4514 case SEN_OV6620:
4515 case SEN_OV6630:
4516 case SEN_OV66308AF:
4517 case SEN_OV7640:
4518 case SEN_OV7648:
4519 i2c_w(sd, OV7610_REG_BRT, val);
4520 break;
4521 case SEN_OV7620:
4522 case SEN_OV7620AE:
4523 i2c_w(sd, OV7610_REG_BRT, val);
4524 break;
4525 case SEN_OV7660:
4526 write_i2c_regvals(sd, brit_7660[val],
4527 ARRAY_SIZE(brit_7660[0]));
4528 break;
4529 case SEN_OV7670:
4530 /*win trace
4531 * i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
4532 i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
4533 break;
4534 }
4535 }
4536
4537 static void setcontrast(struct gspca_dev *gspca_dev, s32 val)
4538 {
4539 struct sd *sd = (struct sd *) gspca_dev;
4540 static const struct ov_i2c_regvals contrast_7660[][31] = {
4541 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0},
4542 {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30},
4543 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24},
4544 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34},
4545 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65},
4546 {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83},
4547 {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f},
4548 {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}},
4549 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94},
4550 {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30},
4551 {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24},
4552 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31},
4553 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62},
4554 {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81},
4555 {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1},
4556 {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}},
4557 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84},
4558 {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40},
4559 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24},
4560 {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34},
4561 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d},
4562 {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81},
4563 {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e},
4564 {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}},
4565 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70},
4566 {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48},
4567 {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34},
4568 {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22},
4569 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58},
4570 {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80},
4571 {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9},
4572 {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}},
4573 {{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80},
4574 {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60},
4575 {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38},
4576 {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e},
4577 {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46},
4578 {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c},
4579 {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4},
4580 {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}},
4581 {{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80},
4582 {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30},
4583 {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50},
4584 {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08},
4585 {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a},
4586 {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b},
4587 {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3},
4588 {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}},
4589 {{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60},
4590 {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8},
4591 {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c},
4592 {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04},
4593 {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22},
4594 {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b},
4595 {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde},
4596 {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}},
4597 };
4598
4599 switch (sd->sensor) {
4600 case SEN_OV7610:
4601 case SEN_OV6620:
4602 i2c_w(sd, OV7610_REG_CNT, val);
4603 break;
4604 case SEN_OV6630:
4605 case SEN_OV66308AF:
4606 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4607 break;
4608 case SEN_OV8610: {
4609 static const u8 ctab[] = {
4610 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4611 };
4612
4613 /* Use Y gamma control instead. Bit 0 enables it. */
4614 i2c_w(sd, 0x64, ctab[val >> 5]);
4615 break;
4616 }
4617 case SEN_OV7620:
4618 case SEN_OV7620AE: {
4619 static const u8 ctab[] = {
4620 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4621 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4622 };
4623
4624 /* Use Y gamma control instead. Bit 0 enables it. */
4625 i2c_w(sd, 0x64, ctab[val >> 4]);
4626 break;
4627 }
4628 case SEN_OV7660:
4629 write_i2c_regvals(sd, contrast_7660[val],
4630 ARRAY_SIZE(contrast_7660[0]));
4631 break;
4632 case SEN_OV7670:
4633 /* check that this isn't just the same as ov7610 */
4634 i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
4635 break;
4636 }
4637 }
4638
4639 static void setexposure(struct gspca_dev *gspca_dev, s32 val)
4640 {
4641 struct sd *sd = (struct sd *) gspca_dev;
4642
4643 i2c_w(sd, 0x10, val);
4644 }
4645
4646 static void setcolors(struct gspca_dev *gspca_dev, s32 val)
4647 {
4648 struct sd *sd = (struct sd *) gspca_dev;
4649 static const struct ov_i2c_regvals colors_7660[][6] = {
4650 {{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a},
4651 {0x53, 0x19}, {0x54, 0x23}},
4652 {{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11},
4653 {0x53, 0x2c}, {0x54, 0x3e}},
4654 {{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19},
4655 {0x53, 0x40}, {0x54, 0x59}},
4656 {{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20},
4657 {0x53, 0x53}, {0x54, 0x73}},
4658 {{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28},
4659 {0x53, 0x66}, {0x54, 0x8e}},
4660 };
4661
4662 switch (sd->sensor) {
4663 case SEN_OV8610:
4664 case SEN_OV7610:
4665 case SEN_OV76BE:
4666 case SEN_OV6620:
4667 case SEN_OV6630:
4668 case SEN_OV66308AF:
4669 i2c_w(sd, OV7610_REG_SAT, val);
4670 break;
4671 case SEN_OV7620:
4672 case SEN_OV7620AE:
4673 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4674 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4675 if (rc < 0)
4676 goto out; */
4677 i2c_w(sd, OV7610_REG_SAT, val);
4678 break;
4679 case SEN_OV7640:
4680 case SEN_OV7648:
4681 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4682 break;
4683 case SEN_OV7660:
4684 write_i2c_regvals(sd, colors_7660[val],
4685 ARRAY_SIZE(colors_7660[0]));
4686 break;
4687 case SEN_OV7670:
4688 /* supported later once I work out how to do it
4689 * transparently fail now! */
4690 /* set REG_COM13 values for UV sat auto mode */
4691 break;
4692 }
4693 }
4694
4695 static void setautobright(struct gspca_dev *gspca_dev, s32 val)
4696 {
4697 struct sd *sd = (struct sd *) gspca_dev;
4698
4699 i2c_w_mask(sd, 0x2d, val ? 0x10 : 0x00, 0x10);
4700 }
4701
4702 static void setfreq_i(struct sd *sd, s32 val)
4703 {
4704 if (sd->sensor == SEN_OV7660
4705 || sd->sensor == SEN_OV7670) {
4706 switch (val) {
4707 case 0: /* Banding filter disabled */
4708 i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
4709 break;
4710 case 1: /* 50 hz */
4711 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4712 OV7670_COM8_BFILT);
4713 i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
4714 break;
4715 case 2: /* 60 hz */
4716 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4717 OV7670_COM8_BFILT);
4718 i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
4719 break;
4720 case 3: /* Auto hz - ov7670 only */
4721 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4722 OV7670_COM8_BFILT);
4723 i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
4724 0x18);
4725 break;
4726 }
4727 } else {
4728 switch (val) {
4729 case 0: /* Banding filter disabled */
4730 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4731 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4732 break;
4733 case 1: /* 50 hz (filter on and framerate adj) */
4734 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4735 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4736 /* 20 fps -> 16.667 fps */
4737 if (sd->sensor == SEN_OV6620 ||
4738 sd->sensor == SEN_OV6630 ||
4739 sd->sensor == SEN_OV66308AF)
4740 i2c_w(sd, 0x2b, 0x5e);
4741 else
4742 i2c_w(sd, 0x2b, 0xac);
4743 break;
4744 case 2: /* 60 hz (filter on, ...) */
4745 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4746 if (sd->sensor == SEN_OV6620 ||
4747 sd->sensor == SEN_OV6630 ||
4748 sd->sensor == SEN_OV66308AF) {
4749 /* 20 fps -> 15 fps */
4750 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4751 i2c_w(sd, 0x2b, 0xa8);
4752 } else {
4753 /* no framerate adj. */
4754 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4755 }
4756 break;
4757 }
4758 }
4759 }
4760
4761 static void setfreq(struct gspca_dev *gspca_dev, s32 val)
4762 {
4763 struct sd *sd = (struct sd *) gspca_dev;
4764
4765 setfreq_i(sd, val);
4766
4767 /* Ugly but necessary */
4768 if (sd->bridge == BRIDGE_W9968CF)
4769 w9968cf_set_crop_window(sd);
4770 }
4771
4772 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4773 struct v4l2_jpegcompression *jcomp)
4774 {
4775 struct sd *sd = (struct sd *) gspca_dev;
4776
4777 if (sd->bridge != BRIDGE_W9968CF)
4778 return -ENOTTY;
4779
4780 memset(jcomp, 0, sizeof *jcomp);
4781 jcomp->quality = v4l2_ctrl_g_ctrl(sd->jpegqual);
4782 jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4783 V4L2_JPEG_MARKER_DRI;
4784 return 0;
4785 }
4786
4787 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4788 const struct v4l2_jpegcompression *jcomp)
4789 {
4790 struct sd *sd = (struct sd *) gspca_dev;
4791
4792 if (sd->bridge != BRIDGE_W9968CF)
4793 return -ENOTTY;
4794
4795 v4l2_ctrl_s_ctrl(sd->jpegqual, jcomp->quality);
4796 return 0;
4797 }
4798
4799 static int sd_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
4800 {
4801 struct gspca_dev *gspca_dev =
4802 container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
4803 struct sd *sd = (struct sd *)gspca_dev;
4804
4805 gspca_dev->usb_err = 0;
4806
4807 switch (ctrl->id) {
4808 case V4L2_CID_AUTOGAIN:
4809 gspca_dev->exposure->val = i2c_r(sd, 0x10);
4810 break;
4811 }
4812 return 0;
4813 }
4814
4815 static int sd_s_ctrl(struct v4l2_ctrl *ctrl)
4816 {
4817 struct gspca_dev *gspca_dev =
4818 container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
4819 struct sd *sd = (struct sd *)gspca_dev;
4820
4821 gspca_dev->usb_err = 0;
4822
4823 if (!gspca_dev->streaming)
4824 return 0;
4825
4826 switch (ctrl->id) {
4827 case V4L2_CID_BRIGHTNESS:
4828 setbrightness(gspca_dev, ctrl->val);
4829 break;
4830 case V4L2_CID_CONTRAST:
4831 setcontrast(gspca_dev, ctrl->val);
4832 break;
4833 case V4L2_CID_POWER_LINE_FREQUENCY:
4834 setfreq(gspca_dev, ctrl->val);
4835 break;
4836 case V4L2_CID_AUTOBRIGHTNESS:
4837 if (ctrl->is_new)
4838 setautobright(gspca_dev, ctrl->val);
4839 if (!ctrl->val && sd->brightness->is_new)
4840 setbrightness(gspca_dev, sd->brightness->val);
4841 break;
4842 case V4L2_CID_SATURATION:
4843 setcolors(gspca_dev, ctrl->val);
4844 break;
4845 case V4L2_CID_HFLIP:
4846 sethvflip(gspca_dev, ctrl->val, sd->vflip->val);
4847 break;
4848 case V4L2_CID_AUTOGAIN:
4849 if (ctrl->is_new)
4850 setautogain(gspca_dev, ctrl->val);
4851 if (!ctrl->val && gspca_dev->exposure->is_new)
4852 setexposure(gspca_dev, gspca_dev->exposure->val);
4853 break;
4854 case V4L2_CID_JPEG_COMPRESSION_QUALITY:
4855 return -EBUSY; /* Should never happen, as we grab the ctrl */
4856 }
4857 return gspca_dev->usb_err;
4858 }
4859
4860 static const struct v4l2_ctrl_ops sd_ctrl_ops = {
4861 .g_volatile_ctrl = sd_g_volatile_ctrl,
4862 .s_ctrl = sd_s_ctrl,
4863 };
4864
4865 static int sd_init_controls(struct gspca_dev *gspca_dev)
4866 {
4867 struct sd *sd = (struct sd *)gspca_dev;
4868 struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler;
4869
4870 gspca_dev->vdev.ctrl_handler = hdl;
4871 v4l2_ctrl_handler_init(hdl, 10);
4872 if (valid_controls[sd->sensor].has_brightness)
4873 sd->brightness = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4874 V4L2_CID_BRIGHTNESS, 0,
4875 sd->sensor == SEN_OV7660 ? 6 : 255, 1,
4876 sd->sensor == SEN_OV7660 ? 3 : 127);
4877 if (valid_controls[sd->sensor].has_contrast) {
4878 if (sd->sensor == SEN_OV7660)
4879 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4880 V4L2_CID_CONTRAST, 0, 6, 1, 3);
4881 else
4882 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4883 V4L2_CID_CONTRAST, 0, 255, 1,
4884 (sd->sensor == SEN_OV6630 ||
4885 sd->sensor == SEN_OV66308AF) ? 200 : 127);
4886 }
4887 if (valid_controls[sd->sensor].has_sat)
4888 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4889 V4L2_CID_SATURATION, 0,
4890 sd->sensor == SEN_OV7660 ? 4 : 255, 1,
4891 sd->sensor == SEN_OV7660 ? 2 : 127);
4892 if (valid_controls[sd->sensor].has_exposure)
4893 gspca_dev->exposure = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4894 V4L2_CID_EXPOSURE, 0, 255, 1, 127);
4895 if (valid_controls[sd->sensor].has_hvflip) {
4896 sd->hflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4897 V4L2_CID_HFLIP, 0, 1, 1, 0);
4898 sd->vflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4899 V4L2_CID_VFLIP, 0, 1, 1, 0);
4900 }
4901 if (valid_controls[sd->sensor].has_autobright)
4902 sd->autobright = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4903 V4L2_CID_AUTOBRIGHTNESS, 0, 1, 1, 1);
4904 if (valid_controls[sd->sensor].has_autogain)
4905 gspca_dev->autogain = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4906 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
4907 if (valid_controls[sd->sensor].has_freq) {
4908 if (sd->sensor == SEN_OV7670)
4909 sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
4910 V4L2_CID_POWER_LINE_FREQUENCY,
4911 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
4912 V4L2_CID_POWER_LINE_FREQUENCY_AUTO);
4913 else
4914 sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
4915 V4L2_CID_POWER_LINE_FREQUENCY,
4916 V4L2_CID_POWER_LINE_FREQUENCY_60HZ, 0, 0);
4917 }
4918 if (sd->bridge == BRIDGE_W9968CF)
4919 sd->jpegqual = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4920 V4L2_CID_JPEG_COMPRESSION_QUALITY,
4921 QUALITY_MIN, QUALITY_MAX, 1, QUALITY_DEF);
4922
4923 if (hdl->error) {
4924 PERR("Could not initialize controls\n");
4925 return hdl->error;
4926 }
4927 if (gspca_dev->autogain)
4928 v4l2_ctrl_auto_cluster(3, &gspca_dev->autogain, 0, true);
4929 if (sd->autobright)
4930 v4l2_ctrl_auto_cluster(2, &sd->autobright, 0, false);
4931 if (sd->hflip)
4932 v4l2_ctrl_cluster(2, &sd->hflip);
4933 return 0;
4934 }
4935
4936 /* sub-driver description */
4937 static const struct sd_desc sd_desc = {
4938 .name = MODULE_NAME,
4939 .config = sd_config,
4940 .init = sd_init,
4941 .init_controls = sd_init_controls,
4942 .isoc_init = sd_isoc_init,
4943 .start = sd_start,
4944 .stopN = sd_stopN,
4945 .stop0 = sd_stop0,
4946 .pkt_scan = sd_pkt_scan,
4947 .dq_callback = sd_reset_snapshot,
4948 .get_jcomp = sd_get_jcomp,
4949 .set_jcomp = sd_set_jcomp,
4950 #if IS_ENABLED(CONFIG_INPUT)
4951 .other_input = 1,
4952 #endif
4953 };
4954
4955 /* -- module initialisation -- */
4956 static const struct usb_device_id device_table[] = {
4957 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4958 {USB_DEVICE(0x041e, 0x4052),
4959 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4960 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4961 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4962 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4963 {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 },
4964 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4965 {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 },
4966 {USB_DEVICE(0x045e, 0x028c),
4967 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4968 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4969 {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
4970 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4971 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4972 {USB_DEVICE(0x05a9, 0x0519),
4973 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4974 {USB_DEVICE(0x05a9, 0x0530),
4975 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4976 {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
4977 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
4978 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
4979 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
4980 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
4981 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
4982 {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
4983 {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
4984 {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
4985 {USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
4986 {}
4987 };
4988
4989 MODULE_DEVICE_TABLE(usb, device_table);
4990
4991 /* -- device connect -- */
4992 static int sd_probe(struct usb_interface *intf,
4993 const struct usb_device_id *id)
4994 {
4995 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
4996 THIS_MODULE);
4997 }
4998
4999 static struct usb_driver sd_driver = {
5000 .name = MODULE_NAME,
5001 .id_table = device_table,
5002 .probe = sd_probe,
5003 .disconnect = gspca_disconnect,
5004 #ifdef CONFIG_PM
5005 .suspend = gspca_suspend,
5006 .resume = gspca_resume,
5007 .reset_resume = gspca_resume,
5008 #endif
5009 };
5010
5011 module_usb_driver(sd_driver);
5012
5013 module_param(frame_rate, int, 0644);
5014 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
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