drivers/media/video/cx18/cx18-av-firmware.c

   1 /*
   2  *  cx18 ADEC firmware functions
   3  *
   4  *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
   5  *
   6  *  This program is free software; you can redistribute it and/or
   7  *  modify it under the terms of the GNU General Public License
   8  *  as published by the Free Software Foundation; either version 2
   9  *  of the License, or (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, write to the Free Software
  18  *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  19  *  02110-1301, USA.
  20  */
  21
  22 #include "cx18-driver.h"
  23 #include <linux/firmware.h>
  24
  25 #define FWFILE "v4l-cx23418-dig.fw"
  26
  27 int cx18_av_loadfw(struct cx18 *cx)
  28 {
  29         const struct firmware *fw = NULL;
  30         u32 size;
  31         u32 v;
  32         u8 *ptr;
  33         int i;
  34
  35         if (request_firmware(&fw, FWFILE, &cx->dev->dev) != 0) {
  36                 CX18_ERR("unable to open firmware %s\n", FWFILE);
  37                 return -EINVAL;
  38         }
  39
  40         cx18_av_write4(cx, CXADEC_CHIP_CTRL, 0x00010000);
  41         cx18_av_write(cx, CXADEC_STD_DET_CTL, 0xf6); /* Byte 0 */
  42
  43         /* Reset the Mako core (Register is undocumented.) */
  44         cx18_av_write4(cx, 0x8100, 0x00010000);
  45
  46         /* Put the 8051 in reset and enable firmware upload */
  47         cx18_av_write4(cx, CXADEC_DL_CTL, 0x0F000000);
  48
  49         ptr = fw->data;
  50         size = fw->size;
  51
  52         for (i = 0; i < size; i++) {
  53                 u32 dl_control = 0x0F000000 | ((u32)ptr[i] << 16);
  54                 u32 value = 0;
  55                 int retries;
  56
  57                 for (retries = 0; retries < 5; retries++) {
  58                         cx18_av_write4(cx, CXADEC_DL_CTL, dl_control);
  59                         value = cx18_av_read4(cx, CXADEC_DL_CTL);
  60                         if ((value & 0x3F00) == (dl_control & 0x3F00))
  61                                 break;
  62                 }
  63                 if (retries >= 5) {
  64                         CX18_ERR("unable to load firmware %s\n", FWFILE);
  65                         release_firmware(fw);
  66                         return -EIO;
  67                 }
  68         }
  69
  70         cx18_av_write4(cx, CXADEC_DL_CTL, 0x13000000 | fw->size);
  71
  72         /* Output to the 416 */
  73         cx18_av_and_or4(cx, CXADEC_PIN_CTRL1, ~0, 0x78000);
  74
  75         /* Audio input control 1 set to Sony mode */
  76         /* Audio output input 2 is 0 for slave operation input */
  77         /* 0xC4000914[5]: 0 = left sample on WS=0, 1 = left sample on WS=1 */
  78         /* 0xC4000914[7]: 0 = Philips mode, 1 = Sony mode (1st SCK rising edge
  79            after WS transition for first bit of audio word. */
  80         cx18_av_write4(cx, CXADEC_I2S_IN_CTL, 0x000000A0);
  81
  82         /* Audio output control 1 is set to Sony mode */
  83         /* Audio output control 2 is set to 1 for master mode */
  84         /* 0xC4000918[5]: 0 = left sample on WS=0, 1 = left sample on WS=1 */
  85         /* 0xC4000918[7]: 0 = Philips mode, 1 = Sony mode (1st SCK rising edge
  86            after WS transition for first bit of audio word. */
  87         /* 0xC4000918[8]: 0 = slave operation, 1 = master (SCK_OUT and WS_OUT
  88            are generated) */
  89         cx18_av_write4(cx, CXADEC_I2S_OUT_CTL, 0x000001A0);
  90
  91         /* set alt I2s master clock to /16 and enable alt divider i2s
  92            passthrough */
  93         cx18_av_write4(cx, CXADEC_PIN_CFG3, 0x5000B687);
  94
  95         cx18_av_write4(cx, CXADEC_STD_DET_CTL, 0x000000F6);
  96         /* CxDevWrReg(CXADEC_STD_DET_CTL, 0x000000FF); */
  97
  98         /* Set bit 0 in register 0x9CC to signify that this is MiniMe. */
  99         /* Register 0x09CC is defined by the Merlin firmware, and doesn't
 100            have a name in the spec. */
 101         cx18_av_write4(cx, 0x09CC, 1);
 102
 103 #define CX18_AUDIO_ENABLE               0xc72014
 104         v = read_reg(CX18_AUDIO_ENABLE);
 105         /* If bit 11 is 1 */
 106         if (v & 0x800)
 107                 write_reg(v & 0xFFFFFBFF, CX18_AUDIO_ENABLE); /* Clear bit 10 */
 108
 109         /* Enable WW auto audio standard detection */
 110         v = cx18_av_read4(cx, CXADEC_STD_DET_CTL);
 111         v |= 0xFF;   /* Auto by default */
 112         v |= 0x400;  /* Stereo by default */
 113         v |= 0x14000000;
 114         cx18_av_write4(cx, CXADEC_STD_DET_CTL, v);
 115
 116         release_firmware(fw);
 117
 118         CX18_INFO("loaded %s firmware (%d bytes)\n", FWFILE, size);
 119         return 0;
 120 }