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1 /*
2 *
3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
5 *
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #ifdef HAVE_MT352
37 # include "mt352.h"
38 # include "mt352_priv.h"
39 # ifdef HAVE_VP3054_I2C
40 # include "cx88-vp3054-i2c.h"
41 # endif
42 #endif
43 #ifdef HAVE_ZL10353
44 # include "zl10353.h"
45 #endif
46 #ifdef HAVE_CX22702
47 # include "cx22702.h"
48 #endif
49 #ifdef HAVE_OR51132
50 # include "or51132.h"
51 #endif
52 #ifdef HAVE_LGDT330X
53 # include "lgdt330x.h"
54 # include "lg_h06xf.h"
55 #endif
56 #ifdef HAVE_NXT200X
57 # include "nxt200x.h"
58 #endif
59 #ifdef HAVE_CX24123
60 # include "cx24123.h"
61 #endif
62 #include "isl6421.h"
63
64 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
65 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
66 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
67 MODULE_LICENSE("GPL");
68
69 static unsigned int debug = 0;
70 module_param(debug, int, 0644);
71 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
72
73 #define dprintk(level,fmt, arg...) if (debug >= level) \
74 printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
75
76 /* ------------------------------------------------------------------ */
77
78 static int dvb_buf_setup(struct videobuf_queue *q,
79 unsigned int *count, unsigned int *size)
80 {
81 struct cx8802_dev *dev = q->priv_data;
82
83 dev->ts_packet_size = 188 * 4;
84 dev->ts_packet_count = 32;
85
86 *size = dev->ts_packet_size * dev->ts_packet_count;
87 *count = 32;
88 return 0;
89 }
90
91 static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
92 enum v4l2_field field)
93 {
94 struct cx8802_dev *dev = q->priv_data;
95 return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
96 }
97
98 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
99 {
100 struct cx8802_dev *dev = q->priv_data;
101 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
102 }
103
104 static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
105 {
106 cx88_free_buffer(q, (struct cx88_buffer*)vb);
107 }
108
109 static struct videobuf_queue_ops dvb_qops = {
110 .buf_setup = dvb_buf_setup,
111 .buf_prepare = dvb_buf_prepare,
112 .buf_queue = dvb_buf_queue,
113 .buf_release = dvb_buf_release,
114 };
115
116 /* ------------------------------------------------------------------ */
117
118 #ifdef HAVE_MT352
119 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
120 {
121 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
122 static u8 reset [] = { RESET, 0x80 };
123 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
124 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
125 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
126 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
127
128 mt352_write(fe, clock_config, sizeof(clock_config));
129 udelay(200);
130 mt352_write(fe, reset, sizeof(reset));
131 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
132
133 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
134 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
135 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
136 return 0;
137 }
138
139 static int dvico_dual_demod_init(struct dvb_frontend *fe)
140 {
141 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
142 static u8 reset [] = { RESET, 0x80 };
143 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
144 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
145 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
146 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
147
148 mt352_write(fe, clock_config, sizeof(clock_config));
149 udelay(200);
150 mt352_write(fe, reset, sizeof(reset));
151 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
152
153 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
154 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
155 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
156
157 return 0;
158 }
159
160 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
161 {
162 static u8 clock_config [] = { 0x89, 0x38, 0x39 };
163 static u8 reset [] = { 0x50, 0x80 };
164 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
165 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
166 0x00, 0xFF, 0x00, 0x40, 0x40 };
167 static u8 dntv_extra[] = { 0xB5, 0x7A };
168 static u8 capt_range_cfg[] = { 0x75, 0x32 };
169
170 mt352_write(fe, clock_config, sizeof(clock_config));
171 udelay(2000);
172 mt352_write(fe, reset, sizeof(reset));
173 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
174
175 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
176 udelay(2000);
177 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
178 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
179
180 return 0;
181 }
182
183 static struct mt352_config dvico_fusionhdtv = {
184 .demod_address = 0x0F,
185 .demod_init = dvico_fusionhdtv_demod_init,
186 };
187
188 static struct mt352_config dntv_live_dvbt_config = {
189 .demod_address = 0x0f,
190 .demod_init = dntv_live_dvbt_demod_init,
191 };
192
193 static struct mt352_config dvico_fusionhdtv_dual = {
194 .demod_address = 0x0F,
195 .demod_init = dvico_dual_demod_init,
196 };
197
198 #ifdef HAVE_VP3054_I2C
199 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
200 {
201 static u8 clock_config [] = { 0x89, 0x38, 0x38 };
202 static u8 reset [] = { 0x50, 0x80 };
203 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
204 static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
205 0x00, 0xFF, 0x00, 0x40, 0x40 };
206 static u8 dntv_extra[] = { 0xB5, 0x7A };
207 static u8 capt_range_cfg[] = { 0x75, 0x32 };
208
209 mt352_write(fe, clock_config, sizeof(clock_config));
210 udelay(2000);
211 mt352_write(fe, reset, sizeof(reset));
212 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
213
214 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
215 udelay(2000);
216 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
217 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
218
219 return 0;
220 }
221
222 static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
223 {
224 struct cx8802_dev *dev= fe->dvb->priv;
225
226 /* this message is to set up ATC and ALC */
227 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
228 struct i2c_msg msg =
229 { .addr = dev->core->pll_addr, .flags = 0,
230 .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
231 int err;
232
233 if (fe->ops.i2c_gate_ctrl)
234 fe->ops.i2c_gate_ctrl(fe, 1);
235 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
236 if (err < 0)
237 return err;
238 else
239 return -EREMOTEIO;
240 }
241
242 return 0;
243 }
244
245 static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
246 struct dvb_frontend_parameters* params)
247 {
248 struct cx8802_dev *dev= fe->dvb->priv;
249 u8 buf[4];
250 struct i2c_msg msg =
251 { .addr = dev->core->pll_addr, .flags = 0,
252 .buf = buf, .len = 4 };
253 int err;
254
255 /* Switch PLL to DVB mode */
256 err = philips_fmd1216_pll_init(fe);
257 if (err)
258 return err;
259
260 /* Tune PLL */
261 dvb_pll_configure(dev->core->pll_desc, buf,
262 params->frequency,
263 params->u.ofdm.bandwidth);
264 if (fe->ops.i2c_gate_ctrl)
265 fe->ops.i2c_gate_ctrl(fe, 1);
266 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
267
268 printk(KERN_WARNING "cx88-dvb: %s error "
269 "(addr %02x <- %02x, err = %i)\n",
270 __FUNCTION__, dev->core->pll_addr, buf[0], err);
271 if (err < 0)
272 return err;
273 else
274 return -EREMOTEIO;
275 }
276
277 return 0;
278 }
279
280 static struct mt352_config dntv_live_dvbt_pro_config = {
281 .demod_address = 0x0f,
282 .no_tuner = 1,
283 .demod_init = dntv_live_dvbt_pro_demod_init,
284 };
285 #endif
286 #endif
287
288 #ifdef HAVE_ZL10353
289 static int dvico_hybrid_tuner_set_params(struct dvb_frontend *fe,
290 struct dvb_frontend_parameters *params)
291 {
292 u8 pllbuf[4];
293 struct cx8802_dev *dev= fe->dvb->priv;
294 struct i2c_msg msg =
295 { .addr = dev->core->pll_addr, .flags = 0,
296 .buf = pllbuf, .len = 4 };
297 int err;
298
299 dvb_pll_configure(dev->core->pll_desc, pllbuf,
300 params->frequency,
301 params->u.ofdm.bandwidth);
302
303 if (fe->ops.i2c_gate_ctrl)
304 fe->ops.i2c_gate_ctrl(fe, 1);
305 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
306 printk(KERN_WARNING "cx88-dvb: %s error "
307 "(addr %02x <- %02x, err = %i)\n",
308 __FUNCTION__, pllbuf[0], pllbuf[1], err);
309 if (err < 0)
310 return err;
311 else
312 return -EREMOTEIO;
313 }
314
315 return 0;
316 }
317
318 static struct zl10353_config dvico_fusionhdtv_hybrid = {
319 .demod_address = 0x0F,
320 .no_tuner = 1,
321 };
322
323 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
324 .demod_address = 0x0F,
325 };
326 #endif
327
328 #ifdef HAVE_CX22702
329 static struct cx22702_config connexant_refboard_config = {
330 .demod_address = 0x43,
331 .output_mode = CX22702_SERIAL_OUTPUT,
332 };
333
334 static struct cx22702_config hauppauge_novat_config = {
335 .demod_address = 0x43,
336 .output_mode = CX22702_SERIAL_OUTPUT,
337 };
338 static struct cx22702_config hauppauge_hvr1100_config = {
339 .demod_address = 0x63,
340 .output_mode = CX22702_SERIAL_OUTPUT,
341 };
342 #endif
343
344 #ifdef HAVE_OR51132
345 static int or51132_set_ts_param(struct dvb_frontend* fe,
346 int is_punctured)
347 {
348 struct cx8802_dev *dev= fe->dvb->priv;
349 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
350 return 0;
351 }
352
353 static struct or51132_config pchdtv_hd3000 = {
354 .demod_address = 0x15,
355 .set_ts_params = or51132_set_ts_param,
356 };
357 #endif
358
359 #ifdef HAVE_LGDT330X
360 static int lgdt3302_tuner_set_params(struct dvb_frontend* fe,
361 struct dvb_frontend_parameters* params)
362 {
363 /* FIXME make this routine use the tuner-simple code.
364 * It could probably be shared with a number of ATSC
365 * frontends. Many share the same tuner with analog TV. */
366
367 struct cx8802_dev *dev= fe->dvb->priv;
368 struct cx88_core *core = dev->core;
369 u8 buf[4];
370 struct i2c_msg msg =
371 { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
372 int err;
373
374 dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
375 dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
376 __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
377
378 if (fe->ops.i2c_gate_ctrl)
379 fe->ops.i2c_gate_ctrl(fe, 1);
380 if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
381 printk(KERN_WARNING "cx88-dvb: %s error "
382 "(addr %02x <- %02x, err = %i)\n",
383 __FUNCTION__, buf[0], buf[1], err);
384 if (err < 0)
385 return err;
386 else
387 return -EREMOTEIO;
388 }
389 return 0;
390 }
391
392 static int lgdt3303_tuner_set_params(struct dvb_frontend* fe,
393 struct dvb_frontend_parameters* params)
394 {
395 struct cx8802_dev *dev= fe->dvb->priv;
396 struct cx88_core *core = dev->core;
397
398 /* Put the analog decoder in standby to keep it quiet */
399 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
400
401 return lg_h06xf_pll_set(fe, &core->i2c_adap, params);
402 }
403
404 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
405 {
406 struct cx8802_dev *dev= fe->dvb->priv;
407 struct cx88_core *core = dev->core;
408
409 dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
410 if (index == 0)
411 cx_clear(MO_GP0_IO, 8);
412 else
413 cx_set(MO_GP0_IO, 8);
414 return 0;
415 }
416
417 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
418 {
419 struct cx8802_dev *dev= fe->dvb->priv;
420 if (is_punctured)
421 dev->ts_gen_cntrl |= 0x04;
422 else
423 dev->ts_gen_cntrl &= ~0x04;
424 return 0;
425 }
426
427 static struct lgdt330x_config fusionhdtv_3_gold = {
428 .demod_address = 0x0e,
429 .demod_chip = LGDT3302,
430 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
431 .set_ts_params = lgdt330x_set_ts_param,
432 };
433
434 static struct lgdt330x_config fusionhdtv_5_gold = {
435 .demod_address = 0x0e,
436 .demod_chip = LGDT3303,
437 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
438 .set_ts_params = lgdt330x_set_ts_param,
439 };
440
441 static struct lgdt330x_config pchdtv_hd5500 = {
442 .demod_address = 0x59,
443 .demod_chip = LGDT3303,
444 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
445 .set_ts_params = lgdt330x_set_ts_param,
446 };
447 #endif
448
449 #ifdef HAVE_NXT200X
450 static int nxt200x_set_ts_param(struct dvb_frontend* fe,
451 int is_punctured)
452 {
453 struct cx8802_dev *dev= fe->dvb->priv;
454 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
455 return 0;
456 }
457
458 static int nxt200x_set_pll_input(u8* buf, int input)
459 {
460 if (input)
461 buf[3] |= 0x08;
462 else
463 buf[3] &= ~0x08;
464 return 0;
465 }
466
467 static struct nxt200x_config ati_hdtvwonder = {
468 .demod_address = 0x0a,
469 .set_pll_input = nxt200x_set_pll_input,
470 .set_ts_params = nxt200x_set_ts_param,
471 };
472 #endif
473
474 #ifdef HAVE_CX24123
475 static int cx24123_set_ts_param(struct dvb_frontend* fe,
476 int is_punctured)
477 {
478 struct cx8802_dev *dev= fe->dvb->priv;
479 dev->ts_gen_cntrl = 0x2;
480 return 0;
481 }
482
483 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
484 {
485 struct cx8802_dev *dev= fe->dvb->priv;
486 struct cx88_core *core = dev->core;
487
488 if (voltage == SEC_VOLTAGE_OFF) {
489 cx_write(MO_GP0_IO, 0x000006fB);
490 } else {
491 cx_write(MO_GP0_IO, 0x000006f9);
492 }
493
494 if (core->prev_set_voltage)
495 return core->prev_set_voltage(fe, voltage);
496 return 0;
497 }
498
499 static struct cx24123_config hauppauge_novas_config = {
500 .demod_address = 0x55,
501 .set_ts_params = cx24123_set_ts_param,
502 };
503
504 static struct cx24123_config kworld_dvbs_100_config = {
505 .demod_address = 0x15,
506 .set_ts_params = cx24123_set_ts_param,
507 };
508 #endif
509
510 static int dvb_register(struct cx8802_dev *dev)
511 {
512 /* init struct videobuf_dvb */
513 dev->dvb.name = dev->core->name;
514 dev->ts_gen_cntrl = 0x0c;
515
516 /* init frontend */
517 switch (dev->core->board) {
518 #ifdef HAVE_CX22702
519 case CX88_BOARD_HAUPPAUGE_DVB_T1:
520 dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
521 &dev->core->i2c_adap);
522 if (dev->dvb.frontend != NULL) {
523 dvb_pll_attach(dev->dvb.frontend, 0x61,
524 &dev->core->i2c_adap,
525 &dvb_pll_thomson_dtt759x);
526 }
527 break;
528 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
529 case CX88_BOARD_CONEXANT_DVB_T1:
530 case CX88_BOARD_KWORLD_DVB_T_CX22702:
531 case CX88_BOARD_WINFAST_DTV1000:
532 dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
533 &dev->core->i2c_adap);
534 if (dev->dvb.frontend != NULL) {
535 dvb_pll_attach(dev->dvb.frontend, 0x60,
536 &dev->core->i2c_adap,
537 &dvb_pll_thomson_dtt7579);
538 }
539 break;
540 case CX88_BOARD_WINFAST_DTV2000H:
541 case CX88_BOARD_HAUPPAUGE_HVR1100:
542 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
543 dev->dvb.frontend = cx22702_attach(&hauppauge_hvr1100_config,
544 &dev->core->i2c_adap);
545 if (dev->dvb.frontend != NULL) {
546 dvb_pll_attach(dev->dvb.frontend, 0x61,
547 &dev->core->i2c_adap,
548 &dvb_pll_fmd1216me);
549 }
550 break;
551 #endif
552 #if defined(HAVE_MT352) || defined(HAVE_ZL10353)
553 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
554 #ifdef HAVE_MT352
555 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
556 &dev->core->i2c_adap);
557 if (dev->dvb.frontend != NULL) {
558 dvb_pll_attach(dev->dvb.frontend, 0x60,
559 &dev->core->i2c_adap,
560 &dvb_pll_thomson_dtt7579);
561 break;
562 }
563 #endif
564 #ifdef HAVE_ZL10353
565 /* ZL10353 replaces MT352 on later cards */
566 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1,
567 &dev->core->i2c_adap);
568 if (dev->dvb.frontend != NULL) {
569 dvb_pll_attach(dev->dvb.frontend, 0x60,
570 &dev->core->i2c_adap,
571 &dvb_pll_thomson_dtt7579);
572 }
573 #endif
574 break;
575 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
576 #ifdef HAVE_MT352
577 /* The tin box says DEE1601, but it seems to be DTT7579
578 * compatible, with a slightly different MT352 AGC gain. */
579 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv_dual,
580 &dev->core->i2c_adap);
581 if (dev->dvb.frontend != NULL) {
582 dvb_pll_attach(dev->dvb.frontend, 0x61,
583 &dev->core->i2c_adap,
584 &dvb_pll_thomson_dtt7579);
585 break;
586 }
587 #endif
588 #ifdef HAVE_ZL10353
589 /* ZL10353 replaces MT352 on later cards */
590 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1,
591 &dev->core->i2c_adap);
592 if (dev->dvb.frontend != NULL) {
593 dvb_pll_attach(dev->dvb.frontend, 0x61,
594 &dev->core->i2c_adap,
595 &dvb_pll_thomson_dtt7579);
596 }
597 #endif
598 break;
599 #endif /* HAVE_MT352 || HAVE_ZL10353 */
600 #ifdef HAVE_MT352
601 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
602 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
603 &dev->core->i2c_adap);
604 if (dev->dvb.frontend != NULL) {
605 dvb_pll_attach(dev->dvb.frontend, 0x61,
606 &dev->core->i2c_adap,
607 &dvb_pll_lg_z201);
608 }
609 break;
610 case CX88_BOARD_KWORLD_DVB_T:
611 case CX88_BOARD_DNTV_LIVE_DVB_T:
612 case CX88_BOARD_ADSTECH_DVB_T_PCI:
613 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
614 &dev->core->i2c_adap);
615 if (dev->dvb.frontend != NULL) {
616 dvb_pll_attach(dev->dvb.frontend, 0x61,
617 &dev->core->i2c_adap,
618 &dvb_pll_unknown_1);
619 }
620 break;
621 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
622 #ifdef HAVE_VP3054_I2C
623 dev->core->pll_addr = 0x61;
624 dev->core->pll_desc = &dvb_pll_fmd1216me;
625 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_pro_config,
626 &((struct vp3054_i2c_state *)dev->card_priv)->adap);
627 if (dev->dvb.frontend != NULL) {
628 dev->dvb.frontend->ops.tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
629 }
630 #else
631 printk("%s: built without vp3054 support\n", dev->core->name);
632 #endif
633 break;
634 #endif
635 #ifdef HAVE_ZL10353
636 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
637 dev->core->pll_addr = 0x61;
638 dev->core->pll_desc = &dvb_pll_thomson_fe6600;
639 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_hybrid,
640 &dev->core->i2c_adap);
641 if (dev->dvb.frontend != NULL) {
642 dev->dvb.frontend->ops.tuner_ops.set_params = dvico_hybrid_tuner_set_params;
643 }
644 break;
645 #endif
646 #ifdef HAVE_OR51132
647 case CX88_BOARD_PCHDTV_HD3000:
648 dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
649 &dev->core->i2c_adap);
650 if (dev->dvb.frontend != NULL) {
651 dvb_pll_attach(dev->dvb.frontend, 0x61,
652 &dev->core->i2c_adap,
653 &dvb_pll_thomson_dtt761x);
654 }
655 break;
656 #endif
657 #ifdef HAVE_LGDT330X
658 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
659 dev->ts_gen_cntrl = 0x08;
660 {
661 /* Do a hardware reset of chip before using it. */
662 struct cx88_core *core = dev->core;
663
664 cx_clear(MO_GP0_IO, 1);
665 mdelay(100);
666 cx_set(MO_GP0_IO, 1);
667 mdelay(200);
668
669 /* Select RF connector callback */
670 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
671 dev->core->pll_addr = 0x61;
672 dev->core->pll_desc = &dvb_pll_microtune_4042;
673 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
674 &dev->core->i2c_adap);
675 if (dev->dvb.frontend != NULL) {
676 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
677 }
678 }
679 break;
680 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
681 dev->ts_gen_cntrl = 0x08;
682 {
683 /* Do a hardware reset of chip before using it. */
684 struct cx88_core *core = dev->core;
685
686 cx_clear(MO_GP0_IO, 1);
687 mdelay(100);
688 cx_set(MO_GP0_IO, 9);
689 mdelay(200);
690 dev->core->pll_addr = 0x61;
691 dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
692 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
693 &dev->core->i2c_adap);
694 if (dev->dvb.frontend != NULL) {
695 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
696 }
697 }
698 break;
699 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
700 dev->ts_gen_cntrl = 0x08;
701 {
702 /* Do a hardware reset of chip before using it. */
703 struct cx88_core *core = dev->core;
704
705 cx_clear(MO_GP0_IO, 1);
706 mdelay(100);
707 cx_set(MO_GP0_IO, 1);
708 mdelay(200);
709 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_5_gold,
710 &dev->core->i2c_adap);
711 if (dev->dvb.frontend != NULL) {
712 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
713 }
714 }
715 break;
716 case CX88_BOARD_PCHDTV_HD5500:
717 dev->ts_gen_cntrl = 0x08;
718 {
719 /* Do a hardware reset of chip before using it. */
720 struct cx88_core *core = dev->core;
721
722 cx_clear(MO_GP0_IO, 1);
723 mdelay(100);
724 cx_set(MO_GP0_IO, 1);
725 mdelay(200);
726 dev->dvb.frontend = lgdt330x_attach(&pchdtv_hd5500,
727 &dev->core->i2c_adap);
728 if (dev->dvb.frontend != NULL) {
729 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
730 }
731 }
732 break;
733 #endif
734 #ifdef HAVE_NXT200X
735 case CX88_BOARD_ATI_HDTVWONDER:
736 dev->dvb.frontend = nxt200x_attach(&ati_hdtvwonder,
737 &dev->core->i2c_adap);
738 if (dev->dvb.frontend != NULL) {
739 dvb_pll_attach(dev->dvb.frontend, 0x61,
740 &dev->core->i2c_adap,
741 &dvb_pll_tuv1236d);
742 }
743 break;
744 #endif
745 #ifdef HAVE_CX24123
746 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
747 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
748 dev->dvb.frontend = cx24123_attach(&hauppauge_novas_config,
749 &dev->core->i2c_adap);
750 if (dev->dvb.frontend) {
751 isl6421_attach(dev->dvb.frontend, &dev->core->i2c_adap,
752 0x08, 0x00, 0x00);
753 }
754 break;
755 case CX88_BOARD_KWORLD_DVBS_100:
756 dev->dvb.frontend = cx24123_attach(&kworld_dvbs_100_config,
757 &dev->core->i2c_adap);
758 if (dev->dvb.frontend) {
759 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
760 dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
761 }
762 break;
763 #endif
764 default:
765 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
766 dev->core->name);
767 break;
768 }
769 if (NULL == dev->dvb.frontend) {
770 printk("%s: frontend initialization failed\n",dev->core->name);
771 return -1;
772 }
773
774 if (dev->core->pll_desc) {
775 dev->dvb.frontend->ops.info.frequency_min = dev->core->pll_desc->min;
776 dev->dvb.frontend->ops.info.frequency_max = dev->core->pll_desc->max;
777 }
778
779 /* Put the analog decoder in standby to keep it quiet */
780 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
781
782 /* register everything */
783 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
784 }
785
786 /* ----------------------------------------------------------- */
787
788 static int __devinit dvb_probe(struct pci_dev *pci_dev,
789 const struct pci_device_id *pci_id)
790 {
791 struct cx8802_dev *dev;
792 struct cx88_core *core;
793 int err;
794
795 /* general setup */
796 core = cx88_core_get(pci_dev);
797 if (NULL == core)
798 return -EINVAL;
799
800 err = -ENODEV;
801 if (!cx88_boards[core->board].dvb)
802 goto fail_core;
803
804 err = -ENOMEM;
805 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
806 if (NULL == dev)
807 goto fail_core;
808 dev->pci = pci_dev;
809 dev->core = core;
810
811 err = cx8802_init_common(dev);
812 if (0 != err)
813 goto fail_free;
814
815 #ifdef HAVE_VP3054_I2C
816 err = vp3054_i2c_probe(dev);
817 if (0 != err)
818 goto fail_free;
819 #endif
820
821 /* dvb stuff */
822 printk("%s/2: cx2388x based dvb card\n", core->name);
823 videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
824 dev->pci, &dev->slock,
825 V4L2_BUF_TYPE_VIDEO_CAPTURE,
826 V4L2_FIELD_TOP,
827 sizeof(struct cx88_buffer),
828 dev);
829 err = dvb_register(dev);
830 if (0 != err)
831 goto fail_fini;
832
833 /* Maintain a reference to cx88-video can query the 8802 device. */
834 core->dvbdev = dev;
835 return 0;
836
837 fail_fini:
838 cx8802_fini_common(dev);
839 fail_free:
840 kfree(dev);
841 fail_core:
842 cx88_core_put(core,pci_dev);
843 return err;
844 }
845
846 static void __devexit dvb_remove(struct pci_dev *pci_dev)
847 {
848 struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
849
850 /* Destroy any 8802 reference. */
851 dev->core->dvbdev = NULL;
852
853 /* dvb */
854 videobuf_dvb_unregister(&dev->dvb);
855
856 #ifdef HAVE_VP3054_I2C
857 vp3054_i2c_remove(dev);
858 #endif
859
860 /* common */
861 cx8802_fini_common(dev);
862 cx88_core_put(dev->core,dev->pci);
863 kfree(dev);
864 }
865
866 static struct pci_device_id cx8802_pci_tbl[] = {
867 {
868 .vendor = 0x14f1,
869 .device = 0x8802,
870 .subvendor = PCI_ANY_ID,
871 .subdevice = PCI_ANY_ID,
872 },{
873 /* --- end of list --- */
874 }
875 };
876 MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
877
878 static struct pci_driver dvb_pci_driver = {
879 .name = "cx88-dvb",
880 .id_table = cx8802_pci_tbl,
881 .probe = dvb_probe,
882 .remove = __devexit_p(dvb_remove),
883 .suspend = cx8802_suspend_common,
884 .resume = cx8802_resume_common,
885 };
886
887 static int dvb_init(void)
888 {
889 printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
890 (CX88_VERSION_CODE >> 16) & 0xff,
891 (CX88_VERSION_CODE >> 8) & 0xff,
892 CX88_VERSION_CODE & 0xff);
893 #ifdef SNAPSHOT
894 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
895 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
896 #endif
897 return pci_register_driver(&dvb_pci_driver);
898 }
899
900 static void dvb_fini(void)
901 {
902 pci_unregister_driver(&dvb_pci_driver);
903 }
904
905 module_init(dvb_init);
906 module_exit(dvb_fini);
907
908 /*
909 * Local variables:
910 * c-basic-offset: 8
911 * compile-command: "make DVB=1"
912 * End:
913 */