drivers/media/video/em28xx/em28xx-core.c

   1 /*
   2    em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
   3
   4    Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
   5                       Markus Rechberger <mrechberger@gmail.com>
   6                       Mauro Carvalho Chehab <mchehab@infradead.org>
   7                       Sascha Sommer <saschasommer@freenet.de>
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 2 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program; if not, write to the Free Software
  21    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  */
  23
  24 #include <linux/init.h>
  25 #include <linux/list.h>
  26 #include <linux/module.h>
  27 #include <linux/usb.h>
  28 #include <linux/vmalloc.h>
  29 #include <media/v4l2-common.h>
  30
  31 #include "em28xx.h"
  32
  33 /* #define ENABLE_DEBUG_ISOC_FRAMES */
  34
  35 static unsigned int core_debug;
  36 module_param(core_debug, int, 0644);
  37 MODULE_PARM_DESC(core_debug, "enable debug messages [core]");
  38
  39 #define em28xx_coredbg(fmt, arg...) do {\
  40         if (core_debug) \
  41                 printk(KERN_INFO "%s %s :"fmt, \
  42                          dev->name, __func__ , ##arg); } while (0)
  43
  44 static unsigned int reg_debug;
  45 module_param(reg_debug, int, 0644);
  46 MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
  47
  48 #define em28xx_regdbg(fmt, arg...) do {\
  49         if (reg_debug) \
  50                 printk(KERN_INFO "%s %s :"fmt, \
  51                          dev->name, __func__ , ##arg); } while (0)
  52
  53 static int alt = EM28XX_PINOUT;
  54 module_param(alt, int, 0644);
  55 MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
  56
  57 /* FIXME */
  58 #define em28xx_isocdbg(fmt, arg...) do {\
  59         if (core_debug) \
  60                 printk(KERN_INFO "%s %s :"fmt, \
  61                          dev->name, __func__ , ##arg); } while (0)
  62
  63 /*
  64  * em28xx_read_reg_req()
  65  * reads data from the usb device specifying bRequest
  66  */
  67 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
  68                                    char *buf, int len)
  69 {
  70         int ret;
  71         int pipe = usb_rcvctrlpipe(dev->udev, 0);
  72
  73         if (dev->state & DEV_DISCONNECTED)
  74                 return -ENODEV;
  75
  76         if (len > URB_MAX_CTRL_SIZE)
  77                 return -EINVAL;
  78
  79         if (reg_debug) {
  80                 printk(KERN_DEBUG "(pipe 0x%08x): "
  81                         "IN:  %02x %02x %02x %02x %02x %02x %02x %02x ",
  82                         pipe,
  83                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  84                         req, 0, 0,
  85                         reg & 0xff, reg >> 8,
  86                         len & 0xff, len >> 8);
  87         }
  88
  89         mutex_lock(&dev->ctrl_urb_lock);
  90         ret = usb_control_msg(dev->udev, pipe, req,
  91                               USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  92                               0x0000, reg, dev->urb_buf, len, HZ);
  93         if (ret < 0) {
  94                 if (reg_debug)
  95                         printk(" failed!\n");
  96                 mutex_unlock(&dev->ctrl_urb_lock);
  97                 return ret;
  98         }
  99
 100         if (len)
 101                 memcpy(buf, dev->urb_buf, len);
 102
 103         mutex_unlock(&dev->ctrl_urb_lock);
 104
 105         if (reg_debug) {
 106                 int byte;
 107
 108                 printk("<<<");
 109                 for (byte = 0; byte < len; byte++)
 110                         printk(" %02x", (unsigned char)buf[byte]);
 111                 printk("\n");
 112         }
 113
 114         return ret;
 115 }
 116
 117 /*
 118  * em28xx_read_reg_req()
 119  * reads data from the usb device specifying bRequest
 120  */
 121 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
 122 {
 123         int ret;
 124         u8 val;
 125
 126         ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1);
 127         if (ret < 0)
 128                 return ret;
 129
 130         return val;
 131 }
 132
 133 int em28xx_read_reg(struct em28xx *dev, u16 reg)
 134 {
 135         return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
 136 }
 137
 138 /*
 139  * em28xx_write_regs_req()
 140  * sends data to the usb device, specifying bRequest
 141  */
 142 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
 143                                  int len)
 144 {
 145         int ret;
 146         int pipe = usb_sndctrlpipe(dev->udev, 0);
 147
 148         if (dev->state & DEV_DISCONNECTED)
 149                 return -ENODEV;
 150
 151         if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
 152                 return -EINVAL;
 153
 154         if (reg_debug) {
 155                 int byte;
 156
 157                 printk(KERN_DEBUG "(pipe 0x%08x): "
 158                         "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
 159                         pipe,
 160                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 161                         req, 0, 0,
 162                         reg & 0xff, reg >> 8,
 163                         len & 0xff, len >> 8);
 164
 165                 for (byte = 0; byte < len; byte++)
 166                         printk(" %02x", (unsigned char)buf[byte]);
 167                 printk("\n");
 168         }
 169
 170         mutex_lock(&dev->ctrl_urb_lock);
 171         memcpy(dev->urb_buf, buf, len);
 172         ret = usb_control_msg(dev->udev, pipe, req,
 173                               USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 174                               0x0000, reg, dev->urb_buf, len, HZ);
 175         mutex_unlock(&dev->ctrl_urb_lock);
 176
 177         if (dev->wait_after_write)
 178                 msleep(dev->wait_after_write);
 179
 180         return ret;
 181 }
 182
 183 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
 184 {
 185         int rc;
 186
 187         rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
 188
 189         /* Stores GPO/GPIO values at the cache, if changed
 190            Only write values should be stored, since input on a GPIO
 191            register will return the input bits.
 192            Not sure what happens on reading GPO register.
 193          */
 194         if (rc >= 0) {
 195                 if (reg == dev->reg_gpo_num)
 196                         dev->reg_gpo = buf[0];
 197                 else if (reg == dev->reg_gpio_num)
 198                         dev->reg_gpio = buf[0];
 199         }
 200
 201         return rc;
 202 }
 203
 204 /* Write a single register */
 205 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
 206 {
 207         return em28xx_write_regs(dev, reg, &val, 1);
 208 }
 209
 210 /*
 211  * em28xx_write_reg_bits()
 212  * sets only some bits (specified by bitmask) of a register, by first reading
 213  * the actual value
 214  */
 215 static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
 216                                  u8 bitmask)
 217 {
 218         int oldval;
 219         u8 newval;
 220
 221         /* Uses cache for gpo/gpio registers */
 222         if (reg == dev->reg_gpo_num)
 223                 oldval = dev->reg_gpo;
 224         else if (reg == dev->reg_gpio_num)
 225                 oldval = dev->reg_gpio;
 226         else
 227                 oldval = em28xx_read_reg(dev, reg);
 228
 229         if (oldval < 0)
 230                 return oldval;
 231
 232         newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
 233
 234         return em28xx_write_regs(dev, reg, &newval, 1);
 235 }
 236
 237 /*
 238  * em28xx_is_ac97_ready()
 239  * Checks if ac97 is ready
 240  */
 241 static int em28xx_is_ac97_ready(struct em28xx *dev)
 242 {
 243         int ret, i;
 244
 245         /* Wait up to 50 ms for AC97 command to complete */
 246         for (i = 0; i < 10; i++, msleep(5)) {
 247                 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
 248                 if (ret < 0)
 249                         return ret;
 250
 251                 if (!(ret & 0x01))
 252                         return 0;
 253         }
 254
 255         em28xx_warn("AC97 command still being executed: not handled properly!\n");
 256         return -EBUSY;
 257 }
 258
 259 /*
 260  * em28xx_read_ac97()
 261  * write a 16 bit value to the specified AC97 address (LSB first!)
 262  */
 263 int em28xx_read_ac97(struct em28xx *dev, u8 reg)
 264 {
 265         int ret;
 266         u8 addr = (reg & 0x7f) | 0x80;
 267         u16 val;
 268
 269         ret = em28xx_is_ac97_ready(dev);
 270         if (ret < 0)
 271                 return ret;
 272
 273         ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
 274         if (ret < 0)
 275                 return ret;
 276
 277         ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
 278                                            (u8 *)&val, sizeof(val));
 279
 280         if (ret < 0)
 281                 return ret;
 282         return le16_to_cpu(val);
 283 }
 284
 285 /*
 286  * em28xx_write_ac97()
 287  * write a 16 bit value to the specified AC97 address (LSB first!)
 288  */
 289 int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
 290 {
 291         int ret;
 292         u8 addr = reg & 0x7f;
 293         __le16 value;
 294
 295         value = cpu_to_le16(val);
 296
 297         ret = em28xx_is_ac97_ready(dev);
 298         if (ret < 0)
 299                 return ret;
 300
 301         ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2);
 302         if (ret < 0)
 303                 return ret;
 304
 305         ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
 306         if (ret < 0)
 307                 return ret;
 308
 309         return 0;
 310 }
 311
 312 struct em28xx_vol_table {
 313         enum em28xx_amux mux;
 314         u8               reg;
 315 };
 316
 317 static struct em28xx_vol_table inputs[] = {
 318         { EM28XX_AMUX_VIDEO,    AC97_VIDEO_VOL   },
 319         { EM28XX_AMUX_LINE_IN,  AC97_LINEIN_VOL  },
 320         { EM28XX_AMUX_PHONE,    AC97_PHONE_VOL   },
 321         { EM28XX_AMUX_MIC,      AC97_MIC_VOL     },
 322         { EM28XX_AMUX_CD,       AC97_CD_VOL      },
 323         { EM28XX_AMUX_AUX,      AC97_AUX_VOL     },
 324         { EM28XX_AMUX_PCM_OUT,  AC97_PCM_OUT_VOL },
 325 };
 326
 327 static int set_ac97_input(struct em28xx *dev)
 328 {
 329         int ret, i;
 330         enum em28xx_amux amux = dev->ctl_ainput;
 331
 332         /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
 333            em28xx should point to LINE IN, while AC97 should use VIDEO
 334          */
 335         if (amux == EM28XX_AMUX_VIDEO2)
 336                 amux = EM28XX_AMUX_VIDEO;
 337
 338         /* Mute all entres but the one that were selected */
 339         for (i = 0; i < ARRAY_SIZE(inputs); i++) {
 340                 if (amux == inputs[i].mux)
 341                         ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
 342                 else
 343                         ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
 344
 345                 if (ret < 0)
 346                         em28xx_warn("couldn't setup AC97 register %d\n",
 347                                      inputs[i].reg);
 348         }
 349         return 0;
 350 }
 351
 352 static int em28xx_set_audio_source(struct em28xx *dev)
 353 {
 354         int ret;
 355         u8 input;
 356
 357         if (dev->board.is_em2800) {
 358                 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
 359                         input = EM2800_AUDIO_SRC_TUNER;
 360                 else
 361                         input = EM2800_AUDIO_SRC_LINE;
 362
 363                 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
 364                 if (ret < 0)
 365                         return ret;
 366         }
 367
 368         if (dev->board.has_msp34xx)
 369                 input = EM28XX_AUDIO_SRC_TUNER;
 370         else {
 371                 switch (dev->ctl_ainput) {
 372                 case EM28XX_AMUX_VIDEO:
 373                         input = EM28XX_AUDIO_SRC_TUNER;
 374                         break;
 375                 default:
 376                         input = EM28XX_AUDIO_SRC_LINE;
 377                         break;
 378                 }
 379         }
 380
 381         if (dev->board.mute_gpio && dev->mute)
 382                 em28xx_gpio_set(dev, dev->board.mute_gpio);
 383         else
 384                 em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
 385
 386         ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
 387         if (ret < 0)
 388                 return ret;
 389         msleep(5);
 390
 391         switch (dev->audio_mode.ac97) {
 392         case EM28XX_NO_AC97:
 393                 break;
 394         default:
 395                 ret = set_ac97_input(dev);
 396         }
 397
 398         return ret;
 399 }
 400
 401 static const struct em28xx_vol_table outputs[] = {
 402         { EM28XX_AOUT_MASTER, AC97_MASTER_VOL      },
 403         { EM28XX_AOUT_LINE,   AC97_LINE_LEVEL_VOL  },
 404         { EM28XX_AOUT_MONO,   AC97_MASTER_MONO_VOL },
 405         { EM28XX_AOUT_LFE,    AC97_LFE_MASTER_VOL  },
 406         { EM28XX_AOUT_SURR,   AC97_SURR_MASTER_VOL },
 407 };
 408
 409 int em28xx_audio_analog_set(struct em28xx *dev)
 410 {
 411         int ret, i;
 412         u8 xclk;
 413
 414         if (!dev->audio_mode.has_audio)
 415                 return 0;
 416
 417         /* It is assumed that all devices use master volume for output.
 418            It would be possible to use also line output.
 419          */
 420         if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
 421                 /* Mute all outputs */
 422                 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
 423                         ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
 424                         if (ret < 0)
 425                                 em28xx_warn("couldn't setup AC97 register %d\n",
 426                                      outputs[i].reg);
 427                 }
 428         }
 429
 430         xclk = dev->board.xclk & 0x7f;
 431         if (!dev->mute)
 432                 xclk |= EM28XX_XCLK_AUDIO_UNMUTE;
 433
 434         ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
 435         if (ret < 0)
 436                 return ret;
 437         msleep(10);
 438
 439         /* Selects the proper audio input */
 440         ret = em28xx_set_audio_source(dev);
 441
 442         /* Sets volume */
 443         if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
 444                 int vol;
 445
 446                 em28xx_write_ac97(dev, AC97_POWER_DOWN_CTRL, 0x4200);
 447                 em28xx_write_ac97(dev, AC97_EXT_AUD_CTRL, 0x0031);
 448                 em28xx_write_ac97(dev, AC97_PCM_IN_SRATE, 0xbb80);
 449
 450                 /* LSB: left channel - both channels with the same level */
 451                 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
 452
 453                 /* Mute device, if needed */
 454                 if (dev->mute)
 455                         vol |= 0x8000;
 456
 457                 /* Sets volume */
 458                 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
 459                         if (dev->ctl_aoutput & outputs[i].mux)
 460                                 ret = em28xx_write_ac97(dev, outputs[i].reg,
 461                                                         vol);
 462                         if (ret < 0)
 463                                 em28xx_warn("couldn't setup AC97 register %d\n",
 464                                      outputs[i].reg);
 465                 }
 466
 467                 if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) {
 468                         int sel = ac97_return_record_select(dev->ctl_aoutput);
 469
 470                         /* Use the same input for both left and right
 471                            channels */
 472                         sel |= (sel << 8);
 473
 474                         em28xx_write_ac97(dev, AC97_RECORD_SELECT, sel);
 475                 }
 476         }
 477
 478         return ret;
 479 }
 480 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
 481
 482 int em28xx_audio_setup(struct em28xx *dev)
 483 {
 484         int vid1, vid2, feat, cfg;
 485         u32 vid;
 486
 487         if (dev->chip_id == CHIP_ID_EM2870 || dev->chip_id == CHIP_ID_EM2874) {
 488                 /* Digital only device - don't load any alsa module */
 489                 dev->audio_mode.has_audio = 0;
 490                 dev->has_audio_class = 0;
 491                 dev->has_alsa_audio = 0;
 492                 return 0;
 493         }
 494
 495         /* If device doesn't support Usb Audio Class, use vendor class */
 496         if (!dev->has_audio_class)
 497                 dev->has_alsa_audio = 1;
 498
 499         dev->audio_mode.has_audio = 1;
 500
 501         /* See how this device is configured */
 502         cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
 503         em28xx_info("Config register raw data: 0x%02x\n", cfg);
 504         if (cfg < 0) {
 505                 /* Register read error?  */
 506                 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */
 507         } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) {
 508                 /* The device doesn't have vendor audio at all */
 509                 dev->has_alsa_audio = 0;
 510                 dev->audio_mode.has_audio = 0;
 511                 return 0;
 512         } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
 513                    EM28XX_CHIPCFG_I2S_3_SAMPRATES) {
 514                 em28xx_info("I2S Audio (3 sample rates)\n");
 515                 dev->audio_mode.i2s_3rates = 1;
 516         } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
 517                    EM28XX_CHIPCFG_I2S_5_SAMPRATES) {
 518                 em28xx_info("I2S Audio (5 sample rates)\n");
 519                 dev->audio_mode.i2s_5rates = 1;
 520         }
 521
 522         if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) {
 523                 /* Skip the code that does AC97 vendor detection */
 524                 dev->audio_mode.ac97 = EM28XX_NO_AC97;
 525                 goto init_audio;
 526         }
 527
 528         dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
 529
 530         vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
 531         if (vid1 < 0) {
 532                 /* Device likely doesn't support AC97 */
 533                 em28xx_warn("AC97 chip type couldn't be determined\n");
 534                 goto init_audio;
 535         }
 536
 537         vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
 538         if (vid2 < 0)
 539                 goto init_audio;
 540
 541         vid = vid1 << 16 | vid2;
 542
 543         dev->audio_mode.ac97_vendor_id = vid;
 544         em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
 545
 546         feat = em28xx_read_ac97(dev, AC97_RESET);
 547         if (feat < 0)
 548                 goto init_audio;
 549
 550         dev->audio_mode.ac97_feat = feat;
 551         em28xx_warn("AC97 features = 0x%04x\n", feat);
 552
 553         /* Try to identify what audio processor we have */
 554         if ((vid == 0xffffffff) && (feat == 0x6a90))
 555                 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
 556         else if ((vid >> 8) == 0x838476)
 557                 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
 558
 559 init_audio:
 560         /* Reports detected AC97 processor */
 561         switch (dev->audio_mode.ac97) {
 562         case EM28XX_NO_AC97:
 563                 em28xx_info("No AC97 audio processor\n");
 564                 break;
 565         case EM28XX_AC97_EM202:
 566                 em28xx_info("Empia 202 AC97 audio processor detected\n");
 567                 break;
 568         case EM28XX_AC97_SIGMATEL:
 569                 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n",
 570                             dev->audio_mode.ac97_vendor_id & 0xff);
 571                 break;
 572         case EM28XX_AC97_OTHER:
 573                 em28xx_warn("Unknown AC97 audio processor detected!\n");
 574                 break;
 575         default:
 576                 break;
 577         }
 578
 579         return em28xx_audio_analog_set(dev);
 580 }
 581 EXPORT_SYMBOL_GPL(em28xx_audio_setup);
 582
 583 int em28xx_colorlevels_set_default(struct em28xx *dev)
 584 {
 585         em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10);  /* contrast */
 586         em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x00);        /* brightness */
 587         em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10); /* saturation */
 588         em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
 589         em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
 590         em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x00);
 591
 592         em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
 593         em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
 594         em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
 595         em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
 596         em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
 597         em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
 598         return em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
 599 }
 600
 601 int em28xx_capture_start(struct em28xx *dev, int start)
 602 {
 603         int rc;
 604
 605         if (dev->chip_id == CHIP_ID_EM2874) {
 606                 /* The Transport Stream Enable Register moved in em2874 */
 607                 if (!start) {
 608                         rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
 609                                                    0x00,
 610                                                    EM2874_TS1_CAPTURE_ENABLE);
 611                         return rc;
 612                 }
 613
 614                 /* Enable Transport Stream */
 615                 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
 616                                            EM2874_TS1_CAPTURE_ENABLE,
 617                                            EM2874_TS1_CAPTURE_ENABLE);
 618                 return rc;
 619         }
 620
 621
 622         /* FIXME: which is the best order? */
 623         /* video registers are sampled by VREF */
 624         rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
 625                                    start ? 0x10 : 0x00, 0x10);
 626         if (rc < 0)
 627                 return rc;
 628
 629         if (!start) {
 630                 /* disable video capture */
 631                 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
 632                 return rc;
 633         }
 634
 635         /* enable video capture */
 636         rc = em28xx_write_reg(dev, 0x48, 0x00);
 637
 638         if (dev->mode == EM28XX_ANALOG_MODE)
 639                 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
 640         else
 641                 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
 642
 643         msleep(6);
 644
 645         return rc;
 646 }
 647
 648 int em28xx_set_outfmt(struct em28xx *dev)
 649 {
 650         int ret;
 651         int vinmode, vinctl, outfmt;
 652
 653         outfmt  = dev->format->reg;
 654
 655         if (dev->board.is_27xx) {
 656                 vinmode = 0x0d;
 657                 vinctl  = 0x00;
 658         } else {
 659                 vinmode = 0x10;
 660                 vinctl  = 0x11;
 661         }
 662
 663         ret = em28xx_write_reg_bits(dev, EM28XX_R27_OUTFMT,
 664                                 outfmt | 0x20, 0xff);
 665         if (ret < 0)
 666                         return ret;
 667
 668         ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, vinmode);
 669         if (ret < 0)
 670                 return ret;
 671
 672         return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, vinctl);
 673 }
 674
 675 static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
 676                                   u8 ymin, u8 ymax)
 677 {
 678         em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
 679                         xmin, ymin, xmax, ymax);
 680
 681         em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
 682         em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
 683         em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
 684         return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
 685 }
 686
 687 static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
 688                                    u16 width, u16 height)
 689 {
 690         u8 cwidth = width;
 691         u8 cheight = height;
 692         u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
 693
 694         em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
 695                         (width | (overflow & 2) << 7),
 696                         (height | (overflow & 1) << 8));
 697
 698         em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
 699         em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
 700         em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
 701         em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
 702         return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
 703 }
 704
 705 static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
 706 {
 707         u8 mode;
 708         /* the em2800 scaler only supports scaling down to 50% */
 709
 710         if (dev->board.is_27xx) {
 711                 /* FIXME: Don't use the scaler yet */
 712                 mode = 0;
 713         } else if (dev->board.is_em2800) {
 714                 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
 715         } else {
 716                 u8 buf[2];
 717
 718                 buf[0] = h;
 719                 buf[1] = h >> 8;
 720                 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
 721
 722                 buf[0] = v;
 723                 buf[1] = v >> 8;
 724                 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
 725                 /* it seems that both H and V scalers must be active
 726                    to work correctly */
 727                 mode = (h || v) ? 0x30 : 0x00;
 728         }
 729         return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
 730 }
 731
 732 /* FIXME: this only function read values from dev */
 733 int em28xx_resolution_set(struct em28xx *dev)
 734 {
 735         int width, height;
 736         width = norm_maxw(dev);
 737         height = norm_maxh(dev) >> 1;
 738
 739         em28xx_set_outfmt(dev);
 740
 741
 742         em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
 743         em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
 744
 745         return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
 746 }
 747
 748 int em28xx_set_alternate(struct em28xx *dev)
 749 {
 750         int errCode, prev_alt = dev->alt;
 751         int i;
 752         unsigned int min_pkt_size = dev->width * 2 + 4;
 753
 754         /* When image size is bigger than a certain value,
 755            the frame size should be increased, otherwise, only
 756            green screen will be received.
 757          */
 758         if (dev->width * 2 * dev->height > 720 * 240 * 2)
 759                 min_pkt_size *= 2;
 760
 761         for (i = 0; i < dev->num_alt; i++) {
 762                 /* stop when the selected alt setting offers enough bandwidth */
 763                 if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
 764                         dev->alt = i;
 765                         break;
 766                 /* otherwise make sure that we end up with the maximum bandwidth
 767                    because the min_pkt_size equation might be wrong...
 768                 */
 769                 } else if (dev->alt_max_pkt_size[i] >
 770                            dev->alt_max_pkt_size[dev->alt])
 771                         dev->alt = i;
 772         }
 773
 774         if (dev->alt != prev_alt) {
 775                 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
 776                                 min_pkt_size, dev->alt);
 777                 dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
 778                 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
 779                                dev->alt, dev->max_pkt_size);
 780                 errCode = usb_set_interface(dev->udev, 0, dev->alt);
 781                 if (errCode < 0) {
 782                         em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
 783                                         dev->alt, errCode);
 784                         return errCode;
 785                 }
 786         }
 787         return 0;
 788 }
 789
 790 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
 791 {
 792         int rc = 0;
 793
 794         if (!gpio)
 795                 return rc;
 796
 797         if (dev->mode != EM28XX_SUSPEND) {
 798                 em28xx_write_reg(dev, 0x48, 0x00);
 799                 if (dev->mode == EM28XX_ANALOG_MODE)
 800                         em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
 801                 else
 802                         em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
 803                 msleep(6);
 804         }
 805
 806         /* Send GPIO reset sequences specified at board entry */
 807         while (gpio->sleep >= 0) {
 808                 if (gpio->reg >= 0) {
 809                         rc = em28xx_write_reg_bits(dev,
 810                                                    gpio->reg,
 811                                                    gpio->val,
 812                                                    gpio->mask);
 813                         if (rc < 0)
 814                                 return rc;
 815                 }
 816                 if (gpio->sleep > 0)
 817                         msleep(gpio->sleep);
 818
 819                 gpio++;
 820         }
 821         return rc;
 822 }
 823
 824 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
 825 {
 826         if (dev->mode == set_mode)
 827                 return 0;
 828
 829         if (set_mode == EM28XX_SUSPEND) {
 830                 dev->mode = set_mode;
 831
 832                 /* FIXME: add suspend support for ac97 */
 833
 834                 return em28xx_gpio_set(dev, dev->board.suspend_gpio);
 835         }
 836
 837         dev->mode = set_mode;
 838
 839         if (dev->mode == EM28XX_DIGITAL_MODE)
 840                 return em28xx_gpio_set(dev, dev->board.dvb_gpio);
 841         else
 842                 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
 843 }
 844 EXPORT_SYMBOL_GPL(em28xx_set_mode);
 845
 846 /* ------------------------------------------------------------------
 847         URB control
 848    ------------------------------------------------------------------*/
 849
 850 /*
 851  * IRQ callback, called by URB callback
 852  */
 853 static void em28xx_irq_callback(struct urb *urb)
 854 {
 855         struct em28xx_dmaqueue  *dma_q = urb->context;
 856         struct em28xx *dev = container_of(dma_q, struct em28xx, vidq);
 857         int rc, i;
 858
 859         switch (urb->status) {
 860         case 0:             /* success */
 861         case -ETIMEDOUT:    /* NAK */
 862                 break;
 863         case -ECONNRESET:   /* kill */
 864         case -ENOENT:
 865         case -ESHUTDOWN:
 866                 return;
 867         default:            /* error */
 868                 em28xx_isocdbg("urb completition error %d.\n", urb->status);
 869                 break;
 870         }
 871
 872         /* Copy data from URB */
 873         spin_lock(&dev->slock);
 874         rc = dev->isoc_ctl.isoc_copy(dev, urb);
 875         spin_unlock(&dev->slock);
 876
 877         /* Reset urb buffers */
 878         for (i = 0; i < urb->number_of_packets; i++) {
 879                 urb->iso_frame_desc[i].status = 0;
 880                 urb->iso_frame_desc[i].actual_length = 0;
 881         }
 882         urb->status = 0;
 883
 884         urb->status = usb_submit_urb(urb, GFP_ATOMIC);
 885         if (urb->status) {
 886                 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
 887                                urb->status);
 888         }
 889 }
 890
 891 /*
 892  * Stop and Deallocate URBs
 893  */
 894 void em28xx_uninit_isoc(struct em28xx *dev)
 895 {
 896         struct urb *urb;
 897         int i;
 898
 899         em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");
 900
 901         dev->isoc_ctl.nfields = -1;
 902         for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
 903                 urb = dev->isoc_ctl.urb[i];
 904                 if (urb) {
 905                         if (!irqs_disabled())
 906                                 usb_kill_urb(urb);
 907                         else
 908                                 usb_unlink_urb(urb);
 909
 910                         if (dev->isoc_ctl.transfer_buffer[i]) {
 911                                 usb_buffer_free(dev->udev,
 912                                         urb->transfer_buffer_length,
 913                                         dev->isoc_ctl.transfer_buffer[i],
 914                                         urb->transfer_dma);
 915                         }
 916                         usb_free_urb(urb);
 917                         dev->isoc_ctl.urb[i] = NULL;
 918                 }
 919                 dev->isoc_ctl.transfer_buffer[i] = NULL;
 920         }
 921
 922         kfree(dev->isoc_ctl.urb);
 923         kfree(dev->isoc_ctl.transfer_buffer);
 924
 925         dev->isoc_ctl.urb = NULL;
 926         dev->isoc_ctl.transfer_buffer = NULL;
 927         dev->isoc_ctl.num_bufs = 0;
 928
 929         em28xx_capture_start(dev, 0);
 930 }
 931 EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
 932
 933 /*
 934  * Allocate URBs and start IRQ
 935  */
 936 int em28xx_init_isoc(struct em28xx *dev, int max_packets,
 937                      int num_bufs, int max_pkt_size,
 938                      int (*isoc_copy) (struct em28xx *dev, struct urb *urb))
 939 {
 940         struct em28xx_dmaqueue *dma_q = &dev->vidq;
 941         int i;
 942         int sb_size, pipe;
 943         struct urb *urb;
 944         int j, k;
 945         int rc;
 946
 947         em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");
 948
 949         /* De-allocates all pending stuff */
 950         em28xx_uninit_isoc(dev);
 951
 952         dev->isoc_ctl.isoc_copy = isoc_copy;
 953         dev->isoc_ctl.num_bufs = num_bufs;
 954
 955         dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs,  GFP_KERNEL);
 956         if (!dev->isoc_ctl.urb) {
 957                 em28xx_errdev("cannot alloc memory for usb buffers\n");
 958                 return -ENOMEM;
 959         }
 960
 961         dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
 962                                               GFP_KERNEL);
 963         if (!dev->isoc_ctl.transfer_buffer) {
 964                 em28xx_errdev("cannot allocate memory for usb transfer\n");
 965                 kfree(dev->isoc_ctl.urb);
 966                 return -ENOMEM;
 967         }
 968
 969         dev->isoc_ctl.max_pkt_size = max_pkt_size;
 970         dev->isoc_ctl.buf = NULL;
 971
 972         sb_size = max_packets * dev->isoc_ctl.max_pkt_size;
 973
 974         /* allocate urbs and transfer buffers */
 975         for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
 976                 urb = usb_alloc_urb(max_packets, GFP_KERNEL);
 977                 if (!urb) {
 978                         em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
 979                         em28xx_uninit_isoc(dev);
 980                         return -ENOMEM;
 981                 }
 982                 dev->isoc_ctl.urb[i] = urb;
 983
 984                 dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev,
 985                         sb_size, GFP_KERNEL, &urb->transfer_dma);
 986                 if (!dev->isoc_ctl.transfer_buffer[i]) {
 987                         em28xx_err("unable to allocate %i bytes for transfer"
 988                                         " buffer %i%s\n",
 989                                         sb_size, i,
 990                                         in_interrupt() ? " while in int" : "");
 991                         em28xx_uninit_isoc(dev);
 992                         return -ENOMEM;
 993                 }
 994                 memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);
 995
 996                 /* FIXME: this is a hack - should be
 997                         'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
 998                         should also be using 'desc.bInterval'
 999                  */
1000                 pipe = usb_rcvisocpipe(dev->udev,
1001                         dev->mode == EM28XX_ANALOG_MODE ? 0x82 : 0x84);
1002
1003                 usb_fill_int_urb(urb, dev->udev, pipe,
1004                                  dev->isoc_ctl.transfer_buffer[i], sb_size,
1005                                  em28xx_irq_callback, dma_q, 1);
1006
1007                 urb->number_of_packets = max_packets;
1008                 urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
1009
1010                 k = 0;
1011                 for (j = 0; j < max_packets; j++) {
1012                         urb->iso_frame_desc[j].offset = k;
1013                         urb->iso_frame_desc[j].length =
1014                                                 dev->isoc_ctl.max_pkt_size;
1015                         k += dev->isoc_ctl.max_pkt_size;
1016                 }
1017         }
1018
1019         init_waitqueue_head(&dma_q->wq);
1020
1021         em28xx_capture_start(dev, 1);
1022
1023         /* submit urbs and enables IRQ */
1024         for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
1025                 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
1026                 if (rc) {
1027                         em28xx_err("submit of urb %i failed (error=%i)\n", i,
1028                                    rc);
1029                         em28xx_uninit_isoc(dev);
1030                         return rc;
1031                 }
1032         }
1033
1034         return 0;
1035 }
1036 EXPORT_SYMBOL_GPL(em28xx_init_isoc);
1037
1038 /* Determine the packet size for the DVB stream for the given device
1039    (underlying value programmed into the eeprom) */
1040 int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev)
1041 {
1042         unsigned int chip_cfg2;
1043         unsigned int packet_size = 564;
1044
1045         if (dev->chip_id == CHIP_ID_EM2874) {
1046                 /* FIXME - for now assume 564 like it was before, but the
1047                    em2874 code should be added to return the proper value... */
1048                 packet_size = 564;
1049         } else {
1050                 /* TS max packet size stored in bits 1-0 of R01 */
1051                 chip_cfg2 = em28xx_read_reg(dev, EM28XX_R01_CHIPCFG2);
1052                 switch (chip_cfg2 & EM28XX_CHIPCFG2_TS_PACKETSIZE_MASK) {
1053                 case EM28XX_CHIPCFG2_TS_PACKETSIZE_188:
1054                         packet_size = 188;
1055                         break;
1056                 case EM28XX_CHIPCFG2_TS_PACKETSIZE_376:
1057                         packet_size = 376;
1058                         break;
1059                 case EM28XX_CHIPCFG2_TS_PACKETSIZE_564:
1060                         packet_size = 564;
1061                         break;
1062                 case EM28XX_CHIPCFG2_TS_PACKETSIZE_752:
1063                         packet_size = 752;
1064                         break;
1065                 }
1066         }
1067
1068         em28xx_coredbg("dvb max packet size=%d\n", packet_size);
1069         return packet_size;
1070 }
1071 EXPORT_SYMBOL_GPL(em28xx_isoc_dvb_max_packetsize);
1072
1073 /*
1074  * em28xx_wake_i2c()
1075  * configure i2c attached devices
1076  */
1077 void em28xx_wake_i2c(struct em28xx *dev)
1078 {
1079         v4l2_device_call_all(&dev->v4l2_dev, 0, core,  reset, 0);
1080         v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_routing,
1081                         INPUT(dev->ctl_input)->vmux, 0, 0);
1082         v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 0);
1083 }
1084
1085 /*
1086  * Device control list
1087  */
1088
1089 static LIST_HEAD(em28xx_devlist);
1090 static DEFINE_MUTEX(em28xx_devlist_mutex);
1091
1092 struct em28xx *em28xx_get_device(int minor,
1093                                  enum v4l2_buf_type *fh_type,
1094                                  int *has_radio)
1095 {
1096         struct em28xx *h, *dev = NULL;
1097
1098         *fh_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1099         *has_radio = 0;
1100
1101         mutex_lock(&em28xx_devlist_mutex);
1102         list_for_each_entry(h, &em28xx_devlist, devlist) {
1103                 if (h->vdev->minor == minor)
1104                         dev = h;
1105                 if (h->vbi_dev->minor == minor) {
1106                         dev = h;
1107                         *fh_type = V4L2_BUF_TYPE_VBI_CAPTURE;
1108                 }
1109                 if (h->radio_dev &&
1110                     h->radio_dev->minor == minor) {
1111                         dev = h;
1112                         *has_radio = 1;
1113                 }
1114         }
1115         mutex_unlock(&em28xx_devlist_mutex);
1116
1117         return dev;
1118 }
1119
1120 /*
1121  * em28xx_realease_resources()
1122  * unregisters the v4l2,i2c and usb devices
1123  * called when the device gets disconected or at module unload
1124 */
1125 void em28xx_remove_from_devlist(struct em28xx *dev)
1126 {
1127         mutex_lock(&em28xx_devlist_mutex);
1128         list_del(&dev->devlist);
1129         mutex_unlock(&em28xx_devlist_mutex);
1130 };
1131
1132 void em28xx_add_into_devlist(struct em28xx *dev)
1133 {
1134         mutex_lock(&em28xx_devlist_mutex);
1135         list_add_tail(&dev->devlist, &em28xx_devlist);
1136         mutex_unlock(&em28xx_devlist_mutex);
1137 };
1138
1139 /*
1140  * Extension interface
1141  */
1142
1143 static LIST_HEAD(em28xx_extension_devlist);
1144 static DEFINE_MUTEX(em28xx_extension_devlist_lock);
1145
1146 int em28xx_register_extension(struct em28xx_ops *ops)
1147 {
1148         struct em28xx *dev = NULL;
1149
1150         mutex_lock(&em28xx_devlist_mutex);
1151         mutex_lock(&em28xx_extension_devlist_lock);
1152         list_add_tail(&ops->next, &em28xx_extension_devlist);
1153         list_for_each_entry(dev, &em28xx_devlist, devlist) {
1154                 if (dev)
1155                         ops->init(dev);
1156         }
1157         printk(KERN_INFO "Em28xx: Initialized (%s) extension\n", ops->name);
1158         mutex_unlock(&em28xx_extension_devlist_lock);
1159         mutex_unlock(&em28xx_devlist_mutex);
1160         return 0;
1161 }
1162 EXPORT_SYMBOL(em28xx_register_extension);
1163
1164 void em28xx_unregister_extension(struct em28xx_ops *ops)
1165 {
1166         struct em28xx *dev = NULL;
1167
1168         mutex_lock(&em28xx_devlist_mutex);
1169         list_for_each_entry(dev, &em28xx_devlist, devlist) {
1170                 if (dev)
1171                         ops->fini(dev);
1172         }
1173
1174         mutex_lock(&em28xx_extension_devlist_lock);
1175         printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name);
1176         list_del(&ops->next);
1177         mutex_unlock(&em28xx_extension_devlist_lock);
1178         mutex_unlock(&em28xx_devlist_mutex);
1179 }
1180 EXPORT_SYMBOL(em28xx_unregister_extension);
1181
1182 void em28xx_init_extension(struct em28xx *dev)
1183 {
1184         struct em28xx_ops *ops = NULL;
1185
1186         mutex_lock(&em28xx_extension_devlist_lock);
1187         if (!list_empty(&em28xx_extension_devlist)) {
1188                 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1189                         if (ops->init)
1190                                 ops->init(dev);
1191                 }
1192         }
1193         mutex_unlock(&em28xx_extension_devlist_lock);
1194 }
1195
1196 void em28xx_close_extension(struct em28xx *dev)
1197 {
1198         struct em28xx_ops *ops = NULL;
1199
1200         mutex_lock(&em28xx_extension_devlist_lock);
1201         if (!list_empty(&em28xx_extension_devlist)) {
1202                 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1203                         if (ops->fini)
1204                                 ops->fini(dev);
1205                 }
1206         }
1207         mutex_unlock(&em28xx_extension_devlist_lock);
1208 }