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V4L/DVB (8819): gspca: Initialize the ov519 at open time and source cleanup.
[mirror_ubuntu-artful-kernel.git] / drivers / media / video / gspca / ov519.c
1 /**
2 * OV519 driver
3 *
4 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
5 *
6 * (This module is adapted from the ov51x-jpeg package)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23 #define MODULE_NAME "ov519"
24
25 #include "gspca.h"
26
27 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
28 MODULE_DESCRIPTION("OV519 USB Camera Driver");
29 MODULE_LICENSE("GPL");
30
31 /* global parameters */
32 static int frame_rate;
33
34 /* Number of times to retry a failed I2C transaction. Increase this if you
35 * are getting "Failed to read sensor ID..." */
36 static int i2c_detect_tries = 10;
37
38 /* ov519 device descriptor */
39 struct sd {
40 struct gspca_dev gspca_dev; /* !! must be the first item */
41
42 /* Determined by sensor type */
43 char sif;
44
45 unsigned char primary_i2c_slave; /* I2C write id of sensor */
46
47 unsigned char brightness;
48 unsigned char contrast;
49 unsigned char colors;
50 __u8 hflip;
51 __u8 vflip;
52
53 char compress; /* Should the next frame be compressed? */
54 char compress_inited; /* Are compression params uploaded? */
55 char stopped; /* Streaming is temporarily paused */
56
57 char frame_rate; /* current Framerate (OV519 only) */
58 char clockdiv; /* clockdiv override for OV519 only */
59
60 char sensor; /* Type of image sensor chip (SEN_*) */
61 #define SEN_UNKNOWN 0
62 #define SEN_OV6620 1
63 #define SEN_OV6630 2
64 #define SEN_OV7610 3
65 #define SEN_OV7620 4
66 #define SEN_OV7640 5
67 #define SEN_OV7670 6
68 #define SEN_OV76BE 7
69 #define SEN_OV8610 8
70
71 };
72
73 /* V4L2 controls supported by the driver */
74 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
75 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
76 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
77 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
78 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
79 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
80 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
81 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
82 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
83 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
84
85 static struct ctrl sd_ctrls[] = {
86 {
87 {
88 .id = V4L2_CID_BRIGHTNESS,
89 .type = V4L2_CTRL_TYPE_INTEGER,
90 .name = "Brightness",
91 .minimum = 0,
92 .maximum = 255,
93 .step = 1,
94 #define BRIGHTNESS_DEF 127
95 .default_value = BRIGHTNESS_DEF,
96 },
97 .set = sd_setbrightness,
98 .get = sd_getbrightness,
99 },
100 {
101 {
102 .id = V4L2_CID_CONTRAST,
103 .type = V4L2_CTRL_TYPE_INTEGER,
104 .name = "Contrast",
105 .minimum = 0,
106 .maximum = 255,
107 .step = 1,
108 #define CONTRAST_DEF 127
109 .default_value = CONTRAST_DEF,
110 },
111 .set = sd_setcontrast,
112 .get = sd_getcontrast,
113 },
114 {
115 {
116 .id = V4L2_CID_SATURATION,
117 .type = V4L2_CTRL_TYPE_INTEGER,
118 .name = "Color",
119 .minimum = 0,
120 .maximum = 255,
121 .step = 1,
122 #define COLOR_DEF 127
123 .default_value = COLOR_DEF,
124 },
125 .set = sd_setcolors,
126 .get = sd_getcolors,
127 },
128 /* next controls work with ov7670 only */
129 {
130 {
131 .id = V4L2_CID_HFLIP,
132 .type = V4L2_CTRL_TYPE_BOOLEAN,
133 .name = "Mirror",
134 .minimum = 0,
135 .maximum = 1,
136 .step = 1,
137 #define HFLIP_DEF 0
138 .default_value = HFLIP_DEF,
139 },
140 .set = sd_sethflip,
141 .get = sd_gethflip,
142 },
143 {
144 {
145 .id = V4L2_CID_VFLIP,
146 .type = V4L2_CTRL_TYPE_BOOLEAN,
147 .name = "Vflip",
148 .minimum = 0,
149 .maximum = 1,
150 .step = 1,
151 #define VFLIP_DEF 0
152 .default_value = VFLIP_DEF,
153 },
154 .set = sd_setvflip,
155 .get = sd_getvflip,
156 },
157 };
158
159 static struct v4l2_pix_format vga_mode[] = {
160 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
161 .bytesperline = 320,
162 .sizeimage = 320 * 240 * 3 / 8 + 590,
163 .colorspace = V4L2_COLORSPACE_JPEG,
164 .priv = 1},
165 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
166 .bytesperline = 640,
167 .sizeimage = 640 * 480 * 3 / 8 + 590,
168 .colorspace = V4L2_COLORSPACE_JPEG,
169 .priv = 0},
170 };
171 static struct v4l2_pix_format sif_mode[] = {
172 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
173 .bytesperline = 176,
174 .sizeimage = 176 * 144 * 3 / 8 + 590,
175 .colorspace = V4L2_COLORSPACE_JPEG,
176 .priv = 1},
177 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
178 .bytesperline = 352,
179 .sizeimage = 352 * 288 * 3 / 8 + 590,
180 .colorspace = V4L2_COLORSPACE_JPEG,
181 .priv = 0},
182 };
183
184 /* OV519 Camera interface register numbers */
185 #define OV519_CAM_H_SIZE 0x10
186 #define OV519_CAM_V_SIZE 0x11
187 #define OV519_CAM_X_OFFSETL 0x12
188 #define OV519_CAM_X_OFFSETH 0x13
189 #define OV519_CAM_Y_OFFSETL 0x14
190 #define OV519_CAM_Y_OFFSETH 0x15
191 #define OV519_CAM_DIVIDER 0x16
192 #define OV519_CAM_DFR 0x20
193 #define OV519_CAM_FORMAT 0x25
194
195 /* OV519 System Controller register numbers */
196 #define OV519_SYS_RESET1 0x51
197 #define OV519_SYS_EN_CLK1 0x54
198
199 #define OV519_GPIO_DATA_OUT0 0x71
200 #define OV519_GPIO_IO_CTRL0 0x72
201
202 #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
203
204 /* I2C registers */
205 #define R51x_I2C_W_SID 0x41
206 #define R51x_I2C_SADDR_3 0x42
207 #define R51x_I2C_SADDR_2 0x43
208 #define R51x_I2C_R_SID 0x44
209 #define R51x_I2C_DATA 0x45
210 #define R518_I2C_CTL 0x47 /* OV518(+) only */
211
212 /* I2C ADDRESSES */
213 #define OV7xx0_SID 0x42
214 #define OV8xx0_SID 0xa0
215 #define OV6xx0_SID 0xc0
216
217 /* OV7610 registers */
218 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
219 #define OV7610_REG_SAT 0x03 /* saturation */
220 #define OV8610_REG_HUE 0x04 /* 04 reserved */
221 #define OV7610_REG_CNT 0x05 /* Y contrast */
222 #define OV7610_REG_BRT 0x06 /* Y brightness */
223 #define OV7610_REG_COM_C 0x14 /* misc common regs */
224 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
225 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
226 #define OV7610_REG_COM_I 0x29 /* misc settings */
227
228 /* OV7670 registers */
229 #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
230 #define OV7670_REG_BLUE 0x01 /* blue gain */
231 #define OV7670_REG_RED 0x02 /* red gain */
232 #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
233 #define OV7670_REG_COM1 0x04 /* Control 1 */
234 #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
235 #define OV7670_REG_COM3 0x0c /* Control 3 */
236 #define OV7670_REG_COM4 0x0d /* Control 4 */
237 #define OV7670_REG_COM5 0x0e /* All "reserved" */
238 #define OV7670_REG_COM6 0x0f /* Control 6 */
239 #define OV7670_REG_AECH 0x10 /* More bits of AEC value */
240 #define OV7670_REG_CLKRC 0x11 /* Clock control */
241 #define OV7670_REG_COM7 0x12 /* Control 7 */
242 #define OV7670_COM7_FMT_VGA 0x00
243 #define OV7670_COM7_YUV 0x00 /* YUV */
244 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
245 #define OV7670_COM7_FMT_MASK 0x38
246 #define OV7670_COM7_RESET 0x80 /* Register reset */
247 #define OV7670_REG_COM8 0x13 /* Control 8 */
248 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
249 #define OV7670_COM8_AWB 0x02 /* White balance enable */
250 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
251 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
252 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
253 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
254 #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
255 #define OV7670_REG_COM10 0x15 /* Control 10 */
256 #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
257 #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
258 #define OV7670_REG_VSTART 0x19 /* Vert start high bits */
259 #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
260 #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
261 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
262 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
263 #define OV7670_REG_AEW 0x24 /* AGC upper limit */
264 #define OV7670_REG_AEB 0x25 /* AGC lower limit */
265 #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
266 #define OV7670_REG_HREF 0x32 /* HREF pieces */
267 #define OV7670_REG_TSLB 0x3a /* lots of stuff */
268 #define OV7670_REG_COM11 0x3b /* Control 11 */
269 #define OV7670_COM11_EXP 0x02
270 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
271 #define OV7670_REG_COM12 0x3c /* Control 12 */
272 #define OV7670_REG_COM13 0x3d /* Control 13 */
273 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
274 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
275 #define OV7670_REG_COM14 0x3e /* Control 14 */
276 #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
277 #define OV7670_REG_COM15 0x40 /* Control 15 */
278 #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
279 #define OV7670_REG_COM16 0x41 /* Control 16 */
280 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
281 #define OV7670_REG_BRIGHT 0x55 /* Brightness */
282 #define OV7670_REG_CONTRAS 0x56 /* Contrast control */
283 #define OV7670_REG_GFIX 0x69 /* Fix gain control */
284 #define OV7670_REG_RGB444 0x8c /* RGB 444 control */
285 #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
286 #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
287 #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
288 #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
289 #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
290 #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
291 #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
292 #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
293 #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
294
295 struct ov_regvals {
296 __u8 reg;
297 __u8 val;
298 };
299 struct ov_i2c_regvals {
300 __u8 reg;
301 __u8 val;
302 };
303
304 static const struct ov_i2c_regvals norm_6x20[] = {
305 { 0x12, 0x80 }, /* reset */
306 { 0x11, 0x01 },
307 { 0x03, 0x60 },
308 { 0x05, 0x7f }, /* For when autoadjust is off */
309 { 0x07, 0xa8 },
310 /* The ratio of 0x0c and 0x0d controls the white point */
311 { 0x0c, 0x24 },
312 { 0x0d, 0x24 },
313 { 0x0f, 0x15 }, /* COMS */
314 { 0x10, 0x75 }, /* AEC Exposure time */
315 { 0x12, 0x24 }, /* Enable AGC */
316 { 0x14, 0x04 },
317 /* 0x16: 0x06 helps frame stability with moving objects */
318 { 0x16, 0x06 },
319 /* { 0x20, 0x30 }, * Aperture correction enable */
320 { 0x26, 0xb2 }, /* BLC enable */
321 /* 0x28: 0x05 Selects RGB format if RGB on */
322 { 0x28, 0x05 },
323 { 0x2a, 0x04 }, /* Disable framerate adjust */
324 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
325 { 0x2d, 0x99 },
326 { 0x33, 0xa0 }, /* Color Processing Parameter */
327 { 0x34, 0xd2 }, /* Max A/D range */
328 { 0x38, 0x8b },
329 { 0x39, 0x40 },
330
331 { 0x3c, 0x39 }, /* Enable AEC mode changing */
332 { 0x3c, 0x3c }, /* Change AEC mode */
333 { 0x3c, 0x24 }, /* Disable AEC mode changing */
334
335 { 0x3d, 0x80 },
336 /* These next two registers (0x4a, 0x4b) are undocumented.
337 * They control the color balance */
338 { 0x4a, 0x80 },
339 { 0x4b, 0x80 },
340 { 0x4d, 0xd2 }, /* This reduces noise a bit */
341 { 0x4e, 0xc1 },
342 { 0x4f, 0x04 },
343 /* Do 50-53 have any effect? */
344 /* Toggle 0x12[2] off and on here? */
345 };
346
347 static const struct ov_i2c_regvals norm_6x30[] = {
348 { 0x12, 0x80 }, /* Reset */
349 { 0x00, 0x1f }, /* Gain */
350 { 0x01, 0x99 }, /* Blue gain */
351 { 0x02, 0x7c }, /* Red gain */
352 { 0x03, 0xc0 }, /* Saturation */
353 { 0x05, 0x0a }, /* Contrast */
354 { 0x06, 0x95 }, /* Brightness */
355 { 0x07, 0x2d }, /* Sharpness */
356 { 0x0c, 0x20 },
357 { 0x0d, 0x20 },
358 { 0x0e, 0x20 },
359 { 0x0f, 0x05 },
360 { 0x10, 0x9a },
361 { 0x11, 0x00 }, /* Pixel clock = fastest */
362 { 0x12, 0x24 }, /* Enable AGC and AWB */
363 { 0x13, 0x21 },
364 { 0x14, 0x80 },
365 { 0x15, 0x01 },
366 { 0x16, 0x03 },
367 { 0x17, 0x38 },
368 { 0x18, 0xea },
369 { 0x19, 0x04 },
370 { 0x1a, 0x93 },
371 { 0x1b, 0x00 },
372 { 0x1e, 0xc4 },
373 { 0x1f, 0x04 },
374 { 0x20, 0x20 },
375 { 0x21, 0x10 },
376 { 0x22, 0x88 },
377 { 0x23, 0xc0 }, /* Crystal circuit power level */
378 { 0x25, 0x9a }, /* Increase AEC black ratio */
379 { 0x26, 0xb2 }, /* BLC enable */
380 { 0x27, 0xa2 },
381 { 0x28, 0x00 },
382 { 0x29, 0x00 },
383 { 0x2a, 0x84 }, /* 60 Hz power */
384 { 0x2b, 0xa8 }, /* 60 Hz power */
385 { 0x2c, 0xa0 },
386 { 0x2d, 0x95 }, /* Enable auto-brightness */
387 { 0x2e, 0x88 },
388 { 0x33, 0x26 },
389 { 0x34, 0x03 },
390 { 0x36, 0x8f },
391 { 0x37, 0x80 },
392 { 0x38, 0x83 },
393 { 0x39, 0x80 },
394 { 0x3a, 0x0f },
395 { 0x3b, 0x3c },
396 { 0x3c, 0x1a },
397 { 0x3d, 0x80 },
398 { 0x3e, 0x80 },
399 { 0x3f, 0x0e },
400 { 0x40, 0x00 }, /* White bal */
401 { 0x41, 0x00 }, /* White bal */
402 { 0x42, 0x80 },
403 { 0x43, 0x3f }, /* White bal */
404 { 0x44, 0x80 },
405 { 0x45, 0x20 },
406 { 0x46, 0x20 },
407 { 0x47, 0x80 },
408 { 0x48, 0x7f },
409 { 0x49, 0x00 },
410 { 0x4a, 0x00 },
411 { 0x4b, 0x80 },
412 { 0x4c, 0xd0 },
413 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
414 { 0x4e, 0x40 },
415 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
416 { 0x50, 0xff },
417 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
418 { 0x55, 0xff },
419 { 0x56, 0x12 },
420 { 0x57, 0x81 },
421 { 0x58, 0x75 },
422 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
423 { 0x5a, 0x2c },
424 { 0x5b, 0x0f }, /* AWB chrominance levels */
425 { 0x5c, 0x10 },
426 { 0x3d, 0x80 },
427 { 0x27, 0xa6 },
428 { 0x12, 0x20 }, /* Toggle AWB */
429 { 0x12, 0x24 },
430 };
431
432 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
433 *
434 * Register 0x0f in the 7610 has the following effects:
435 *
436 * 0x85 (AEC method 1): Best overall, good contrast range
437 * 0x45 (AEC method 2): Very overexposed
438 * 0xa5 (spec sheet default): Ok, but the black level is
439 * shifted resulting in loss of contrast
440 * 0x05 (old driver setting): very overexposed, too much
441 * contrast
442 */
443 static const struct ov_i2c_regvals norm_7610[] = {
444 { 0x10, 0xff },
445 { 0x16, 0x06 },
446 { 0x28, 0x24 },
447 { 0x2b, 0xac },
448 { 0x12, 0x00 },
449 { 0x38, 0x81 },
450 { 0x28, 0x24 }, /* 0c */
451 { 0x0f, 0x85 }, /* lg's setting */
452 { 0x15, 0x01 },
453 { 0x20, 0x1c },
454 { 0x23, 0x2a },
455 { 0x24, 0x10 },
456 { 0x25, 0x8a },
457 { 0x26, 0xa2 },
458 { 0x27, 0xc2 },
459 { 0x2a, 0x04 },
460 { 0x2c, 0xfe },
461 { 0x2d, 0x93 },
462 { 0x30, 0x71 },
463 { 0x31, 0x60 },
464 { 0x32, 0x26 },
465 { 0x33, 0x20 },
466 { 0x34, 0x48 },
467 { 0x12, 0x24 },
468 { 0x11, 0x01 },
469 { 0x0c, 0x24 },
470 { 0x0d, 0x24 },
471 };
472
473 static const struct ov_i2c_regvals norm_7620[] = {
474 { 0x00, 0x00 }, /* gain */
475 { 0x01, 0x80 }, /* blue gain */
476 { 0x02, 0x80 }, /* red gain */
477 { 0x03, 0xc0 }, /* OV7670_REG_VREF */
478 { 0x06, 0x60 },
479 { 0x07, 0x00 },
480 { 0x0c, 0x24 },
481 { 0x0c, 0x24 },
482 { 0x0d, 0x24 },
483 { 0x11, 0x01 },
484 { 0x12, 0x24 },
485 { 0x13, 0x01 },
486 { 0x14, 0x84 },
487 { 0x15, 0x01 },
488 { 0x16, 0x03 },
489 { 0x17, 0x2f },
490 { 0x18, 0xcf },
491 { 0x19, 0x06 },
492 { 0x1a, 0xf5 },
493 { 0x1b, 0x00 },
494 { 0x20, 0x18 },
495 { 0x21, 0x80 },
496 { 0x22, 0x80 },
497 { 0x23, 0x00 },
498 { 0x26, 0xa2 },
499 { 0x27, 0xea },
500 { 0x28, 0x20 },
501 { 0x29, 0x00 },
502 { 0x2a, 0x10 },
503 { 0x2b, 0x00 },
504 { 0x2c, 0x88 },
505 { 0x2d, 0x91 },
506 { 0x2e, 0x80 },
507 { 0x2f, 0x44 },
508 { 0x60, 0x27 },
509 { 0x61, 0x02 },
510 { 0x62, 0x5f },
511 { 0x63, 0xd5 },
512 { 0x64, 0x57 },
513 { 0x65, 0x83 },
514 { 0x66, 0x55 },
515 { 0x67, 0x92 },
516 { 0x68, 0xcf },
517 { 0x69, 0x76 },
518 { 0x6a, 0x22 },
519 { 0x6b, 0x00 },
520 { 0x6c, 0x02 },
521 { 0x6d, 0x44 },
522 { 0x6e, 0x80 },
523 { 0x6f, 0x1d },
524 { 0x70, 0x8b },
525 { 0x71, 0x00 },
526 { 0x72, 0x14 },
527 { 0x73, 0x54 },
528 { 0x74, 0x00 },
529 { 0x75, 0x8e },
530 { 0x76, 0x00 },
531 { 0x77, 0xff },
532 { 0x78, 0x80 },
533 { 0x79, 0x80 },
534 { 0x7a, 0x80 },
535 { 0x7b, 0xe2 },
536 { 0x7c, 0x00 },
537 };
538
539 /* 7640 and 7648. The defaults should be OK for most registers. */
540 static const struct ov_i2c_regvals norm_7640[] = {
541 { 0x12, 0x80 },
542 { 0x12, 0x14 },
543 };
544
545 /* 7670. Defaults taken from OmniVision provided data,
546 * as provided by Jonathan Corbet of OLPC */
547 static const struct ov_i2c_regvals norm_7670[] = {
548 { OV7670_REG_COM7, OV7670_COM7_RESET },
549 { OV7670_REG_TSLB, 0x04 }, /* OV */
550 { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
551 { OV7670_REG_CLKRC, 0x01 },
552 /*
553 * Set the hardware window. These values from OV don't entirely
554 * make sense - hstop is less than hstart. But they work...
555 */
556 { OV7670_REG_HSTART, 0x13 },
557 { OV7670_REG_HSTOP, 0x01 },
558 { OV7670_REG_HREF, 0xb6 },
559 { OV7670_REG_VSTART, 0x02 },
560 { OV7670_REG_VSTOP, 0x7a },
561 { OV7670_REG_VREF, 0x0a },
562
563 { OV7670_REG_COM3, 0 },
564 { OV7670_REG_COM14, 0 },
565 /* Mystery scaling numbers */
566 { 0x70, 0x3a },
567 { 0x71, 0x35 },
568 { 0x72, 0x11 },
569 { 0x73, 0xf0 },
570 { 0xa2, 0x02 },
571 /* { OV7670_REG_COM10, 0x0 }, */
572
573 /* Gamma curve values */
574 { 0x7a, 0x20 },
575 { 0x7b, 0x10 },
576 { 0x7c, 0x1e },
577 { 0x7d, 0x35 },
578 { 0x7e, 0x5a },
579 { 0x7f, 0x69 },
580 { 0x80, 0x76 },
581 { 0x81, 0x80 },
582 { 0x82, 0x88 },
583 { 0x83, 0x8f },
584 { 0x84, 0x96 },
585 { 0x85, 0xa3 },
586 { 0x86, 0xaf },
587 { 0x87, 0xc4 },
588 { 0x88, 0xd7 },
589 { 0x89, 0xe8 },
590
591 /* AGC and AEC parameters. Note we start by disabling those features,
592 then turn them only after tweaking the values. */
593 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
594 | OV7670_COM8_AECSTEP
595 | OV7670_COM8_BFILT },
596 { OV7670_REG_GAIN, 0 },
597 { OV7670_REG_AECH, 0 },
598 { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
599 { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
600 { OV7670_REG_BD50MAX, 0x05 },
601 { OV7670_REG_BD60MAX, 0x07 },
602 { OV7670_REG_AEW, 0x95 },
603 { OV7670_REG_AEB, 0x33 },
604 { OV7670_REG_VPT, 0xe3 },
605 { OV7670_REG_HAECC1, 0x78 },
606 { OV7670_REG_HAECC2, 0x68 },
607 { 0xa1, 0x03 }, /* magic */
608 { OV7670_REG_HAECC3, 0xd8 },
609 { OV7670_REG_HAECC4, 0xd8 },
610 { OV7670_REG_HAECC5, 0xf0 },
611 { OV7670_REG_HAECC6, 0x90 },
612 { OV7670_REG_HAECC7, 0x94 },
613 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
614 | OV7670_COM8_AECSTEP
615 | OV7670_COM8_BFILT
616 | OV7670_COM8_AGC
617 | OV7670_COM8_AEC },
618
619 /* Almost all of these are magic "reserved" values. */
620 { OV7670_REG_COM5, 0x61 },
621 { OV7670_REG_COM6, 0x4b },
622 { 0x16, 0x02 },
623 { OV7670_REG_MVFP, 0x07 },
624 { 0x21, 0x02 },
625 { 0x22, 0x91 },
626 { 0x29, 0x07 },
627 { 0x33, 0x0b },
628 { 0x35, 0x0b },
629 { 0x37, 0x1d },
630 { 0x38, 0x71 },
631 { 0x39, 0x2a },
632 { OV7670_REG_COM12, 0x78 },
633 { 0x4d, 0x40 },
634 { 0x4e, 0x20 },
635 { OV7670_REG_GFIX, 0 },
636 { 0x6b, 0x4a },
637 { 0x74, 0x10 },
638 { 0x8d, 0x4f },
639 { 0x8e, 0 },
640 { 0x8f, 0 },
641 { 0x90, 0 },
642 { 0x91, 0 },
643 { 0x96, 0 },
644 { 0x9a, 0 },
645 { 0xb0, 0x84 },
646 { 0xb1, 0x0c },
647 { 0xb2, 0x0e },
648 { 0xb3, 0x82 },
649 { 0xb8, 0x0a },
650
651 /* More reserved magic, some of which tweaks white balance */
652 { 0x43, 0x0a },
653 { 0x44, 0xf0 },
654 { 0x45, 0x34 },
655 { 0x46, 0x58 },
656 { 0x47, 0x28 },
657 { 0x48, 0x3a },
658 { 0x59, 0x88 },
659 { 0x5a, 0x88 },
660 { 0x5b, 0x44 },
661 { 0x5c, 0x67 },
662 { 0x5d, 0x49 },
663 { 0x5e, 0x0e },
664 { 0x6c, 0x0a },
665 { 0x6d, 0x55 },
666 { 0x6e, 0x11 },
667 { 0x6f, 0x9f },
668 /* "9e for advance AWB" */
669 { 0x6a, 0x40 },
670 { OV7670_REG_BLUE, 0x40 },
671 { OV7670_REG_RED, 0x60 },
672 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
673 | OV7670_COM8_AECSTEP
674 | OV7670_COM8_BFILT
675 | OV7670_COM8_AGC
676 | OV7670_COM8_AEC
677 | OV7670_COM8_AWB },
678
679 /* Matrix coefficients */
680 { 0x4f, 0x80 },
681 { 0x50, 0x80 },
682 { 0x51, 0 },
683 { 0x52, 0x22 },
684 { 0x53, 0x5e },
685 { 0x54, 0x80 },
686 { 0x58, 0x9e },
687
688 { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
689 { OV7670_REG_EDGE, 0 },
690 { 0x75, 0x05 },
691 { 0x76, 0xe1 },
692 { 0x4c, 0 },
693 { 0x77, 0x01 },
694 { OV7670_REG_COM13, OV7670_COM13_GAMMA
695 | OV7670_COM13_UVSAT
696 | 2}, /* was 3 */
697 { 0x4b, 0x09 },
698 { 0xc9, 0x60 },
699 { OV7670_REG_COM16, 0x38 },
700 { 0x56, 0x40 },
701
702 { 0x34, 0x11 },
703 { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
704 { 0xa4, 0x88 },
705 { 0x96, 0 },
706 { 0x97, 0x30 },
707 { 0x98, 0x20 },
708 { 0x99, 0x30 },
709 { 0x9a, 0x84 },
710 { 0x9b, 0x29 },
711 { 0x9c, 0x03 },
712 { 0x9d, 0x4c },
713 { 0x9e, 0x3f },
714 { 0x78, 0x04 },
715
716 /* Extra-weird stuff. Some sort of multiplexor register */
717 { 0x79, 0x01 },
718 { 0xc8, 0xf0 },
719 { 0x79, 0x0f },
720 { 0xc8, 0x00 },
721 { 0x79, 0x10 },
722 { 0xc8, 0x7e },
723 { 0x79, 0x0a },
724 { 0xc8, 0x80 },
725 { 0x79, 0x0b },
726 { 0xc8, 0x01 },
727 { 0x79, 0x0c },
728 { 0xc8, 0x0f },
729 { 0x79, 0x0d },
730 { 0xc8, 0x20 },
731 { 0x79, 0x09 },
732 { 0xc8, 0x80 },
733 { 0x79, 0x02 },
734 { 0xc8, 0xc0 },
735 { 0x79, 0x03 },
736 { 0xc8, 0x40 },
737 { 0x79, 0x05 },
738 { 0xc8, 0x30 },
739 { 0x79, 0x26 },
740 };
741
742 static const struct ov_i2c_regvals norm_8610[] = {
743 { 0x12, 0x80 },
744 { 0x00, 0x00 },
745 { 0x01, 0x80 },
746 { 0x02, 0x80 },
747 { 0x03, 0xc0 },
748 { 0x04, 0x30 },
749 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
750 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
751 { 0x0a, 0x86 },
752 { 0x0b, 0xb0 },
753 { 0x0c, 0x20 },
754 { 0x0d, 0x20 },
755 { 0x11, 0x01 },
756 { 0x12, 0x25 },
757 { 0x13, 0x01 },
758 { 0x14, 0x04 },
759 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
760 { 0x16, 0x03 },
761 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
762 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
763 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
764 { 0x1a, 0xf5 },
765 { 0x1b, 0x00 },
766 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
767 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
768 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
769 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
770 { 0x26, 0xa2 },
771 { 0x27, 0xea },
772 { 0x28, 0x00 },
773 { 0x29, 0x00 },
774 { 0x2a, 0x80 },
775 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
776 { 0x2c, 0xac },
777 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
778 { 0x2e, 0x80 },
779 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
780 { 0x4c, 0x00 },
781 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
782 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
783 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
784 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
785 { 0x63, 0xff },
786 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
787 * maybe thats wrong */
788 { 0x65, 0x00 },
789 { 0x66, 0x55 },
790 { 0x67, 0xb0 },
791 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
792 { 0x69, 0x02 },
793 { 0x6a, 0x22 },
794 { 0x6b, 0x00 },
795 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
796 * deleting bit7 colors the first images red */
797 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
798 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
799 { 0x6f, 0x01 },
800 { 0x70, 0x8b },
801 { 0x71, 0x00 },
802 { 0x72, 0x14 },
803 { 0x73, 0x54 },
804 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
805 { 0x75, 0x0e },
806 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
807 { 0x77, 0xff },
808 { 0x78, 0x80 },
809 { 0x79, 0x80 },
810 { 0x7a, 0x80 },
811 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
812 { 0x7c, 0x00 },
813 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
814 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
815 { 0x7f, 0xfb },
816 { 0x80, 0x28 },
817 { 0x81, 0x00 },
818 { 0x82, 0x23 },
819 { 0x83, 0x0b },
820 { 0x84, 0x00 },
821 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
822 { 0x86, 0xc9 },
823 { 0x87, 0x00 },
824 { 0x88, 0x00 },
825 { 0x89, 0x01 },
826 { 0x12, 0x20 },
827 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
828 };
829
830 static unsigned char ov7670_abs_to_sm(unsigned char v)
831 {
832 if (v > 127)
833 return v & 0x7f;
834 return (128 - v) | 0x80;
835 }
836
837 /* Write a OV519 register */
838 static int reg_w(struct sd *sd, __u16 index, __u8 value)
839 {
840 int ret;
841
842 sd->gspca_dev.usb_buf[0] = value;
843 ret = usb_control_msg(sd->gspca_dev.dev,
844 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
845 1, /* REQ_IO (ov518/519) */
846 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
847 0, index,
848 sd->gspca_dev.usb_buf, 1, 500);
849 if (ret < 0)
850 PDEBUG(D_ERR, "Write reg [%02x] %02x failed", index, value);
851 return ret;
852 }
853
854 /* Read from a OV519 register */
855 /* returns: negative is error, pos or zero is data */
856 static int reg_r(struct sd *sd, __u16 index)
857 {
858 int ret;
859
860 ret = usb_control_msg(sd->gspca_dev.dev,
861 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
862 1, /* REQ_IO */
863 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
864 0, index, sd->gspca_dev.usb_buf, 1, 500);
865
866 if (ret >= 0)
867 ret = sd->gspca_dev.usb_buf[0];
868 else
869 PDEBUG(D_ERR, "Read reg [0x%02x] failed", index);
870 return ret;
871 }
872
873 /* Read 8 values from a OV519 register */
874 static int reg_r8(struct sd *sd,
875 __u16 index)
876 {
877 int ret;
878
879 ret = usb_control_msg(sd->gspca_dev.dev,
880 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
881 1, /* REQ_IO */
882 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
883 0, index, sd->gspca_dev.usb_buf, 8, 500);
884
885 if (ret >= 0)
886 ret = sd->gspca_dev.usb_buf[0];
887 else
888 PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index);
889 return ret;
890 }
891
892 /*
893 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
894 * the same position as 1's in "mask" are cleared and set to "value". Bits
895 * that are in the same position as 0's in "mask" are preserved, regardless
896 * of their respective state in "value".
897 */
898 static int reg_w_mask(struct sd *sd,
899 __u16 index,
900 __u8 value,
901 __u8 mask)
902 {
903 int ret;
904 __u8 oldval;
905
906 if (mask != 0xff) {
907 value &= mask; /* Enforce mask on value */
908 ret = reg_r(sd, index);
909 if (ret < 0)
910 return ret;
911
912 oldval = ret & ~mask; /* Clear the masked bits */
913 value |= oldval; /* Set the desired bits */
914 }
915 return reg_w(sd, index, value);
916 }
917
918 /*
919 * The OV518 I2C I/O procedure is different, hence, this function.
920 * This is normally only called from i2c_w(). Note that this function
921 * always succeeds regardless of whether the sensor is present and working.
922 */
923 static int i2c_w(struct sd *sd,
924 __u8 reg,
925 __u8 value)
926 {
927 int rc;
928
929 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
930
931 /* Select camera register */
932 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
933 if (rc < 0)
934 return rc;
935
936 /* Write "value" to I2C data port of OV511 */
937 rc = reg_w(sd, R51x_I2C_DATA, value);
938 if (rc < 0)
939 return rc;
940
941 /* Initiate 3-byte write cycle */
942 rc = reg_w(sd, R518_I2C_CTL, 0x01);
943
944 /* wait for write complete */
945 msleep(4);
946 if (rc < 0)
947 return rc;
948 return reg_r8(sd, R518_I2C_CTL);
949 }
950
951 /*
952 * returns: negative is error, pos or zero is data
953 *
954 * The OV518 I2C I/O procedure is different, hence, this function.
955 * This is normally only called from i2c_r(). Note that this function
956 * always succeeds regardless of whether the sensor is present and working.
957 */
958 static int i2c_r(struct sd *sd, __u8 reg)
959 {
960 int rc, value;
961
962 /* Select camera register */
963 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
964 if (rc < 0)
965 return rc;
966
967 /* Initiate 2-byte write cycle */
968 rc = reg_w(sd, R518_I2C_CTL, 0x03);
969 if (rc < 0)
970 return rc;
971
972 /* Initiate 2-byte read cycle */
973 rc = reg_w(sd, R518_I2C_CTL, 0x05);
974 if (rc < 0)
975 return rc;
976 value = reg_r(sd, R51x_I2C_DATA);
977 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
978 return value;
979 }
980
981 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
982 * the same position as 1's in "mask" are cleared and set to "value". Bits
983 * that are in the same position as 0's in "mask" are preserved, regardless
984 * of their respective state in "value".
985 */
986 static int i2c_w_mask(struct sd *sd,
987 __u8 reg,
988 __u8 value,
989 __u8 mask)
990 {
991 int rc;
992 __u8 oldval;
993
994 value &= mask; /* Enforce mask on value */
995 rc = i2c_r(sd, reg);
996 if (rc < 0)
997 return rc;
998 oldval = rc & ~mask; /* Clear the masked bits */
999 value |= oldval; /* Set the desired bits */
1000 return i2c_w(sd, reg, value);
1001 }
1002
1003 /* Temporarily stops OV511 from functioning. Must do this before changing
1004 * registers while the camera is streaming */
1005 static inline int ov51x_stop(struct sd *sd)
1006 {
1007 PDEBUG(D_STREAM, "stopping");
1008 sd->stopped = 1;
1009 return reg_w(sd, OV519_SYS_RESET1, 0x0f);
1010 }
1011
1012 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
1013 * actually stopped (for performance). */
1014 static inline int ov51x_restart(struct sd *sd)
1015 {
1016 PDEBUG(D_STREAM, "restarting");
1017 if (!sd->stopped)
1018 return 0;
1019 sd->stopped = 0;
1020
1021 /* Reinitialize the stream */
1022 return reg_w(sd, OV519_SYS_RESET1, 0x00);
1023 }
1024
1025 /* This does an initial reset of an OmniVision sensor and ensures that I2C
1026 * is synchronized. Returns <0 on failure.
1027 */
1028 static int init_ov_sensor(struct sd *sd)
1029 {
1030 int i, success;
1031
1032 /* Reset the sensor */
1033 if (i2c_w(sd, 0x12, 0x80) < 0)
1034 return -EIO;
1035
1036 /* Wait for it to initialize */
1037 msleep(150);
1038
1039 for (i = 0, success = 0; i < i2c_detect_tries && !success; i++) {
1040 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
1041 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
1042 success = 1;
1043 continue;
1044 }
1045
1046 /* Reset the sensor */
1047 if (i2c_w(sd, 0x12, 0x80) < 0)
1048 return -EIO;
1049 /* Wait for it to initialize */
1050 msleep(150);
1051 /* Dummy read to sync I2C */
1052 if (i2c_r(sd, 0x00) < 0)
1053 return -EIO;
1054 }
1055 if (!success)
1056 return -EIO;
1057 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
1058 return 0;
1059 }
1060
1061 /* Set the read and write slave IDs. The "slave" argument is the write slave,
1062 * and the read slave will be set to (slave + 1).
1063 * This should not be called from outside the i2c I/O functions.
1064 * Sets I2C read and write slave IDs. Returns <0 for error
1065 */
1066 static int ov51x_set_slave_ids(struct sd *sd,
1067 __u8 slave)
1068 {
1069 int rc;
1070
1071 rc = reg_w(sd, R51x_I2C_W_SID, slave);
1072 if (rc < 0)
1073 return rc;
1074 sd->primary_i2c_slave = slave;
1075 return reg_w(sd, R51x_I2C_R_SID, slave + 1);
1076 }
1077
1078 static int write_regvals(struct sd *sd,
1079 const struct ov_regvals *regvals,
1080 int n)
1081 {
1082 int rc;
1083
1084 while (--n >= 0) {
1085 rc = reg_w(sd, regvals->reg, regvals->val);
1086 if (rc < 0)
1087 return rc;
1088 regvals++;
1089 }
1090 return 0;
1091 }
1092
1093 static int write_i2c_regvals(struct sd *sd,
1094 const struct ov_i2c_regvals *regvals,
1095 int n)
1096 {
1097 int rc;
1098
1099 while (--n >= 0) {
1100 rc = i2c_w(sd, regvals->reg, regvals->val);
1101 if (rc < 0)
1102 return rc;
1103 regvals++;
1104 }
1105 return 0;
1106 }
1107
1108 /****************************************************************************
1109 *
1110 * OV511 and sensor configuration
1111 *
1112 ***************************************************************************/
1113
1114 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
1115 * the same register settings as the OV8610, since they are very similar.
1116 */
1117 static int ov8xx0_configure(struct sd *sd)
1118 {
1119 int rc;
1120
1121 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
1122
1123 /* Detect sensor (sub)type */
1124 rc = i2c_r(sd, OV7610_REG_COM_I);
1125 if (rc < 0) {
1126 PDEBUG(D_ERR, "Error detecting sensor type");
1127 return -1;
1128 }
1129 if ((rc & 3) == 1) {
1130 sd->sensor = SEN_OV8610;
1131 } else {
1132 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
1133 return -1;
1134 }
1135
1136 /* Set sensor-specific vars */
1137 /* sd->sif = 0; already done */
1138 return 0;
1139 }
1140
1141 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
1142 * the same register settings as the OV7610, since they are very similar.
1143 */
1144 static int ov7xx0_configure(struct sd *sd)
1145 {
1146 int rc, high, low;
1147
1148
1149 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
1150
1151 /* Detect sensor (sub)type */
1152 rc = i2c_r(sd, OV7610_REG_COM_I);
1153
1154 /* add OV7670 here
1155 * it appears to be wrongly detected as a 7610 by default */
1156 if (rc < 0) {
1157 PDEBUG(D_ERR, "Error detecting sensor type");
1158 return -1;
1159 }
1160 if ((rc & 3) == 3) {
1161 /* quick hack to make OV7670s work */
1162 high = i2c_r(sd, 0x0a);
1163 low = i2c_r(sd, 0x0b);
1164 /* info("%x, %x", high, low); */
1165 if (high == 0x76 && low == 0x73) {
1166 PDEBUG(D_PROBE, "Sensor is an OV7670");
1167 sd->sensor = SEN_OV7670;
1168 } else {
1169 PDEBUG(D_PROBE, "Sensor is an OV7610");
1170 sd->sensor = SEN_OV7610;
1171 }
1172 } else if ((rc & 3) == 1) {
1173 /* I don't know what's different about the 76BE yet. */
1174 if (i2c_r(sd, 0x15) & 1)
1175 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
1176 else
1177 PDEBUG(D_PROBE, "Sensor is an OV76BE");
1178
1179 /* OV511+ will return all zero isoc data unless we
1180 * configure the sensor as a 7620. Someone needs to
1181 * find the exact reg. setting that causes this. */
1182 sd->sensor = SEN_OV76BE;
1183 } else if ((rc & 3) == 0) {
1184 /* try to read product id registers */
1185 high = i2c_r(sd, 0x0a);
1186 if (high < 0) {
1187 PDEBUG(D_ERR, "Error detecting camera chip PID");
1188 return high;
1189 }
1190 low = i2c_r(sd, 0x0b);
1191 if (low < 0) {
1192 PDEBUG(D_ERR, "Error detecting camera chip VER");
1193 return low;
1194 }
1195 if (high == 0x76) {
1196 switch (low) {
1197 case 0x30:
1198 PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635");
1199 PDEBUG(D_ERR,
1200 "7630 is not supported by this driver");
1201 return -1;
1202 case 0x40:
1203 PDEBUG(D_PROBE, "Sensor is an OV7645");
1204 sd->sensor = SEN_OV7640; /* FIXME */
1205 break;
1206 case 0x45:
1207 PDEBUG(D_PROBE, "Sensor is an OV7645B");
1208 sd->sensor = SEN_OV7640; /* FIXME */
1209 break;
1210 case 0x48:
1211 PDEBUG(D_PROBE, "Sensor is an OV7648");
1212 sd->sensor = SEN_OV7640; /* FIXME */
1213 break;
1214 default:
1215 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
1216 return -1;
1217 }
1218 } else {
1219 PDEBUG(D_PROBE, "Sensor is an OV7620");
1220 sd->sensor = SEN_OV7620;
1221 }
1222 } else {
1223 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
1224 return -1;
1225 }
1226
1227 /* Set sensor-specific vars */
1228 /* sd->sif = 0; already done */
1229 return 0;
1230 }
1231
1232 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
1233 static int ov6xx0_configure(struct sd *sd)
1234 {
1235 int rc;
1236 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
1237
1238 /* Detect sensor (sub)type */
1239 rc = i2c_r(sd, OV7610_REG_COM_I);
1240 if (rc < 0) {
1241 PDEBUG(D_ERR, "Error detecting sensor type");
1242 return -1;
1243 }
1244
1245 /* Ugh. The first two bits are the version bits, but
1246 * the entire register value must be used. I guess OVT
1247 * underestimated how many variants they would make. */
1248 switch (rc) {
1249 case 0x00:
1250 sd->sensor = SEN_OV6630;
1251 PDEBUG(D_ERR,
1252 "WARNING: Sensor is an OV66308. Your camera may have");
1253 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
1254 break;
1255 case 0x01:
1256 sd->sensor = SEN_OV6620;
1257 break;
1258 case 0x02:
1259 sd->sensor = SEN_OV6630;
1260 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
1261 break;
1262 case 0x03:
1263 sd->sensor = SEN_OV6630;
1264 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
1265 break;
1266 case 0x90:
1267 sd->sensor = SEN_OV6630;
1268 PDEBUG(D_ERR,
1269 "WARNING: Sensor is an OV66307. Your camera may have");
1270 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
1271 break;
1272 default:
1273 PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc);
1274 return -1;
1275 }
1276
1277 /* Set sensor-specific vars */
1278 sd->sif = 1;
1279
1280 return 0;
1281 }
1282
1283 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
1284 static void ov51x_led_control(struct sd *sd, int on)
1285 {
1286 /* PDEBUG(D_STREAM, "LED (%s)", on ? "on" : "off"); */
1287 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
1288 }
1289
1290 /* this function is called at probe time */
1291 static int sd_config(struct gspca_dev *gspca_dev,
1292 const struct usb_device_id *id)
1293 {
1294 struct sd *sd = (struct sd *) gspca_dev;
1295 struct cam *cam;
1296
1297 static const struct ov_regvals init_519[] = {
1298 { 0x5a, 0x6d }, /* EnableSystem */
1299 { 0x53, 0x9b },
1300 { 0x54, 0xff }, /* set bit2 to enable jpeg */
1301 { 0x5d, 0x03 },
1302 { 0x49, 0x01 },
1303 { 0x48, 0x00 },
1304 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
1305 * detection will fail. This deserves further investigation. */
1306 { OV519_GPIO_IO_CTRL0, 0xee },
1307 { 0x51, 0x0f }, /* SetUsbInit */
1308 { 0x51, 0x00 },
1309 { 0x22, 0x00 },
1310 /* windows reads 0x55 at this point*/
1311 };
1312
1313 if (write_regvals(sd, init_519, ARRAY_SIZE(init_519)))
1314 goto error;
1315 ov51x_led_control(sd, 0); /* turn LED off */
1316
1317 /* Test for 76xx */
1318 if (ov51x_set_slave_ids(sd, OV7xx0_SID) < 0)
1319 goto error;
1320
1321 /* The OV519 must be more aggressive about sensor detection since
1322 * I2C write will never fail if the sensor is not present. We have
1323 * to try to initialize the sensor to detect its presence */
1324 if (init_ov_sensor(sd) >= 0) {
1325 if (ov7xx0_configure(sd) < 0) {
1326 PDEBUG(D_ERR, "Failed to configure OV7xx0");
1327 goto error;
1328 }
1329 } else {
1330
1331 /* Test for 6xx0 */
1332 if (ov51x_set_slave_ids(sd, OV6xx0_SID) < 0)
1333 goto error;
1334
1335 if (init_ov_sensor(sd) >= 0) {
1336 if (ov6xx0_configure(sd) < 0) {
1337 PDEBUG(D_ERR, "Failed to configure OV6xx0");
1338 goto error;
1339 }
1340 } else {
1341
1342 /* Test for 8xx0 */
1343 if (ov51x_set_slave_ids(sd, OV8xx0_SID) < 0)
1344 goto error;
1345
1346 if (init_ov_sensor(sd) < 0) {
1347 PDEBUG(D_ERR,
1348 "Can't determine sensor slave IDs");
1349 goto error;
1350 }
1351 if (ov8xx0_configure(sd) < 0) {
1352 PDEBUG(D_ERR,
1353 "Failed to configure OV8xx0 sensor");
1354 goto error;
1355 }
1356 }
1357 }
1358
1359 cam = &gspca_dev->cam;
1360 cam->epaddr = OV511_ENDPOINT_ADDRESS;
1361 if (!sd->sif) {
1362 cam->cam_mode = vga_mode;
1363 cam->nmodes = ARRAY_SIZE(vga_mode);
1364 } else {
1365 cam->cam_mode = sif_mode;
1366 cam->nmodes = ARRAY_SIZE(sif_mode);
1367 }
1368 sd->brightness = BRIGHTNESS_DEF;
1369 sd->contrast = CONTRAST_DEF;
1370 sd->colors = COLOR_DEF;
1371 sd->hflip = HFLIP_DEF;
1372 sd->vflip = VFLIP_DEF;
1373 return 0;
1374 error:
1375 PDEBUG(D_ERR, "OV519 Config failed");
1376 return -EBUSY;
1377 }
1378
1379 /* this function is called at open time */
1380 static int sd_open(struct gspca_dev *gspca_dev)
1381 {
1382 struct sd *sd = (struct sd *) gspca_dev;
1383
1384 /* initialize the sensor */
1385 switch (sd->sensor) {
1386 case SEN_OV6620:
1387 if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
1388 return -EIO;
1389 break;
1390 case SEN_OV6630:
1391 if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
1392 return -EIO;
1393 break;
1394 default:
1395 /* case SEN_OV7610: */
1396 /* case SEN_OV76BE: */
1397 if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
1398 return -EIO;
1399 break;
1400 case SEN_OV7620:
1401 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
1402 return -EIO;
1403 break;
1404 case SEN_OV7640:
1405 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
1406 return -EIO;
1407 break;
1408 case SEN_OV7670:
1409 if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
1410 return -EIO;
1411 break;
1412 case SEN_OV8610:
1413 if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
1414 return -EIO;
1415 break;
1416 }
1417 return 0;
1418 }
1419
1420 /* Sets up the OV519 with the given image parameters
1421 *
1422 * OV519 needs a completely different approach, until we can figure out what
1423 * the individual registers do.
1424 *
1425 * Do not put any sensor-specific code in here (including I2C I/O functions)
1426 */
1427 static int ov519_mode_init_regs(struct sd *sd)
1428 {
1429 static const struct ov_regvals mode_init_519_ov7670[] = {
1430 { 0x5d, 0x03 }, /* Turn off suspend mode */
1431 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
1432 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1433 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1434 { 0xa3, 0x18 },
1435 { 0xa4, 0x04 },
1436 { 0xa5, 0x28 },
1437 { 0x37, 0x00 }, /* SetUsbInit */
1438 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1439 /* Enable both fields, YUV Input, disable defect comp (why?) */
1440 { 0x20, 0x0c },
1441 { 0x21, 0x38 },
1442 { 0x22, 0x1d },
1443 { 0x17, 0x50 }, /* undocumented */
1444 { 0x37, 0x00 }, /* undocumented */
1445 { 0x40, 0xff }, /* I2C timeout counter */
1446 { 0x46, 0x00 }, /* I2C clock prescaler */
1447 { 0x59, 0x04 }, /* new from windrv 090403 */
1448 { 0xff, 0x00 }, /* undocumented */
1449 /* windows reads 0x55 at this point, why? */
1450 };
1451
1452 static const struct ov_regvals mode_init_519[] = {
1453 { 0x5d, 0x03 }, /* Turn off suspend mode */
1454 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
1455 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1456 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1457 { 0xa3, 0x18 },
1458 { 0xa4, 0x04 },
1459 { 0xa5, 0x28 },
1460 { 0x37, 0x00 }, /* SetUsbInit */
1461 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1462 /* Enable both fields, YUV Input, disable defect comp (why?) */
1463 { 0x22, 0x1d },
1464 { 0x17, 0x50 }, /* undocumented */
1465 { 0x37, 0x00 }, /* undocumented */
1466 { 0x40, 0xff }, /* I2C timeout counter */
1467 { 0x46, 0x00 }, /* I2C clock prescaler */
1468 { 0x59, 0x04 }, /* new from windrv 090403 */
1469 { 0xff, 0x00 }, /* undocumented */
1470 /* windows reads 0x55 at this point, why? */
1471 };
1472
1473 /******** Set the mode ********/
1474 if (sd->sensor != SEN_OV7670) {
1475 if (write_regvals(sd, mode_init_519,
1476 ARRAY_SIZE(mode_init_519)))
1477 return -EIO;
1478 if (sd->sensor == SEN_OV7640) {
1479 /* Select 8-bit input mode */
1480 reg_w_mask(sd, OV519_CAM_DFR, 0x10, 0x10);
1481 }
1482 } else {
1483 if (write_regvals(sd, mode_init_519_ov7670,
1484 ARRAY_SIZE(mode_init_519_ov7670)))
1485 return -EIO;
1486 }
1487
1488 reg_w(sd, OV519_CAM_H_SIZE, sd->gspca_dev.width >> 4);
1489 reg_w(sd, OV519_CAM_V_SIZE, sd->gspca_dev.height >> 3);
1490 reg_w(sd, OV519_CAM_X_OFFSETL, 0x00);
1491 reg_w(sd, OV519_CAM_X_OFFSETH, 0x00);
1492 reg_w(sd, OV519_CAM_Y_OFFSETL, 0x00);
1493 reg_w(sd, OV519_CAM_Y_OFFSETH, 0x00);
1494 reg_w(sd, OV519_CAM_DIVIDER, 0x00);
1495 reg_w(sd, OV519_CAM_FORMAT, 0x03); /* YUV422 */
1496 reg_w(sd, 0x26, 0x00); /* Undocumented */
1497
1498 /******** Set the framerate ********/
1499 if (frame_rate > 0)
1500 sd->frame_rate = frame_rate;
1501
1502 /* FIXME: These are only valid at the max resolution. */
1503 sd->clockdiv = 0;
1504 switch (sd->sensor) {
1505 case SEN_OV7640:
1506 switch (sd->frame_rate) {
1507 /*fixme: default was 30 fps */
1508 case 30:
1509 reg_w(sd, 0xa4, 0x0c);
1510 reg_w(sd, 0x23, 0xff);
1511 break;
1512 case 25:
1513 reg_w(sd, 0xa4, 0x0c);
1514 reg_w(sd, 0x23, 0x1f);
1515 break;
1516 case 20:
1517 reg_w(sd, 0xa4, 0x0c);
1518 reg_w(sd, 0x23, 0x1b);
1519 break;
1520 default:
1521 /* case 15: */
1522 reg_w(sd, 0xa4, 0x04);
1523 reg_w(sd, 0x23, 0xff);
1524 sd->clockdiv = 1;
1525 break;
1526 case 10:
1527 reg_w(sd, 0xa4, 0x04);
1528 reg_w(sd, 0x23, 0x1f);
1529 sd->clockdiv = 1;
1530 break;
1531 case 5:
1532 reg_w(sd, 0xa4, 0x04);
1533 reg_w(sd, 0x23, 0x1b);
1534 sd->clockdiv = 1;
1535 break;
1536 }
1537 break;
1538 case SEN_OV8610:
1539 switch (sd->frame_rate) {
1540 default: /* 15 fps */
1541 /* case 15: */
1542 reg_w(sd, 0xa4, 0x06);
1543 reg_w(sd, 0x23, 0xff);
1544 break;
1545 case 10:
1546 reg_w(sd, 0xa4, 0x06);
1547 reg_w(sd, 0x23, 0x1f);
1548 break;
1549 case 5:
1550 reg_w(sd, 0xa4, 0x06);
1551 reg_w(sd, 0x23, 0x1b);
1552 break;
1553 }
1554 break;
1555 case SEN_OV7670: /* guesses, based on 7640 */
1556 PDEBUG(D_STREAM, "Setting framerate to %d fps",
1557 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
1558 reg_w(sd, 0xa4, 0x10);
1559 switch (sd->frame_rate) {
1560 case 30:
1561 reg_w(sd, 0x23, 0xff);
1562 break;
1563 case 20:
1564 reg_w(sd, 0x23, 0x1b);
1565 break;
1566 default:
1567 /* case 15: */
1568 reg_w(sd, 0x23, 0xff);
1569 sd->clockdiv = 1;
1570 break;
1571 }
1572 break;
1573 }
1574
1575 return 0;
1576 }
1577
1578 static int mode_init_ov_sensor_regs(struct sd *sd)
1579 {
1580 struct gspca_dev *gspca_dev;
1581 int qvga;
1582
1583 gspca_dev = &sd->gspca_dev;
1584 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv;
1585
1586 /******** Mode (VGA/QVGA) and sensor specific regs ********/
1587 switch (sd->sensor) {
1588 case SEN_OV8610:
1589 /* For OV8610 qvga means qsvga */
1590 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
1591 break;
1592 case SEN_OV7610:
1593 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
1594 break;
1595 case SEN_OV7620:
1596 /* i2c_w(sd, 0x2b, 0x00); */
1597 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
1598 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
1599 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
1600 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
1601 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
1602 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
1603 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
1604 break;
1605 case SEN_OV76BE:
1606 /* i2c_w(sd, 0x2b, 0x00); */
1607 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
1608 break;
1609 case SEN_OV7640:
1610 /* i2c_w(sd, 0x2b, 0x00); */
1611 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
1612 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
1613 /* i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); */
1614 /* i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); */
1615 /* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */
1616 /* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */
1617 /* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */
1618 break;
1619 case SEN_OV7670:
1620 /* set COM7_FMT_VGA or COM7_FMT_QVGA
1621 * do we need to set anything else?
1622 * HSTART etc are set in set_ov_sensor_window itself */
1623 i2c_w_mask(sd, OV7670_REG_COM7,
1624 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
1625 OV7670_COM7_FMT_MASK);
1626 break;
1627 case SEN_OV6620:
1628 case SEN_OV6630:
1629 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
1630 break;
1631 default:
1632 return -EINVAL;
1633 }
1634
1635 /******** Palette-specific regs ********/
1636 if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
1637 /* not valid on the OV6620/OV7620/6630? */
1638 i2c_w_mask(sd, 0x0e, 0x00, 0x40);
1639 }
1640
1641 /* The OV518 needs special treatment. Although both the OV518
1642 * and the OV6630 support a 16-bit video bus, only the 8 bit Y
1643 * bus is actually used. The UV bus is tied to ground.
1644 * Therefore, the OV6630 needs to be in 8-bit multiplexed
1645 * output mode */
1646
1647 /* OV7640 is 8-bit only */
1648
1649 if (sd->sensor != SEN_OV6630 && sd->sensor != SEN_OV7640)
1650 i2c_w_mask(sd, 0x13, 0x00, 0x20);
1651
1652 /******** Clock programming ********/
1653 /* The OV6620 needs special handling. This prevents the
1654 * severe banding that normally occurs */
1655 if (sd->sensor == SEN_OV6620) {
1656
1657 /* Clock down */
1658 i2c_w(sd, 0x2a, 0x04);
1659 i2c_w(sd, 0x11, sd->clockdiv);
1660 i2c_w(sd, 0x2a, 0x84);
1661 /* This next setting is critical. It seems to improve
1662 * the gain or the contrast. The "reserved" bits seem
1663 * to have some effect in this case. */
1664 i2c_w(sd, 0x2d, 0x85);
1665 } else if (sd->clockdiv >= 0) {
1666 i2c_w(sd, 0x11, sd->clockdiv);
1667 }
1668
1669 /******** Special Features ********/
1670 /* no evidence this is possible with OV7670, either */
1671 /* Test Pattern */
1672 if (sd->sensor != SEN_OV7640 && sd->sensor != SEN_OV7670)
1673 i2c_w_mask(sd, 0x12, 0x00, 0x02);
1674
1675 /* Enable auto white balance */
1676 if (sd->sensor == SEN_OV7670)
1677 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
1678 OV7670_COM8_AWB);
1679 else
1680 i2c_w_mask(sd, 0x12, 0x04, 0x04);
1681
1682 /* This will go away as soon as ov51x_mode_init_sensor_regs() */
1683 /* is fully tested. */
1684 /* 7620/6620/6630? don't have register 0x35, so play it safe */
1685 if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
1686 if (!qvga)
1687 i2c_w(sd, 0x35, 0x9e);
1688 else
1689 i2c_w(sd, 0x35, 0x1e);
1690 }
1691 return 0;
1692 }
1693
1694 static void sethvflip(struct sd *sd)
1695 {
1696 if (sd->sensor != SEN_OV7670)
1697 return;
1698 if (sd->gspca_dev.streaming)
1699 ov51x_stop(sd);
1700 i2c_w_mask(sd, OV7670_REG_MVFP,
1701 OV7670_MVFP_MIRROR * sd->hflip
1702 | OV7670_MVFP_VFLIP * sd->vflip,
1703 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
1704 if (sd->gspca_dev.streaming)
1705 ov51x_restart(sd);
1706 }
1707
1708 static int set_ov_sensor_window(struct sd *sd)
1709 {
1710 struct gspca_dev *gspca_dev;
1711 int qvga;
1712 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
1713 int ret, hstart, hstop, vstop, vstart;
1714 __u8 v;
1715
1716 gspca_dev = &sd->gspca_dev;
1717 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv;
1718
1719 /* The different sensor ICs handle setting up of window differently.
1720 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
1721 switch (sd->sensor) {
1722 case SEN_OV8610:
1723 hwsbase = 0x1e;
1724 hwebase = 0x1e;
1725 vwsbase = 0x02;
1726 vwebase = 0x02;
1727 break;
1728 case SEN_OV7610:
1729 case SEN_OV76BE:
1730 hwsbase = 0x38;
1731 hwebase = 0x3a;
1732 vwsbase = vwebase = 0x05;
1733 break;
1734 case SEN_OV6620:
1735 case SEN_OV6630:
1736 hwsbase = 0x38;
1737 hwebase = 0x3a;
1738 vwsbase = 0x05;
1739 vwebase = 0x06;
1740 break;
1741 case SEN_OV7620:
1742 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
1743 hwebase = 0x2f;
1744 vwsbase = vwebase = 0x05;
1745 break;
1746 case SEN_OV7640:
1747 hwsbase = 0x1a;
1748 hwebase = 0x1a;
1749 vwsbase = vwebase = 0x03;
1750 break;
1751 case SEN_OV7670:
1752 /*handling of OV7670 hardware sensor start and stop values
1753 * is very odd, compared to the other OV sensors */
1754 vwsbase = vwebase = hwebase = hwsbase = 0x00;
1755 break;
1756 default:
1757 return -EINVAL;
1758 }
1759
1760 switch (sd->sensor) {
1761 case SEN_OV6620:
1762 case SEN_OV6630:
1763 if (qvga) { /* QCIF */
1764 hwscale = 0;
1765 vwscale = 0;
1766 } else { /* CIF */
1767 hwscale = 1;
1768 vwscale = 1; /* The datasheet says 0;
1769 * it's wrong */
1770 }
1771 break;
1772 case SEN_OV8610:
1773 if (qvga) { /* QSVGA */
1774 hwscale = 1;
1775 vwscale = 1;
1776 } else { /* SVGA */
1777 hwscale = 2;
1778 vwscale = 2;
1779 }
1780 break;
1781 default: /* SEN_OV7xx0 */
1782 if (qvga) { /* QVGA */
1783 hwscale = 1;
1784 vwscale = 0;
1785 } else { /* VGA */
1786 hwscale = 2;
1787 vwscale = 1;
1788 }
1789 }
1790
1791 ret = mode_init_ov_sensor_regs(sd);
1792 if (ret < 0)
1793 return ret;
1794
1795 if (sd->sensor == SEN_OV8610) {
1796 i2c_w_mask(sd, 0x2d, 0x05, 0x40);
1797 /* old 0x95, new 0x05 from windrv 090403 */
1798 /* bits 5-7: reserved */
1799 i2c_w_mask(sd, 0x28, 0x20, 0x20);
1800 /* bit 5: progressive mode on */
1801 }
1802
1803 /* The below is wrong for OV7670s because their window registers
1804 * only store the high bits in 0x17 to 0x1a */
1805
1806 /* SRH Use sd->max values instead of requested win values */
1807 /* SCS Since we're sticking with only the max hardware widths
1808 * for a given mode */
1809 /* I can hard code this for OV7670s */
1810 /* Yes, these numbers do look odd, but they're tested and work! */
1811 if (sd->sensor == SEN_OV7670) {
1812 if (qvga) { /* QVGA from ov7670.c by
1813 * Jonathan Corbet */
1814 hstart = 164;
1815 hstop = 20;
1816 vstart = 14;
1817 vstop = 494;
1818 } else { /* VGA */
1819 hstart = 158;
1820 hstop = 14;
1821 vstart = 10;
1822 vstop = 490;
1823 }
1824 /* OV7670 hardware window registers are split across
1825 * multiple locations */
1826 i2c_w(sd, OV7670_REG_HSTART, hstart >> 3);
1827 i2c_w(sd, OV7670_REG_HSTOP, hstop >> 3);
1828 v = i2c_r(sd, OV7670_REG_HREF);
1829 v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x07);
1830 msleep(10); /* need to sleep between read and write to
1831 * same reg! */
1832 i2c_w(sd, OV7670_REG_HREF, v);
1833
1834 i2c_w(sd, OV7670_REG_VSTART, vstart >> 2);
1835 i2c_w(sd, OV7670_REG_VSTOP, vstop >> 2);
1836 v = i2c_r(sd, OV7670_REG_VREF);
1837 v = (v & 0xc0) | ((vstop & 0x3) << 2) | (vstart & 0x03);
1838 msleep(10); /* need to sleep between read and write to
1839 * same reg! */
1840 i2c_w(sd, OV7670_REG_VREF, v);
1841 sethvflip(sd);
1842 } else {
1843 i2c_w(sd, 0x17, hwsbase);
1844 i2c_w(sd, 0x18, hwebase + (sd->gspca_dev.width >> hwscale));
1845 i2c_w(sd, 0x19, vwsbase);
1846 i2c_w(sd, 0x1a, vwebase + (sd->gspca_dev.height >> vwscale));
1847 }
1848 return 0;
1849 }
1850
1851 /* -- start the camera -- */
1852 static void sd_start(struct gspca_dev *gspca_dev)
1853 {
1854 struct sd *sd = (struct sd *) gspca_dev;
1855 int ret;
1856
1857 ret = ov519_mode_init_regs(sd);
1858 if (ret < 0)
1859 goto out;
1860 ret = set_ov_sensor_window(sd);
1861 if (ret < 0)
1862 goto out;
1863
1864 ret = ov51x_restart(sd);
1865 if (ret < 0)
1866 goto out;
1867 PDEBUG(D_STREAM, "camera started alt: 0x%02x", gspca_dev->alt);
1868 ov51x_led_control(sd, 1);
1869 return;
1870 out:
1871 PDEBUG(D_ERR, "camera start error:%d", ret);
1872 }
1873
1874 static void sd_stopN(struct gspca_dev *gspca_dev)
1875 {
1876 ov51x_stop((struct sd *) gspca_dev);
1877 ov51x_led_control((struct sd *) gspca_dev, 0);
1878 }
1879
1880 static void sd_stop0(struct gspca_dev *gspca_dev)
1881 {
1882 }
1883
1884 static void sd_close(struct gspca_dev *gspca_dev)
1885 {
1886 }
1887
1888 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
1889 struct gspca_frame *frame, /* target */
1890 __u8 *data, /* isoc packet */
1891 int len) /* iso packet length */
1892 {
1893 /* Header of ov519 is 16 bytes:
1894 * Byte Value Description
1895 * 0 0xff magic
1896 * 1 0xff magic
1897 * 2 0xff magic
1898 * 3 0xXX 0x50 = SOF, 0x51 = EOF
1899 * 9 0xXX 0x01 initial frame without data,
1900 * 0x00 standard frame with image
1901 * 14 Lo in EOF: length of image data / 8
1902 * 15 Hi
1903 */
1904
1905 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
1906 switch (data[3]) {
1907 case 0x50: /* start of frame */
1908 #define HDRSZ 16
1909 data += HDRSZ;
1910 len -= HDRSZ;
1911 #undef HDRSZ
1912 if (data[0] == 0xff || data[1] == 0xd8)
1913 gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
1914 data, len);
1915 else
1916 gspca_dev->last_packet_type = DISCARD_PACKET;
1917 return;
1918 case 0x51: /* end of frame */
1919 if (data[9] != 0)
1920 gspca_dev->last_packet_type = DISCARD_PACKET;
1921 gspca_frame_add(gspca_dev, LAST_PACKET, frame,
1922 data, 0);
1923 return;
1924 }
1925 }
1926
1927 /* intermediate packet */
1928 gspca_frame_add(gspca_dev, INTER_PACKET, frame,
1929 data, len);
1930 }
1931
1932 /* -- management routines -- */
1933
1934 static void setbrightness(struct gspca_dev *gspca_dev)
1935 {
1936 struct sd *sd = (struct sd *) gspca_dev;
1937 int val;
1938
1939 val = sd->brightness;
1940 PDEBUG(D_CONF, "brightness:%d", val);
1941 /* if (gspca_dev->streaming)
1942 * ov51x_stop(sd); */
1943 switch (sd->sensor) {
1944 case SEN_OV8610:
1945 case SEN_OV7610:
1946 case SEN_OV76BE:
1947 case SEN_OV6620:
1948 case SEN_OV6630:
1949 case SEN_OV7640:
1950 i2c_w(sd, OV7610_REG_BRT, val);
1951 break;
1952 case SEN_OV7620:
1953 /* 7620 doesn't like manual changes when in auto mode */
1954 /*fixme
1955 * if (!sd->auto_brt) */
1956 i2c_w(sd, OV7610_REG_BRT, val);
1957 break;
1958 case SEN_OV7670:
1959 /*win trace
1960 * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
1961 i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
1962 break;
1963 }
1964 /* if (gspca_dev->streaming)
1965 * ov51x_restart(sd); */
1966 }
1967
1968 static void setcontrast(struct gspca_dev *gspca_dev)
1969 {
1970 struct sd *sd = (struct sd *) gspca_dev;
1971 int val;
1972
1973 val = sd->contrast;
1974 PDEBUG(D_CONF, "contrast:%d", val);
1975 /* if (gspca_dev->streaming)
1976 ov51x_stop(sd); */
1977 switch (sd->sensor) {
1978 case SEN_OV7610:
1979 case SEN_OV6620:
1980 i2c_w(sd, OV7610_REG_CNT, val);
1981 break;
1982 case SEN_OV6630:
1983 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
1984 case SEN_OV8610: {
1985 static const __u8 ctab[] = {
1986 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
1987 };
1988
1989 /* Use Y gamma control instead. Bit 0 enables it. */
1990 i2c_w(sd, 0x64, ctab[val >> 5]);
1991 break;
1992 }
1993 case SEN_OV7620: {
1994 static const __u8 ctab[] = {
1995 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
1996 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
1997 };
1998
1999 /* Use Y gamma control instead. Bit 0 enables it. */
2000 i2c_w(sd, 0x64, ctab[val >> 4]);
2001 break;
2002 }
2003 case SEN_OV7640:
2004 /* Use gain control instead. */
2005 i2c_w(sd, OV7610_REG_GAIN, val >> 2);
2006 break;
2007 case SEN_OV7670:
2008 /* check that this isn't just the same as ov7610 */
2009 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
2010 break;
2011 }
2012 /* if (gspca_dev->streaming)
2013 ov51x_restart(sd); */
2014 }
2015
2016 static void setcolors(struct gspca_dev *gspca_dev)
2017 {
2018 struct sd *sd = (struct sd *) gspca_dev;
2019 int val;
2020
2021 val = sd->colors;
2022 PDEBUG(D_CONF, "saturation:%d", val);
2023 /* if (gspca_dev->streaming)
2024 ov51x_stop(sd); */
2025 switch (sd->sensor) {
2026 case SEN_OV8610:
2027 case SEN_OV7610:
2028 case SEN_OV76BE:
2029 case SEN_OV6620:
2030 case SEN_OV6630:
2031 i2c_w(sd, OV7610_REG_SAT, val);
2032 break;
2033 case SEN_OV7620:
2034 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
2035 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
2036 if (rc < 0)
2037 goto out; */
2038 i2c_w(sd, OV7610_REG_SAT, val);
2039 break;
2040 case SEN_OV7640:
2041 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
2042 break;
2043 case SEN_OV7670:
2044 /* supported later once I work out how to do it
2045 * transparently fail now! */
2046 /* set REG_COM13 values for UV sat auto mode */
2047 break;
2048 }
2049 /* if (gspca_dev->streaming)
2050 ov51x_restart(sd); */
2051 }
2052
2053 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
2054 {
2055 struct sd *sd = (struct sd *) gspca_dev;
2056
2057 sd->brightness = val;
2058 setbrightness(gspca_dev);
2059 return 0;
2060 }
2061
2062 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
2063 {
2064 struct sd *sd = (struct sd *) gspca_dev;
2065
2066 *val = sd->brightness;
2067 return 0;
2068 }
2069
2070 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
2071 {
2072 struct sd *sd = (struct sd *) gspca_dev;
2073
2074 sd->contrast = val;
2075 setcontrast(gspca_dev);
2076 return 0;
2077 }
2078
2079 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
2080 {
2081 struct sd *sd = (struct sd *) gspca_dev;
2082
2083 *val = sd->contrast;
2084 return 0;
2085 }
2086
2087 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
2088 {
2089 struct sd *sd = (struct sd *) gspca_dev;
2090
2091 sd->colors = val;
2092 setcolors(gspca_dev);
2093 return 0;
2094 }
2095
2096 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
2097 {
2098 struct sd *sd = (struct sd *) gspca_dev;
2099
2100 *val = sd->colors;
2101 return 0;
2102 }
2103
2104 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
2105 {
2106 struct sd *sd = (struct sd *) gspca_dev;
2107
2108 sd->hflip = val;
2109 sethvflip(sd);
2110 return 0;
2111 }
2112
2113 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
2114 {
2115 struct sd *sd = (struct sd *) gspca_dev;
2116
2117 *val = sd->hflip;
2118 return 0;
2119 }
2120
2121 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
2122 {
2123 struct sd *sd = (struct sd *) gspca_dev;
2124
2125 sd->vflip = val;
2126 sethvflip(sd);
2127 return 0;
2128 }
2129
2130 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
2131 {
2132 struct sd *sd = (struct sd *) gspca_dev;
2133
2134 *val = sd->vflip;
2135 return 0;
2136 }
2137
2138 /* sub-driver description */
2139 static const struct sd_desc sd_desc = {
2140 .name = MODULE_NAME,
2141 .ctrls = sd_ctrls,
2142 .nctrls = ARRAY_SIZE(sd_ctrls),
2143 .config = sd_config,
2144 .open = sd_open,
2145 .start = sd_start,
2146 .stopN = sd_stopN,
2147 .stop0 = sd_stop0,
2148 .close = sd_close,
2149 .pkt_scan = sd_pkt_scan,
2150 };
2151
2152 /* -- module initialisation -- */
2153 static const __devinitdata struct usb_device_id device_table[] = {
2154 {USB_DEVICE(0x041e, 0x4052)},
2155 {USB_DEVICE(0x041e, 0x405f)},
2156 {USB_DEVICE(0x041e, 0x4060)},
2157 {USB_DEVICE(0x041e, 0x4061)},
2158 {USB_DEVICE(0x041e, 0x4064)},
2159 {USB_DEVICE(0x041e, 0x4068)},
2160 {USB_DEVICE(0x045e, 0x028c)},
2161 {USB_DEVICE(0x054c, 0x0154)},
2162 {USB_DEVICE(0x054c, 0x0155)},
2163 {USB_DEVICE(0x05a9, 0x0519)},
2164 {USB_DEVICE(0x05a9, 0x0530)},
2165 {USB_DEVICE(0x05a9, 0x4519)},
2166 {USB_DEVICE(0x05a9, 0x8519)},
2167 {}
2168 };
2169 #undef DVNAME
2170 MODULE_DEVICE_TABLE(usb, device_table);
2171
2172 /* -- device connect -- */
2173 static int sd_probe(struct usb_interface *intf,
2174 const struct usb_device_id *id)
2175 {
2176 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
2177 THIS_MODULE);
2178 }
2179
2180 static struct usb_driver sd_driver = {
2181 .name = MODULE_NAME,
2182 .id_table = device_table,
2183 .probe = sd_probe,
2184 .disconnect = gspca_disconnect,
2185 #ifdef CONFIG_PM
2186 .suspend = gspca_suspend,
2187 .resume = gspca_resume,
2188 #endif
2189 };
2190
2191 /* -- module insert / remove -- */
2192 static int __init sd_mod_init(void)
2193 {
2194 if (usb_register(&sd_driver) < 0)
2195 return -1;
2196 PDEBUG(D_PROBE, "registered");
2197 return 0;
2198 }
2199 static void __exit sd_mod_exit(void)
2200 {
2201 usb_deregister(&sd_driver);
2202 PDEBUG(D_PROBE, "deregistered");
2203 }
2204
2205 module_init(sd_mod_init);
2206 module_exit(sd_mod_exit);
2207
2208 module_param(frame_rate, int, 0644);
2209 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
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