2 * V4L2 SoC Camera driver for OmniVision OV6650 Camera Sensor
4 * Copyright (C) 2010 Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
6 * Based on OmniVision OV96xx Camera Driver
7 * Copyright (C) 2009 Marek Vasut <marek.vasut@gmail.com>
9 * Based on ov772x camera driver:
10 * Copyright (C) 2008 Renesas Solutions Corp.
11 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
13 * Based on ov7670 and soc_camera_platform driver,
14 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
15 * Copyright (C) 2008 Magnus Damm
16 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
18 * Hardware specific bits initialy based on former work by Matt Callow
19 * drivers/media/video/omap/sensor_ov6650.c
20 * Copyright (C) 2006 Matt Callow
22 * This program is free software; you can redistribute it and/or modify
23 * it under the terms of the GNU General Public License version 2 as
24 * published by the Free Software Foundation.
27 #include <linux/bitops.h>
28 #include <linux/delay.h>
29 #include <linux/i2c.h>
30 #include <linux/slab.h>
31 #include <linux/v4l2-mediabus.h>
33 #include <media/soc_camera.h>
34 #include <media/v4l2-chip-ident.h>
35 #include <media/v4l2-ctrls.h>
37 /* Register definitions */
38 #define REG_GAIN 0x00 /* range 00 - 3F */
41 #define REG_SAT 0x03 /* [7:4] saturation [0:3] reserved */
42 #define REG_HUE 0x04 /* [7:6] rsrvd [5] hue en [4:0] hue */
50 #define REG_CLKRC 0x11 /* Data Format and Internal Clock */
51 /* [7:6] Input system clock (MHz)*/
52 /* 00=8, 01=12, 10=16, 11=24 */
53 /* [5:0]: Internal Clock Pre-Scaler */
54 #define REG_COMA 0x12 /* [7] Reset */
59 #define REG_HSTRT 0x17
60 #define REG_HSTOP 0x18
61 #define REG_VSTRT 0x19
62 #define REG_VSTOP 0x1a
63 #define REG_PSHFT 0x1b
66 #define REG_HSYNS 0x1e
67 #define REG_HSYNE 0x1f
79 #define REG_FRARL 0x2b
86 #define REG_FRAJH 0x32
87 #define REG_FRAJL 0x33
89 #define REG_L1AEC 0x35
100 #define REG_SPCE 0x68
101 #define REG_ADCL 0x69
103 #define REG_RMCO 0x6c
104 #define REG_GMCO 0x6d
105 #define REG_BMCO 0x6e
108 /* Register bits, values, etc. */
109 #define OV6650_PIDH 0x66 /* high byte of product ID number */
110 #define OV6650_PIDL 0x50 /* low byte of product ID number */
111 #define OV6650_MIDH 0x7F /* high byte of mfg ID */
112 #define OV6650_MIDL 0xA2 /* low byte of mfg ID */
114 #define DEF_GAIN 0x00
115 #define DEF_BLUE 0x80
119 #define SAT_MASK (0xf << SAT_SHIFT)
120 #define SET_SAT(x) (((x) << SAT_SHIFT) & SAT_MASK)
122 #define HUE_EN BIT(5)
123 #define HUE_MASK 0x1f
125 #define SET_HUE(x) (HUE_EN | ((x) & HUE_MASK))
127 #define DEF_AECH 0x4D
129 #define CLKRC_6MHz 0x00
130 #define CLKRC_12MHz 0x40
131 #define CLKRC_16MHz 0x80
132 #define CLKRC_24MHz 0xc0
133 #define CLKRC_DIV_MASK 0x3f
134 #define GET_CLKRC_DIV(x) (((x) & CLKRC_DIV_MASK) + 1)
136 #define COMA_RESET BIT(7)
137 #define COMA_QCIF BIT(5)
138 #define COMA_RAW_RGB BIT(4)
139 #define COMA_RGB BIT(3)
140 #define COMA_BW BIT(2)
141 #define COMA_WORD_SWAP BIT(1)
142 #define COMA_BYTE_SWAP BIT(0)
143 #define DEF_COMA 0x00
145 #define COMB_FLIP_V BIT(7)
146 #define COMB_FLIP_H BIT(5)
147 #define COMB_BAND_FILTER BIT(4)
148 #define COMB_AWB BIT(2)
149 #define COMB_AGC BIT(1)
150 #define COMB_AEC BIT(0)
151 #define DEF_COMB 0x5f
153 #define COML_ONE_CHANNEL BIT(7)
155 #define DEF_HSTRT 0x24
156 #define DEF_HSTOP 0xd4
157 #define DEF_VSTRT 0x04
158 #define DEF_VSTOP 0x94
160 #define COMF_HREF_LOW BIT(4)
162 #define COMJ_PCLK_RISING BIT(4)
163 #define COMJ_VSYNC_HIGH BIT(0)
165 /* supported resolutions */
166 #define W_QCIF (DEF_HSTOP - DEF_HSTRT)
167 #define W_CIF (W_QCIF << 1)
168 #define H_QCIF (DEF_VSTOP - DEF_VSTRT)
169 #define H_CIF (H_QCIF << 1)
171 #define FRAME_RATE_MAX 30
180 struct v4l2_subdev subdev
;
181 struct v4l2_ctrl_handler hdl
;
183 /* exposure/autoexposure cluster */
184 struct v4l2_ctrl
*autoexposure
;
185 struct v4l2_ctrl
*exposure
;
188 /* gain/autogain cluster */
189 struct v4l2_ctrl
*autogain
;
190 struct v4l2_ctrl
*gain
;
193 /* blue/red/autowhitebalance cluster */
194 struct v4l2_ctrl
*autowb
;
195 struct v4l2_ctrl
*blue
;
196 struct v4l2_ctrl
*red
;
198 bool half_scale
; /* scale down output by 2 */
199 struct v4l2_rect rect
; /* sensor cropping window */
200 unsigned long pclk_limit
; /* from host */
201 unsigned long pclk_max
; /* from resolution and format */
202 struct v4l2_fract tpf
; /* as requested with s_parm */
203 enum v4l2_mbus_pixelcode code
;
204 enum v4l2_colorspace colorspace
;
208 static enum v4l2_mbus_pixelcode ov6650_codes
[] = {
209 V4L2_MBUS_FMT_YUYV8_2X8
,
210 V4L2_MBUS_FMT_UYVY8_2X8
,
211 V4L2_MBUS_FMT_YVYU8_2X8
,
212 V4L2_MBUS_FMT_VYUY8_2X8
,
213 V4L2_MBUS_FMT_SBGGR8_1X8
,
214 V4L2_MBUS_FMT_Y8_1X8
,
217 /* read a register */
218 static int ov6650_reg_read(struct i2c_client
*client
, u8 reg
, u8
*val
)
222 struct i2c_msg msg
= {
223 .addr
= client
->addr
,
229 ret
= i2c_transfer(client
->adapter
, &msg
, 1);
233 msg
.flags
= I2C_M_RD
;
234 ret
= i2c_transfer(client
->adapter
, &msg
, 1);
242 dev_err(&client
->dev
, "Failed reading register 0x%02x!\n", reg
);
246 /* write a register */
247 static int ov6650_reg_write(struct i2c_client
*client
, u8 reg
, u8 val
)
250 unsigned char data
[2] = { reg
, val
};
251 struct i2c_msg msg
= {
252 .addr
= client
->addr
,
258 ret
= i2c_transfer(client
->adapter
, &msg
, 1);
262 dev_err(&client
->dev
, "Failed writing register 0x%02x!\n", reg
);
269 /* Read a register, alter its bits, write it back */
270 static int ov6650_reg_rmw(struct i2c_client
*client
, u8 reg
, u8 set
, u8 mask
)
275 ret
= ov6650_reg_read(client
, reg
, &val
);
277 dev_err(&client
->dev
,
278 "[Read]-Modify-Write of register 0x%02x failed!\n",
286 ret
= ov6650_reg_write(client
, reg
, val
);
288 dev_err(&client
->dev
,
289 "Read-Modify-[Write] of register 0x%02x failed!\n",
295 static struct ov6650
*to_ov6650(const struct i2c_client
*client
)
297 return container_of(i2c_get_clientdata(client
), struct ov6650
, subdev
);
300 /* Start/Stop streaming from the device */
301 static int ov6650_s_stream(struct v4l2_subdev
*sd
, int enable
)
306 /* Get status of additional camera capabilities */
307 static int ov6550_g_volatile_ctrl(struct v4l2_ctrl
*ctrl
)
309 struct ov6650
*priv
= container_of(ctrl
->handler
, struct ov6650
, hdl
);
310 struct v4l2_subdev
*sd
= &priv
->subdev
;
311 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
316 case V4L2_CID_AUTOGAIN
:
317 ret
= ov6650_reg_read(client
, REG_GAIN
, ®
);
319 priv
->gain
->val
= reg
;
321 case V4L2_CID_AUTO_WHITE_BALANCE
:
322 ret
= ov6650_reg_read(client
, REG_BLUE
, ®
);
324 ret
= ov6650_reg_read(client
, REG_RED
, ®2
);
326 priv
->blue
->val
= reg
;
327 priv
->red
->val
= reg2
;
330 case V4L2_CID_EXPOSURE_AUTO
:
331 ret
= ov6650_reg_read(client
, REG_AECH
, ®
);
333 priv
->exposure
->val
= reg
;
339 /* Set status of additional camera capabilities */
340 static int ov6550_s_ctrl(struct v4l2_ctrl
*ctrl
)
342 struct ov6650
*priv
= container_of(ctrl
->handler
, struct ov6650
, hdl
);
343 struct v4l2_subdev
*sd
= &priv
->subdev
;
344 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
348 case V4L2_CID_AUTOGAIN
:
349 ret
= ov6650_reg_rmw(client
, REG_COMB
,
350 ctrl
->val
? COMB_AGC
: 0, COMB_AGC
);
351 if (!ret
&& !ctrl
->val
)
352 ret
= ov6650_reg_write(client
, REG_GAIN
, priv
->gain
->val
);
354 case V4L2_CID_AUTO_WHITE_BALANCE
:
355 ret
= ov6650_reg_rmw(client
, REG_COMB
,
356 ctrl
->val
? COMB_AWB
: 0, COMB_AWB
);
357 if (!ret
&& !ctrl
->val
) {
358 ret
= ov6650_reg_write(client
, REG_BLUE
, priv
->blue
->val
);
360 ret
= ov6650_reg_write(client
, REG_RED
,
364 case V4L2_CID_SATURATION
:
365 return ov6650_reg_rmw(client
, REG_SAT
, SET_SAT(ctrl
->val
),
368 return ov6650_reg_rmw(client
, REG_HUE
, SET_HUE(ctrl
->val
),
370 case V4L2_CID_BRIGHTNESS
:
371 return ov6650_reg_write(client
, REG_BRT
, ctrl
->val
);
372 case V4L2_CID_EXPOSURE_AUTO
:
373 ret
= ov6650_reg_rmw(client
, REG_COMB
, ctrl
->val
==
374 V4L2_EXPOSURE_AUTO
? COMB_AEC
: 0, COMB_AEC
);
375 if (!ret
&& ctrl
->val
== V4L2_EXPOSURE_MANUAL
)
376 ret
= ov6650_reg_write(client
, REG_AECH
,
377 priv
->exposure
->val
);
380 return ov6650_reg_write(client
, REG_GAM1
, ctrl
->val
);
382 return ov6650_reg_rmw(client
, REG_COMB
,
383 ctrl
->val
? COMB_FLIP_V
: 0, COMB_FLIP_V
);
385 return ov6650_reg_rmw(client
, REG_COMB
,
386 ctrl
->val
? COMB_FLIP_H
: 0, COMB_FLIP_H
);
392 /* Get chip identification */
393 static int ov6650_g_chip_ident(struct v4l2_subdev
*sd
,
394 struct v4l2_dbg_chip_ident
*id
)
396 id
->ident
= V4L2_IDENT_OV6650
;
402 #ifdef CONFIG_VIDEO_ADV_DEBUG
403 static int ov6650_get_register(struct v4l2_subdev
*sd
,
404 struct v4l2_dbg_register
*reg
)
406 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
410 if (reg
->reg
& ~0xff)
415 ret
= ov6650_reg_read(client
, reg
->reg
, &val
);
417 reg
->val
= (__u64
)val
;
422 static int ov6650_set_register(struct v4l2_subdev
*sd
,
423 struct v4l2_dbg_register
*reg
)
425 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
427 if (reg
->reg
& ~0xff || reg
->val
& ~0xff)
430 return ov6650_reg_write(client
, reg
->reg
, reg
->val
);
434 static int ov6650_g_crop(struct v4l2_subdev
*sd
, struct v4l2_crop
*a
)
436 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
437 struct ov6650
*priv
= to_ov6650(client
);
439 a
->type
= V4L2_BUF_TYPE_VIDEO_CAPTURE
;
445 static int ov6650_s_crop(struct v4l2_subdev
*sd
, struct v4l2_crop
*a
)
447 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
448 struct ov6650
*priv
= to_ov6650(client
);
449 struct v4l2_rect
*rect
= &a
->c
;
452 if (a
->type
!= V4L2_BUF_TYPE_VIDEO_CAPTURE
)
455 rect
->left
= ALIGN(rect
->left
, 2);
456 rect
->width
= ALIGN(rect
->width
, 2);
457 rect
->top
= ALIGN(rect
->top
, 2);
458 rect
->height
= ALIGN(rect
->height
, 2);
459 soc_camera_limit_side(&rect
->left
, &rect
->width
,
460 DEF_HSTRT
<< 1, 2, W_CIF
);
461 soc_camera_limit_side(&rect
->top
, &rect
->height
,
462 DEF_VSTRT
<< 1, 2, H_CIF
);
464 ret
= ov6650_reg_write(client
, REG_HSTRT
, rect
->left
>> 1);
466 priv
->rect
.left
= rect
->left
;
467 ret
= ov6650_reg_write(client
, REG_HSTOP
,
468 (rect
->left
+ rect
->width
) >> 1);
471 priv
->rect
.width
= rect
->width
;
472 ret
= ov6650_reg_write(client
, REG_VSTRT
, rect
->top
>> 1);
475 priv
->rect
.top
= rect
->top
;
476 ret
= ov6650_reg_write(client
, REG_VSTOP
,
477 (rect
->top
+ rect
->height
) >> 1);
480 priv
->rect
.height
= rect
->height
;
485 static int ov6650_cropcap(struct v4l2_subdev
*sd
, struct v4l2_cropcap
*a
)
487 if (a
->type
!= V4L2_BUF_TYPE_VIDEO_CAPTURE
)
490 a
->bounds
.left
= DEF_HSTRT
<< 1;
491 a
->bounds
.top
= DEF_VSTRT
<< 1;
492 a
->bounds
.width
= W_CIF
;
493 a
->bounds
.height
= H_CIF
;
494 a
->defrect
= a
->bounds
;
495 a
->pixelaspect
.numerator
= 1;
496 a
->pixelaspect
.denominator
= 1;
501 static int ov6650_g_fmt(struct v4l2_subdev
*sd
,
502 struct v4l2_mbus_framefmt
*mf
)
504 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
505 struct ov6650
*priv
= to_ov6650(client
);
507 mf
->width
= priv
->rect
.width
>> priv
->half_scale
;
508 mf
->height
= priv
->rect
.height
>> priv
->half_scale
;
509 mf
->code
= priv
->code
;
510 mf
->colorspace
= priv
->colorspace
;
511 mf
->field
= V4L2_FIELD_NONE
;
516 static bool is_unscaled_ok(int width
, int height
, struct v4l2_rect
*rect
)
518 return width
> rect
->width
>> 1 || height
> rect
->height
>> 1;
521 static u8
to_clkrc(struct v4l2_fract
*timeperframe
,
522 unsigned long pclk_limit
, unsigned long pclk_max
)
526 if (timeperframe
->numerator
&& timeperframe
->denominator
)
527 pclk
= pclk_max
* timeperframe
->denominator
/
528 (FRAME_RATE_MAX
* timeperframe
->numerator
);
532 if (pclk_limit
&& pclk_limit
< pclk
)
535 return (pclk_max
- 1) / pclk
;
538 /* set the format we will capture in */
539 static int ov6650_s_fmt(struct v4l2_subdev
*sd
, struct v4l2_mbus_framefmt
*mf
)
541 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
542 struct soc_camera_device
*icd
= (struct soc_camera_device
*)sd
->grp_id
;
543 struct soc_camera_sense
*sense
= icd
->sense
;
544 struct ov6650
*priv
= to_ov6650(client
);
545 bool half_scale
= !is_unscaled_ok(mf
->width
, mf
->height
, &priv
->rect
);
546 struct v4l2_crop a
= {
547 .type
= V4L2_BUF_TYPE_VIDEO_CAPTURE
,
549 .left
= priv
->rect
.left
+ (priv
->rect
.width
>> 1) -
550 (mf
->width
>> (1 - half_scale
)),
551 .top
= priv
->rect
.top
+ (priv
->rect
.height
>> 1) -
552 (mf
->height
>> (1 - half_scale
)),
553 .width
= mf
->width
<< half_scale
,
554 .height
= mf
->height
<< half_scale
,
557 enum v4l2_mbus_pixelcode code
= mf
->code
;
558 unsigned long mclk
, pclk
;
559 u8 coma_set
= 0, coma_mask
= 0, coml_set
, coml_mask
, clkrc
;
562 /* select color matrix configuration for given color encoding */
564 case V4L2_MBUS_FMT_Y8_1X8
:
565 dev_dbg(&client
->dev
, "pixel format GREY8_1X8\n");
566 coma_mask
|= COMA_RGB
| COMA_WORD_SWAP
| COMA_BYTE_SWAP
;
569 case V4L2_MBUS_FMT_YUYV8_2X8
:
570 dev_dbg(&client
->dev
, "pixel format YUYV8_2X8_LE\n");
571 coma_mask
|= COMA_RGB
| COMA_BW
| COMA_BYTE_SWAP
;
572 coma_set
|= COMA_WORD_SWAP
;
574 case V4L2_MBUS_FMT_YVYU8_2X8
:
575 dev_dbg(&client
->dev
, "pixel format YVYU8_2X8_LE (untested)\n");
576 coma_mask
|= COMA_RGB
| COMA_BW
| COMA_WORD_SWAP
|
579 case V4L2_MBUS_FMT_UYVY8_2X8
:
580 dev_dbg(&client
->dev
, "pixel format YUYV8_2X8_BE\n");
582 coma_mask
|= COMA_RGB
| COMA_BW
| COMA_WORD_SWAP
;
583 coma_set
|= COMA_BYTE_SWAP
;
585 coma_mask
|= COMA_RGB
| COMA_BW
;
586 coma_set
|= COMA_BYTE_SWAP
| COMA_WORD_SWAP
;
589 case V4L2_MBUS_FMT_VYUY8_2X8
:
590 dev_dbg(&client
->dev
, "pixel format YVYU8_2X8_BE (untested)\n");
592 coma_mask
|= COMA_RGB
| COMA_BW
;
593 coma_set
|= COMA_BYTE_SWAP
| COMA_WORD_SWAP
;
595 coma_mask
|= COMA_RGB
| COMA_BW
| COMA_WORD_SWAP
;
596 coma_set
|= COMA_BYTE_SWAP
;
599 case V4L2_MBUS_FMT_SBGGR8_1X8
:
600 dev_dbg(&client
->dev
, "pixel format SBGGR8_1X8 (untested)\n");
601 coma_mask
|= COMA_BW
| COMA_BYTE_SWAP
| COMA_WORD_SWAP
;
602 coma_set
|= COMA_RAW_RGB
| COMA_RGB
;
605 dev_err(&client
->dev
, "Pixel format not handled: 0x%x\n", code
);
610 if (code
== V4L2_MBUS_FMT_Y8_1X8
||
611 code
== V4L2_MBUS_FMT_SBGGR8_1X8
) {
612 coml_mask
= COML_ONE_CHANNEL
;
614 priv
->pclk_max
= 4000000;
617 coml_set
= COML_ONE_CHANNEL
;
618 priv
->pclk_max
= 8000000;
621 if (code
== V4L2_MBUS_FMT_SBGGR8_1X8
)
622 priv
->colorspace
= V4L2_COLORSPACE_SRGB
;
624 priv
->colorspace
= V4L2_COLORSPACE_JPEG
;
627 dev_dbg(&client
->dev
, "max resolution: QCIF\n");
628 coma_set
|= COMA_QCIF
;
631 dev_dbg(&client
->dev
, "max resolution: CIF\n");
632 coma_mask
|= COMA_QCIF
;
634 priv
->half_scale
= half_scale
;
637 if (sense
->master_clock
== 8000000) {
638 dev_dbg(&client
->dev
, "8MHz input clock\n");
640 } else if (sense
->master_clock
== 12000000) {
641 dev_dbg(&client
->dev
, "12MHz input clock\n");
643 } else if (sense
->master_clock
== 16000000) {
644 dev_dbg(&client
->dev
, "16MHz input clock\n");
646 } else if (sense
->master_clock
== 24000000) {
647 dev_dbg(&client
->dev
, "24MHz input clock\n");
650 dev_err(&client
->dev
,
651 "unspported input clock, check platform data\n");
654 mclk
= sense
->master_clock
;
655 priv
->pclk_limit
= sense
->pixel_clock_max
;
659 priv
->pclk_limit
= 0;
660 dev_dbg(&client
->dev
, "using default 24MHz input clock\n");
663 clkrc
|= to_clkrc(&priv
->tpf
, priv
->pclk_limit
, priv
->pclk_max
);
665 pclk
= priv
->pclk_max
/ GET_CLKRC_DIV(clkrc
);
666 dev_dbg(&client
->dev
, "pixel clock divider: %ld.%ld\n",
667 mclk
/ pclk
, 10 * mclk
% pclk
/ pclk
);
669 ret
= ov6650_s_crop(sd
, &a
);
671 ret
= ov6650_reg_rmw(client
, REG_COMA
, coma_set
, coma_mask
);
673 ret
= ov6650_reg_write(client
, REG_CLKRC
, clkrc
);
675 ret
= ov6650_reg_rmw(client
, REG_COML
, coml_set
, coml_mask
);
678 mf
->colorspace
= priv
->colorspace
;
679 mf
->width
= priv
->rect
.width
>> half_scale
;
680 mf
->height
= priv
->rect
.height
>> half_scale
;
686 static int ov6650_try_fmt(struct v4l2_subdev
*sd
,
687 struct v4l2_mbus_framefmt
*mf
)
689 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
690 struct ov6650
*priv
= to_ov6650(client
);
692 if (is_unscaled_ok(mf
->width
, mf
->height
, &priv
->rect
))
693 v4l_bound_align_image(&mf
->width
, 2, W_CIF
, 1,
694 &mf
->height
, 2, H_CIF
, 1, 0);
696 mf
->field
= V4L2_FIELD_NONE
;
699 case V4L2_MBUS_FMT_Y10_1X10
:
700 mf
->code
= V4L2_MBUS_FMT_Y8_1X8
;
701 case V4L2_MBUS_FMT_Y8_1X8
:
702 case V4L2_MBUS_FMT_YVYU8_2X8
:
703 case V4L2_MBUS_FMT_YUYV8_2X8
:
704 case V4L2_MBUS_FMT_VYUY8_2X8
:
705 case V4L2_MBUS_FMT_UYVY8_2X8
:
706 mf
->colorspace
= V4L2_COLORSPACE_JPEG
;
709 mf
->code
= V4L2_MBUS_FMT_SBGGR8_1X8
;
710 case V4L2_MBUS_FMT_SBGGR8_1X8
:
711 mf
->colorspace
= V4L2_COLORSPACE_SRGB
;
718 static int ov6650_enum_fmt(struct v4l2_subdev
*sd
, unsigned int index
,
719 enum v4l2_mbus_pixelcode
*code
)
721 if (index
>= ARRAY_SIZE(ov6650_codes
))
724 *code
= ov6650_codes
[index
];
728 static int ov6650_g_parm(struct v4l2_subdev
*sd
, struct v4l2_streamparm
*parms
)
730 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
731 struct ov6650
*priv
= to_ov6650(client
);
732 struct v4l2_captureparm
*cp
= &parms
->parm
.capture
;
734 if (parms
->type
!= V4L2_BUF_TYPE_VIDEO_CAPTURE
)
737 memset(cp
, 0, sizeof(*cp
));
738 cp
->capability
= V4L2_CAP_TIMEPERFRAME
;
739 cp
->timeperframe
.numerator
= GET_CLKRC_DIV(to_clkrc(&priv
->tpf
,
740 priv
->pclk_limit
, priv
->pclk_max
));
741 cp
->timeperframe
.denominator
= FRAME_RATE_MAX
;
743 dev_dbg(&client
->dev
, "Frame interval: %u/%u s\n",
744 cp
->timeperframe
.numerator
, cp
->timeperframe
.denominator
);
749 static int ov6650_s_parm(struct v4l2_subdev
*sd
, struct v4l2_streamparm
*parms
)
751 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
752 struct ov6650
*priv
= to_ov6650(client
);
753 struct v4l2_captureparm
*cp
= &parms
->parm
.capture
;
754 struct v4l2_fract
*tpf
= &cp
->timeperframe
;
758 if (parms
->type
!= V4L2_BUF_TYPE_VIDEO_CAPTURE
)
761 if (cp
->extendedmode
!= 0)
764 if (tpf
->numerator
== 0 || tpf
->denominator
== 0)
765 div
= 1; /* Reset to full rate */
767 div
= (tpf
->numerator
* FRAME_RATE_MAX
) / tpf
->denominator
;
771 else if (div
> GET_CLKRC_DIV(CLKRC_DIV_MASK
))
772 div
= GET_CLKRC_DIV(CLKRC_DIV_MASK
);
775 * Keep result to be used as tpf limit
776 * for subseqent clock divider calculations
778 priv
->tpf
.numerator
= div
;
779 priv
->tpf
.denominator
= FRAME_RATE_MAX
;
781 clkrc
= to_clkrc(&priv
->tpf
, priv
->pclk_limit
, priv
->pclk_max
);
783 ret
= ov6650_reg_rmw(client
, REG_CLKRC
, clkrc
, CLKRC_DIV_MASK
);
785 tpf
->numerator
= GET_CLKRC_DIV(clkrc
);
786 tpf
->denominator
= FRAME_RATE_MAX
;
792 /* Soft reset the camera. This has nothing to do with the RESET pin! */
793 static int ov6650_reset(struct i2c_client
*client
)
797 dev_dbg(&client
->dev
, "reset\n");
799 ret
= ov6650_reg_rmw(client
, REG_COMA
, COMA_RESET
, 0);
801 dev_err(&client
->dev
,
802 "An error occurred while entering soft reset!\n");
807 /* program default register values */
808 static int ov6650_prog_dflt(struct i2c_client
*client
)
812 dev_dbg(&client
->dev
, "initializing\n");
814 ret
= ov6650_reg_write(client
, REG_COMA
, 0); /* ~COMA_RESET */
816 ret
= ov6650_reg_rmw(client
, REG_COMB
, 0, COMB_BAND_FILTER
);
821 static int ov6650_video_probe(struct i2c_client
*client
)
823 u8 pidh
, pidl
, midh
, midl
;
827 * check and show product ID and manufacturer ID
829 ret
= ov6650_reg_read(client
, REG_PIDH
, &pidh
);
831 ret
= ov6650_reg_read(client
, REG_PIDL
, &pidl
);
833 ret
= ov6650_reg_read(client
, REG_MIDH
, &midh
);
835 ret
= ov6650_reg_read(client
, REG_MIDL
, &midl
);
840 if ((pidh
!= OV6650_PIDH
) || (pidl
!= OV6650_PIDL
)) {
841 dev_err(&client
->dev
, "Product ID error 0x%02x:0x%02x\n",
846 dev_info(&client
->dev
,
847 "ov6650 Product ID 0x%02x:0x%02x Manufacturer ID 0x%02x:0x%02x\n",
848 pidh
, pidl
, midh
, midl
);
850 ret
= ov6650_reset(client
);
852 ret
= ov6650_prog_dflt(client
);
857 static const struct v4l2_ctrl_ops ov6550_ctrl_ops
= {
858 .g_volatile_ctrl
= ov6550_g_volatile_ctrl
,
859 .s_ctrl
= ov6550_s_ctrl
,
862 static struct v4l2_subdev_core_ops ov6650_core_ops
= {
863 .g_chip_ident
= ov6650_g_chip_ident
,
864 #ifdef CONFIG_VIDEO_ADV_DEBUG
865 .g_register
= ov6650_get_register
,
866 .s_register
= ov6650_set_register
,
870 /* Request bus settings on camera side */
871 static int ov6650_g_mbus_config(struct v4l2_subdev
*sd
,
872 struct v4l2_mbus_config
*cfg
)
874 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
875 struct soc_camera_link
*icl
= soc_camera_i2c_to_link(client
);
877 cfg
->flags
= V4L2_MBUS_MASTER
|
878 V4L2_MBUS_PCLK_SAMPLE_RISING
| V4L2_MBUS_PCLK_SAMPLE_FALLING
|
879 V4L2_MBUS_HSYNC_ACTIVE_HIGH
| V4L2_MBUS_HSYNC_ACTIVE_LOW
|
880 V4L2_MBUS_VSYNC_ACTIVE_HIGH
| V4L2_MBUS_VSYNC_ACTIVE_LOW
|
881 V4L2_MBUS_DATA_ACTIVE_HIGH
;
882 cfg
->type
= V4L2_MBUS_PARALLEL
;
883 cfg
->flags
= soc_camera_apply_board_flags(icl
, cfg
);
888 /* Alter bus settings on camera side */
889 static int ov6650_s_mbus_config(struct v4l2_subdev
*sd
,
890 const struct v4l2_mbus_config
*cfg
)
892 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
893 struct soc_camera_link
*icl
= soc_camera_i2c_to_link(client
);
894 unsigned long flags
= soc_camera_apply_board_flags(icl
, cfg
);
897 if (flags
& V4L2_MBUS_PCLK_SAMPLE_RISING
)
898 ret
= ov6650_reg_rmw(client
, REG_COMJ
, COMJ_PCLK_RISING
, 0);
900 ret
= ov6650_reg_rmw(client
, REG_COMJ
, 0, COMJ_PCLK_RISING
);
904 if (flags
& V4L2_MBUS_HSYNC_ACTIVE_LOW
)
905 ret
= ov6650_reg_rmw(client
, REG_COMF
, COMF_HREF_LOW
, 0);
907 ret
= ov6650_reg_rmw(client
, REG_COMF
, 0, COMF_HREF_LOW
);
911 if (flags
& V4L2_MBUS_VSYNC_ACTIVE_HIGH
)
912 ret
= ov6650_reg_rmw(client
, REG_COMJ
, COMJ_VSYNC_HIGH
, 0);
914 ret
= ov6650_reg_rmw(client
, REG_COMJ
, 0, COMJ_VSYNC_HIGH
);
919 static struct v4l2_subdev_video_ops ov6650_video_ops
= {
920 .s_stream
= ov6650_s_stream
,
921 .g_mbus_fmt
= ov6650_g_fmt
,
922 .s_mbus_fmt
= ov6650_s_fmt
,
923 .try_mbus_fmt
= ov6650_try_fmt
,
924 .enum_mbus_fmt
= ov6650_enum_fmt
,
925 .cropcap
= ov6650_cropcap
,
926 .g_crop
= ov6650_g_crop
,
927 .s_crop
= ov6650_s_crop
,
928 .g_parm
= ov6650_g_parm
,
929 .s_parm
= ov6650_s_parm
,
930 .g_mbus_config
= ov6650_g_mbus_config
,
931 .s_mbus_config
= ov6650_s_mbus_config
,
934 static struct v4l2_subdev_ops ov6650_subdev_ops
= {
935 .core
= &ov6650_core_ops
,
936 .video
= &ov6650_video_ops
,
940 * i2c_driver function
942 static int ov6650_probe(struct i2c_client
*client
,
943 const struct i2c_device_id
*did
)
946 struct soc_camera_link
*icl
= soc_camera_i2c_to_link(client
);
950 dev_err(&client
->dev
, "Missing platform_data for driver\n");
954 priv
= kzalloc(sizeof(*priv
), GFP_KERNEL
);
956 dev_err(&client
->dev
,
957 "Failed to allocate memory for private data!\n");
961 v4l2_i2c_subdev_init(&priv
->subdev
, client
, &ov6650_subdev_ops
);
962 v4l2_ctrl_handler_init(&priv
->hdl
, 13);
963 v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
964 V4L2_CID_VFLIP
, 0, 1, 1, 0);
965 v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
966 V4L2_CID_HFLIP
, 0, 1, 1, 0);
967 priv
->autogain
= v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
968 V4L2_CID_AUTOGAIN
, 0, 1, 1, 1);
969 priv
->gain
= v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
970 V4L2_CID_GAIN
, 0, 0x3f, 1, DEF_GAIN
);
971 priv
->autowb
= v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
972 V4L2_CID_AUTO_WHITE_BALANCE
, 0, 1, 1, 1);
973 priv
->blue
= v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
974 V4L2_CID_BLUE_BALANCE
, 0, 0xff, 1, DEF_BLUE
);
975 priv
->red
= v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
976 V4L2_CID_RED_BALANCE
, 0, 0xff, 1, DEF_RED
);
977 v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
978 V4L2_CID_SATURATION
, 0, 0xf, 1, 0x8);
979 v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
980 V4L2_CID_HUE
, 0, HUE_MASK
, 1, DEF_HUE
);
981 v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
982 V4L2_CID_BRIGHTNESS
, 0, 0xff, 1, 0x80);
983 priv
->autoexposure
= v4l2_ctrl_new_std_menu(&priv
->hdl
,
984 &ov6550_ctrl_ops
, V4L2_CID_EXPOSURE_AUTO
,
985 V4L2_EXPOSURE_MANUAL
, 0, V4L2_EXPOSURE_AUTO
);
986 priv
->exposure
= v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
987 V4L2_CID_EXPOSURE
, 0, 0xff, 1, DEF_AECH
);
988 v4l2_ctrl_new_std(&priv
->hdl
, &ov6550_ctrl_ops
,
989 V4L2_CID_GAMMA
, 0, 0xff, 1, 0x12);
991 priv
->subdev
.ctrl_handler
= &priv
->hdl
;
992 if (priv
->hdl
.error
) {
993 int err
= priv
->hdl
.error
;
998 v4l2_ctrl_auto_cluster(2, &priv
->autogain
, 0, true);
999 v4l2_ctrl_auto_cluster(3, &priv
->autowb
, 0, true);
1000 v4l2_ctrl_auto_cluster(2, &priv
->autoexposure
,
1001 V4L2_EXPOSURE_MANUAL
, true);
1003 priv
->rect
.left
= DEF_HSTRT
<< 1;
1004 priv
->rect
.top
= DEF_VSTRT
<< 1;
1005 priv
->rect
.width
= W_CIF
;
1006 priv
->rect
.height
= H_CIF
;
1007 priv
->half_scale
= false;
1008 priv
->code
= V4L2_MBUS_FMT_YUYV8_2X8
;
1009 priv
->colorspace
= V4L2_COLORSPACE_JPEG
;
1011 ret
= ov6650_video_probe(client
);
1013 ret
= v4l2_ctrl_handler_setup(&priv
->hdl
);
1016 v4l2_ctrl_handler_free(&priv
->hdl
);
1023 static int ov6650_remove(struct i2c_client
*client
)
1025 struct ov6650
*priv
= to_ov6650(client
);
1027 v4l2_device_unregister_subdev(&priv
->subdev
);
1028 v4l2_ctrl_handler_free(&priv
->hdl
);
1033 static const struct i2c_device_id ov6650_id
[] = {
1037 MODULE_DEVICE_TABLE(i2c
, ov6650_id
);
1039 static struct i2c_driver ov6650_i2c_driver
= {
1043 .probe
= ov6650_probe
,
1044 .remove
= ov6650_remove
,
1045 .id_table
= ov6650_id
,
1048 static int __init
ov6650_module_init(void)
1050 return i2c_add_driver(&ov6650_i2c_driver
);
1053 static void __exit
ov6650_module_exit(void)
1055 i2c_del_driver(&ov6650_i2c_driver
);
1058 module_init(ov6650_module_init
);
1059 module_exit(ov6650_module_exit
);
1061 MODULE_DESCRIPTION("SoC Camera driver for OmniVision OV6650");
1062 MODULE_AUTHOR("Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>");
1063 MODULE_LICENSE("GPL v2");