4 * Copyright (C) 2005 Mike Isely <isely@pobox.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <linux/errno.h>
22 #include <linux/string.h>
23 #include <linux/slab.h>
24 #include <linux/module.h>
25 #include <linux/firmware.h>
26 #include <linux/videodev2.h>
27 #include <media/v4l2-common.h>
28 #include <media/tuner.h>
30 #include "pvrusb2-std.h"
31 #include "pvrusb2-util.h"
32 #include "pvrusb2-hdw.h"
33 #include "pvrusb2-i2c-core.h"
34 #include "pvrusb2-eeprom.h"
35 #include "pvrusb2-hdw-internal.h"
36 #include "pvrusb2-encoder.h"
37 #include "pvrusb2-debug.h"
38 #include "pvrusb2-fx2-cmd.h"
39 #include "pvrusb2-wm8775.h"
40 #include "pvrusb2-video-v4l.h"
41 #include "pvrusb2-cx2584x-v4l.h"
42 #include "pvrusb2-cs53l32a.h"
43 #include "pvrusb2-audio.h"
45 #define TV_MIN_FREQ 55250000L
46 #define TV_MAX_FREQ 850000000L
48 /* This defines a minimum interval that the decoder must remain quiet
49 before we are allowed to start it running. */
50 #define TIME_MSEC_DECODER_WAIT 50
52 /* This defines a minimum interval that the decoder must be allowed to run
53 before we can safely begin using its streaming output. */
54 #define TIME_MSEC_DECODER_STABILIZATION_WAIT 300
56 /* This defines a minimum interval that the encoder must remain quiet
57 before we are allowed to configure it. */
58 #define TIME_MSEC_ENCODER_WAIT 50
60 /* This defines the minimum interval that the encoder must successfully run
61 before we consider that the encoder has run at least once since its
62 firmware has been loaded. This measurement is in important for cases
63 where we can't do something until we know that the encoder has been run
65 #define TIME_MSEC_ENCODER_OK 250
67 static struct pvr2_hdw
*unit_pointers
[PVR_NUM
] = {[ 0 ... PVR_NUM
-1 ] = NULL
};
68 static DEFINE_MUTEX(pvr2_unit_mtx
);
71 static int procreload
;
72 static int tuner
[PVR_NUM
] = { [0 ... PVR_NUM
-1] = -1 };
73 static int tolerance
[PVR_NUM
] = { [0 ... PVR_NUM
-1] = 0 };
74 static int video_std
[PVR_NUM
] = { [0 ... PVR_NUM
-1] = 0 };
75 static int init_pause_msec
;
77 module_param(ctlchg
, int, S_IRUGO
|S_IWUSR
);
78 MODULE_PARM_DESC(ctlchg
, "0=optimize ctl change 1=always accept new ctl value");
79 module_param(init_pause_msec
, int, S_IRUGO
|S_IWUSR
);
80 MODULE_PARM_DESC(init_pause_msec
, "hardware initialization settling delay");
81 module_param(procreload
, int, S_IRUGO
|S_IWUSR
);
82 MODULE_PARM_DESC(procreload
,
83 "Attempt init failure recovery with firmware reload");
84 module_param_array(tuner
, int, NULL
, 0444);
85 MODULE_PARM_DESC(tuner
,"specify installed tuner type");
86 module_param_array(video_std
, int, NULL
, 0444);
87 MODULE_PARM_DESC(video_std
,"specify initial video standard");
88 module_param_array(tolerance
, int, NULL
, 0444);
89 MODULE_PARM_DESC(tolerance
,"specify stream error tolerance");
91 /* US Broadcast channel 3 (61.25 MHz), to help with testing */
92 static int default_tv_freq
= 61250000L;
93 /* 104.3 MHz, a usable FM station for my area */
94 static int default_radio_freq
= 104300000L;
96 module_param_named(tv_freq
, default_tv_freq
, int, 0444);
97 MODULE_PARM_DESC(tv_freq
, "specify initial television frequency");
98 module_param_named(radio_freq
, default_radio_freq
, int, 0444);
99 MODULE_PARM_DESC(radio_freq
, "specify initial radio frequency");
101 #define PVR2_CTL_WRITE_ENDPOINT 0x01
102 #define PVR2_CTL_READ_ENDPOINT 0x81
104 #define PVR2_GPIO_IN 0x9008
105 #define PVR2_GPIO_OUT 0x900c
106 #define PVR2_GPIO_DIR 0x9020
108 #define trace_firmware(...) pvr2_trace(PVR2_TRACE_FIRMWARE,__VA_ARGS__)
110 #define PVR2_FIRMWARE_ENDPOINT 0x02
112 /* size of a firmware chunk */
113 #define FIRMWARE_CHUNK_SIZE 0x2000
115 typedef void (*pvr2_subdev_update_func
)(struct pvr2_hdw
*,
116 struct v4l2_subdev
*);
118 static const pvr2_subdev_update_func pvr2_module_update_functions
[] = {
119 [PVR2_CLIENT_ID_WM8775
] = pvr2_wm8775_subdev_update
,
120 [PVR2_CLIENT_ID_SAA7115
] = pvr2_saa7115_subdev_update
,
121 [PVR2_CLIENT_ID_MSP3400
] = pvr2_msp3400_subdev_update
,
122 [PVR2_CLIENT_ID_CX25840
] = pvr2_cx25840_subdev_update
,
123 [PVR2_CLIENT_ID_CS53L32A
] = pvr2_cs53l32a_subdev_update
,
126 static const char *module_names
[] = {
127 [PVR2_CLIENT_ID_MSP3400
] = "msp3400",
128 [PVR2_CLIENT_ID_CX25840
] = "cx25840",
129 [PVR2_CLIENT_ID_SAA7115
] = "saa7115",
130 [PVR2_CLIENT_ID_TUNER
] = "tuner",
131 [PVR2_CLIENT_ID_DEMOD
] = "tuner",
132 [PVR2_CLIENT_ID_CS53L32A
] = "cs53l32a",
133 [PVR2_CLIENT_ID_WM8775
] = "wm8775",
137 static const unsigned char *module_i2c_addresses
[] = {
138 [PVR2_CLIENT_ID_TUNER
] = "\x60\x61\x62\x63",
139 [PVR2_CLIENT_ID_DEMOD
] = "\x43",
140 [PVR2_CLIENT_ID_MSP3400
] = "\x40",
141 [PVR2_CLIENT_ID_SAA7115
] = "\x21",
142 [PVR2_CLIENT_ID_WM8775
] = "\x1b",
143 [PVR2_CLIENT_ID_CX25840
] = "\x44",
144 [PVR2_CLIENT_ID_CS53L32A
] = "\x11",
148 static const char *ir_scheme_names
[] = {
149 [PVR2_IR_SCHEME_NONE
] = "none",
150 [PVR2_IR_SCHEME_29XXX
] = "29xxx",
151 [PVR2_IR_SCHEME_24XXX
] = "24xxx (29xxx emulation)",
152 [PVR2_IR_SCHEME_24XXX_MCE
] = "24xxx (MCE device)",
153 [PVR2_IR_SCHEME_ZILOG
] = "Zilog",
157 /* Define the list of additional controls we'll dynamically construct based
158 on query of the cx2341x module. */
159 struct pvr2_mpeg_ids
{
163 static const struct pvr2_mpeg_ids mpeg_ids
[] = {
165 .strid
= "audio_layer",
166 .id
= V4L2_CID_MPEG_AUDIO_ENCODING
,
168 .strid
= "audio_bitrate",
169 .id
= V4L2_CID_MPEG_AUDIO_L2_BITRATE
,
171 /* Already using audio_mode elsewhere :-( */
172 .strid
= "mpeg_audio_mode",
173 .id
= V4L2_CID_MPEG_AUDIO_MODE
,
175 .strid
= "mpeg_audio_mode_extension",
176 .id
= V4L2_CID_MPEG_AUDIO_MODE_EXTENSION
,
178 .strid
= "audio_emphasis",
179 .id
= V4L2_CID_MPEG_AUDIO_EMPHASIS
,
181 .strid
= "audio_crc",
182 .id
= V4L2_CID_MPEG_AUDIO_CRC
,
184 .strid
= "video_aspect",
185 .id
= V4L2_CID_MPEG_VIDEO_ASPECT
,
187 .strid
= "video_b_frames",
188 .id
= V4L2_CID_MPEG_VIDEO_B_FRAMES
,
190 .strid
= "video_gop_size",
191 .id
= V4L2_CID_MPEG_VIDEO_GOP_SIZE
,
193 .strid
= "video_gop_closure",
194 .id
= V4L2_CID_MPEG_VIDEO_GOP_CLOSURE
,
196 .strid
= "video_bitrate_mode",
197 .id
= V4L2_CID_MPEG_VIDEO_BITRATE_MODE
,
199 .strid
= "video_bitrate",
200 .id
= V4L2_CID_MPEG_VIDEO_BITRATE
,
202 .strid
= "video_bitrate_peak",
203 .id
= V4L2_CID_MPEG_VIDEO_BITRATE_PEAK
,
205 .strid
= "video_temporal_decimation",
206 .id
= V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION
,
208 .strid
= "stream_type",
209 .id
= V4L2_CID_MPEG_STREAM_TYPE
,
211 .strid
= "video_spatial_filter_mode",
212 .id
= V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE
,
214 .strid
= "video_spatial_filter",
215 .id
= V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER
,
217 .strid
= "video_luma_spatial_filter_type",
218 .id
= V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE
,
220 .strid
= "video_chroma_spatial_filter_type",
221 .id
= V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE
,
223 .strid
= "video_temporal_filter_mode",
224 .id
= V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE
,
226 .strid
= "video_temporal_filter",
227 .id
= V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER
,
229 .strid
= "video_median_filter_type",
230 .id
= V4L2_CID_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE
,
232 .strid
= "video_luma_median_filter_top",
233 .id
= V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_TOP
,
235 .strid
= "video_luma_median_filter_bottom",
236 .id
= V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_BOTTOM
,
238 .strid
= "video_chroma_median_filter_top",
239 .id
= V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP
,
241 .strid
= "video_chroma_median_filter_bottom",
242 .id
= V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_BOTTOM
,
245 #define MPEGDEF_COUNT ARRAY_SIZE(mpeg_ids)
248 static const char *control_values_srate
[] = {
249 [V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100
] = "44.1 kHz",
250 [V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000
] = "48 kHz",
251 [V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000
] = "32 kHz",
256 static const char *control_values_input
[] = {
257 [PVR2_CVAL_INPUT_TV
] = "television", /*xawtv needs this name*/
258 [PVR2_CVAL_INPUT_DTV
] = "dtv",
259 [PVR2_CVAL_INPUT_RADIO
] = "radio",
260 [PVR2_CVAL_INPUT_SVIDEO
] = "s-video",
261 [PVR2_CVAL_INPUT_COMPOSITE
] = "composite",
265 static const char *control_values_audiomode
[] = {
266 [V4L2_TUNER_MODE_MONO
] = "Mono",
267 [V4L2_TUNER_MODE_STEREO
] = "Stereo",
268 [V4L2_TUNER_MODE_LANG1
] = "Lang1",
269 [V4L2_TUNER_MODE_LANG2
] = "Lang2",
270 [V4L2_TUNER_MODE_LANG1_LANG2
] = "Lang1+Lang2",
274 static const char *control_values_hsm
[] = {
275 [PVR2_CVAL_HSM_FAIL
] = "Fail",
276 [PVR2_CVAL_HSM_HIGH
] = "High",
277 [PVR2_CVAL_HSM_FULL
] = "Full",
281 static const char *pvr2_state_names
[] = {
282 [PVR2_STATE_NONE
] = "none",
283 [PVR2_STATE_DEAD
] = "dead",
284 [PVR2_STATE_COLD
] = "cold",
285 [PVR2_STATE_WARM
] = "warm",
286 [PVR2_STATE_ERROR
] = "error",
287 [PVR2_STATE_READY
] = "ready",
288 [PVR2_STATE_RUN
] = "run",
292 struct pvr2_fx2cmd_descdef
{
297 static const struct pvr2_fx2cmd_descdef pvr2_fx2cmd_desc
[] = {
298 {FX2CMD_MEM_WRITE_DWORD
, "write encoder dword"},
299 {FX2CMD_MEM_READ_DWORD
, "read encoder dword"},
300 {FX2CMD_HCW_ZILOG_RESET
, "zilog IR reset control"},
301 {FX2CMD_MEM_READ_64BYTES
, "read encoder 64bytes"},
302 {FX2CMD_REG_WRITE
, "write encoder register"},
303 {FX2CMD_REG_READ
, "read encoder register"},
304 {FX2CMD_MEMSEL
, "encoder memsel"},
305 {FX2CMD_I2C_WRITE
, "i2c write"},
306 {FX2CMD_I2C_READ
, "i2c read"},
307 {FX2CMD_GET_USB_SPEED
, "get USB speed"},
308 {FX2CMD_STREAMING_ON
, "stream on"},
309 {FX2CMD_STREAMING_OFF
, "stream off"},
310 {FX2CMD_FWPOST1
, "fwpost1"},
311 {FX2CMD_POWER_OFF
, "power off"},
312 {FX2CMD_POWER_ON
, "power on"},
313 {FX2CMD_DEEP_RESET
, "deep reset"},
314 {FX2CMD_GET_EEPROM_ADDR
, "get rom addr"},
315 {FX2CMD_GET_IR_CODE
, "get IR code"},
316 {FX2CMD_HCW_DEMOD_RESETIN
, "hcw demod resetin"},
317 {FX2CMD_HCW_DTV_STREAMING_ON
, "hcw dtv stream on"},
318 {FX2CMD_HCW_DTV_STREAMING_OFF
, "hcw dtv stream off"},
319 {FX2CMD_ONAIR_DTV_STREAMING_ON
, "onair dtv stream on"},
320 {FX2CMD_ONAIR_DTV_STREAMING_OFF
, "onair dtv stream off"},
321 {FX2CMD_ONAIR_DTV_POWER_ON
, "onair dtv power on"},
322 {FX2CMD_ONAIR_DTV_POWER_OFF
, "onair dtv power off"},
326 static int pvr2_hdw_set_input(struct pvr2_hdw
*hdw
,int v
);
327 static void pvr2_hdw_state_sched(struct pvr2_hdw
*);
328 static int pvr2_hdw_state_eval(struct pvr2_hdw
*);
329 static void pvr2_hdw_set_cur_freq(struct pvr2_hdw
*,unsigned long);
330 static void pvr2_hdw_worker_poll(struct work_struct
*work
);
331 static int pvr2_hdw_wait(struct pvr2_hdw
*,int state
);
332 static int pvr2_hdw_untrip_unlocked(struct pvr2_hdw
*);
333 static void pvr2_hdw_state_log_state(struct pvr2_hdw
*);
334 static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw
*hdw
,int runFl
);
335 static int pvr2_hdw_commit_setup(struct pvr2_hdw
*hdw
);
336 static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw
*hdw
);
337 static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw
*hdw
);
338 static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw
*hdw
);
339 static void pvr2_hdw_quiescent_timeout(unsigned long);
340 static void pvr2_hdw_decoder_stabilization_timeout(unsigned long);
341 static void pvr2_hdw_encoder_wait_timeout(unsigned long);
342 static void pvr2_hdw_encoder_run_timeout(unsigned long);
343 static int pvr2_issue_simple_cmd(struct pvr2_hdw
*,u32
);
344 static int pvr2_send_request_ex(struct pvr2_hdw
*hdw
,
345 unsigned int timeout
,int probe_fl
,
346 void *write_data
,unsigned int write_len
,
347 void *read_data
,unsigned int read_len
);
348 static int pvr2_hdw_check_cropcap(struct pvr2_hdw
*hdw
);
351 static void trace_stbit(const char *name
,int val
)
353 pvr2_trace(PVR2_TRACE_STBITS
,
354 "State bit %s <-- %s",
355 name
,(val
? "true" : "false"));
358 static int ctrl_channelfreq_get(struct pvr2_ctrl
*cptr
,int *vp
)
360 struct pvr2_hdw
*hdw
= cptr
->hdw
;
361 if ((hdw
->freqProgSlot
> 0) && (hdw
->freqProgSlot
<= FREQTABLE_SIZE
)) {
362 *vp
= hdw
->freqTable
[hdw
->freqProgSlot
-1];
369 static int ctrl_channelfreq_set(struct pvr2_ctrl
*cptr
,int m
,int v
)
371 struct pvr2_hdw
*hdw
= cptr
->hdw
;
372 unsigned int slotId
= hdw
->freqProgSlot
;
373 if ((slotId
> 0) && (slotId
<= FREQTABLE_SIZE
)) {
374 hdw
->freqTable
[slotId
-1] = v
;
375 /* Handle side effects correctly - if we're tuned to this
376 slot, then forgot the slot id relation since the stored
377 frequency has been changed. */
378 if (hdw
->freqSelector
) {
379 if (hdw
->freqSlotRadio
== slotId
) {
380 hdw
->freqSlotRadio
= 0;
383 if (hdw
->freqSlotTelevision
== slotId
) {
384 hdw
->freqSlotTelevision
= 0;
391 static int ctrl_channelprog_get(struct pvr2_ctrl
*cptr
,int *vp
)
393 *vp
= cptr
->hdw
->freqProgSlot
;
397 static int ctrl_channelprog_set(struct pvr2_ctrl
*cptr
,int m
,int v
)
399 struct pvr2_hdw
*hdw
= cptr
->hdw
;
400 if ((v
>= 0) && (v
<= FREQTABLE_SIZE
)) {
401 hdw
->freqProgSlot
= v
;
406 static int ctrl_channel_get(struct pvr2_ctrl
*cptr
,int *vp
)
408 struct pvr2_hdw
*hdw
= cptr
->hdw
;
409 *vp
= hdw
->freqSelector
? hdw
->freqSlotRadio
: hdw
->freqSlotTelevision
;
413 static int ctrl_channel_set(struct pvr2_ctrl
*cptr
,int m
,int slotId
)
416 struct pvr2_hdw
*hdw
= cptr
->hdw
;
417 if ((slotId
< 0) || (slotId
> FREQTABLE_SIZE
)) return 0;
419 freq
= hdw
->freqTable
[slotId
-1];
421 pvr2_hdw_set_cur_freq(hdw
,freq
);
423 if (hdw
->freqSelector
) {
424 hdw
->freqSlotRadio
= slotId
;
426 hdw
->freqSlotTelevision
= slotId
;
431 static int ctrl_freq_get(struct pvr2_ctrl
*cptr
,int *vp
)
433 *vp
= pvr2_hdw_get_cur_freq(cptr
->hdw
);
437 static int ctrl_freq_is_dirty(struct pvr2_ctrl
*cptr
)
439 return cptr
->hdw
->freqDirty
!= 0;
442 static void ctrl_freq_clear_dirty(struct pvr2_ctrl
*cptr
)
444 cptr
->hdw
->freqDirty
= 0;
447 static int ctrl_freq_set(struct pvr2_ctrl
*cptr
,int m
,int v
)
449 pvr2_hdw_set_cur_freq(cptr
->hdw
,v
);
453 static int ctrl_cropl_min_get(struct pvr2_ctrl
*cptr
, int *left
)
455 struct v4l2_cropcap
*cap
= &cptr
->hdw
->cropcap_info
;
456 int stat
= pvr2_hdw_check_cropcap(cptr
->hdw
);
460 *left
= cap
->bounds
.left
;
464 static int ctrl_cropl_max_get(struct pvr2_ctrl
*cptr
, int *left
)
466 struct v4l2_cropcap
*cap
= &cptr
->hdw
->cropcap_info
;
467 int stat
= pvr2_hdw_check_cropcap(cptr
->hdw
);
471 *left
= cap
->bounds
.left
;
472 if (cap
->bounds
.width
> cptr
->hdw
->cropw_val
) {
473 *left
+= cap
->bounds
.width
- cptr
->hdw
->cropw_val
;
478 static int ctrl_cropt_min_get(struct pvr2_ctrl
*cptr
, int *top
)
480 struct v4l2_cropcap
*cap
= &cptr
->hdw
->cropcap_info
;
481 int stat
= pvr2_hdw_check_cropcap(cptr
->hdw
);
485 *top
= cap
->bounds
.top
;
489 static int ctrl_cropt_max_get(struct pvr2_ctrl
*cptr
, int *top
)
491 struct v4l2_cropcap
*cap
= &cptr
->hdw
->cropcap_info
;
492 int stat
= pvr2_hdw_check_cropcap(cptr
->hdw
);
496 *top
= cap
->bounds
.top
;
497 if (cap
->bounds
.height
> cptr
->hdw
->croph_val
) {
498 *top
+= cap
->bounds
.height
- cptr
->hdw
->croph_val
;
503 static int ctrl_cropw_max_get(struct pvr2_ctrl
*cptr
, int *width
)
505 struct v4l2_cropcap
*cap
= &cptr
->hdw
->cropcap_info
;
506 int stat
, bleftend
, cleft
;
508 stat
= pvr2_hdw_check_cropcap(cptr
->hdw
);
512 bleftend
= cap
->bounds
.left
+cap
->bounds
.width
;
513 cleft
= cptr
->hdw
->cropl_val
;
515 *width
= cleft
< bleftend
? bleftend
-cleft
: 0;
519 static int ctrl_croph_max_get(struct pvr2_ctrl
*cptr
, int *height
)
521 struct v4l2_cropcap
*cap
= &cptr
->hdw
->cropcap_info
;
522 int stat
, btopend
, ctop
;
524 stat
= pvr2_hdw_check_cropcap(cptr
->hdw
);
528 btopend
= cap
->bounds
.top
+cap
->bounds
.height
;
529 ctop
= cptr
->hdw
->cropt_val
;
531 *height
= ctop
< btopend
? btopend
-ctop
: 0;
535 static int ctrl_get_cropcapbl(struct pvr2_ctrl
*cptr
, int *val
)
537 struct v4l2_cropcap
*cap
= &cptr
->hdw
->cropcap_info
;
538 int stat
= pvr2_hdw_check_cropcap(cptr
->hdw
);
542 *val
= cap
->bounds
.left
;
546 static int ctrl_get_cropcapbt(struct pvr2_ctrl
*cptr
, int *val
)
548 struct v4l2_cropcap
*cap
= &cptr
->hdw
->cropcap_info
;
549 int stat
= pvr2_hdw_check_cropcap(cptr
->hdw
);
553 *val
= cap
->bounds
.top
;
557 static int ctrl_get_cropcapbw(struct pvr2_ctrl
*cptr
, int *val
)
559 struct v4l2_cropcap
*cap
= &cptr
->hdw
->cropcap_info
;
560 int stat
= pvr2_hdw_check_cropcap(cptr
->hdw
);
564 *val
= cap
->bounds
.width
;
568 static int ctrl_get_cropcapbh(struct pvr2_ctrl
*cptr
, int *val
)
570 struct v4l2_cropcap
*cap
= &cptr
->hdw
->cropcap_info
;
571 int stat
= pvr2_hdw_check_cropcap(cptr
->hdw
);
575 *val
= cap
->bounds
.height
;
579 static int ctrl_get_cropcapdl(struct pvr2_ctrl
*cptr
, int *val
)
581 struct v4l2_cropcap
*cap
= &cptr
->hdw
->cropcap_info
;
582 int stat
= pvr2_hdw_check_cropcap(cptr
->hdw
);
586 *val
= cap
->defrect
.left
;
590 static int ctrl_get_cropcapdt(struct pvr2_ctrl
*cptr
, int *val
)
592 struct v4l2_cropcap
*cap
= &cptr
->hdw
->cropcap_info
;
593 int stat
= pvr2_hdw_check_cropcap(cptr
->hdw
);
597 *val
= cap
->defrect
.top
;
601 static int ctrl_get_cropcapdw(struct pvr2_ctrl
*cptr
, int *val
)
603 struct v4l2_cropcap
*cap
= &cptr
->hdw
->cropcap_info
;
604 int stat
= pvr2_hdw_check_cropcap(cptr
->hdw
);
608 *val
= cap
->defrect
.width
;
612 static int ctrl_get_cropcapdh(struct pvr2_ctrl
*cptr
, int *val
)
614 struct v4l2_cropcap
*cap
= &cptr
->hdw
->cropcap_info
;
615 int stat
= pvr2_hdw_check_cropcap(cptr
->hdw
);
619 *val
= cap
->defrect
.height
;
623 static int ctrl_get_cropcappan(struct pvr2_ctrl
*cptr
, int *val
)
625 struct v4l2_cropcap
*cap
= &cptr
->hdw
->cropcap_info
;
626 int stat
= pvr2_hdw_check_cropcap(cptr
->hdw
);
630 *val
= cap
->pixelaspect
.numerator
;
634 static int ctrl_get_cropcappad(struct pvr2_ctrl
*cptr
, int *val
)
636 struct v4l2_cropcap
*cap
= &cptr
->hdw
->cropcap_info
;
637 int stat
= pvr2_hdw_check_cropcap(cptr
->hdw
);
641 *val
= cap
->pixelaspect
.denominator
;
645 static int ctrl_vres_max_get(struct pvr2_ctrl
*cptr
,int *vp
)
647 /* Actual maximum depends on the video standard in effect. */
648 if (cptr
->hdw
->std_mask_cur
& V4L2_STD_525_60
) {
656 static int ctrl_vres_min_get(struct pvr2_ctrl
*cptr
,int *vp
)
658 /* Actual minimum depends on device digitizer type. */
659 if (cptr
->hdw
->hdw_desc
->flag_has_cx25840
) {
667 static int ctrl_get_input(struct pvr2_ctrl
*cptr
,int *vp
)
669 *vp
= cptr
->hdw
->input_val
;
673 static int ctrl_check_input(struct pvr2_ctrl
*cptr
,int v
)
675 return ((1 << v
) & cptr
->hdw
->input_allowed_mask
) != 0;
678 static int ctrl_set_input(struct pvr2_ctrl
*cptr
,int m
,int v
)
680 return pvr2_hdw_set_input(cptr
->hdw
,v
);
683 static int ctrl_isdirty_input(struct pvr2_ctrl
*cptr
)
685 return cptr
->hdw
->input_dirty
!= 0;
688 static void ctrl_cleardirty_input(struct pvr2_ctrl
*cptr
)
690 cptr
->hdw
->input_dirty
= 0;
694 static int ctrl_freq_max_get(struct pvr2_ctrl
*cptr
, int *vp
)
697 struct pvr2_hdw
*hdw
= cptr
->hdw
;
698 if (hdw
->tuner_signal_stale
) {
699 pvr2_hdw_status_poll(hdw
);
701 fv
= hdw
->tuner_signal_info
.rangehigh
;
703 /* Safety fallback */
707 if (hdw
->tuner_signal_info
.capability
& V4L2_TUNER_CAP_LOW
) {
716 static int ctrl_freq_min_get(struct pvr2_ctrl
*cptr
, int *vp
)
719 struct pvr2_hdw
*hdw
= cptr
->hdw
;
720 if (hdw
->tuner_signal_stale
) {
721 pvr2_hdw_status_poll(hdw
);
723 fv
= hdw
->tuner_signal_info
.rangelow
;
725 /* Safety fallback */
729 if (hdw
->tuner_signal_info
.capability
& V4L2_TUNER_CAP_LOW
) {
738 static int ctrl_cx2341x_is_dirty(struct pvr2_ctrl
*cptr
)
740 return cptr
->hdw
->enc_stale
!= 0;
743 static void ctrl_cx2341x_clear_dirty(struct pvr2_ctrl
*cptr
)
745 cptr
->hdw
->enc_stale
= 0;
746 cptr
->hdw
->enc_unsafe_stale
= 0;
749 static int ctrl_cx2341x_get(struct pvr2_ctrl
*cptr
,int *vp
)
752 struct v4l2_ext_controls cs
;
753 struct v4l2_ext_control c1
;
754 memset(&cs
,0,sizeof(cs
));
755 memset(&c1
,0,sizeof(c1
));
758 c1
.id
= cptr
->info
->v4l_id
;
759 ret
= cx2341x_ext_ctrls(&cptr
->hdw
->enc_ctl_state
, 0, &cs
,
766 static int ctrl_cx2341x_set(struct pvr2_ctrl
*cptr
,int m
,int v
)
769 struct pvr2_hdw
*hdw
= cptr
->hdw
;
770 struct v4l2_ext_controls cs
;
771 struct v4l2_ext_control c1
;
772 memset(&cs
,0,sizeof(cs
));
773 memset(&c1
,0,sizeof(c1
));
776 c1
.id
= cptr
->info
->v4l_id
;
778 ret
= cx2341x_ext_ctrls(&hdw
->enc_ctl_state
,
779 hdw
->state_encoder_run
, &cs
,
782 /* Oops. cx2341x is telling us it's not safe to change
783 this control while we're capturing. Make a note of this
784 fact so that the pipeline will be stopped the next time
785 controls are committed. Then go on ahead and store this
787 ret
= cx2341x_ext_ctrls(&hdw
->enc_ctl_state
,
790 if (!ret
) hdw
->enc_unsafe_stale
= !0;
797 static unsigned int ctrl_cx2341x_getv4lflags(struct pvr2_ctrl
*cptr
)
799 struct v4l2_queryctrl qctrl
;
800 struct pvr2_ctl_info
*info
;
801 qctrl
.id
= cptr
->info
->v4l_id
;
802 cx2341x_ctrl_query(&cptr
->hdw
->enc_ctl_state
,&qctrl
);
803 /* Strip out the const so we can adjust a function pointer. It's
804 OK to do this here because we know this is a dynamically created
805 control, so the underlying storage for the info pointer is (a)
806 private to us, and (b) not in read-only storage. Either we do
807 this or we significantly complicate the underlying control
809 info
= (struct pvr2_ctl_info
*)(cptr
->info
);
810 if (qctrl
.flags
& V4L2_CTRL_FLAG_READ_ONLY
) {
811 if (info
->set_value
) {
812 info
->set_value
= NULL
;
815 if (!(info
->set_value
)) {
816 info
->set_value
= ctrl_cx2341x_set
;
822 static int ctrl_streamingenabled_get(struct pvr2_ctrl
*cptr
,int *vp
)
824 *vp
= cptr
->hdw
->state_pipeline_req
;
828 static int ctrl_masterstate_get(struct pvr2_ctrl
*cptr
,int *vp
)
830 *vp
= cptr
->hdw
->master_state
;
834 static int ctrl_hsm_get(struct pvr2_ctrl
*cptr
,int *vp
)
836 int result
= pvr2_hdw_is_hsm(cptr
->hdw
);
837 *vp
= PVR2_CVAL_HSM_FULL
;
838 if (result
< 0) *vp
= PVR2_CVAL_HSM_FAIL
;
839 if (result
) *vp
= PVR2_CVAL_HSM_HIGH
;
843 static int ctrl_stdavail_get(struct pvr2_ctrl
*cptr
,int *vp
)
845 *vp
= cptr
->hdw
->std_mask_avail
;
849 static int ctrl_stdavail_set(struct pvr2_ctrl
*cptr
,int m
,int v
)
851 struct pvr2_hdw
*hdw
= cptr
->hdw
;
853 ns
= hdw
->std_mask_avail
;
854 ns
= (ns
& ~m
) | (v
& m
);
855 if (ns
== hdw
->std_mask_avail
) return 0;
856 hdw
->std_mask_avail
= ns
;
857 pvr2_hdw_internal_set_std_avail(hdw
);
858 pvr2_hdw_internal_find_stdenum(hdw
);
862 static int ctrl_std_val_to_sym(struct pvr2_ctrl
*cptr
,int msk
,int val
,
863 char *bufPtr
,unsigned int bufSize
,
866 *len
= pvr2_std_id_to_str(bufPtr
,bufSize
,msk
& val
);
870 static int ctrl_std_sym_to_val(struct pvr2_ctrl
*cptr
,
871 const char *bufPtr
,unsigned int bufSize
,
876 ret
= pvr2_std_str_to_id(&id
,bufPtr
,bufSize
);
877 if (ret
< 0) return ret
;
878 if (mskp
) *mskp
= id
;
879 if (valp
) *valp
= id
;
883 static int ctrl_stdcur_get(struct pvr2_ctrl
*cptr
,int *vp
)
885 *vp
= cptr
->hdw
->std_mask_cur
;
889 static int ctrl_stdcur_set(struct pvr2_ctrl
*cptr
,int m
,int v
)
891 struct pvr2_hdw
*hdw
= cptr
->hdw
;
893 ns
= hdw
->std_mask_cur
;
894 ns
= (ns
& ~m
) | (v
& m
);
895 if (ns
== hdw
->std_mask_cur
) return 0;
896 hdw
->std_mask_cur
= ns
;
898 pvr2_hdw_internal_find_stdenum(hdw
);
902 static int ctrl_stdcur_is_dirty(struct pvr2_ctrl
*cptr
)
904 return cptr
->hdw
->std_dirty
!= 0;
907 static void ctrl_stdcur_clear_dirty(struct pvr2_ctrl
*cptr
)
909 cptr
->hdw
->std_dirty
= 0;
912 static int ctrl_signal_get(struct pvr2_ctrl
*cptr
,int *vp
)
914 struct pvr2_hdw
*hdw
= cptr
->hdw
;
915 pvr2_hdw_status_poll(hdw
);
916 *vp
= hdw
->tuner_signal_info
.signal
;
920 static int ctrl_audio_modes_present_get(struct pvr2_ctrl
*cptr
,int *vp
)
923 unsigned int subchan
;
924 struct pvr2_hdw
*hdw
= cptr
->hdw
;
925 pvr2_hdw_status_poll(hdw
);
926 subchan
= hdw
->tuner_signal_info
.rxsubchans
;
927 if (subchan
& V4L2_TUNER_SUB_MONO
) {
928 val
|= (1 << V4L2_TUNER_MODE_MONO
);
930 if (subchan
& V4L2_TUNER_SUB_STEREO
) {
931 val
|= (1 << V4L2_TUNER_MODE_STEREO
);
933 if (subchan
& V4L2_TUNER_SUB_LANG1
) {
934 val
|= (1 << V4L2_TUNER_MODE_LANG1
);
936 if (subchan
& V4L2_TUNER_SUB_LANG2
) {
937 val
|= (1 << V4L2_TUNER_MODE_LANG2
);
944 static int ctrl_stdenumcur_set(struct pvr2_ctrl
*cptr
,int m
,int v
)
946 struct pvr2_hdw
*hdw
= cptr
->hdw
;
947 if (v
< 0) return -EINVAL
;
948 if (v
> hdw
->std_enum_cnt
) return -EINVAL
;
949 hdw
->std_enum_cur
= v
;
952 if (hdw
->std_mask_cur
== hdw
->std_defs
[v
].id
) return 0;
953 hdw
->std_mask_cur
= hdw
->std_defs
[v
].id
;
959 static int ctrl_stdenumcur_get(struct pvr2_ctrl
*cptr
,int *vp
)
961 *vp
= cptr
->hdw
->std_enum_cur
;
966 static int ctrl_stdenumcur_is_dirty(struct pvr2_ctrl
*cptr
)
968 return cptr
->hdw
->std_dirty
!= 0;
972 static void ctrl_stdenumcur_clear_dirty(struct pvr2_ctrl
*cptr
)
974 cptr
->hdw
->std_dirty
= 0;
978 #define DEFINT(vmin,vmax) \
979 .type = pvr2_ctl_int, \
980 .def.type_int.min_value = vmin, \
981 .def.type_int.max_value = vmax
983 #define DEFENUM(tab) \
984 .type = pvr2_ctl_enum, \
985 .def.type_enum.count = ARRAY_SIZE(tab), \
986 .def.type_enum.value_names = tab
989 .type = pvr2_ctl_bool
991 #define DEFMASK(msk,tab) \
992 .type = pvr2_ctl_bitmask, \
993 .def.type_bitmask.valid_bits = msk, \
994 .def.type_bitmask.bit_names = tab
996 #define DEFREF(vname) \
997 .set_value = ctrl_set_##vname, \
998 .get_value = ctrl_get_##vname, \
999 .is_dirty = ctrl_isdirty_##vname, \
1000 .clear_dirty = ctrl_cleardirty_##vname
1003 #define VCREATE_FUNCS(vname) \
1004 static int ctrl_get_##vname(struct pvr2_ctrl *cptr,int *vp) \
1005 {*vp = cptr->hdw->vname##_val; return 0;} \
1006 static int ctrl_set_##vname(struct pvr2_ctrl *cptr,int m,int v) \
1007 {cptr->hdw->vname##_val = v; cptr->hdw->vname##_dirty = !0; return 0;} \
1008 static int ctrl_isdirty_##vname(struct pvr2_ctrl *cptr) \
1009 {return cptr->hdw->vname##_dirty != 0;} \
1010 static void ctrl_cleardirty_##vname(struct pvr2_ctrl *cptr) \
1011 {cptr->hdw->vname##_dirty = 0;}
1013 VCREATE_FUNCS(brightness
)
1014 VCREATE_FUNCS(contrast
)
1015 VCREATE_FUNCS(saturation
)
1017 VCREATE_FUNCS(volume
)
1018 VCREATE_FUNCS(balance
)
1020 VCREATE_FUNCS(treble
)
1022 VCREATE_FUNCS(cropl
)
1023 VCREATE_FUNCS(cropt
)
1024 VCREATE_FUNCS(cropw
)
1025 VCREATE_FUNCS(croph
)
1026 VCREATE_FUNCS(audiomode
)
1027 VCREATE_FUNCS(res_hor
)
1028 VCREATE_FUNCS(res_ver
)
1029 VCREATE_FUNCS(srate
)
1031 /* Table definition of all controls which can be manipulated */
1032 static const struct pvr2_ctl_info control_defs
[] = {
1034 .v4l_id
= V4L2_CID_BRIGHTNESS
,
1035 .desc
= "Brightness",
1036 .name
= "brightness",
1037 .default_value
= 128,
1041 .v4l_id
= V4L2_CID_CONTRAST
,
1044 .default_value
= 68,
1048 .v4l_id
= V4L2_CID_SATURATION
,
1049 .desc
= "Saturation",
1050 .name
= "saturation",
1051 .default_value
= 64,
1055 .v4l_id
= V4L2_CID_HUE
,
1062 .v4l_id
= V4L2_CID_AUDIO_VOLUME
,
1065 .default_value
= 62000,
1069 .v4l_id
= V4L2_CID_AUDIO_BALANCE
,
1074 DEFINT(-32768,32767),
1076 .v4l_id
= V4L2_CID_AUDIO_BASS
,
1081 DEFINT(-32768,32767),
1083 .v4l_id
= V4L2_CID_AUDIO_TREBLE
,
1088 DEFINT(-32768,32767),
1090 .v4l_id
= V4L2_CID_AUDIO_MUTE
,
1097 .desc
= "Capture crop left margin",
1098 .name
= "crop_left",
1099 .internal_id
= PVR2_CID_CROPL
,
1103 .get_min_value
= ctrl_cropl_min_get
,
1104 .get_max_value
= ctrl_cropl_max_get
,
1105 .get_def_value
= ctrl_get_cropcapdl
,
1107 .desc
= "Capture crop top margin",
1109 .internal_id
= PVR2_CID_CROPT
,
1113 .get_min_value
= ctrl_cropt_min_get
,
1114 .get_max_value
= ctrl_cropt_max_get
,
1115 .get_def_value
= ctrl_get_cropcapdt
,
1117 .desc
= "Capture crop width",
1118 .name
= "crop_width",
1119 .internal_id
= PVR2_CID_CROPW
,
1120 .default_value
= 720,
1123 .get_max_value
= ctrl_cropw_max_get
,
1124 .get_def_value
= ctrl_get_cropcapdw
,
1126 .desc
= "Capture crop height",
1127 .name
= "crop_height",
1128 .internal_id
= PVR2_CID_CROPH
,
1129 .default_value
= 480,
1132 .get_max_value
= ctrl_croph_max_get
,
1133 .get_def_value
= ctrl_get_cropcapdh
,
1135 .desc
= "Capture capability pixel aspect numerator",
1136 .name
= "cropcap_pixel_numerator",
1137 .internal_id
= PVR2_CID_CROPCAPPAN
,
1138 .get_value
= ctrl_get_cropcappan
,
1140 .desc
= "Capture capability pixel aspect denominator",
1141 .name
= "cropcap_pixel_denominator",
1142 .internal_id
= PVR2_CID_CROPCAPPAD
,
1143 .get_value
= ctrl_get_cropcappad
,
1145 .desc
= "Capture capability bounds top",
1146 .name
= "cropcap_bounds_top",
1147 .internal_id
= PVR2_CID_CROPCAPBT
,
1148 .get_value
= ctrl_get_cropcapbt
,
1150 .desc
= "Capture capability bounds left",
1151 .name
= "cropcap_bounds_left",
1152 .internal_id
= PVR2_CID_CROPCAPBL
,
1153 .get_value
= ctrl_get_cropcapbl
,
1155 .desc
= "Capture capability bounds width",
1156 .name
= "cropcap_bounds_width",
1157 .internal_id
= PVR2_CID_CROPCAPBW
,
1158 .get_value
= ctrl_get_cropcapbw
,
1160 .desc
= "Capture capability bounds height",
1161 .name
= "cropcap_bounds_height",
1162 .internal_id
= PVR2_CID_CROPCAPBH
,
1163 .get_value
= ctrl_get_cropcapbh
,
1165 .desc
= "Video Source",
1167 .internal_id
= PVR2_CID_INPUT
,
1168 .default_value
= PVR2_CVAL_INPUT_TV
,
1169 .check_value
= ctrl_check_input
,
1171 DEFENUM(control_values_input
),
1173 .desc
= "Audio Mode",
1174 .name
= "audio_mode",
1175 .internal_id
= PVR2_CID_AUDIOMODE
,
1176 .default_value
= V4L2_TUNER_MODE_STEREO
,
1178 DEFENUM(control_values_audiomode
),
1180 .desc
= "Horizontal capture resolution",
1181 .name
= "resolution_hor",
1182 .internal_id
= PVR2_CID_HRES
,
1183 .default_value
= 720,
1187 .desc
= "Vertical capture resolution",
1188 .name
= "resolution_ver",
1189 .internal_id
= PVR2_CID_VRES
,
1190 .default_value
= 480,
1193 /* Hook in check for video standard and adjust maximum
1194 depending on the standard. */
1195 .get_max_value
= ctrl_vres_max_get
,
1196 .get_min_value
= ctrl_vres_min_get
,
1198 .v4l_id
= V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ
,
1199 .default_value
= V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000
,
1200 .desc
= "Audio Sampling Frequency",
1203 DEFENUM(control_values_srate
),
1205 .desc
= "Tuner Frequency (Hz)",
1206 .name
= "frequency",
1207 .internal_id
= PVR2_CID_FREQUENCY
,
1209 .set_value
= ctrl_freq_set
,
1210 .get_value
= ctrl_freq_get
,
1211 .is_dirty
= ctrl_freq_is_dirty
,
1212 .clear_dirty
= ctrl_freq_clear_dirty
,
1214 /* Hook in check for input value (tv/radio) and adjust
1215 max/min values accordingly */
1216 .get_max_value
= ctrl_freq_max_get
,
1217 .get_min_value
= ctrl_freq_min_get
,
1221 .set_value
= ctrl_channel_set
,
1222 .get_value
= ctrl_channel_get
,
1223 DEFINT(0,FREQTABLE_SIZE
),
1225 .desc
= "Channel Program Frequency",
1226 .name
= "freq_table_value",
1227 .set_value
= ctrl_channelfreq_set
,
1228 .get_value
= ctrl_channelfreq_get
,
1230 /* Hook in check for input value (tv/radio) and adjust
1231 max/min values accordingly */
1232 .get_max_value
= ctrl_freq_max_get
,
1233 .get_min_value
= ctrl_freq_min_get
,
1235 .desc
= "Channel Program ID",
1236 .name
= "freq_table_channel",
1237 .set_value
= ctrl_channelprog_set
,
1238 .get_value
= ctrl_channelprog_get
,
1239 DEFINT(0,FREQTABLE_SIZE
),
1241 .desc
= "Streaming Enabled",
1242 .name
= "streaming_enabled",
1243 .get_value
= ctrl_streamingenabled_get
,
1246 .desc
= "USB Speed",
1247 .name
= "usb_speed",
1248 .get_value
= ctrl_hsm_get
,
1249 DEFENUM(control_values_hsm
),
1251 .desc
= "Master State",
1252 .name
= "master_state",
1253 .get_value
= ctrl_masterstate_get
,
1254 DEFENUM(pvr2_state_names
),
1256 .desc
= "Signal Present",
1257 .name
= "signal_present",
1258 .get_value
= ctrl_signal_get
,
1261 .desc
= "Audio Modes Present",
1262 .name
= "audio_modes_present",
1263 .get_value
= ctrl_audio_modes_present_get
,
1264 /* For this type we "borrow" the V4L2_TUNER_MODE enum from
1265 v4l. Nothing outside of this module cares about this,
1266 but I reuse it in order to also reuse the
1267 control_values_audiomode string table. */
1268 DEFMASK(((1 << V4L2_TUNER_MODE_MONO
)|
1269 (1 << V4L2_TUNER_MODE_STEREO
)|
1270 (1 << V4L2_TUNER_MODE_LANG1
)|
1271 (1 << V4L2_TUNER_MODE_LANG2
)),
1272 control_values_audiomode
),
1274 .desc
= "Video Standards Available Mask",
1275 .name
= "video_standard_mask_available",
1276 .internal_id
= PVR2_CID_STDAVAIL
,
1278 .get_value
= ctrl_stdavail_get
,
1279 .set_value
= ctrl_stdavail_set
,
1280 .val_to_sym
= ctrl_std_val_to_sym
,
1281 .sym_to_val
= ctrl_std_sym_to_val
,
1282 .type
= pvr2_ctl_bitmask
,
1284 .desc
= "Video Standards In Use Mask",
1285 .name
= "video_standard_mask_active",
1286 .internal_id
= PVR2_CID_STDCUR
,
1288 .get_value
= ctrl_stdcur_get
,
1289 .set_value
= ctrl_stdcur_set
,
1290 .is_dirty
= ctrl_stdcur_is_dirty
,
1291 .clear_dirty
= ctrl_stdcur_clear_dirty
,
1292 .val_to_sym
= ctrl_std_val_to_sym
,
1293 .sym_to_val
= ctrl_std_sym_to_val
,
1294 .type
= pvr2_ctl_bitmask
,
1296 .desc
= "Video Standard Name",
1297 .name
= "video_standard",
1298 .internal_id
= PVR2_CID_STDENUM
,
1300 .get_value
= ctrl_stdenumcur_get
,
1301 .set_value
= ctrl_stdenumcur_set
,
1302 .is_dirty
= ctrl_stdenumcur_is_dirty
,
1303 .clear_dirty
= ctrl_stdenumcur_clear_dirty
,
1304 .type
= pvr2_ctl_enum
,
1308 #define CTRLDEF_COUNT ARRAY_SIZE(control_defs)
1311 const char *pvr2_config_get_name(enum pvr2_config cfg
)
1314 case pvr2_config_empty
: return "empty";
1315 case pvr2_config_mpeg
: return "mpeg";
1316 case pvr2_config_vbi
: return "vbi";
1317 case pvr2_config_pcm
: return "pcm";
1318 case pvr2_config_rawvideo
: return "raw video";
1324 struct usb_device
*pvr2_hdw_get_dev(struct pvr2_hdw
*hdw
)
1326 return hdw
->usb_dev
;
1330 unsigned long pvr2_hdw_get_sn(struct pvr2_hdw
*hdw
)
1332 return hdw
->serial_number
;
1336 const char *pvr2_hdw_get_bus_info(struct pvr2_hdw
*hdw
)
1338 return hdw
->bus_info
;
1342 const char *pvr2_hdw_get_device_identifier(struct pvr2_hdw
*hdw
)
1344 return hdw
->identifier
;
1348 unsigned long pvr2_hdw_get_cur_freq(struct pvr2_hdw
*hdw
)
1350 return hdw
->freqSelector
? hdw
->freqValTelevision
: hdw
->freqValRadio
;
1353 /* Set the currently tuned frequency and account for all possible
1354 driver-core side effects of this action. */
1355 static void pvr2_hdw_set_cur_freq(struct pvr2_hdw
*hdw
,unsigned long val
)
1357 if (hdw
->input_val
== PVR2_CVAL_INPUT_RADIO
) {
1358 if (hdw
->freqSelector
) {
1359 /* Swing over to radio frequency selection */
1360 hdw
->freqSelector
= 0;
1361 hdw
->freqDirty
= !0;
1363 if (hdw
->freqValRadio
!= val
) {
1364 hdw
->freqValRadio
= val
;
1365 hdw
->freqSlotRadio
= 0;
1366 hdw
->freqDirty
= !0;
1369 if (!(hdw
->freqSelector
)) {
1370 /* Swing over to television frequency selection */
1371 hdw
->freqSelector
= 1;
1372 hdw
->freqDirty
= !0;
1374 if (hdw
->freqValTelevision
!= val
) {
1375 hdw
->freqValTelevision
= val
;
1376 hdw
->freqSlotTelevision
= 0;
1377 hdw
->freqDirty
= !0;
1382 int pvr2_hdw_get_unit_number(struct pvr2_hdw
*hdw
)
1384 return hdw
->unit_number
;
1388 /* Attempt to locate one of the given set of files. Messages are logged
1389 appropriate to what has been found. The return value will be 0 or
1390 greater on success (it will be the index of the file name found) and
1391 fw_entry will be filled in. Otherwise a negative error is returned on
1392 failure. If the return value is -ENOENT then no viable firmware file
1393 could be located. */
1394 static int pvr2_locate_firmware(struct pvr2_hdw
*hdw
,
1395 const struct firmware
**fw_entry
,
1396 const char *fwtypename
,
1397 unsigned int fwcount
,
1398 const char *fwnames
[])
1402 for (idx
= 0; idx
< fwcount
; idx
++) {
1403 ret
= request_firmware(fw_entry
,
1405 &hdw
->usb_dev
->dev
);
1407 trace_firmware("Located %s firmware: %s;"
1413 if (ret
== -ENOENT
) continue;
1414 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1415 "request_firmware fatal error with code=%d",ret
);
1418 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1420 " Device %s firmware"
1421 " seems to be missing.",
1423 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1424 "Did you install the pvrusb2 firmware files"
1425 " in their proper location?");
1427 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1428 "request_firmware unable to locate %s file %s",
1429 fwtypename
,fwnames
[0]);
1431 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1432 "request_firmware unable to locate"
1433 " one of the following %s files:",
1435 for (idx
= 0; idx
< fwcount
; idx
++) {
1436 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1437 "request_firmware: Failed to find %s",
1446 * pvr2_upload_firmware1().
1448 * Send the 8051 firmware to the device. After the upload, arrange for
1449 * device to re-enumerate.
1451 * NOTE : the pointer to the firmware data given by request_firmware()
1452 * is not suitable for an usb transaction.
1455 static int pvr2_upload_firmware1(struct pvr2_hdw
*hdw
)
1457 const struct firmware
*fw_entry
= NULL
;
1460 unsigned int fwsize
;
1464 if (!hdw
->hdw_desc
->fx2_firmware
.cnt
) {
1465 hdw
->fw1_state
= FW1_STATE_OK
;
1466 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1467 "Connected device type defines"
1468 " no firmware to upload; ignoring firmware");
1472 hdw
->fw1_state
= FW1_STATE_FAILED
; // default result
1474 trace_firmware("pvr2_upload_firmware1");
1476 ret
= pvr2_locate_firmware(hdw
,&fw_entry
,"fx2 controller",
1477 hdw
->hdw_desc
->fx2_firmware
.cnt
,
1478 hdw
->hdw_desc
->fx2_firmware
.lst
);
1480 if (ret
== -ENOENT
) hdw
->fw1_state
= FW1_STATE_MISSING
;
1484 usb_clear_halt(hdw
->usb_dev
, usb_sndbulkpipe(hdw
->usb_dev
, 0 & 0x7f));
1486 pipe
= usb_sndctrlpipe(hdw
->usb_dev
, 0);
1487 fwsize
= fw_entry
->size
;
1489 if ((fwsize
!= 0x2000) &&
1490 (!(hdw
->hdw_desc
->flag_fx2_16kb
&& (fwsize
== 0x4000)))) {
1491 if (hdw
->hdw_desc
->flag_fx2_16kb
) {
1492 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1493 "Wrong fx2 firmware size"
1494 " (expected 8192 or 16384, got %u)",
1497 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1498 "Wrong fx2 firmware size"
1499 " (expected 8192, got %u)",
1502 release_firmware(fw_entry
);
1506 fw_ptr
= kmalloc(0x800, GFP_KERNEL
);
1507 if (fw_ptr
== NULL
){
1508 release_firmware(fw_entry
);
1512 /* We have to hold the CPU during firmware upload. */
1513 pvr2_hdw_cpureset_assert(hdw
,1);
1515 /* upload the firmware to address 0000-1fff in 2048 (=0x800) bytes
1519 for (address
= 0; address
< fwsize
; address
+= 0x800) {
1520 memcpy(fw_ptr
, fw_entry
->data
+ address
, 0x800);
1521 ret
+= usb_control_msg(hdw
->usb_dev
, pipe
, 0xa0, 0x40, address
,
1522 0, fw_ptr
, 0x800, HZ
);
1525 trace_firmware("Upload done, releasing device's CPU");
1527 /* Now release the CPU. It will disconnect and reconnect later. */
1528 pvr2_hdw_cpureset_assert(hdw
,0);
1531 release_firmware(fw_entry
);
1533 trace_firmware("Upload done (%d bytes sent)",ret
);
1535 /* We should have written fwsize bytes */
1536 if (ret
== fwsize
) {
1537 hdw
->fw1_state
= FW1_STATE_RELOAD
;
1546 * pvr2_upload_firmware2()
1548 * This uploads encoder firmware on endpoint 2.
1552 int pvr2_upload_firmware2(struct pvr2_hdw
*hdw
)
1554 const struct firmware
*fw_entry
= NULL
;
1556 unsigned int pipe
, fw_len
, fw_done
, bcnt
, icnt
;
1560 static const char *fw_files
[] = {
1561 CX2341X_FIRM_ENC_FILENAME
,
1564 if (hdw
->hdw_desc
->flag_skip_cx23416_firmware
) {
1568 trace_firmware("pvr2_upload_firmware2");
1570 ret
= pvr2_locate_firmware(hdw
,&fw_entry
,"encoder",
1571 ARRAY_SIZE(fw_files
), fw_files
);
1572 if (ret
< 0) return ret
;
1575 /* Since we're about to completely reinitialize the encoder,
1576 invalidate our cached copy of its configuration state. Next
1577 time we configure the encoder, then we'll fully configure it. */
1578 hdw
->enc_cur_valid
= 0;
1580 /* Encoder is about to be reset so note that as far as we're
1581 concerned now, the encoder has never been run. */
1582 del_timer_sync(&hdw
->encoder_run_timer
);
1583 if (hdw
->state_encoder_runok
) {
1584 hdw
->state_encoder_runok
= 0;
1585 trace_stbit("state_encoder_runok",hdw
->state_encoder_runok
);
1588 /* First prepare firmware loading */
1589 ret
|= pvr2_write_register(hdw
, 0x0048, 0xffffffff); /*interrupt mask*/
1590 ret
|= pvr2_hdw_gpio_chg_dir(hdw
,0xffffffff,0x00000088); /*gpio dir*/
1591 ret
|= pvr2_hdw_gpio_chg_out(hdw
,0xffffffff,0x00000008); /*gpio output state*/
1592 ret
|= pvr2_hdw_cmd_deep_reset(hdw
);
1593 ret
|= pvr2_write_register(hdw
, 0xa064, 0x00000000); /*APU command*/
1594 ret
|= pvr2_hdw_gpio_chg_dir(hdw
,0xffffffff,0x00000408); /*gpio dir*/
1595 ret
|= pvr2_hdw_gpio_chg_out(hdw
,0xffffffff,0x00000008); /*gpio output state*/
1596 ret
|= pvr2_write_register(hdw
, 0x9058, 0xffffffed); /*VPU ctrl*/
1597 ret
|= pvr2_write_register(hdw
, 0x9054, 0xfffffffd); /*reset hw blocks*/
1598 ret
|= pvr2_write_register(hdw
, 0x07f8, 0x80000800); /*encoder SDRAM refresh*/
1599 ret
|= pvr2_write_register(hdw
, 0x07fc, 0x0000001a); /*encoder SDRAM pre-charge*/
1600 ret
|= pvr2_write_register(hdw
, 0x0700, 0x00000000); /*I2C clock*/
1601 ret
|= pvr2_write_register(hdw
, 0xaa00, 0x00000000); /*unknown*/
1602 ret
|= pvr2_write_register(hdw
, 0xaa04, 0x00057810); /*unknown*/
1603 ret
|= pvr2_write_register(hdw
, 0xaa10, 0x00148500); /*unknown*/
1604 ret
|= pvr2_write_register(hdw
, 0xaa18, 0x00840000); /*unknown*/
1605 ret
|= pvr2_issue_simple_cmd(hdw
,FX2CMD_FWPOST1
);
1606 ret
|= pvr2_issue_simple_cmd(hdw
,FX2CMD_MEMSEL
| (1 << 8) | (0 << 16));
1609 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1610 "firmware2 upload prep failed, ret=%d",ret
);
1611 release_firmware(fw_entry
);
1615 /* Now send firmware */
1617 fw_len
= fw_entry
->size
;
1619 if (fw_len
% sizeof(u32
)) {
1620 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1621 "size of %s firmware"
1622 " must be a multiple of %zu bytes",
1623 fw_files
[fwidx
],sizeof(u32
));
1624 release_firmware(fw_entry
);
1629 fw_ptr
= kmalloc(FIRMWARE_CHUNK_SIZE
, GFP_KERNEL
);
1630 if (fw_ptr
== NULL
){
1631 release_firmware(fw_entry
);
1632 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1633 "failed to allocate memory for firmware2 upload");
1638 pipe
= usb_sndbulkpipe(hdw
->usb_dev
, PVR2_FIRMWARE_ENDPOINT
);
1641 for (fw_done
= 0; fw_done
< fw_len
;) {
1642 bcnt
= fw_len
- fw_done
;
1643 if (bcnt
> FIRMWARE_CHUNK_SIZE
) bcnt
= FIRMWARE_CHUNK_SIZE
;
1644 memcpy(fw_ptr
, fw_entry
->data
+ fw_done
, bcnt
);
1645 /* Usbsnoop log shows that we must swap bytes... */
1646 /* Some background info: The data being swapped here is a
1647 firmware image destined for the mpeg encoder chip that
1648 lives at the other end of a USB endpoint. The encoder
1649 chip always talks in 32 bit chunks and its storage is
1650 organized into 32 bit words. However from the file
1651 system to the encoder chip everything is purely a byte
1652 stream. The firmware file's contents are always 32 bit
1653 swapped from what the encoder expects. Thus the need
1654 always exists to swap the bytes regardless of the endian
1655 type of the host processor and therefore swab32() makes
1657 for (icnt
= 0; icnt
< bcnt
/4 ; icnt
++)
1658 ((u32
*)fw_ptr
)[icnt
] = swab32(((u32
*)fw_ptr
)[icnt
]);
1660 ret
|= usb_bulk_msg(hdw
->usb_dev
, pipe
, fw_ptr
,bcnt
,
1661 &actual_length
, HZ
);
1662 ret
|= (actual_length
!= bcnt
);
1667 trace_firmware("upload of %s : %i / %i ",
1668 fw_files
[fwidx
],fw_done
,fw_len
);
1671 release_firmware(fw_entry
);
1674 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1675 "firmware2 upload transfer failure");
1681 ret
|= pvr2_write_register(hdw
, 0x9054, 0xffffffff); /*reset hw blocks*/
1682 ret
|= pvr2_write_register(hdw
, 0x9058, 0xffffffe8); /*VPU ctrl*/
1683 ret
|= pvr2_issue_simple_cmd(hdw
,FX2CMD_MEMSEL
| (1 << 8) | (0 << 16));
1686 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1687 "firmware2 upload post-proc failure");
1691 if (hdw
->hdw_desc
->signal_routing_scheme
==
1692 PVR2_ROUTING_SCHEME_GOTVIEW
) {
1693 /* Ensure that GPIO 11 is set to output for GOTVIEW
1695 pvr2_hdw_gpio_chg_dir(hdw
,(1 << 11),~0);
1701 static const char *pvr2_get_state_name(unsigned int st
)
1703 if (st
< ARRAY_SIZE(pvr2_state_names
)) {
1704 return pvr2_state_names
[st
];
1709 static int pvr2_decoder_enable(struct pvr2_hdw
*hdw
,int enablefl
)
1711 /* Even though we really only care about the video decoder chip at
1712 this point, we'll broadcast stream on/off to all sub-devices
1713 anyway, just in case somebody else wants to hear the
1715 pvr2_trace(PVR2_TRACE_CHIPS
, "subdev v4l2 stream=%s",
1716 (enablefl
? "on" : "off"));
1717 v4l2_device_call_all(&hdw
->v4l2_dev
, 0, video
, s_stream
, enablefl
);
1718 v4l2_device_call_all(&hdw
->v4l2_dev
, 0, audio
, s_stream
, enablefl
);
1719 if (hdw
->decoder_client_id
) {
1720 /* We get here if the encoder has been noticed. Otherwise
1721 we'll issue a warning to the user (which should
1722 normally never happen). */
1725 if (!hdw
->flag_decoder_missed
) {
1726 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1727 "WARNING: No decoder present");
1728 hdw
->flag_decoder_missed
= !0;
1729 trace_stbit("flag_decoder_missed",
1730 hdw
->flag_decoder_missed
);
1736 int pvr2_hdw_get_state(struct pvr2_hdw
*hdw
)
1738 return hdw
->master_state
;
1742 static int pvr2_hdw_untrip_unlocked(struct pvr2_hdw
*hdw
)
1744 if (!hdw
->flag_tripped
) return 0;
1745 hdw
->flag_tripped
= 0;
1746 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1747 "Clearing driver error statuss");
1752 int pvr2_hdw_untrip(struct pvr2_hdw
*hdw
)
1755 LOCK_TAKE(hdw
->big_lock
); do {
1756 fl
= pvr2_hdw_untrip_unlocked(hdw
);
1757 } while (0); LOCK_GIVE(hdw
->big_lock
);
1758 if (fl
) pvr2_hdw_state_sched(hdw
);
1765 int pvr2_hdw_get_streaming(struct pvr2_hdw
*hdw
)
1767 return hdw
->state_pipeline_req
!= 0;
1771 int pvr2_hdw_set_streaming(struct pvr2_hdw
*hdw
,int enable_flag
)
1774 LOCK_TAKE(hdw
->big_lock
); do {
1775 pvr2_hdw_untrip_unlocked(hdw
);
1776 if ((!enable_flag
) != !(hdw
->state_pipeline_req
)) {
1777 hdw
->state_pipeline_req
= enable_flag
!= 0;
1778 pvr2_trace(PVR2_TRACE_START_STOP
,
1779 "/*--TRACE_STREAM--*/ %s",
1780 enable_flag
? "enable" : "disable");
1782 pvr2_hdw_state_sched(hdw
);
1783 } while (0); LOCK_GIVE(hdw
->big_lock
);
1784 if ((ret
= pvr2_hdw_wait(hdw
,0)) < 0) return ret
;
1786 while ((st
= hdw
->master_state
) != PVR2_STATE_RUN
) {
1787 if (st
!= PVR2_STATE_READY
) return -EIO
;
1788 if ((ret
= pvr2_hdw_wait(hdw
,st
)) < 0) return ret
;
1795 int pvr2_hdw_set_stream_type(struct pvr2_hdw
*hdw
,enum pvr2_config config
)
1798 LOCK_TAKE(hdw
->big_lock
);
1799 if ((fl
= (hdw
->desired_stream_type
!= config
)) != 0) {
1800 hdw
->desired_stream_type
= config
;
1801 hdw
->state_pipeline_config
= 0;
1802 trace_stbit("state_pipeline_config",
1803 hdw
->state_pipeline_config
);
1804 pvr2_hdw_state_sched(hdw
);
1806 LOCK_GIVE(hdw
->big_lock
);
1808 return pvr2_hdw_wait(hdw
,0);
1812 static int get_default_tuner_type(struct pvr2_hdw
*hdw
)
1814 int unit_number
= hdw
->unit_number
;
1816 if ((unit_number
>= 0) && (unit_number
< PVR_NUM
)) {
1817 tp
= tuner
[unit_number
];
1819 if (tp
< 0) return -EINVAL
;
1820 hdw
->tuner_type
= tp
;
1821 hdw
->tuner_updated
= !0;
1826 static v4l2_std_id
get_default_standard(struct pvr2_hdw
*hdw
)
1828 int unit_number
= hdw
->unit_number
;
1830 if ((unit_number
>= 0) && (unit_number
< PVR_NUM
)) {
1831 tp
= video_std
[unit_number
];
1838 static unsigned int get_default_error_tolerance(struct pvr2_hdw
*hdw
)
1840 int unit_number
= hdw
->unit_number
;
1842 if ((unit_number
>= 0) && (unit_number
< PVR_NUM
)) {
1843 tp
= tolerance
[unit_number
];
1849 static int pvr2_hdw_check_firmware(struct pvr2_hdw
*hdw
)
1851 /* Try a harmless request to fetch the eeprom's address over
1852 endpoint 1. See what happens. Only the full FX2 image can
1853 respond to this. If this probe fails then likely the FX2
1854 firmware needs be loaded. */
1856 LOCK_TAKE(hdw
->ctl_lock
); do {
1857 hdw
->cmd_buffer
[0] = FX2CMD_GET_EEPROM_ADDR
;
1858 result
= pvr2_send_request_ex(hdw
,HZ
*1,!0,
1861 if (result
< 0) break;
1862 } while(0); LOCK_GIVE(hdw
->ctl_lock
);
1864 pvr2_trace(PVR2_TRACE_INIT
,
1865 "Probe of device endpoint 1 result status %d",
1868 pvr2_trace(PVR2_TRACE_INIT
,
1869 "Probe of device endpoint 1 succeeded");
1874 struct pvr2_std_hack
{
1875 v4l2_std_id pat
; /* Pattern to match */
1876 v4l2_std_id msk
; /* Which bits we care about */
1877 v4l2_std_id std
; /* What additional standards or default to set */
1880 /* This data structure labels specific combinations of standards from
1881 tveeprom that we'll try to recognize. If we recognize one, then assume
1882 a specified default standard to use. This is here because tveeprom only
1883 tells us about available standards not the intended default standard (if
1884 any) for the device in question. We guess the default based on what has
1885 been reported as available. Note that this is only for guessing a
1886 default - which can always be overridden explicitly - and if the user
1887 has otherwise named a default then that default will always be used in
1888 place of this table. */
1889 static const struct pvr2_std_hack std_eeprom_maps
[] = {
1891 .pat
= V4L2_STD_B
|V4L2_STD_GH
,
1892 .std
= V4L2_STD_PAL_B
|V4L2_STD_PAL_B1
|V4L2_STD_PAL_G
,
1896 .std
= V4L2_STD_NTSC_M
,
1899 .pat
= V4L2_STD_PAL_I
,
1900 .std
= V4L2_STD_PAL_I
,
1903 .pat
= V4L2_STD_SECAM_L
|V4L2_STD_SECAM_LC
,
1904 .std
= V4L2_STD_SECAM_L
|V4L2_STD_SECAM_LC
,
1908 .std
= V4L2_STD_PAL_D
|V4L2_STD_PAL_D1
|V4L2_STD_PAL_K
,
1912 static void pvr2_hdw_setup_std(struct pvr2_hdw
*hdw
)
1916 v4l2_std_id std1
,std2
,std3
;
1918 std1
= get_default_standard(hdw
);
1919 std3
= std1
? 0 : hdw
->hdw_desc
->default_std_mask
;
1921 bcnt
= pvr2_std_id_to_str(buf
,sizeof(buf
),hdw
->std_mask_eeprom
);
1922 pvr2_trace(PVR2_TRACE_STD
,
1923 "Supported video standard(s) reported available"
1924 " in hardware: %.*s",
1927 hdw
->std_mask_avail
= hdw
->std_mask_eeprom
;
1929 std2
= (std1
|std3
) & ~hdw
->std_mask_avail
;
1931 bcnt
= pvr2_std_id_to_str(buf
,sizeof(buf
),std2
);
1932 pvr2_trace(PVR2_TRACE_STD
,
1933 "Expanding supported video standards"
1934 " to include: %.*s",
1936 hdw
->std_mask_avail
|= std2
;
1939 pvr2_hdw_internal_set_std_avail(hdw
);
1942 bcnt
= pvr2_std_id_to_str(buf
,sizeof(buf
),std1
);
1943 pvr2_trace(PVR2_TRACE_STD
,
1944 "Initial video standard forced to %.*s",
1946 hdw
->std_mask_cur
= std1
;
1947 hdw
->std_dirty
= !0;
1948 pvr2_hdw_internal_find_stdenum(hdw
);
1952 bcnt
= pvr2_std_id_to_str(buf
,sizeof(buf
),std3
);
1953 pvr2_trace(PVR2_TRACE_STD
,
1954 "Initial video standard"
1955 " (determined by device type): %.*s",bcnt
,buf
);
1956 hdw
->std_mask_cur
= std3
;
1957 hdw
->std_dirty
= !0;
1958 pvr2_hdw_internal_find_stdenum(hdw
);
1964 for (idx
= 0; idx
< ARRAY_SIZE(std_eeprom_maps
); idx
++) {
1965 if (std_eeprom_maps
[idx
].msk
?
1966 ((std_eeprom_maps
[idx
].pat
^
1967 hdw
->std_mask_eeprom
) &
1968 std_eeprom_maps
[idx
].msk
) :
1969 (std_eeprom_maps
[idx
].pat
!=
1970 hdw
->std_mask_eeprom
)) continue;
1971 bcnt
= pvr2_std_id_to_str(buf
,sizeof(buf
),
1972 std_eeprom_maps
[idx
].std
);
1973 pvr2_trace(PVR2_TRACE_STD
,
1974 "Initial video standard guessed as %.*s",
1976 hdw
->std_mask_cur
= std_eeprom_maps
[idx
].std
;
1977 hdw
->std_dirty
= !0;
1978 pvr2_hdw_internal_find_stdenum(hdw
);
1983 if (hdw
->std_enum_cnt
> 1) {
1984 // Autoselect the first listed standard
1985 hdw
->std_enum_cur
= 1;
1986 hdw
->std_mask_cur
= hdw
->std_defs
[hdw
->std_enum_cur
-1].id
;
1987 hdw
->std_dirty
= !0;
1988 pvr2_trace(PVR2_TRACE_STD
,
1989 "Initial video standard auto-selected to %s",
1990 hdw
->std_defs
[hdw
->std_enum_cur
-1].name
);
1994 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
1995 "Unable to select a viable initial video standard");
1999 static unsigned int pvr2_copy_i2c_addr_list(
2000 unsigned short *dst
, const unsigned char *src
,
2001 unsigned int dst_max
)
2003 unsigned int cnt
= 0;
2005 while (src
[cnt
] && (cnt
+ 1) < dst_max
) {
2006 dst
[cnt
] = src
[cnt
];
2009 dst
[cnt
] = I2C_CLIENT_END
;
2014 static void pvr2_hdw_cx25840_vbi_hack(struct pvr2_hdw
*hdw
)
2017 Mike Isely <isely@pobox.com> 19-Nov-2006 - This bit of nuttiness
2018 for cx25840 causes that module to correctly set up its video
2019 scaling. This is really a problem in the cx25840 module itself,
2020 but we work around it here. The problem has not been seen in
2021 ivtv because there VBI is supported and set up. We don't do VBI
2022 here (at least not yet) and thus we never attempted to even set
2025 struct v4l2_format fmt
;
2026 if (hdw
->decoder_client_id
!= PVR2_CLIENT_ID_CX25840
) {
2027 /* We're not using a cx25840 so don't enable the hack */
2031 pvr2_trace(PVR2_TRACE_INIT
,
2033 " Executing cx25840 VBI hack",
2034 hdw
->decoder_client_id
);
2035 memset(&fmt
, 0, sizeof(fmt
));
2036 fmt
.type
= V4L2_BUF_TYPE_SLICED_VBI_CAPTURE
;
2037 fmt
.fmt
.sliced
.service_lines
[0][21] = V4L2_SLICED_CAPTION_525
;
2038 fmt
.fmt
.sliced
.service_lines
[1][21] = V4L2_SLICED_CAPTION_525
;
2039 v4l2_device_call_all(&hdw
->v4l2_dev
, hdw
->decoder_client_id
,
2040 vbi
, s_sliced_fmt
, &fmt
.fmt
.sliced
);
2044 static int pvr2_hdw_load_subdev(struct pvr2_hdw
*hdw
,
2045 const struct pvr2_device_client_desc
*cd
)
2049 struct v4l2_subdev
*sd
;
2050 unsigned int i2ccnt
;
2051 const unsigned char *p
;
2052 /* Arbitrary count - max # i2c addresses we will probe */
2053 unsigned short i2caddr
[25];
2055 mid
= cd
->module_id
;
2056 fname
= (mid
< ARRAY_SIZE(module_names
)) ? module_names
[mid
] : NULL
;
2058 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
2059 "Module ID %u for device %s has no name?"
2060 " The driver might have a configuration problem.",
2062 hdw
->hdw_desc
->description
);
2065 pvr2_trace(PVR2_TRACE_INIT
,
2066 "Module ID %u (%s) for device %s being loaded...",
2068 hdw
->hdw_desc
->description
);
2070 i2ccnt
= pvr2_copy_i2c_addr_list(i2caddr
, cd
->i2c_address_list
,
2071 ARRAY_SIZE(i2caddr
));
2072 if (!i2ccnt
&& ((p
= (mid
< ARRAY_SIZE(module_i2c_addresses
)) ?
2073 module_i2c_addresses
[mid
] : NULL
) != NULL
)) {
2074 /* Second chance: Try default i2c address list */
2075 i2ccnt
= pvr2_copy_i2c_addr_list(i2caddr
, p
,
2076 ARRAY_SIZE(i2caddr
));
2078 pvr2_trace(PVR2_TRACE_INIT
,
2080 " Using default i2c address list",
2086 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
2087 "Module ID %u (%s) for device %s:"
2088 " No i2c addresses."
2089 " The driver might have a configuration problem.",
2090 mid
, fname
, hdw
->hdw_desc
->description
);
2095 pvr2_trace(PVR2_TRACE_INIT
,
2097 " Setting up with specified i2c address 0x%x",
2099 sd
= v4l2_i2c_new_subdev(&hdw
->v4l2_dev
, &hdw
->i2c_adap
,
2100 fname
, i2caddr
[0], NULL
);
2102 pvr2_trace(PVR2_TRACE_INIT
,
2104 " Setting up with address probe list",
2106 sd
= v4l2_i2c_new_subdev(&hdw
->v4l2_dev
, &hdw
->i2c_adap
,
2111 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
2112 "Module ID %u (%s) for device %s failed to load."
2113 " Possible missing sub-device kernel module or"
2114 " initialization failure within module.",
2115 mid
, fname
, hdw
->hdw_desc
->description
);
2119 /* Tag this sub-device instance with the module ID we know about.
2120 In other places we'll use that tag to determine if the instance
2121 requires special handling. */
2124 pvr2_trace(PVR2_TRACE_INFO
, "Attached sub-driver %s", fname
);
2127 /* client-specific setup... */
2129 case PVR2_CLIENT_ID_CX25840
:
2130 case PVR2_CLIENT_ID_SAA7115
:
2131 hdw
->decoder_client_id
= mid
;
2140 static void pvr2_hdw_load_modules(struct pvr2_hdw
*hdw
)
2143 const struct pvr2_string_table
*cm
;
2144 const struct pvr2_device_client_table
*ct
;
2147 cm
= &hdw
->hdw_desc
->client_modules
;
2148 for (idx
= 0; idx
< cm
->cnt
; idx
++) {
2149 request_module(cm
->lst
[idx
]);
2152 ct
= &hdw
->hdw_desc
->client_table
;
2153 for (idx
= 0; idx
< ct
->cnt
; idx
++) {
2154 if (pvr2_hdw_load_subdev(hdw
, &ct
->lst
[idx
]) < 0) okFl
= 0;
2157 hdw
->flag_modulefail
= !0;
2158 pvr2_hdw_render_useless(hdw
);
2163 static void pvr2_hdw_setup_low(struct pvr2_hdw
*hdw
)
2167 struct pvr2_ctrl
*cptr
;
2169 if (hdw
->hdw_desc
->fx2_firmware
.cnt
) {
2172 (hdw
->usb_intf
->cur_altsetting
->desc
.bNumEndpoints
2175 pvr2_trace(PVR2_TRACE_INIT
,
2176 "USB endpoint config looks strange"
2177 "; possibly firmware needs to be"
2182 reloadFl
= !pvr2_hdw_check_firmware(hdw
);
2184 pvr2_trace(PVR2_TRACE_INIT
,
2185 "Check for FX2 firmware failed"
2186 "; possibly firmware needs to be"
2191 if (pvr2_upload_firmware1(hdw
) != 0) {
2192 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
2193 "Failure uploading firmware1");
2198 hdw
->fw1_state
= FW1_STATE_OK
;
2200 if (!pvr2_hdw_dev_ok(hdw
)) return;
2202 hdw
->force_dirty
= !0;
2204 if (!hdw
->hdw_desc
->flag_no_powerup
) {
2205 pvr2_hdw_cmd_powerup(hdw
);
2206 if (!pvr2_hdw_dev_ok(hdw
)) return;
2209 /* Take the IR chip out of reset, if appropriate */
2210 if (hdw
->ir_scheme_active
== PVR2_IR_SCHEME_ZILOG
) {
2211 pvr2_issue_simple_cmd(hdw
,
2212 FX2CMD_HCW_ZILOG_RESET
|
2217 // This step MUST happen after the earlier powerup step.
2218 pvr2_i2c_core_init(hdw
);
2219 if (!pvr2_hdw_dev_ok(hdw
)) return;
2221 pvr2_hdw_load_modules(hdw
);
2222 if (!pvr2_hdw_dev_ok(hdw
)) return;
2224 v4l2_device_call_all(&hdw
->v4l2_dev
, 0, core
, load_fw
);
2226 for (idx
= 0; idx
< CTRLDEF_COUNT
; idx
++) {
2227 cptr
= hdw
->controls
+ idx
;
2228 if (cptr
->info
->skip_init
) continue;
2229 if (!cptr
->info
->set_value
) continue;
2230 cptr
->info
->set_value(cptr
,~0,cptr
->info
->default_value
);
2233 pvr2_hdw_cx25840_vbi_hack(hdw
);
2235 /* Set up special default values for the television and radio
2236 frequencies here. It's not really important what these defaults
2237 are, but I set them to something usable in the Chicago area just
2238 to make driver testing a little easier. */
2240 hdw
->freqValTelevision
= default_tv_freq
;
2241 hdw
->freqValRadio
= default_radio_freq
;
2243 // Do not use pvr2_reset_ctl_endpoints() here. It is not
2244 // thread-safe against the normal pvr2_send_request() mechanism.
2245 // (We should make it thread safe).
2247 if (hdw
->hdw_desc
->flag_has_hauppauge_rom
) {
2248 ret
= pvr2_hdw_get_eeprom_addr(hdw
);
2249 if (!pvr2_hdw_dev_ok(hdw
)) return;
2251 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
2252 "Unable to determine location of eeprom,"
2255 hdw
->eeprom_addr
= ret
;
2256 pvr2_eeprom_analyze(hdw
);
2257 if (!pvr2_hdw_dev_ok(hdw
)) return;
2260 hdw
->tuner_type
= hdw
->hdw_desc
->default_tuner_type
;
2261 hdw
->tuner_updated
= !0;
2262 hdw
->std_mask_eeprom
= V4L2_STD_ALL
;
2265 if (hdw
->serial_number
) {
2266 idx
= scnprintf(hdw
->identifier
, sizeof(hdw
->identifier
) - 1,
2267 "sn-%lu", hdw
->serial_number
);
2268 } else if (hdw
->unit_number
>= 0) {
2269 idx
= scnprintf(hdw
->identifier
, sizeof(hdw
->identifier
) - 1,
2271 hdw
->unit_number
+ 'a');
2273 idx
= scnprintf(hdw
->identifier
, sizeof(hdw
->identifier
) - 1,
2276 hdw
->identifier
[idx
] = 0;
2278 pvr2_hdw_setup_std(hdw
);
2280 if (!get_default_tuner_type(hdw
)) {
2281 pvr2_trace(PVR2_TRACE_INIT
,
2282 "pvr2_hdw_setup: Tuner type overridden to %d",
2287 if (!pvr2_hdw_dev_ok(hdw
)) return;
2289 if (hdw
->hdw_desc
->signal_routing_scheme
==
2290 PVR2_ROUTING_SCHEME_GOTVIEW
) {
2291 /* Ensure that GPIO 11 is set to output for GOTVIEW
2293 pvr2_hdw_gpio_chg_dir(hdw
,(1 << 11),~0);
2296 pvr2_hdw_commit_setup(hdw
);
2298 hdw
->vid_stream
= pvr2_stream_create();
2299 if (!pvr2_hdw_dev_ok(hdw
)) return;
2300 pvr2_trace(PVR2_TRACE_INIT
,
2301 "pvr2_hdw_setup: video stream is %p",hdw
->vid_stream
);
2302 if (hdw
->vid_stream
) {
2303 idx
= get_default_error_tolerance(hdw
);
2305 pvr2_trace(PVR2_TRACE_INIT
,
2306 "pvr2_hdw_setup: video stream %p"
2307 " setting tolerance %u",
2308 hdw
->vid_stream
,idx
);
2310 pvr2_stream_setup(hdw
->vid_stream
,hdw
->usb_dev
,
2311 PVR2_VID_ENDPOINT
,idx
);
2314 if (!pvr2_hdw_dev_ok(hdw
)) return;
2316 hdw
->flag_init_ok
= !0;
2318 pvr2_hdw_state_sched(hdw
);
2322 /* Set up the structure and attempt to put the device into a usable state.
2323 This can be a time-consuming operation, which is why it is not done
2324 internally as part of the create() step. */
2325 static void pvr2_hdw_setup(struct pvr2_hdw
*hdw
)
2327 pvr2_trace(PVR2_TRACE_INIT
,"pvr2_hdw_setup(hdw=%p) begin",hdw
);
2329 pvr2_hdw_setup_low(hdw
);
2330 pvr2_trace(PVR2_TRACE_INIT
,
2331 "pvr2_hdw_setup(hdw=%p) done, ok=%d init_ok=%d",
2332 hdw
,pvr2_hdw_dev_ok(hdw
),hdw
->flag_init_ok
);
2333 if (pvr2_hdw_dev_ok(hdw
)) {
2334 if (hdw
->flag_init_ok
) {
2337 "Device initialization"
2338 " completed successfully.");
2341 if (hdw
->fw1_state
== FW1_STATE_RELOAD
) {
2344 "Device microcontroller firmware"
2345 " (re)loaded; it should now reset"
2350 PVR2_TRACE_ERROR_LEGS
,
2351 "Device initialization was not successful.");
2352 if (hdw
->fw1_state
== FW1_STATE_MISSING
) {
2354 PVR2_TRACE_ERROR_LEGS
,
2355 "Giving up since device"
2356 " microcontroller firmware"
2357 " appears to be missing.");
2361 if (hdw
->flag_modulefail
) {
2363 PVR2_TRACE_ERROR_LEGS
,
2364 "***WARNING*** pvrusb2 driver initialization"
2365 " failed due to the failure of one or more"
2366 " sub-device kernel modules.");
2368 PVR2_TRACE_ERROR_LEGS
,
2369 "You need to resolve the failing condition"
2370 " before this driver can function. There"
2371 " should be some earlier messages giving more"
2372 " information about the problem.");
2377 PVR2_TRACE_ERROR_LEGS
,
2378 "Attempting pvrusb2 recovery by reloading"
2379 " primary firmware.");
2381 PVR2_TRACE_ERROR_LEGS
,
2382 "If this works, device should disconnect"
2383 " and reconnect in a sane state.");
2384 hdw
->fw1_state
= FW1_STATE_UNKNOWN
;
2385 pvr2_upload_firmware1(hdw
);
2388 PVR2_TRACE_ERROR_LEGS
,
2389 "***WARNING*** pvrusb2 device hardware"
2390 " appears to be jammed"
2391 " and I can't clear it.");
2393 PVR2_TRACE_ERROR_LEGS
,
2394 "You might need to power cycle"
2395 " the pvrusb2 device"
2396 " in order to recover.");
2399 pvr2_trace(PVR2_TRACE_INIT
,"pvr2_hdw_setup(hdw=%p) end",hdw
);
2403 /* Perform second stage initialization. Set callback pointer first so that
2404 we can avoid a possible initialization race (if the kernel thread runs
2405 before the callback has been set). */
2406 int pvr2_hdw_initialize(struct pvr2_hdw
*hdw
,
2407 void (*callback_func
)(void *),
2408 void *callback_data
)
2410 LOCK_TAKE(hdw
->big_lock
); do {
2411 if (hdw
->flag_disconnected
) {
2412 /* Handle a race here: If we're already
2413 disconnected by this point, then give up. If we
2414 get past this then we'll remain connected for
2415 the duration of initialization since the entire
2416 initialization sequence is now protected by the
2420 hdw
->state_data
= callback_data
;
2421 hdw
->state_func
= callback_func
;
2422 pvr2_hdw_setup(hdw
);
2423 } while (0); LOCK_GIVE(hdw
->big_lock
);
2424 return hdw
->flag_init_ok
;
2428 /* Create, set up, and return a structure for interacting with the
2429 underlying hardware. */
2430 struct pvr2_hdw
*pvr2_hdw_create(struct usb_interface
*intf
,
2431 const struct usb_device_id
*devid
)
2433 unsigned int idx
,cnt1
,cnt2
,m
;
2434 struct pvr2_hdw
*hdw
= NULL
;
2436 struct pvr2_ctrl
*cptr
;
2437 struct usb_device
*usb_dev
;
2438 const struct pvr2_device_desc
*hdw_desc
;
2440 struct v4l2_queryctrl qctrl
;
2441 struct pvr2_ctl_info
*ciptr
;
2443 usb_dev
= interface_to_usbdev(intf
);
2445 hdw_desc
= (const struct pvr2_device_desc
*)(devid
->driver_info
);
2447 if (hdw_desc
== NULL
) {
2448 pvr2_trace(PVR2_TRACE_INIT
, "pvr2_hdw_create:"
2449 " No device description pointer,"
2450 " unable to continue.");
2451 pvr2_trace(PVR2_TRACE_INIT
, "If you have a new device type,"
2452 " please contact Mike Isely <isely@pobox.com>"
2453 " to get it included in the driver\n");
2457 hdw
= kzalloc(sizeof(*hdw
),GFP_KERNEL
);
2458 pvr2_trace(PVR2_TRACE_INIT
,"pvr2_hdw_create: hdw=%p, type \"%s\"",
2459 hdw
,hdw_desc
->description
);
2460 pvr2_trace(PVR2_TRACE_INFO
, "Hardware description: %s",
2461 hdw_desc
->description
);
2462 if (hdw_desc
->flag_is_experimental
) {
2463 pvr2_trace(PVR2_TRACE_INFO
, "**********");
2464 pvr2_trace(PVR2_TRACE_INFO
,
2465 "WARNING: Support for this device (%s) is"
2466 " experimental.", hdw_desc
->description
);
2467 pvr2_trace(PVR2_TRACE_INFO
,
2468 "Important functionality might not be"
2469 " entirely working.");
2470 pvr2_trace(PVR2_TRACE_INFO
,
2471 "Please consider contacting the driver author to"
2472 " help with further stabilization of the driver.");
2473 pvr2_trace(PVR2_TRACE_INFO
, "**********");
2475 if (!hdw
) goto fail
;
2477 init_timer(&hdw
->quiescent_timer
);
2478 hdw
->quiescent_timer
.data
= (unsigned long)hdw
;
2479 hdw
->quiescent_timer
.function
= pvr2_hdw_quiescent_timeout
;
2481 init_timer(&hdw
->decoder_stabilization_timer
);
2482 hdw
->decoder_stabilization_timer
.data
= (unsigned long)hdw
;
2483 hdw
->decoder_stabilization_timer
.function
=
2484 pvr2_hdw_decoder_stabilization_timeout
;
2486 init_timer(&hdw
->encoder_wait_timer
);
2487 hdw
->encoder_wait_timer
.data
= (unsigned long)hdw
;
2488 hdw
->encoder_wait_timer
.function
= pvr2_hdw_encoder_wait_timeout
;
2490 init_timer(&hdw
->encoder_run_timer
);
2491 hdw
->encoder_run_timer
.data
= (unsigned long)hdw
;
2492 hdw
->encoder_run_timer
.function
= pvr2_hdw_encoder_run_timeout
;
2494 hdw
->master_state
= PVR2_STATE_DEAD
;
2496 init_waitqueue_head(&hdw
->state_wait_data
);
2498 hdw
->tuner_signal_stale
= !0;
2499 cx2341x_fill_defaults(&hdw
->enc_ctl_state
);
2501 /* Calculate which inputs are OK */
2503 if (hdw_desc
->flag_has_analogtuner
) m
|= 1 << PVR2_CVAL_INPUT_TV
;
2504 if (hdw_desc
->digital_control_scheme
!= PVR2_DIGITAL_SCHEME_NONE
) {
2505 m
|= 1 << PVR2_CVAL_INPUT_DTV
;
2507 if (hdw_desc
->flag_has_svideo
) m
|= 1 << PVR2_CVAL_INPUT_SVIDEO
;
2508 if (hdw_desc
->flag_has_composite
) m
|= 1 << PVR2_CVAL_INPUT_COMPOSITE
;
2509 if (hdw_desc
->flag_has_fmradio
) m
|= 1 << PVR2_CVAL_INPUT_RADIO
;
2510 hdw
->input_avail_mask
= m
;
2511 hdw
->input_allowed_mask
= hdw
->input_avail_mask
;
2513 /* If not a hybrid device, pathway_state never changes. So
2514 initialize it here to what it should forever be. */
2515 if (!(hdw
->input_avail_mask
& (1 << PVR2_CVAL_INPUT_DTV
))) {
2516 hdw
->pathway_state
= PVR2_PATHWAY_ANALOG
;
2517 } else if (!(hdw
->input_avail_mask
& (1 << PVR2_CVAL_INPUT_TV
))) {
2518 hdw
->pathway_state
= PVR2_PATHWAY_DIGITAL
;
2521 hdw
->control_cnt
= CTRLDEF_COUNT
;
2522 hdw
->control_cnt
+= MPEGDEF_COUNT
;
2523 hdw
->controls
= kzalloc(sizeof(struct pvr2_ctrl
) * hdw
->control_cnt
,
2525 if (!hdw
->controls
) goto fail
;
2526 hdw
->hdw_desc
= hdw_desc
;
2527 hdw
->ir_scheme_active
= hdw
->hdw_desc
->ir_scheme
;
2528 for (idx
= 0; idx
< hdw
->control_cnt
; idx
++) {
2529 cptr
= hdw
->controls
+ idx
;
2532 for (idx
= 0; idx
< 32; idx
++) {
2533 hdw
->std_mask_ptrs
[idx
] = hdw
->std_mask_names
[idx
];
2535 for (idx
= 0; idx
< CTRLDEF_COUNT
; idx
++) {
2536 cptr
= hdw
->controls
+ idx
;
2537 cptr
->info
= control_defs
+idx
;
2540 /* Ensure that default input choice is a valid one. */
2541 m
= hdw
->input_avail_mask
;
2542 if (m
) for (idx
= 0; idx
< (sizeof(m
) << 3); idx
++) {
2543 if (!((1 << idx
) & m
)) continue;
2544 hdw
->input_val
= idx
;
2548 /* Define and configure additional controls from cx2341x module. */
2549 hdw
->mpeg_ctrl_info
= kzalloc(
2550 sizeof(*(hdw
->mpeg_ctrl_info
)) * MPEGDEF_COUNT
, GFP_KERNEL
);
2551 if (!hdw
->mpeg_ctrl_info
) goto fail
;
2552 for (idx
= 0; idx
< MPEGDEF_COUNT
; idx
++) {
2553 cptr
= hdw
->controls
+ idx
+ CTRLDEF_COUNT
;
2554 ciptr
= &(hdw
->mpeg_ctrl_info
[idx
].info
);
2555 ciptr
->desc
= hdw
->mpeg_ctrl_info
[idx
].desc
;
2556 ciptr
->name
= mpeg_ids
[idx
].strid
;
2557 ciptr
->v4l_id
= mpeg_ids
[idx
].id
;
2558 ciptr
->skip_init
= !0;
2559 ciptr
->get_value
= ctrl_cx2341x_get
;
2560 ciptr
->get_v4lflags
= ctrl_cx2341x_getv4lflags
;
2561 ciptr
->is_dirty
= ctrl_cx2341x_is_dirty
;
2562 if (!idx
) ciptr
->clear_dirty
= ctrl_cx2341x_clear_dirty
;
2563 qctrl
.id
= ciptr
->v4l_id
;
2564 cx2341x_ctrl_query(&hdw
->enc_ctl_state
,&qctrl
);
2565 if (!(qctrl
.flags
& V4L2_CTRL_FLAG_READ_ONLY
)) {
2566 ciptr
->set_value
= ctrl_cx2341x_set
;
2568 strncpy(hdw
->mpeg_ctrl_info
[idx
].desc
,qctrl
.name
,
2569 PVR2_CTLD_INFO_DESC_SIZE
);
2570 hdw
->mpeg_ctrl_info
[idx
].desc
[PVR2_CTLD_INFO_DESC_SIZE
-1] = 0;
2571 ciptr
->default_value
= qctrl
.default_value
;
2572 switch (qctrl
.type
) {
2574 case V4L2_CTRL_TYPE_INTEGER
:
2575 ciptr
->type
= pvr2_ctl_int
;
2576 ciptr
->def
.type_int
.min_value
= qctrl
.minimum
;
2577 ciptr
->def
.type_int
.max_value
= qctrl
.maximum
;
2579 case V4L2_CTRL_TYPE_BOOLEAN
:
2580 ciptr
->type
= pvr2_ctl_bool
;
2582 case V4L2_CTRL_TYPE_MENU
:
2583 ciptr
->type
= pvr2_ctl_enum
;
2584 ciptr
->def
.type_enum
.value_names
=
2585 cx2341x_ctrl_get_menu(&hdw
->enc_ctl_state
,
2588 ciptr
->def
.type_enum
.value_names
[cnt1
] != NULL
;
2590 ciptr
->def
.type_enum
.count
= cnt1
;
2596 // Initialize video standard enum dynamic control
2597 cptr
= pvr2_hdw_get_ctrl_by_id(hdw
,PVR2_CID_STDENUM
);
2599 memcpy(&hdw
->std_info_enum
,cptr
->info
,
2600 sizeof(hdw
->std_info_enum
));
2601 cptr
->info
= &hdw
->std_info_enum
;
2604 // Initialize control data regarding video standard masks
2605 valid_std_mask
= pvr2_std_get_usable();
2606 for (idx
= 0; idx
< 32; idx
++) {
2607 if (!(valid_std_mask
& (1 << idx
))) continue;
2608 cnt1
= pvr2_std_id_to_str(
2609 hdw
->std_mask_names
[idx
],
2610 sizeof(hdw
->std_mask_names
[idx
])-1,
2612 hdw
->std_mask_names
[idx
][cnt1
] = 0;
2614 cptr
= pvr2_hdw_get_ctrl_by_id(hdw
,PVR2_CID_STDAVAIL
);
2616 memcpy(&hdw
->std_info_avail
,cptr
->info
,
2617 sizeof(hdw
->std_info_avail
));
2618 cptr
->info
= &hdw
->std_info_avail
;
2619 hdw
->std_info_avail
.def
.type_bitmask
.bit_names
=
2621 hdw
->std_info_avail
.def
.type_bitmask
.valid_bits
=
2624 cptr
= pvr2_hdw_get_ctrl_by_id(hdw
,PVR2_CID_STDCUR
);
2626 memcpy(&hdw
->std_info_cur
,cptr
->info
,
2627 sizeof(hdw
->std_info_cur
));
2628 cptr
->info
= &hdw
->std_info_cur
;
2629 hdw
->std_info_cur
.def
.type_bitmask
.bit_names
=
2631 hdw
->std_info_avail
.def
.type_bitmask
.valid_bits
=
2635 hdw
->cropcap_stale
= !0;
2636 hdw
->eeprom_addr
= -1;
2637 hdw
->unit_number
= -1;
2638 hdw
->v4l_minor_number_video
= -1;
2639 hdw
->v4l_minor_number_vbi
= -1;
2640 hdw
->v4l_minor_number_radio
= -1;
2641 hdw
->ctl_write_buffer
= kmalloc(PVR2_CTL_BUFFSIZE
,GFP_KERNEL
);
2642 if (!hdw
->ctl_write_buffer
) goto fail
;
2643 hdw
->ctl_read_buffer
= kmalloc(PVR2_CTL_BUFFSIZE
,GFP_KERNEL
);
2644 if (!hdw
->ctl_read_buffer
) goto fail
;
2645 hdw
->ctl_write_urb
= usb_alloc_urb(0,GFP_KERNEL
);
2646 if (!hdw
->ctl_write_urb
) goto fail
;
2647 hdw
->ctl_read_urb
= usb_alloc_urb(0,GFP_KERNEL
);
2648 if (!hdw
->ctl_read_urb
) goto fail
;
2650 if (v4l2_device_register(&intf
->dev
, &hdw
->v4l2_dev
) != 0) {
2651 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
2652 "Error registering with v4l core, giving up");
2655 mutex_lock(&pvr2_unit_mtx
); do {
2656 for (idx
= 0; idx
< PVR_NUM
; idx
++) {
2657 if (unit_pointers
[idx
]) continue;
2658 hdw
->unit_number
= idx
;
2659 unit_pointers
[idx
] = hdw
;
2662 } while (0); mutex_unlock(&pvr2_unit_mtx
);
2665 cnt2
= scnprintf(hdw
->name
+cnt1
,sizeof(hdw
->name
)-cnt1
,"pvrusb2");
2667 if (hdw
->unit_number
>= 0) {
2668 cnt2
= scnprintf(hdw
->name
+cnt1
,sizeof(hdw
->name
)-cnt1
,"_%c",
2669 ('a' + hdw
->unit_number
));
2672 if (cnt1
>= sizeof(hdw
->name
)) cnt1
= sizeof(hdw
->name
)-1;
2673 hdw
->name
[cnt1
] = 0;
2675 hdw
->workqueue
= create_singlethread_workqueue(hdw
->name
);
2676 INIT_WORK(&hdw
->workpoll
,pvr2_hdw_worker_poll
);
2678 pvr2_trace(PVR2_TRACE_INIT
,"Driver unit number is %d, name is %s",
2679 hdw
->unit_number
,hdw
->name
);
2681 hdw
->tuner_type
= -1;
2684 hdw
->usb_intf
= intf
;
2685 hdw
->usb_dev
= usb_dev
;
2687 usb_make_path(hdw
->usb_dev
, hdw
->bus_info
, sizeof(hdw
->bus_info
));
2689 ifnum
= hdw
->usb_intf
->cur_altsetting
->desc
.bInterfaceNumber
;
2690 usb_set_interface(hdw
->usb_dev
,ifnum
,0);
2692 mutex_init(&hdw
->ctl_lock_mutex
);
2693 mutex_init(&hdw
->big_lock_mutex
);
2698 del_timer_sync(&hdw
->quiescent_timer
);
2699 del_timer_sync(&hdw
->decoder_stabilization_timer
);
2700 del_timer_sync(&hdw
->encoder_run_timer
);
2701 del_timer_sync(&hdw
->encoder_wait_timer
);
2702 if (hdw
->workqueue
) {
2703 flush_workqueue(hdw
->workqueue
);
2704 destroy_workqueue(hdw
->workqueue
);
2705 hdw
->workqueue
= NULL
;
2707 usb_free_urb(hdw
->ctl_read_urb
);
2708 usb_free_urb(hdw
->ctl_write_urb
);
2709 kfree(hdw
->ctl_read_buffer
);
2710 kfree(hdw
->ctl_write_buffer
);
2711 kfree(hdw
->controls
);
2712 kfree(hdw
->mpeg_ctrl_info
);
2713 kfree(hdw
->std_defs
);
2714 kfree(hdw
->std_enum_names
);
2721 /* Remove _all_ associations between this driver and the underlying USB
2723 static void pvr2_hdw_remove_usb_stuff(struct pvr2_hdw
*hdw
)
2725 if (hdw
->flag_disconnected
) return;
2726 pvr2_trace(PVR2_TRACE_INIT
,"pvr2_hdw_remove_usb_stuff: hdw=%p",hdw
);
2727 if (hdw
->ctl_read_urb
) {
2728 usb_kill_urb(hdw
->ctl_read_urb
);
2729 usb_free_urb(hdw
->ctl_read_urb
);
2730 hdw
->ctl_read_urb
= NULL
;
2732 if (hdw
->ctl_write_urb
) {
2733 usb_kill_urb(hdw
->ctl_write_urb
);
2734 usb_free_urb(hdw
->ctl_write_urb
);
2735 hdw
->ctl_write_urb
= NULL
;
2737 if (hdw
->ctl_read_buffer
) {
2738 kfree(hdw
->ctl_read_buffer
);
2739 hdw
->ctl_read_buffer
= NULL
;
2741 if (hdw
->ctl_write_buffer
) {
2742 kfree(hdw
->ctl_write_buffer
);
2743 hdw
->ctl_write_buffer
= NULL
;
2745 hdw
->flag_disconnected
= !0;
2746 /* If we don't do this, then there will be a dangling struct device
2747 reference to our disappearing device persisting inside the V4L
2749 v4l2_device_disconnect(&hdw
->v4l2_dev
);
2750 hdw
->usb_dev
= NULL
;
2751 hdw
->usb_intf
= NULL
;
2752 pvr2_hdw_render_useless(hdw
);
2756 /* Destroy hardware interaction structure */
2757 void pvr2_hdw_destroy(struct pvr2_hdw
*hdw
)
2760 pvr2_trace(PVR2_TRACE_INIT
,"pvr2_hdw_destroy: hdw=%p",hdw
);
2761 if (hdw
->workqueue
) {
2762 flush_workqueue(hdw
->workqueue
);
2763 destroy_workqueue(hdw
->workqueue
);
2764 hdw
->workqueue
= NULL
;
2766 del_timer_sync(&hdw
->quiescent_timer
);
2767 del_timer_sync(&hdw
->decoder_stabilization_timer
);
2768 del_timer_sync(&hdw
->encoder_run_timer
);
2769 del_timer_sync(&hdw
->encoder_wait_timer
);
2770 if (hdw
->fw_buffer
) {
2771 kfree(hdw
->fw_buffer
);
2772 hdw
->fw_buffer
= NULL
;
2774 if (hdw
->vid_stream
) {
2775 pvr2_stream_destroy(hdw
->vid_stream
);
2776 hdw
->vid_stream
= NULL
;
2778 pvr2_i2c_core_done(hdw
);
2779 v4l2_device_unregister(&hdw
->v4l2_dev
);
2780 pvr2_hdw_remove_usb_stuff(hdw
);
2781 mutex_lock(&pvr2_unit_mtx
); do {
2782 if ((hdw
->unit_number
>= 0) &&
2783 (hdw
->unit_number
< PVR_NUM
) &&
2784 (unit_pointers
[hdw
->unit_number
] == hdw
)) {
2785 unit_pointers
[hdw
->unit_number
] = NULL
;
2787 } while (0); mutex_unlock(&pvr2_unit_mtx
);
2788 kfree(hdw
->controls
);
2789 kfree(hdw
->mpeg_ctrl_info
);
2790 kfree(hdw
->std_defs
);
2791 kfree(hdw
->std_enum_names
);
2796 int pvr2_hdw_dev_ok(struct pvr2_hdw
*hdw
)
2798 return (hdw
&& hdw
->flag_ok
);
2802 /* Called when hardware has been unplugged */
2803 void pvr2_hdw_disconnect(struct pvr2_hdw
*hdw
)
2805 pvr2_trace(PVR2_TRACE_INIT
,"pvr2_hdw_disconnect(hdw=%p)",hdw
);
2806 LOCK_TAKE(hdw
->big_lock
);
2807 LOCK_TAKE(hdw
->ctl_lock
);
2808 pvr2_hdw_remove_usb_stuff(hdw
);
2809 LOCK_GIVE(hdw
->ctl_lock
);
2810 LOCK_GIVE(hdw
->big_lock
);
2814 // Attempt to autoselect an appropriate value for std_enum_cur given
2815 // whatever is currently in std_mask_cur
2816 static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw
*hdw
)
2819 for (idx
= 1; idx
< hdw
->std_enum_cnt
; idx
++) {
2820 if (hdw
->std_defs
[idx
-1].id
== hdw
->std_mask_cur
) {
2821 hdw
->std_enum_cur
= idx
;
2825 hdw
->std_enum_cur
= 0;
2829 // Calculate correct set of enumerated standards based on currently known
2830 // set of available standards bits.
2831 static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw
*hdw
)
2833 struct v4l2_standard
*newstd
;
2834 unsigned int std_cnt
;
2837 newstd
= pvr2_std_create_enum(&std_cnt
,hdw
->std_mask_avail
);
2839 if (hdw
->std_defs
) {
2840 kfree(hdw
->std_defs
);
2841 hdw
->std_defs
= NULL
;
2843 hdw
->std_enum_cnt
= 0;
2844 if (hdw
->std_enum_names
) {
2845 kfree(hdw
->std_enum_names
);
2846 hdw
->std_enum_names
= NULL
;
2851 PVR2_TRACE_ERROR_LEGS
,
2852 "WARNING: Failed to identify any viable standards");
2855 /* Set up the dynamic control for this standard */
2856 hdw
->std_enum_names
= kmalloc(sizeof(char *)*(std_cnt
+1),GFP_KERNEL
);
2857 if (hdw
->std_enum_names
) {
2858 hdw
->std_enum_names
[0] = "none";
2859 for (idx
= 0; idx
< std_cnt
; idx
++)
2860 hdw
->std_enum_names
[idx
+1] = newstd
[idx
].name
;
2861 hdw
->std_info_enum
.def
.type_enum
.value_names
=
2862 hdw
->std_enum_names
;
2863 hdw
->std_info_enum
.def
.type_enum
.count
= std_cnt
+1;
2866 PVR2_TRACE_ERROR_LEGS
,
2867 "WARNING: Failed to alloc memory for names");
2868 hdw
->std_info_enum
.def
.type_enum
.value_names
= NULL
;
2869 hdw
->std_info_enum
.def
.type_enum
.count
= 0;
2871 hdw
->std_defs
= newstd
;
2872 hdw
->std_enum_cnt
= std_cnt
+1;
2873 hdw
->std_enum_cur
= 0;
2874 hdw
->std_info_cur
.def
.type_bitmask
.valid_bits
= hdw
->std_mask_avail
;
2878 int pvr2_hdw_get_stdenum_value(struct pvr2_hdw
*hdw
,
2879 struct v4l2_standard
*std
,
2883 if (!idx
) return ret
;
2884 LOCK_TAKE(hdw
->big_lock
); do {
2885 if (idx
>= hdw
->std_enum_cnt
) break;
2887 memcpy(std
,hdw
->std_defs
+idx
,sizeof(*std
));
2889 } while (0); LOCK_GIVE(hdw
->big_lock
);
2894 /* Get the number of defined controls */
2895 unsigned int pvr2_hdw_get_ctrl_count(struct pvr2_hdw
*hdw
)
2897 return hdw
->control_cnt
;
2901 /* Retrieve a control handle given its index (0..count-1) */
2902 struct pvr2_ctrl
*pvr2_hdw_get_ctrl_by_index(struct pvr2_hdw
*hdw
,
2905 if (idx
>= hdw
->control_cnt
) return NULL
;
2906 return hdw
->controls
+ idx
;
2910 /* Retrieve a control handle given its index (0..count-1) */
2911 struct pvr2_ctrl
*pvr2_hdw_get_ctrl_by_id(struct pvr2_hdw
*hdw
,
2912 unsigned int ctl_id
)
2914 struct pvr2_ctrl
*cptr
;
2918 /* This could be made a lot more efficient, but for now... */
2919 for (idx
= 0; idx
< hdw
->control_cnt
; idx
++) {
2920 cptr
= hdw
->controls
+ idx
;
2921 i
= cptr
->info
->internal_id
;
2922 if (i
&& (i
== ctl_id
)) return cptr
;
2928 /* Given a V4L ID, retrieve the control structure associated with it. */
2929 struct pvr2_ctrl
*pvr2_hdw_get_ctrl_v4l(struct pvr2_hdw
*hdw
,unsigned int ctl_id
)
2931 struct pvr2_ctrl
*cptr
;
2935 /* This could be made a lot more efficient, but for now... */
2936 for (idx
= 0; idx
< hdw
->control_cnt
; idx
++) {
2937 cptr
= hdw
->controls
+ idx
;
2938 i
= cptr
->info
->v4l_id
;
2939 if (i
&& (i
== ctl_id
)) return cptr
;
2945 /* Given a V4L ID for its immediate predecessor, retrieve the control
2946 structure associated with it. */
2947 struct pvr2_ctrl
*pvr2_hdw_get_ctrl_nextv4l(struct pvr2_hdw
*hdw
,
2948 unsigned int ctl_id
)
2950 struct pvr2_ctrl
*cptr
,*cp2
;
2954 /* This could be made a lot more efficient, but for now... */
2956 for (idx
= 0; idx
< hdw
->control_cnt
; idx
++) {
2957 cptr
= hdw
->controls
+ idx
;
2958 i
= cptr
->info
->v4l_id
;
2960 if (i
<= ctl_id
) continue;
2961 if (cp2
&& (cp2
->info
->v4l_id
< i
)) continue;
2969 static const char *get_ctrl_typename(enum pvr2_ctl_type tp
)
2972 case pvr2_ctl_int
: return "integer";
2973 case pvr2_ctl_enum
: return "enum";
2974 case pvr2_ctl_bool
: return "boolean";
2975 case pvr2_ctl_bitmask
: return "bitmask";
2981 static void pvr2_subdev_set_control(struct pvr2_hdw
*hdw
, int id
,
2982 const char *name
, int val
)
2984 struct v4l2_control ctrl
;
2985 pvr2_trace(PVR2_TRACE_CHIPS
, "subdev v4l2 %s=%d", name
, val
);
2986 memset(&ctrl
, 0, sizeof(ctrl
));
2989 v4l2_device_call_all(&hdw
->v4l2_dev
, 0, core
, s_ctrl
, &ctrl
);
2992 #define PVR2_SUBDEV_SET_CONTROL(hdw, id, lab) \
2993 if ((hdw)->lab##_dirty || (hdw)->force_dirty) { \
2994 pvr2_subdev_set_control(hdw, id, #lab, (hdw)->lab##_val); \
2997 int pvr2_hdw_get_detected_std(struct pvr2_hdw
*hdw
, v4l2_std_id
*std
)
2999 v4l2_device_call_all(&hdw
->v4l2_dev
, 0,
3000 video
, querystd
, std
);
3004 /* Execute whatever commands are required to update the state of all the
3005 sub-devices so that they match our current control values. */
3006 static void pvr2_subdev_update(struct pvr2_hdw
*hdw
)
3008 struct v4l2_subdev
*sd
;
3010 pvr2_subdev_update_func fp
;
3012 pvr2_trace(PVR2_TRACE_CHIPS
, "subdev update...");
3014 if (hdw
->tuner_updated
|| hdw
->force_dirty
) {
3015 struct tuner_setup setup
;
3016 pvr2_trace(PVR2_TRACE_CHIPS
, "subdev tuner set_type(%d)",
3018 if (((int)(hdw
->tuner_type
)) >= 0) {
3019 memset(&setup
, 0, sizeof(setup
));
3020 setup
.addr
= ADDR_UNSET
;
3021 setup
.type
= hdw
->tuner_type
;
3022 setup
.mode_mask
= T_RADIO
| T_ANALOG_TV
;
3023 v4l2_device_call_all(&hdw
->v4l2_dev
, 0,
3024 tuner
, s_type_addr
, &setup
);
3028 if (hdw
->input_dirty
|| hdw
->std_dirty
|| hdw
->force_dirty
) {
3029 pvr2_trace(PVR2_TRACE_CHIPS
, "subdev v4l2 set_standard");
3030 if (hdw
->input_val
== PVR2_CVAL_INPUT_RADIO
) {
3031 v4l2_device_call_all(&hdw
->v4l2_dev
, 0,
3035 vs
= hdw
->std_mask_cur
;
3036 v4l2_device_call_all(&hdw
->v4l2_dev
, 0,
3038 pvr2_hdw_cx25840_vbi_hack(hdw
);
3040 hdw
->tuner_signal_stale
= !0;
3041 hdw
->cropcap_stale
= !0;
3044 PVR2_SUBDEV_SET_CONTROL(hdw
, V4L2_CID_BRIGHTNESS
, brightness
);
3045 PVR2_SUBDEV_SET_CONTROL(hdw
, V4L2_CID_CONTRAST
, contrast
);
3046 PVR2_SUBDEV_SET_CONTROL(hdw
, V4L2_CID_SATURATION
, saturation
);
3047 PVR2_SUBDEV_SET_CONTROL(hdw
, V4L2_CID_HUE
, hue
);
3048 PVR2_SUBDEV_SET_CONTROL(hdw
, V4L2_CID_AUDIO_MUTE
, mute
);
3049 PVR2_SUBDEV_SET_CONTROL(hdw
, V4L2_CID_AUDIO_VOLUME
, volume
);
3050 PVR2_SUBDEV_SET_CONTROL(hdw
, V4L2_CID_AUDIO_BALANCE
, balance
);
3051 PVR2_SUBDEV_SET_CONTROL(hdw
, V4L2_CID_AUDIO_BASS
, bass
);
3052 PVR2_SUBDEV_SET_CONTROL(hdw
, V4L2_CID_AUDIO_TREBLE
, treble
);
3054 if (hdw
->input_dirty
|| hdw
->audiomode_dirty
|| hdw
->force_dirty
) {
3055 struct v4l2_tuner vt
;
3056 memset(&vt
, 0, sizeof(vt
));
3057 vt
.type
= (hdw
->input_val
== PVR2_CVAL_INPUT_RADIO
) ?
3058 V4L2_TUNER_RADIO
: V4L2_TUNER_ANALOG_TV
;
3059 vt
.audmode
= hdw
->audiomode_val
;
3060 v4l2_device_call_all(&hdw
->v4l2_dev
, 0, tuner
, s_tuner
, &vt
);
3063 if (hdw
->freqDirty
|| hdw
->force_dirty
) {
3065 struct v4l2_frequency freq
;
3066 fv
= pvr2_hdw_get_cur_freq(hdw
);
3067 pvr2_trace(PVR2_TRACE_CHIPS
, "subdev v4l2 set_freq(%lu)", fv
);
3068 if (hdw
->tuner_signal_stale
) pvr2_hdw_status_poll(hdw
);
3069 memset(&freq
, 0, sizeof(freq
));
3070 if (hdw
->tuner_signal_info
.capability
& V4L2_TUNER_CAP_LOW
) {
3071 /* ((fv * 1000) / 62500) */
3072 freq
.frequency
= (fv
* 2) / 125;
3074 freq
.frequency
= fv
/ 62500;
3076 /* tuner-core currently doesn't seem to care about this, but
3077 let's set it anyway for completeness. */
3078 if (hdw
->input_val
== PVR2_CVAL_INPUT_RADIO
) {
3079 freq
.type
= V4L2_TUNER_RADIO
;
3081 freq
.type
= V4L2_TUNER_ANALOG_TV
;
3084 v4l2_device_call_all(&hdw
->v4l2_dev
, 0, tuner
,
3085 s_frequency
, &freq
);
3088 if (hdw
->res_hor_dirty
|| hdw
->res_ver_dirty
|| hdw
->force_dirty
) {
3089 struct v4l2_mbus_framefmt fmt
;
3090 memset(&fmt
, 0, sizeof(fmt
));
3091 fmt
.width
= hdw
->res_hor_val
;
3092 fmt
.height
= hdw
->res_ver_val
;
3093 fmt
.code
= V4L2_MBUS_FMT_FIXED
;
3094 pvr2_trace(PVR2_TRACE_CHIPS
, "subdev v4l2 set_size(%dx%d)",
3095 fmt
.width
, fmt
.height
);
3096 v4l2_device_call_all(&hdw
->v4l2_dev
, 0, video
, s_mbus_fmt
, &fmt
);
3099 if (hdw
->srate_dirty
|| hdw
->force_dirty
) {
3101 pvr2_trace(PVR2_TRACE_CHIPS
, "subdev v4l2 set_audio %d",
3103 switch (hdw
->srate_val
) {
3105 case V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000
:
3108 case V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100
:
3111 case V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000
:
3115 v4l2_device_call_all(&hdw
->v4l2_dev
, 0,
3116 audio
, s_clock_freq
, val
);
3119 /* Unable to set crop parameters; there is apparently no equivalent
3120 for VIDIOC_S_CROP */
3122 v4l2_device_for_each_subdev(sd
, &hdw
->v4l2_dev
) {
3124 if (id
>= ARRAY_SIZE(pvr2_module_update_functions
)) continue;
3125 fp
= pvr2_module_update_functions
[id
];
3130 if (hdw
->tuner_signal_stale
|| hdw
->cropcap_stale
) {
3131 pvr2_hdw_status_poll(hdw
);
3136 /* Figure out if we need to commit control changes. If so, mark internal
3137 state flags to indicate this fact and return true. Otherwise do nothing
3138 else and return false. */
3139 static int pvr2_hdw_commit_setup(struct pvr2_hdw
*hdw
)
3142 struct pvr2_ctrl
*cptr
;
3144 int commit_flag
= hdw
->force_dirty
;
3146 unsigned int bcnt
,ccnt
;
3148 for (idx
= 0; idx
< hdw
->control_cnt
; idx
++) {
3149 cptr
= hdw
->controls
+ idx
;
3150 if (!cptr
->info
->is_dirty
) continue;
3151 if (!cptr
->info
->is_dirty(cptr
)) continue;
3154 if (!(pvrusb2_debug
& PVR2_TRACE_CTL
)) continue;
3155 bcnt
= scnprintf(buf
,sizeof(buf
),"\"%s\" <-- ",
3158 cptr
->info
->get_value(cptr
,&value
);
3159 pvr2_ctrl_value_to_sym_internal(cptr
,~0,value
,
3161 sizeof(buf
)-bcnt
,&ccnt
);
3163 bcnt
+= scnprintf(buf
+bcnt
,sizeof(buf
)-bcnt
," <%s>",
3164 get_ctrl_typename(cptr
->info
->type
));
3165 pvr2_trace(PVR2_TRACE_CTL
,
3166 "/*--TRACE_COMMIT--*/ %.*s",
3171 /* Nothing has changed */
3175 hdw
->state_pipeline_config
= 0;
3176 trace_stbit("state_pipeline_config",hdw
->state_pipeline_config
);
3177 pvr2_hdw_state_sched(hdw
);
3183 /* Perform all operations needed to commit all control changes. This must
3184 be performed in synchronization with the pipeline state and is thus
3185 expected to be called as part of the driver's worker thread. Return
3186 true if commit successful, otherwise return false to indicate that
3187 commit isn't possible at this time. */
3188 static int pvr2_hdw_commit_execute(struct pvr2_hdw
*hdw
)
3191 struct pvr2_ctrl
*cptr
;
3192 int disruptive_change
;
3194 if (hdw
->input_dirty
&& hdw
->state_pathway_ok
&&
3195 (((hdw
->input_val
== PVR2_CVAL_INPUT_DTV
) ?
3196 PVR2_PATHWAY_DIGITAL
: PVR2_PATHWAY_ANALOG
) !=
3197 hdw
->pathway_state
)) {
3198 /* Change of mode being asked for... */
3199 hdw
->state_pathway_ok
= 0;
3200 trace_stbit("state_pathway_ok", hdw
->state_pathway_ok
);
3202 if (!hdw
->state_pathway_ok
) {
3203 /* Can't commit anything until pathway is ok. */
3207 /* Handle some required side effects when the video standard is
3209 if (hdw
->std_dirty
) {
3212 if (hdw
->std_mask_cur
& V4L2_STD_525_60
) {
3219 /* Rewrite the vertical resolution to be appropriate to the
3220 video standard that has been selected. */
3221 if (nvres
!= hdw
->res_ver_val
) {
3222 hdw
->res_ver_val
= nvres
;
3223 hdw
->res_ver_dirty
= !0;
3225 /* Rewrite the GOP size to be appropriate to the video
3226 standard that has been selected. */
3227 if (gop_size
!= hdw
->enc_ctl_state
.video_gop_size
) {
3228 struct v4l2_ext_controls cs
;
3229 struct v4l2_ext_control c1
;
3230 memset(&cs
, 0, sizeof(cs
));
3231 memset(&c1
, 0, sizeof(c1
));
3234 c1
.id
= V4L2_CID_MPEG_VIDEO_GOP_SIZE
;
3235 c1
.value
= gop_size
;
3236 cx2341x_ext_ctrls(&hdw
->enc_ctl_state
, 0, &cs
,
3237 VIDIOC_S_EXT_CTRLS
);
3241 /* The broadcast decoder can only scale down, so if
3242 * res_*_dirty && crop window < output format ==> enlarge crop.
3244 * The mpeg encoder receives fields of res_hor_val dots and
3245 * res_ver_val halflines. Limits: hor<=720, ver<=576.
3247 if (hdw
->res_hor_dirty
&& hdw
->cropw_val
< hdw
->res_hor_val
) {
3248 hdw
->cropw_val
= hdw
->res_hor_val
;
3249 hdw
->cropw_dirty
= !0;
3250 } else if (hdw
->cropw_dirty
) {
3251 hdw
->res_hor_dirty
= !0; /* must rescale */
3252 hdw
->res_hor_val
= min(720, hdw
->cropw_val
);
3254 if (hdw
->res_ver_dirty
&& hdw
->croph_val
< hdw
->res_ver_val
) {
3255 hdw
->croph_val
= hdw
->res_ver_val
;
3256 hdw
->croph_dirty
= !0;
3257 } else if (hdw
->croph_dirty
) {
3258 int nvres
= hdw
->std_mask_cur
& V4L2_STD_525_60
? 480 : 576;
3259 hdw
->res_ver_dirty
= !0;
3260 hdw
->res_ver_val
= min(nvres
, hdw
->croph_val
);
3263 /* If any of the below has changed, then we can't do the update
3264 while the pipeline is running. Pipeline must be paused first
3265 and decoder -> encoder connection be made quiescent before we
3269 hdw
->enc_unsafe_stale
||
3271 hdw
->res_ver_dirty
||
3272 hdw
->res_hor_dirty
||
3276 (hdw
->active_stream_type
!= hdw
->desired_stream_type
));
3277 if (disruptive_change
&& !hdw
->state_pipeline_idle
) {
3278 /* Pipeline is not idle; we can't proceed. Arrange to
3279 cause pipeline to stop so that we can try this again
3281 hdw
->state_pipeline_pause
= !0;
3285 if (hdw
->srate_dirty
) {
3286 /* Write new sample rate into control structure since
3287 * the master copy is stale. We must track srate
3288 * separate from the mpeg control structure because
3289 * other logic also uses this value. */
3290 struct v4l2_ext_controls cs
;
3291 struct v4l2_ext_control c1
;
3292 memset(&cs
,0,sizeof(cs
));
3293 memset(&c1
,0,sizeof(c1
));
3296 c1
.id
= V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ
;
3297 c1
.value
= hdw
->srate_val
;
3298 cx2341x_ext_ctrls(&hdw
->enc_ctl_state
, 0, &cs
,VIDIOC_S_EXT_CTRLS
);
3301 if (hdw
->active_stream_type
!= hdw
->desired_stream_type
) {
3302 /* Handle any side effects of stream config here */
3303 hdw
->active_stream_type
= hdw
->desired_stream_type
;
3306 if (hdw
->hdw_desc
->signal_routing_scheme
==
3307 PVR2_ROUTING_SCHEME_GOTVIEW
) {
3309 /* Handle GOTVIEW audio switching */
3310 pvr2_hdw_gpio_get_out(hdw
,&b
);
3311 if (hdw
->input_val
== PVR2_CVAL_INPUT_RADIO
) {
3313 pvr2_hdw_gpio_chg_out(hdw
,(1 << 11),~0);
3316 pvr2_hdw_gpio_chg_out(hdw
,(1 << 11),0);
3320 /* Check and update state for all sub-devices. */
3321 pvr2_subdev_update(hdw
);
3323 hdw
->tuner_updated
= 0;
3324 hdw
->force_dirty
= 0;
3325 for (idx
= 0; idx
< hdw
->control_cnt
; idx
++) {
3326 cptr
= hdw
->controls
+ idx
;
3327 if (!cptr
->info
->clear_dirty
) continue;
3328 cptr
->info
->clear_dirty(cptr
);
3331 if ((hdw
->pathway_state
== PVR2_PATHWAY_ANALOG
) &&
3332 hdw
->state_encoder_run
) {
3333 /* If encoder isn't running or it can't be touched, then
3334 this will get worked out later when we start the
3336 if (pvr2_encoder_adjust(hdw
) < 0) return !0;
3339 hdw
->state_pipeline_config
= !0;
3340 /* Hardware state may have changed in a way to cause the cropping
3341 capabilities to have changed. So mark it stale, which will
3342 cause a later re-fetch. */
3343 trace_stbit("state_pipeline_config",hdw
->state_pipeline_config
);
3348 int pvr2_hdw_commit_ctl(struct pvr2_hdw
*hdw
)
3351 LOCK_TAKE(hdw
->big_lock
);
3352 fl
= pvr2_hdw_commit_setup(hdw
);
3353 LOCK_GIVE(hdw
->big_lock
);
3355 return pvr2_hdw_wait(hdw
,0);
3359 static void pvr2_hdw_worker_poll(struct work_struct
*work
)
3362 struct pvr2_hdw
*hdw
= container_of(work
,struct pvr2_hdw
,workpoll
);
3363 LOCK_TAKE(hdw
->big_lock
); do {
3364 fl
= pvr2_hdw_state_eval(hdw
);
3365 } while (0); LOCK_GIVE(hdw
->big_lock
);
3366 if (fl
&& hdw
->state_func
) {
3367 hdw
->state_func(hdw
->state_data
);
3372 static int pvr2_hdw_wait(struct pvr2_hdw
*hdw
,int state
)
3374 return wait_event_interruptible(
3375 hdw
->state_wait_data
,
3376 (hdw
->state_stale
== 0) &&
3377 (!state
|| (hdw
->master_state
!= state
)));
3381 /* Return name for this driver instance */
3382 const char *pvr2_hdw_get_driver_name(struct pvr2_hdw
*hdw
)
3388 const char *pvr2_hdw_get_desc(struct pvr2_hdw
*hdw
)
3390 return hdw
->hdw_desc
->description
;
3394 const char *pvr2_hdw_get_type(struct pvr2_hdw
*hdw
)
3396 return hdw
->hdw_desc
->shortname
;
3400 int pvr2_hdw_is_hsm(struct pvr2_hdw
*hdw
)
3403 LOCK_TAKE(hdw
->ctl_lock
); do {
3404 hdw
->cmd_buffer
[0] = FX2CMD_GET_USB_SPEED
;
3405 result
= pvr2_send_request(hdw
,
3408 if (result
< 0) break;
3409 result
= (hdw
->cmd_buffer
[0] != 0);
3410 } while(0); LOCK_GIVE(hdw
->ctl_lock
);
3415 /* Execute poll of tuner status */
3416 void pvr2_hdw_execute_tuner_poll(struct pvr2_hdw
*hdw
)
3418 LOCK_TAKE(hdw
->big_lock
); do {
3419 pvr2_hdw_status_poll(hdw
);
3420 } while (0); LOCK_GIVE(hdw
->big_lock
);
3424 static int pvr2_hdw_check_cropcap(struct pvr2_hdw
*hdw
)
3426 if (!hdw
->cropcap_stale
) {
3429 pvr2_hdw_status_poll(hdw
);
3430 if (hdw
->cropcap_stale
) {
3437 /* Return information about cropping capabilities */
3438 int pvr2_hdw_get_cropcap(struct pvr2_hdw
*hdw
, struct v4l2_cropcap
*pp
)
3441 LOCK_TAKE(hdw
->big_lock
);
3442 stat
= pvr2_hdw_check_cropcap(hdw
);
3444 memcpy(pp
, &hdw
->cropcap_info
, sizeof(hdw
->cropcap_info
));
3446 LOCK_GIVE(hdw
->big_lock
);
3451 /* Return information about the tuner */
3452 int pvr2_hdw_get_tuner_status(struct pvr2_hdw
*hdw
,struct v4l2_tuner
*vtp
)
3454 LOCK_TAKE(hdw
->big_lock
); do {
3455 if (hdw
->tuner_signal_stale
) {
3456 pvr2_hdw_status_poll(hdw
);
3458 memcpy(vtp
,&hdw
->tuner_signal_info
,sizeof(struct v4l2_tuner
));
3459 } while (0); LOCK_GIVE(hdw
->big_lock
);
3464 /* Get handle to video output stream */
3465 struct pvr2_stream
*pvr2_hdw_get_video_stream(struct pvr2_hdw
*hp
)
3467 return hp
->vid_stream
;
3471 void pvr2_hdw_trigger_module_log(struct pvr2_hdw
*hdw
)
3473 int nr
= pvr2_hdw_get_unit_number(hdw
);
3474 LOCK_TAKE(hdw
->big_lock
); do {
3475 printk(KERN_INFO
"pvrusb2: ================= START STATUS CARD #%d =================\n", nr
);
3476 v4l2_device_call_all(&hdw
->v4l2_dev
, 0, core
, log_status
);
3477 pvr2_trace(PVR2_TRACE_INFO
,"cx2341x config:");
3478 cx2341x_log_status(&hdw
->enc_ctl_state
, "pvrusb2");
3479 pvr2_hdw_state_log_state(hdw
);
3480 printk(KERN_INFO
"pvrusb2: ================== END STATUS CARD #%d ==================\n", nr
);
3481 } while (0); LOCK_GIVE(hdw
->big_lock
);
3485 /* Grab EEPROM contents, needed for direct method. */
3486 #define EEPROM_SIZE 8192
3487 #define trace_eeprom(...) pvr2_trace(PVR2_TRACE_EEPROM,__VA_ARGS__)
3488 static u8
*pvr2_full_eeprom_fetch(struct pvr2_hdw
*hdw
)
3490 struct i2c_msg msg
[2];
3499 eeprom
= kmalloc(EEPROM_SIZE
,GFP_KERNEL
);
3501 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
3502 "Failed to allocate memory"
3503 " required to read eeprom");
3507 trace_eeprom("Value for eeprom addr from controller was 0x%x",
3509 addr
= hdw
->eeprom_addr
;
3510 /* Seems that if the high bit is set, then the *real* eeprom
3511 address is shifted right now bit position (noticed this in
3512 newer PVR USB2 hardware) */
3513 if (addr
& 0x80) addr
>>= 1;
3515 /* FX2 documentation states that a 16bit-addressed eeprom is
3516 expected if the I2C address is an odd number (yeah, this is
3517 strange but it's what they do) */
3518 mode16
= (addr
& 1);
3519 eepromSize
= (mode16
? EEPROM_SIZE
: 256);
3520 trace_eeprom("Examining %d byte eeprom at location 0x%x"
3521 " using %d bit addressing",eepromSize
,addr
,
3526 msg
[0].len
= mode16
? 2 : 1;
3529 msg
[1].flags
= I2C_M_RD
;
3531 /* We have to do the actual eeprom data fetch ourselves, because
3532 (1) we're only fetching part of the eeprom, and (2) if we were
3533 getting the whole thing our I2C driver can't grab it in one
3534 pass - which is what tveeprom is otherwise going to attempt */
3535 memset(eeprom
,0,EEPROM_SIZE
);
3536 for (tcnt
= 0; tcnt
< EEPROM_SIZE
; tcnt
+= pcnt
) {
3538 if (pcnt
+ tcnt
> EEPROM_SIZE
) pcnt
= EEPROM_SIZE
-tcnt
;
3539 offs
= tcnt
+ (eepromSize
- EEPROM_SIZE
);
3541 iadd
[0] = offs
>> 8;
3547 msg
[1].buf
= eeprom
+tcnt
;
3548 if ((ret
= i2c_transfer(&hdw
->i2c_adap
,
3549 msg
,ARRAY_SIZE(msg
))) != 2) {
3550 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
3551 "eeprom fetch set offs err=%d",ret
);
3560 void pvr2_hdw_cpufw_set_enabled(struct pvr2_hdw
*hdw
,
3567 LOCK_TAKE(hdw
->big_lock
); do {
3568 if ((hdw
->fw_buffer
== NULL
) == !enable_flag
) break;
3571 pvr2_trace(PVR2_TRACE_FIRMWARE
,
3572 "Cleaning up after CPU firmware fetch");
3573 kfree(hdw
->fw_buffer
);
3574 hdw
->fw_buffer
= NULL
;
3576 if (hdw
->fw_cpu_flag
) {
3577 /* Now release the CPU. It will disconnect
3578 and reconnect later. */
3579 pvr2_hdw_cpureset_assert(hdw
,0);
3584 hdw
->fw_cpu_flag
= (mode
!= 2);
3585 if (hdw
->fw_cpu_flag
) {
3586 hdw
->fw_size
= (mode
== 1) ? 0x4000 : 0x2000;
3587 pvr2_trace(PVR2_TRACE_FIRMWARE
,
3588 "Preparing to suck out CPU firmware"
3589 " (size=%u)", hdw
->fw_size
);
3590 hdw
->fw_buffer
= kzalloc(hdw
->fw_size
,GFP_KERNEL
);
3591 if (!hdw
->fw_buffer
) {
3596 /* We have to hold the CPU during firmware upload. */
3597 pvr2_hdw_cpureset_assert(hdw
,1);
3599 /* download the firmware from address 0000-1fff in 2048
3600 (=0x800) bytes chunk. */
3602 pvr2_trace(PVR2_TRACE_FIRMWARE
,
3603 "Grabbing CPU firmware");
3604 pipe
= usb_rcvctrlpipe(hdw
->usb_dev
, 0);
3605 for(address
= 0; address
< hdw
->fw_size
;
3607 ret
= usb_control_msg(hdw
->usb_dev
,pipe
,
3610 hdw
->fw_buffer
+address
,
3615 pvr2_trace(PVR2_TRACE_FIRMWARE
,
3616 "Done grabbing CPU firmware");
3618 pvr2_trace(PVR2_TRACE_FIRMWARE
,
3619 "Sucking down EEPROM contents");
3620 hdw
->fw_buffer
= pvr2_full_eeprom_fetch(hdw
);
3621 if (!hdw
->fw_buffer
) {
3622 pvr2_trace(PVR2_TRACE_FIRMWARE
,
3623 "EEPROM content suck failed.");
3626 hdw
->fw_size
= EEPROM_SIZE
;
3627 pvr2_trace(PVR2_TRACE_FIRMWARE
,
3628 "Done sucking down EEPROM contents");
3631 } while (0); LOCK_GIVE(hdw
->big_lock
);
3635 /* Return true if we're in a mode for retrieval CPU firmware */
3636 int pvr2_hdw_cpufw_get_enabled(struct pvr2_hdw
*hdw
)
3638 return hdw
->fw_buffer
!= NULL
;
3642 int pvr2_hdw_cpufw_get(struct pvr2_hdw
*hdw
,unsigned int offs
,
3643 char *buf
,unsigned int cnt
)
3646 LOCK_TAKE(hdw
->big_lock
); do {
3650 if (!hdw
->fw_buffer
) {
3655 if (offs
>= hdw
->fw_size
) {
3656 pvr2_trace(PVR2_TRACE_FIRMWARE
,
3657 "Read firmware data offs=%d EOF",
3663 if (offs
+ cnt
> hdw
->fw_size
) cnt
= hdw
->fw_size
- offs
;
3665 memcpy(buf
,hdw
->fw_buffer
+offs
,cnt
);
3667 pvr2_trace(PVR2_TRACE_FIRMWARE
,
3668 "Read firmware data offs=%d cnt=%d",
3671 } while (0); LOCK_GIVE(hdw
->big_lock
);
3677 int pvr2_hdw_v4l_get_minor_number(struct pvr2_hdw
*hdw
,
3678 enum pvr2_v4l_type index
)
3681 case pvr2_v4l_type_video
: return hdw
->v4l_minor_number_video
;
3682 case pvr2_v4l_type_vbi
: return hdw
->v4l_minor_number_vbi
;
3683 case pvr2_v4l_type_radio
: return hdw
->v4l_minor_number_radio
;
3689 /* Store a v4l minor device number */
3690 void pvr2_hdw_v4l_store_minor_number(struct pvr2_hdw
*hdw
,
3691 enum pvr2_v4l_type index
,int v
)
3694 case pvr2_v4l_type_video
: hdw
->v4l_minor_number_video
= v
;
3695 case pvr2_v4l_type_vbi
: hdw
->v4l_minor_number_vbi
= v
;
3696 case pvr2_v4l_type_radio
: hdw
->v4l_minor_number_radio
= v
;
3702 static void pvr2_ctl_write_complete(struct urb
*urb
)
3704 struct pvr2_hdw
*hdw
= urb
->context
;
3705 hdw
->ctl_write_pend_flag
= 0;
3706 if (hdw
->ctl_read_pend_flag
) return;
3707 complete(&hdw
->ctl_done
);
3711 static void pvr2_ctl_read_complete(struct urb
*urb
)
3713 struct pvr2_hdw
*hdw
= urb
->context
;
3714 hdw
->ctl_read_pend_flag
= 0;
3715 if (hdw
->ctl_write_pend_flag
) return;
3716 complete(&hdw
->ctl_done
);
3720 static void pvr2_ctl_timeout(unsigned long data
)
3722 struct pvr2_hdw
*hdw
= (struct pvr2_hdw
*)data
;
3723 if (hdw
->ctl_write_pend_flag
|| hdw
->ctl_read_pend_flag
) {
3724 hdw
->ctl_timeout_flag
= !0;
3725 if (hdw
->ctl_write_pend_flag
)
3726 usb_unlink_urb(hdw
->ctl_write_urb
);
3727 if (hdw
->ctl_read_pend_flag
)
3728 usb_unlink_urb(hdw
->ctl_read_urb
);
3733 /* Issue a command and get a response from the device. This extended
3734 version includes a probe flag (which if set means that device errors
3735 should not be logged or treated as fatal) and a timeout in jiffies.
3736 This can be used to non-lethally probe the health of endpoint 1. */
3737 static int pvr2_send_request_ex(struct pvr2_hdw
*hdw
,
3738 unsigned int timeout
,int probe_fl
,
3739 void *write_data
,unsigned int write_len
,
3740 void *read_data
,unsigned int read_len
)
3744 struct timer_list timer
;
3745 if (!hdw
->ctl_lock_held
) {
3746 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
3747 "Attempted to execute control transfer"
3751 if (!hdw
->flag_ok
&& !probe_fl
) {
3752 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
3753 "Attempted to execute control transfer"
3754 " when device not ok");
3757 if (!(hdw
->ctl_read_urb
&& hdw
->ctl_write_urb
)) {
3759 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
3760 "Attempted to execute control transfer"
3761 " when USB is disconnected");
3766 /* Ensure that we have sane parameters */
3767 if (!write_data
) write_len
= 0;
3768 if (!read_data
) read_len
= 0;
3769 if (write_len
> PVR2_CTL_BUFFSIZE
) {
3771 PVR2_TRACE_ERROR_LEGS
,
3772 "Attempted to execute %d byte"
3773 " control-write transfer (limit=%d)",
3774 write_len
,PVR2_CTL_BUFFSIZE
);
3777 if (read_len
> PVR2_CTL_BUFFSIZE
) {
3779 PVR2_TRACE_ERROR_LEGS
,
3780 "Attempted to execute %d byte"
3781 " control-read transfer (limit=%d)",
3782 write_len
,PVR2_CTL_BUFFSIZE
);
3785 if ((!write_len
) && (!read_len
)) {
3787 PVR2_TRACE_ERROR_LEGS
,
3788 "Attempted to execute null control transfer?");
3793 hdw
->cmd_debug_state
= 1;
3795 hdw
->cmd_debug_code
= ((unsigned char *)write_data
)[0];
3797 hdw
->cmd_debug_code
= 0;
3799 hdw
->cmd_debug_write_len
= write_len
;
3800 hdw
->cmd_debug_read_len
= read_len
;
3802 /* Initialize common stuff */
3803 init_completion(&hdw
->ctl_done
);
3804 hdw
->ctl_timeout_flag
= 0;
3805 hdw
->ctl_write_pend_flag
= 0;
3806 hdw
->ctl_read_pend_flag
= 0;
3808 timer
.expires
= jiffies
+ timeout
;
3809 timer
.data
= (unsigned long)hdw
;
3810 timer
.function
= pvr2_ctl_timeout
;
3813 hdw
->cmd_debug_state
= 2;
3814 /* Transfer write data to internal buffer */
3815 for (idx
= 0; idx
< write_len
; idx
++) {
3816 hdw
->ctl_write_buffer
[idx
] =
3817 ((unsigned char *)write_data
)[idx
];
3819 /* Initiate a write request */
3820 usb_fill_bulk_urb(hdw
->ctl_write_urb
,
3822 usb_sndbulkpipe(hdw
->usb_dev
,
3823 PVR2_CTL_WRITE_ENDPOINT
),
3824 hdw
->ctl_write_buffer
,
3826 pvr2_ctl_write_complete
,
3828 hdw
->ctl_write_urb
->actual_length
= 0;
3829 hdw
->ctl_write_pend_flag
= !0;
3830 status
= usb_submit_urb(hdw
->ctl_write_urb
,GFP_KERNEL
);
3832 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
3833 "Failed to submit write-control"
3834 " URB status=%d",status
);
3835 hdw
->ctl_write_pend_flag
= 0;
3841 hdw
->cmd_debug_state
= 3;
3842 memset(hdw
->ctl_read_buffer
,0x43,read_len
);
3843 /* Initiate a read request */
3844 usb_fill_bulk_urb(hdw
->ctl_read_urb
,
3846 usb_rcvbulkpipe(hdw
->usb_dev
,
3847 PVR2_CTL_READ_ENDPOINT
),
3848 hdw
->ctl_read_buffer
,
3850 pvr2_ctl_read_complete
,
3852 hdw
->ctl_read_urb
->actual_length
= 0;
3853 hdw
->ctl_read_pend_flag
= !0;
3854 status
= usb_submit_urb(hdw
->ctl_read_urb
,GFP_KERNEL
);
3856 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
3857 "Failed to submit read-control"
3858 " URB status=%d",status
);
3859 hdw
->ctl_read_pend_flag
= 0;
3867 /* Now wait for all I/O to complete */
3868 hdw
->cmd_debug_state
= 4;
3869 while (hdw
->ctl_write_pend_flag
|| hdw
->ctl_read_pend_flag
) {
3870 wait_for_completion(&hdw
->ctl_done
);
3872 hdw
->cmd_debug_state
= 5;
3875 del_timer_sync(&timer
);
3877 hdw
->cmd_debug_state
= 6;
3880 if (hdw
->ctl_timeout_flag
) {
3881 status
= -ETIMEDOUT
;
3883 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
3884 "Timed out control-write");
3890 /* Validate results of write request */
3891 if ((hdw
->ctl_write_urb
->status
!= 0) &&
3892 (hdw
->ctl_write_urb
->status
!= -ENOENT
) &&
3893 (hdw
->ctl_write_urb
->status
!= -ESHUTDOWN
) &&
3894 (hdw
->ctl_write_urb
->status
!= -ECONNRESET
)) {
3895 /* USB subsystem is reporting some kind of failure
3897 status
= hdw
->ctl_write_urb
->status
;
3899 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
3900 "control-write URB failure,"
3906 if (hdw
->ctl_write_urb
->actual_length
< write_len
) {
3907 /* Failed to write enough data */
3910 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
3911 "control-write URB short,"
3912 " expected=%d got=%d",
3914 hdw
->ctl_write_urb
->actual_length
);
3920 /* Validate results of read request */
3921 if ((hdw
->ctl_read_urb
->status
!= 0) &&
3922 (hdw
->ctl_read_urb
->status
!= -ENOENT
) &&
3923 (hdw
->ctl_read_urb
->status
!= -ESHUTDOWN
) &&
3924 (hdw
->ctl_read_urb
->status
!= -ECONNRESET
)) {
3925 /* USB subsystem is reporting some kind of failure
3927 status
= hdw
->ctl_read_urb
->status
;
3929 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
3930 "control-read URB failure,"
3936 if (hdw
->ctl_read_urb
->actual_length
< read_len
) {
3937 /* Failed to read enough data */
3940 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
3941 "control-read URB short,"
3942 " expected=%d got=%d",
3944 hdw
->ctl_read_urb
->actual_length
);
3948 /* Transfer retrieved data out from internal buffer */
3949 for (idx
= 0; idx
< read_len
; idx
++) {
3950 ((unsigned char *)read_data
)[idx
] =
3951 hdw
->ctl_read_buffer
[idx
];
3957 hdw
->cmd_debug_state
= 0;
3958 if ((status
< 0) && (!probe_fl
)) {
3959 pvr2_hdw_render_useless(hdw
);
3965 int pvr2_send_request(struct pvr2_hdw
*hdw
,
3966 void *write_data
,unsigned int write_len
,
3967 void *read_data
,unsigned int read_len
)
3969 return pvr2_send_request_ex(hdw
,HZ
*4,0,
3970 write_data
,write_len
,
3971 read_data
,read_len
);
3975 static int pvr2_issue_simple_cmd(struct pvr2_hdw
*hdw
,u32 cmdcode
)
3978 unsigned int cnt
= 1;
3979 unsigned int args
= 0;
3980 LOCK_TAKE(hdw
->ctl_lock
);
3981 hdw
->cmd_buffer
[0] = cmdcode
& 0xffu
;
3982 args
= (cmdcode
>> 8) & 0xffu
;
3983 args
= (args
> 2) ? 2 : args
;
3986 hdw
->cmd_buffer
[1] = (cmdcode
>> 16) & 0xffu
;
3988 hdw
->cmd_buffer
[2] = (cmdcode
>> 24) & 0xffu
;
3991 if (pvrusb2_debug
& PVR2_TRACE_INIT
) {
3993 unsigned int ccnt
,bcnt
;
3997 ccnt
= scnprintf(tbuf
+bcnt
,
3999 "Sending FX2 command 0x%x",cmdcode
);
4001 for (idx
= 0; idx
< ARRAY_SIZE(pvr2_fx2cmd_desc
); idx
++) {
4002 if (pvr2_fx2cmd_desc
[idx
].id
== cmdcode
) {
4003 ccnt
= scnprintf(tbuf
+bcnt
,
4006 pvr2_fx2cmd_desc
[idx
].desc
);
4012 ccnt
= scnprintf(tbuf
+bcnt
,
4014 " (%u",hdw
->cmd_buffer
[1]);
4017 ccnt
= scnprintf(tbuf
+bcnt
,
4019 ",%u",hdw
->cmd_buffer
[2]);
4022 ccnt
= scnprintf(tbuf
+bcnt
,
4027 pvr2_trace(PVR2_TRACE_INIT
,"%.*s",bcnt
,tbuf
);
4029 ret
= pvr2_send_request(hdw
,hdw
->cmd_buffer
,cnt
,NULL
,0);
4030 LOCK_GIVE(hdw
->ctl_lock
);
4035 int pvr2_write_register(struct pvr2_hdw
*hdw
, u16 reg
, u32 data
)
4039 LOCK_TAKE(hdw
->ctl_lock
);
4041 hdw
->cmd_buffer
[0] = FX2CMD_REG_WRITE
; /* write register prefix */
4042 PVR2_DECOMPOSE_LE(hdw
->cmd_buffer
,1,data
);
4043 hdw
->cmd_buffer
[5] = 0;
4044 hdw
->cmd_buffer
[6] = (reg
>> 8) & 0xff;
4045 hdw
->cmd_buffer
[7] = reg
& 0xff;
4048 ret
= pvr2_send_request(hdw
, hdw
->cmd_buffer
, 8, hdw
->cmd_buffer
, 0);
4050 LOCK_GIVE(hdw
->ctl_lock
);
4056 static int pvr2_read_register(struct pvr2_hdw
*hdw
, u16 reg
, u32
*data
)
4060 LOCK_TAKE(hdw
->ctl_lock
);
4062 hdw
->cmd_buffer
[0] = FX2CMD_REG_READ
; /* read register prefix */
4063 hdw
->cmd_buffer
[1] = 0;
4064 hdw
->cmd_buffer
[2] = 0;
4065 hdw
->cmd_buffer
[3] = 0;
4066 hdw
->cmd_buffer
[4] = 0;
4067 hdw
->cmd_buffer
[5] = 0;
4068 hdw
->cmd_buffer
[6] = (reg
>> 8) & 0xff;
4069 hdw
->cmd_buffer
[7] = reg
& 0xff;
4071 ret
|= pvr2_send_request(hdw
, hdw
->cmd_buffer
, 8, hdw
->cmd_buffer
, 4);
4072 *data
= PVR2_COMPOSE_LE(hdw
->cmd_buffer
,0);
4074 LOCK_GIVE(hdw
->ctl_lock
);
4080 void pvr2_hdw_render_useless(struct pvr2_hdw
*hdw
)
4082 if (!hdw
->flag_ok
) return;
4083 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
4084 "Device being rendered inoperable");
4085 if (hdw
->vid_stream
) {
4086 pvr2_stream_setup(hdw
->vid_stream
,NULL
,0,0);
4089 trace_stbit("flag_ok",hdw
->flag_ok
);
4090 pvr2_hdw_state_sched(hdw
);
4094 void pvr2_hdw_device_reset(struct pvr2_hdw
*hdw
)
4097 pvr2_trace(PVR2_TRACE_INIT
,"Performing a device reset...");
4098 ret
= usb_lock_device_for_reset(hdw
->usb_dev
,NULL
);
4100 ret
= usb_reset_device(hdw
->usb_dev
);
4101 usb_unlock_device(hdw
->usb_dev
);
4103 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
4104 "Failed to lock USB device ret=%d",ret
);
4106 if (init_pause_msec
) {
4107 pvr2_trace(PVR2_TRACE_INFO
,
4108 "Waiting %u msec for hardware to settle",
4110 msleep(init_pause_msec
);
4116 void pvr2_hdw_cpureset_assert(struct pvr2_hdw
*hdw
,int val
)
4122 if (!hdw
->usb_dev
) return;
4124 da
= kmalloc(16, GFP_KERNEL
);
4127 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
4128 "Unable to allocate memory to control CPU reset");
4132 pvr2_trace(PVR2_TRACE_INIT
,"cpureset_assert(%d)",val
);
4134 da
[0] = val
? 0x01 : 0x00;
4136 /* Write the CPUCS register on the 8051. The lsb of the register
4137 is the reset bit; a 1 asserts reset while a 0 clears it. */
4138 pipe
= usb_sndctrlpipe(hdw
->usb_dev
, 0);
4139 ret
= usb_control_msg(hdw
->usb_dev
,pipe
,0xa0,0x40,0xe600,0,da
,1,HZ
);
4141 pvr2_trace(PVR2_TRACE_ERROR_LEGS
,
4142 "cpureset_assert(%d) error=%d",val
,ret
);
4143 pvr2_hdw_render_useless(hdw
);
4150 int pvr2_hdw_cmd_deep_reset(struct pvr2_hdw
*hdw
)
4152 return pvr2_issue_simple_cmd(hdw
,FX2CMD_DEEP_RESET
);
4156 int pvr2_hdw_cmd_powerup(struct pvr2_hdw
*hdw
)
4158 return pvr2_issue_simple_cmd(hdw
,FX2CMD_POWER_ON
);
4162 int pvr2_hdw_cmd_powerdown(struct pvr2_hdw
*hdw
)
4164 return pvr2_issue_simple_cmd(hdw
,FX2CMD_POWER_OFF
);
4168 int pvr2_hdw_cmd_decoder_reset(struct pvr2_hdw
*hdw
)
4170 pvr2_trace(PVR2_TRACE_INIT
,
4171 "Requesting decoder reset");
4172 if (hdw
->decoder_client_id
) {
4173 v4l2_device_call_all(&hdw
->v4l2_dev
, hdw
->decoder_client_id
,
4175 pvr2_hdw_cx25840_vbi_hack(hdw
);
4178 pvr2_trace(PVR2_TRACE_INIT
,
4179 "Unable to reset decoder: nothing attached");
4184 static int pvr2_hdw_cmd_hcw_demod_reset(struct pvr2_hdw
*hdw
, int onoff
)
4187 return pvr2_issue_simple_cmd(hdw
,
4188 FX2CMD_HCW_DEMOD_RESETIN
|
4190 ((onoff
? 1 : 0) << 16));
4194 static int pvr2_hdw_cmd_onair_fe_power_ctrl(struct pvr2_hdw
*hdw
, int onoff
)
4197 return pvr2_issue_simple_cmd(hdw
,(onoff
?
4198 FX2CMD_ONAIR_DTV_POWER_ON
:
4199 FX2CMD_ONAIR_DTV_POWER_OFF
));
4203 static int pvr2_hdw_cmd_onair_digital_path_ctrl(struct pvr2_hdw
*hdw
,
4206 return pvr2_issue_simple_cmd(hdw
,(onoff
?
4207 FX2CMD_ONAIR_DTV_STREAMING_ON
:
4208 FX2CMD_ONAIR_DTV_STREAMING_OFF
));
4212 static void pvr2_hdw_cmd_modeswitch(struct pvr2_hdw
*hdw
,int digitalFl
)
4215 /* Compare digital/analog desired setting with current setting. If
4216 they don't match, fix it... */
4217 cmode
= (digitalFl
? PVR2_PATHWAY_DIGITAL
: PVR2_PATHWAY_ANALOG
);
4218 if (cmode
== hdw
->pathway_state
) {
4219 /* They match; nothing to do */
4223 switch (hdw
->hdw_desc
->digital_control_scheme
) {
4224 case PVR2_DIGITAL_SCHEME_HAUPPAUGE
:
4225 pvr2_hdw_cmd_hcw_demod_reset(hdw
,digitalFl
);
4226 if (cmode
== PVR2_PATHWAY_ANALOG
) {
4227 /* If moving to analog mode, also force the decoder
4228 to reset. If no decoder is attached, then it's
4229 ok to ignore this because if/when the decoder
4230 attaches, it will reset itself at that time. */
4231 pvr2_hdw_cmd_decoder_reset(hdw
);
4234 case PVR2_DIGITAL_SCHEME_ONAIR
:
4235 /* Supposedly we should always have the power on whether in
4236 digital or analog mode. But for now do what appears to
4238 pvr2_hdw_cmd_onair_fe_power_ctrl(hdw
,digitalFl
);
4243 pvr2_hdw_untrip_unlocked(hdw
);
4244 hdw
->pathway_state
= cmode
;
4248 static void pvr2_led_ctrl_hauppauge(struct pvr2_hdw
*hdw
, int onoff
)
4250 /* change some GPIO data
4252 * note: bit d7 of dir appears to control the LED,
4253 * so we shut it off here.
4257 pvr2_hdw_gpio_chg_dir(hdw
, 0xffffffff, 0x00000481);
4259 pvr2_hdw_gpio_chg_dir(hdw
, 0xffffffff, 0x00000401);
4261 pvr2_hdw_gpio_chg_out(hdw
, 0xffffffff, 0x00000000);
4265 typedef void (*led_method_func
)(struct pvr2_hdw
*,int);
4267 static led_method_func led_methods
[] = {
4268 [PVR2_LED_SCHEME_HAUPPAUGE
] = pvr2_led_ctrl_hauppauge
,
4273 static void pvr2_led_ctrl(struct pvr2_hdw
*hdw
,int onoff
)
4275 unsigned int scheme_id
;
4278 if ((!onoff
) == (!hdw
->led_on
)) return;
4280 hdw
->led_on
= onoff
!= 0;
4282 scheme_id
= hdw
->hdw_desc
->led_scheme
;
4283 if (scheme_id
< ARRAY_SIZE(led_methods
)) {
4284 fp
= led_methods
[scheme_id
];
4289 if (fp
) (*fp
)(hdw
,onoff
);
4293 /* Stop / start video stream transport */
4294 static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw
*hdw
,int runFl
)
4298 /* If we're in analog mode, then just issue the usual analog
4300 if (hdw
->pathway_state
== PVR2_PATHWAY_ANALOG
) {
4301 return pvr2_issue_simple_cmd(hdw
,
4303 FX2CMD_STREAMING_ON
:
4304 FX2CMD_STREAMING_OFF
));
4305 /*Note: Not reached */
4308 if (hdw
->pathway_state
!= PVR2_PATHWAY_DIGITAL
) {
4309 /* Whoops, we don't know what mode we're in... */
4313 /* To get here we have to be in digital mode. The mechanism here
4314 is unfortunately different for different vendors. So we switch
4315 on the device's digital scheme attribute in order to figure out
4317 switch (hdw
->hdw_desc
->digital_control_scheme
) {
4318 case PVR2_DIGITAL_SCHEME_HAUPPAUGE
:
4319 return pvr2_issue_simple_cmd(hdw
,
4321 FX2CMD_HCW_DTV_STREAMING_ON
:
4322 FX2CMD_HCW_DTV_STREAMING_OFF
));
4323 case PVR2_DIGITAL_SCHEME_ONAIR
:
4324 ret
= pvr2_issue_simple_cmd(hdw
,
4326 FX2CMD_STREAMING_ON
:
4327 FX2CMD_STREAMING_OFF
));
4328 if (ret
) return ret
;
4329 return pvr2_hdw_cmd_onair_digital_path_ctrl(hdw
,runFl
);
4336 /* Evaluate whether or not state_pathway_ok can change */
4337 static int state_eval_pathway_ok(struct pvr2_hdw
*hdw
)
4339 if (hdw
->state_pathway_ok
) {
4340 /* Nothing to do if pathway is already ok */
4343 if (!hdw
->state_pipeline_idle
) {
4344 /* Not allowed to change anything if pipeline is not idle */
4347 pvr2_hdw_cmd_modeswitch(hdw
,hdw
->input_val
== PVR2_CVAL_INPUT_DTV
);
4348 hdw
->state_pathway_ok
= !0;
4349 trace_stbit("state_pathway_ok",hdw
->state_pathway_ok
);
4354 /* Evaluate whether or not state_encoder_ok can change */
4355 static int state_eval_encoder_ok(struct pvr2_hdw
*hdw
)
4357 if (hdw
->state_encoder_ok
) return 0;
4358 if (hdw
->flag_tripped
) return 0;
4359 if (hdw
->state_encoder_run
) return 0;
4360 if (hdw
->state_encoder_config
) return 0;
4361 if (hdw
->state_decoder_run
) return 0;
4362 if (hdw
->state_usbstream_run
) return 0;
4363 if (hdw
->pathway_state
== PVR2_PATHWAY_DIGITAL
) {
4364 if (!hdw
->hdw_desc
->flag_digital_requires_cx23416
) return 0;
4365 } else if (hdw
->pathway_state
!= PVR2_PATHWAY_ANALOG
) {
4369 if (pvr2_upload_firmware2(hdw
) < 0) {
4370 hdw
->flag_tripped
= !0;
4371 trace_stbit("flag_tripped",hdw
->flag_tripped
);
4374 hdw
->state_encoder_ok
= !0;
4375 trace_stbit("state_encoder_ok",hdw
->state_encoder_ok
);
4380 /* Evaluate whether or not state_encoder_config can change */
4381 static int state_eval_encoder_config(struct pvr2_hdw
*hdw
)
4383 if (hdw
->state_encoder_config
) {
4384 if (hdw
->state_encoder_ok
) {
4385 if (hdw
->state_pipeline_req
&&
4386 !hdw
->state_pipeline_pause
) return 0;
4388 hdw
->state_encoder_config
= 0;
4389 hdw
->state_encoder_waitok
= 0;
4390 trace_stbit("state_encoder_waitok",hdw
->state_encoder_waitok
);
4391 /* paranoia - solve race if timer just completed */
4392 del_timer_sync(&hdw
->encoder_wait_timer
);
4394 if (!hdw
->state_pathway_ok
||
4395 (hdw
->pathway_state
!= PVR2_PATHWAY_ANALOG
) ||
4396 !hdw
->state_encoder_ok
||
4397 !hdw
->state_pipeline_idle
||
4398 hdw
->state_pipeline_pause
||
4399 !hdw
->state_pipeline_req
||
4400 !hdw
->state_pipeline_config
) {
4401 /* We must reset the enforced wait interval if
4402 anything has happened that might have disturbed
4403 the encoder. This should be a rare case. */
4404 if (timer_pending(&hdw
->encoder_wait_timer
)) {
4405 del_timer_sync(&hdw
->encoder_wait_timer
);
4407 if (hdw
->state_encoder_waitok
) {
4408 /* Must clear the state - therefore we did
4409 something to a state bit and must also
4411 hdw
->state_encoder_waitok
= 0;
4412 trace_stbit("state_encoder_waitok",
4413 hdw
->state_encoder_waitok
);
4418 if (!hdw
->state_encoder_waitok
) {
4419 if (!timer_pending(&hdw
->encoder_wait_timer
)) {
4420 /* waitok flag wasn't set and timer isn't
4421 running. Check flag once more to avoid
4422 a race then start the timer. This is
4423 the point when we measure out a minimal
4424 quiet interval before doing something to
4426 if (!hdw
->state_encoder_waitok
) {
4427 hdw
->encoder_wait_timer
.expires
=
4429 (HZ
* TIME_MSEC_ENCODER_WAIT
4431 add_timer(&hdw
->encoder_wait_timer
);
4434 /* We can't continue until we know we have been
4435 quiet for the interval measured by this
4439 pvr2_encoder_configure(hdw
);
4440 if (hdw
->state_encoder_ok
) hdw
->state_encoder_config
= !0;
4442 trace_stbit("state_encoder_config",hdw
->state_encoder_config
);
4447 /* Return true if the encoder should not be running. */
4448 static int state_check_disable_encoder_run(struct pvr2_hdw
*hdw
)
4450 if (!hdw
->state_encoder_ok
) {
4451 /* Encoder isn't healthy at the moment, so stop it. */
4454 if (!hdw
->state_pathway_ok
) {
4455 /* Mode is not understood at the moment (i.e. it wants to
4456 change), so encoder must be stopped. */
4460 switch (hdw
->pathway_state
) {
4461 case PVR2_PATHWAY_ANALOG
:
4462 if (!hdw
->state_decoder_run
) {
4463 /* We're in analog mode and the decoder is not
4464 running; thus the encoder should be stopped as
4469 case PVR2_PATHWAY_DIGITAL
:
4470 if (hdw
->state_encoder_runok
) {
4471 /* This is a funny case. We're in digital mode so
4472 really the encoder should be stopped. However
4473 if it really is running, only kill it after
4474 runok has been set. This gives a chance for the
4475 onair quirk to function (encoder must run
4476 briefly first, at least once, before onair
4477 digital streaming can work). */
4482 /* Unknown mode; so encoder should be stopped. */
4486 /* If we get here, we haven't found a reason to stop the
4492 /* Return true if the encoder should be running. */
4493 static int state_check_enable_encoder_run(struct pvr2_hdw
*hdw
)
4495 if (!hdw
->state_encoder_ok
) {
4496 /* Don't run the encoder if it isn't healthy... */
4499 if (!hdw
->state_pathway_ok
) {
4500 /* Don't run the encoder if we don't (yet) know what mode
4501 we need to be in... */
4505 switch (hdw
->pathway_state
) {
4506 case PVR2_PATHWAY_ANALOG
:
4507 if (hdw
->state_decoder_run
&& hdw
->state_decoder_ready
) {
4508 /* In analog mode, if the decoder is running, then
4513 case PVR2_PATHWAY_DIGITAL
:
4514 if ((hdw
->hdw_desc
->digital_control_scheme
==
4515 PVR2_DIGITAL_SCHEME_ONAIR
) &&
4516 !hdw
->state_encoder_runok
) {
4517 /* This is a quirk. OnAir hardware won't stream
4518 digital until the encoder has been run at least
4519 once, for a minimal period of time (empiricially
4520 measured to be 1/4 second). So if we're on
4521 OnAir hardware and the encoder has never been
4522 run at all, then start the encoder. Normal
4523 state machine logic in the driver will
4524 automatically handle the remaining bits. */
4529 /* For completeness (unknown mode; encoder won't run ever) */
4532 /* If we get here, then we haven't found any reason to run the
4533 encoder, so don't run it. */
4538 /* Evaluate whether or not state_encoder_run can change */
4539 static int state_eval_encoder_run(struct pvr2_hdw
*hdw
)
4541 if (hdw
->state_encoder_run
) {
4542 if (!state_check_disable_encoder_run(hdw
)) return 0;
4543 if (hdw
->state_encoder_ok
) {
4544 del_timer_sync(&hdw
->encoder_run_timer
);
4545 if (pvr2_encoder_stop(hdw
) < 0) return !0;
4547 hdw
->state_encoder_run
= 0;
4549 if (!state_check_enable_encoder_run(hdw
)) return 0;
4550 if (pvr2_encoder_start(hdw
) < 0) return !0;
4551 hdw
->state_encoder_run
= !0;
4552 if (!hdw
->state_encoder_runok
) {
4553 hdw
->encoder_run_timer
.expires
=
4554 jiffies
+ (HZ
* TIME_MSEC_ENCODER_OK
/ 1000);
4555 add_timer(&hdw
->encoder_run_timer
);
4558 trace_stbit("state_encoder_run",hdw
->state_encoder_run
);
4563 /* Timeout function for quiescent timer. */
4564 static void pvr2_hdw_quiescent_timeout(unsigned long data
)
4566 struct pvr2_hdw
*hdw
= (struct pvr2_hdw
*)data
;
4567 hdw
->state_decoder_quiescent
= !0;
4568 trace_stbit("state_decoder_quiescent",hdw
->state_decoder_quiescent
);
4569 hdw
->state_stale
= !0;
4570 queue_work(hdw
->workqueue
,&hdw
->workpoll
);
4574 /* Timeout function for decoder stabilization timer. */
4575 static void pvr2_hdw_decoder_stabilization_timeout(unsigned long data
)
4577 struct pvr2_hdw
*hdw
= (struct pvr2_hdw
*)data
;
4578 hdw
->state_decoder_ready
= !0;
4579 trace_stbit("state_decoder_ready", hdw
->state_decoder_ready
);
4580 hdw
->state_stale
= !0;
4581 queue_work(hdw
->workqueue
, &hdw
->workpoll
);
4585 /* Timeout function for encoder wait timer. */
4586 static void pvr2_hdw_encoder_wait_timeout(unsigned long data
)
4588 struct pvr2_hdw
*hdw
= (struct pvr2_hdw
*)data
;
4589 hdw
->state_encoder_waitok
= !0;
4590 trace_stbit("state_encoder_waitok",hdw
->state_encoder_waitok
);
4591 hdw
->state_stale
= !0;
4592 queue_work(hdw
->workqueue
,&hdw
->workpoll
);
4596 /* Timeout function for encoder run timer. */
4597 static void pvr2_hdw_encoder_run_timeout(unsigned long data
)
4599 struct pvr2_hdw
*hdw
= (struct pvr2_hdw
*)data
;
4600 if (!hdw
->state_encoder_runok
) {
4601 hdw
->state_encoder_runok
= !0;
4602 trace_stbit("state_encoder_runok",hdw
->state_encoder_runok
);
4603 hdw
->state_stale
= !0;
4604 queue_work(hdw
->workqueue
,&hdw
->workpoll
);
4609 /* Evaluate whether or not state_decoder_run can change */
4610 static int state_eval_decoder_run(struct pvr2_hdw
*hdw
)
4612 if (hdw
->state_decoder_run
) {
4613 if (hdw
->state_encoder_ok
) {
4614 if (hdw
->state_pipeline_req
&&
4615 !hdw
->state_pipeline_pause
&&
4616 hdw
->state_pathway_ok
) return 0;
4618 if (!hdw
->flag_decoder_missed
) {
4619 pvr2_decoder_enable(hdw
,0);
4621 hdw
->state_decoder_quiescent
= 0;
4622 hdw
->state_decoder_run
= 0;
4623 /* paranoia - solve race if timer(s) just completed */
4624 del_timer_sync(&hdw
->quiescent_timer
);
4625 /* Kill the stabilization timer, in case we're killing the
4626 encoder before the previous stabilization interval has
4627 been properly timed. */
4628 del_timer_sync(&hdw
->decoder_stabilization_timer
);
4629 hdw
->state_decoder_ready
= 0;
4631 if (!hdw
->state_decoder_quiescent
) {
4632 if (!timer_pending(&hdw
->quiescent_timer
)) {
4633 /* We don't do something about the
4634 quiescent timer until right here because
4635 we also want to catch cases where the
4636 decoder was already not running (like
4637 after initialization) as opposed to
4638 knowing that we had just stopped it.
4639 The second flag check is here to cover a
4640 race - the timer could have run and set
4641 this flag just after the previous check
4642 but before we did the pending check. */
4643 if (!hdw
->state_decoder_quiescent
) {
4644 hdw
->quiescent_timer
.expires
=
4646 (HZ
* TIME_MSEC_DECODER_WAIT
4648 add_timer(&hdw
->quiescent_timer
);
4651 /* Don't allow decoder to start again until it has
4652 been quiesced first. This little detail should
4653 hopefully further stabilize the encoder. */
4656 if (!hdw
->state_pathway_ok
||
4657 (hdw
->pathway_state
!= PVR2_PATHWAY_ANALOG
) ||
4658 !hdw
->state_pipeline_req
||
4659 hdw
->state_pipeline_pause
||
4660 !hdw
->state_pipeline_config
||
4661 !hdw
->state_encoder_config
||
4662 !hdw
->state_encoder_ok
) return 0;
4663 del_timer_sync(&hdw
->quiescent_timer
);
4664 if (hdw
->flag_decoder_missed
) return 0;
4665 if (pvr2_decoder_enable(hdw
,!0) < 0) return 0;
4666 hdw
->state_decoder_quiescent
= 0;
4667 hdw
->state_decoder_ready
= 0;
4668 hdw
->state_decoder_run
= !0;
4669 if (hdw
->decoder_client_id
== PVR2_CLIENT_ID_SAA7115
) {
4670 hdw
->decoder_stabilization_timer
.expires
=
4672 (HZ
* TIME_MSEC_DECODER_STABILIZATION_WAIT
/
4674 add_timer(&hdw
->decoder_stabilization_timer
);
4676 hdw
->state_decoder_ready
= !0;
4679 trace_stbit("state_decoder_quiescent",hdw
->state_decoder_quiescent
);
4680 trace_stbit("state_decoder_run",hdw
->state_decoder_run
);
4681 trace_stbit("state_decoder_ready", hdw
->state_decoder_ready
);
4686 /* Evaluate whether or not state_usbstream_run can change */
4687 static int state_eval_usbstream_run(struct pvr2_hdw
*hdw
)
4689 if (hdw
->state_usbstream_run
) {
4691 if (hdw
->pathway_state
== PVR2_PATHWAY_ANALOG
) {
4692 fl
= (hdw
->state_encoder_ok
&&
4693 hdw
->state_encoder_run
);
4694 } else if ((hdw
->pathway_state
== PVR2_PATHWAY_DIGITAL
) &&
4695 (hdw
->hdw_desc
->flag_digital_requires_cx23416
)) {
4696 fl
= hdw
->state_encoder_ok
;
4699 hdw
->state_pipeline_req
&&
4700 !hdw
->state_pipeline_pause
&&
4701 hdw
->state_pathway_ok
) {
4704 pvr2_hdw_cmd_usbstream(hdw
,0);
4705 hdw
->state_usbstream_run
= 0;
4707 if (!hdw
->state_pipeline_req
||
4708 hdw
->state_pipeline_pause
||
4709 !hdw
->state_pathway_ok
) return 0;
4710 if (hdw
->pathway_state
== PVR2_PATHWAY_ANALOG
) {
4711 if (!hdw
->state_encoder_ok
||
4712 !hdw
->state_encoder_run
) return 0;
4713 } else if ((hdw
->pathway_state
== PVR2_PATHWAY_DIGITAL
) &&
4714 (hdw
->hdw_desc
->flag_digital_requires_cx23416
)) {
4715 if (!hdw
->state_encoder_ok
) return 0;
4716 if (hdw
->state_encoder_run
) return 0;
4717 if (hdw
->hdw_desc
->digital_control_scheme
==
4718 PVR2_DIGITAL_SCHEME_ONAIR
) {
4719 /* OnAir digital receivers won't stream
4720 unless the analog encoder has run first.
4721 Why? I have no idea. But don't even
4722 try until we know the analog side is
4723 known to have run. */
4724 if (!hdw
->state_encoder_runok
) return 0;
4727 if (pvr2_hdw_cmd_usbstream(hdw
,!0) < 0) return 0;
4728 hdw
->state_usbstream_run
= !0;
4730 trace_stbit("state_usbstream_run",hdw
->state_usbstream_run
);
4735 /* Attempt to configure pipeline, if needed */
4736 static int state_eval_pipeline_config(struct pvr2_hdw
*hdw
)
4738 if (hdw
->state_pipeline_config
||
4739 hdw
->state_pipeline_pause
) return 0;
4740 pvr2_hdw_commit_execute(hdw
);
4745 /* Update pipeline idle and pipeline pause tracking states based on other
4746 inputs. This must be called whenever the other relevant inputs have
4748 static int state_update_pipeline_state(struct pvr2_hdw
*hdw
)
4752 /* Update pipeline state */
4753 st
= !(hdw
->state_encoder_run
||
4754 hdw
->state_decoder_run
||
4755 hdw
->state_usbstream_run
||
4756 (!hdw
->state_decoder_quiescent
));
4757 if (!st
!= !hdw
->state_pipeline_idle
) {
4758 hdw
->state_pipeline_idle
= st
;
4761 if (hdw
->state_pipeline_idle
&& hdw
->state_pipeline_pause
) {
4762 hdw
->state_pipeline_pause
= 0;
4769 typedef int (*state_eval_func
)(struct pvr2_hdw
*);
4771 /* Set of functions to be run to evaluate various states in the driver. */
4772 static const state_eval_func eval_funcs
[] = {
4773 state_eval_pathway_ok
,
4774 state_eval_pipeline_config
,
4775 state_eval_encoder_ok
,
4776 state_eval_encoder_config
,
4777 state_eval_decoder_run
,
4778 state_eval_encoder_run
,
4779 state_eval_usbstream_run
,
4783 /* Process various states and return true if we did anything interesting. */
4784 static int pvr2_hdw_state_update(struct pvr2_hdw
*hdw
)
4787 int state_updated
= 0;
4790 if (!hdw
->state_stale
) return 0;
4791 if ((hdw
->fw1_state
!= FW1_STATE_OK
) ||
4793 hdw
->state_stale
= 0;
4796 /* This loop is the heart of the entire driver. It keeps trying to
4797 evaluate various bits of driver state until nothing changes for
4798 one full iteration. Each "bit of state" tracks some global
4799 aspect of the driver, e.g. whether decoder should run, if
4800 pipeline is configured, usb streaming is on, etc. We separately
4801 evaluate each of those questions based on other driver state to
4802 arrive at the correct running configuration. */
4805 state_update_pipeline_state(hdw
);
4806 /* Iterate over each bit of state */
4807 for (i
= 0; (i
<ARRAY_SIZE(eval_funcs
)) && hdw
->flag_ok
; i
++) {
4808 if ((*eval_funcs
[i
])(hdw
)) {
4811 state_update_pipeline_state(hdw
);
4814 } while (check_flag
&& hdw
->flag_ok
);
4815 hdw
->state_stale
= 0;
4816 trace_stbit("state_stale",hdw
->state_stale
);
4817 return state_updated
;
4821 static unsigned int print_input_mask(unsigned int msk
,
4822 char *buf
,unsigned int acnt
)
4824 unsigned int idx
,ccnt
;
4825 unsigned int tcnt
= 0;
4826 for (idx
= 0; idx
< ARRAY_SIZE(control_values_input
); idx
++) {
4827 if (!((1 << idx
) & msk
)) continue;
4828 ccnt
= scnprintf(buf
+tcnt
,
4832 control_values_input
[idx
]);
4839 static const char *pvr2_pathway_state_name(int id
)
4842 case PVR2_PATHWAY_ANALOG
: return "analog";
4843 case PVR2_PATHWAY_DIGITAL
: return "digital";
4844 default: return "unknown";
4849 static unsigned int pvr2_hdw_report_unlocked(struct pvr2_hdw
*hdw
,int which
,
4850 char *buf
,unsigned int acnt
)
4856 "driver:%s%s%s%s%s <mode=%s>",
4857 (hdw
->flag_ok
? " <ok>" : " <fail>"),
4858 (hdw
->flag_init_ok
? " <init>" : " <uninitialized>"),
4859 (hdw
->flag_disconnected
? " <disconnected>" :
4861 (hdw
->flag_tripped
? " <tripped>" : ""),
4862 (hdw
->flag_decoder_missed
? " <no decoder>" : ""),
4863 pvr2_pathway_state_name(hdw
->pathway_state
));
4868 "pipeline:%s%s%s%s",
4869 (hdw
->state_pipeline_idle
? " <idle>" : ""),
4870 (hdw
->state_pipeline_config
?
4871 " <configok>" : " <stale>"),
4872 (hdw
->state_pipeline_req
? " <req>" : ""),
4873 (hdw
->state_pipeline_pause
? " <pause>" : ""));
4877 "worker:%s%s%s%s%s%s%s",
4878 (hdw
->state_decoder_run
?
4879 (hdw
->state_decoder_ready
?
4880 "<decode:run>" : " <decode:start>") :
4881 (hdw
->state_decoder_quiescent
?
4882 "" : " <decode:stop>")),
4883 (hdw
->state_decoder_quiescent
?
4884 " <decode:quiescent>" : ""),
4885 (hdw
->state_encoder_ok
?
4886 "" : " <encode:init>"),
4887 (hdw
->state_encoder_run
?
4888 (hdw
->state_encoder_runok
?
4890 " <encode:firstrun>") :
4891 (hdw
->state_encoder_runok
?
4893 " <encode:virgin>")),
4894 (hdw
->state_encoder_config
?
4895 " <encode:configok>" :
4896 (hdw
->state_encoder_waitok
?
4897 "" : " <encode:waitok>")),
4898 (hdw
->state_usbstream_run
?
4899 " <usb:run>" : " <usb:stop>"),
4900 (hdw
->state_pathway_ok
?
4901 " <pathway:ok>" : ""));
4906 pvr2_get_state_name(hdw
->master_state
));
4908 unsigned int tcnt
= 0;
4911 ccnt
= scnprintf(buf
,
4913 "Hardware supported inputs: ");
4915 tcnt
+= print_input_mask(hdw
->input_avail_mask
,
4918 if (hdw
->input_avail_mask
!= hdw
->input_allowed_mask
) {
4919 ccnt
= scnprintf(buf
+tcnt
,
4921 "; allowed inputs: ");
4923 tcnt
+= print_input_mask(hdw
->input_allowed_mask
,
4930 struct pvr2_stream_stats stats
;
4931 if (!hdw
->vid_stream
) break;
4932 pvr2_stream_get_stats(hdw
->vid_stream
,
4938 " URBs: queued=%u idle=%u ready=%u"
4939 " processed=%u failed=%u",
4940 stats
.bytes_processed
,
4941 stats
.buffers_in_queue
,
4942 stats
.buffers_in_idle
,
4943 stats
.buffers_in_ready
,
4944 stats
.buffers_processed
,
4945 stats
.buffers_failed
);
4948 unsigned int id
= hdw
->ir_scheme_active
;
4949 return scnprintf(buf
, acnt
, "ir scheme: id=%d %s", id
,
4950 (id
>= ARRAY_SIZE(ir_scheme_names
) ?
4951 "?" : ir_scheme_names
[id
]));
4959 /* Generate report containing info about attached sub-devices and attached
4960 i2c clients, including an indication of which attached i2c clients are
4961 actually sub-devices. */
4962 static unsigned int pvr2_hdw_report_clients(struct pvr2_hdw
*hdw
,
4963 char *buf
, unsigned int acnt
)
4965 struct v4l2_subdev
*sd
;
4966 unsigned int tcnt
= 0;
4968 struct i2c_client
*client
;
4972 ccnt
= scnprintf(buf
, acnt
, "Associated v4l2-subdev drivers and I2C clients:\n");
4974 v4l2_device_for_each_subdev(sd
, &hdw
->v4l2_dev
) {
4977 if (id
< ARRAY_SIZE(module_names
)) p
= module_names
[id
];
4979 ccnt
= scnprintf(buf
+ tcnt
, acnt
- tcnt
, " %s:", p
);
4982 ccnt
= scnprintf(buf
+ tcnt
, acnt
- tcnt
,
4983 " (unknown id=%u):", id
);
4986 client
= v4l2_get_subdevdata(sd
);
4988 ccnt
= scnprintf(buf
+ tcnt
, acnt
- tcnt
,
4989 " %s @ %02x\n", client
->name
,
4993 ccnt
= scnprintf(buf
+ tcnt
, acnt
- tcnt
,
4994 " no i2c client\n");
5002 unsigned int pvr2_hdw_state_report(struct pvr2_hdw
*hdw
,
5003 char *buf
,unsigned int acnt
)
5005 unsigned int bcnt
,ccnt
,idx
;
5007 LOCK_TAKE(hdw
->big_lock
);
5008 for (idx
= 0; ; idx
++) {
5009 ccnt
= pvr2_hdw_report_unlocked(hdw
,idx
,buf
,acnt
);
5011 bcnt
+= ccnt
; acnt
-= ccnt
; buf
+= ccnt
;
5013 buf
[0] = '\n'; ccnt
= 1;
5014 bcnt
+= ccnt
; acnt
-= ccnt
; buf
+= ccnt
;
5016 ccnt
= pvr2_hdw_report_clients(hdw
, buf
, acnt
);
5017 bcnt
+= ccnt
; acnt
-= ccnt
; buf
+= ccnt
;
5018 LOCK_GIVE(hdw
->big_lock
);
5023 static void pvr2_hdw_state_log_state(struct pvr2_hdw
*hdw
)
5026 unsigned int idx
, ccnt
;
5027 unsigned int lcnt
, ucnt
;
5029 for (idx
= 0; ; idx
++) {
5030 ccnt
= pvr2_hdw_report_unlocked(hdw
,idx
,buf
,sizeof(buf
));
5032 printk(KERN_INFO
"%s %.*s\n",hdw
->name
,ccnt
,buf
);
5034 ccnt
= pvr2_hdw_report_clients(hdw
, buf
, sizeof(buf
));
5036 while (ucnt
< ccnt
) {
5038 while ((lcnt
+ ucnt
< ccnt
) && (buf
[lcnt
+ ucnt
] != '\n')) {
5041 printk(KERN_INFO
"%s %.*s\n", hdw
->name
, lcnt
, buf
+ ucnt
);
5047 /* Evaluate and update the driver's current state, taking various actions
5048 as appropriate for the update. */
5049 static int pvr2_hdw_state_eval(struct pvr2_hdw
*hdw
)
5052 int state_updated
= 0;
5053 int callback_flag
= 0;
5056 pvr2_trace(PVR2_TRACE_STBITS
,
5057 "Drive state check START");
5058 if (pvrusb2_debug
& PVR2_TRACE_STBITS
) {
5059 pvr2_hdw_state_log_state(hdw
);
5062 /* Process all state and get back over disposition */
5063 state_updated
= pvr2_hdw_state_update(hdw
);
5065 analog_mode
= (hdw
->pathway_state
!= PVR2_PATHWAY_DIGITAL
);
5067 /* Update master state based upon all other states. */
5068 if (!hdw
->flag_ok
) {
5069 st
= PVR2_STATE_DEAD
;
5070 } else if (hdw
->fw1_state
!= FW1_STATE_OK
) {
5071 st
= PVR2_STATE_COLD
;
5072 } else if ((analog_mode
||
5073 hdw
->hdw_desc
->flag_digital_requires_cx23416
) &&
5074 !hdw
->state_encoder_ok
) {
5075 st
= PVR2_STATE_WARM
;
5076 } else if (hdw
->flag_tripped
||
5077 (analog_mode
&& hdw
->flag_decoder_missed
)) {
5078 st
= PVR2_STATE_ERROR
;
5079 } else if (hdw
->state_usbstream_run
&&
5081 (hdw
->state_encoder_run
&& hdw
->state_decoder_run
))) {
5082 st
= PVR2_STATE_RUN
;
5084 st
= PVR2_STATE_READY
;
5086 if (hdw
->master_state
!= st
) {
5087 pvr2_trace(PVR2_TRACE_STATE
,
5088 "Device state change from %s to %s",
5089 pvr2_get_state_name(hdw
->master_state
),
5090 pvr2_get_state_name(st
));
5091 pvr2_led_ctrl(hdw
,st
== PVR2_STATE_RUN
);
5092 hdw
->master_state
= st
;
5096 if (state_updated
) {
5097 /* Trigger anyone waiting on any state changes here. */
5098 wake_up(&hdw
->state_wait_data
);
5101 if (pvrusb2_debug
& PVR2_TRACE_STBITS
) {
5102 pvr2_hdw_state_log_state(hdw
);
5104 pvr2_trace(PVR2_TRACE_STBITS
,
5105 "Drive state check DONE callback=%d",callback_flag
);
5107 return callback_flag
;
5111 /* Cause kernel thread to check / update driver state */
5112 static void pvr2_hdw_state_sched(struct pvr2_hdw
*hdw
)
5114 if (hdw
->state_stale
) return;
5115 hdw
->state_stale
= !0;
5116 trace_stbit("state_stale",hdw
->state_stale
);
5117 queue_work(hdw
->workqueue
,&hdw
->workpoll
);
5121 int pvr2_hdw_gpio_get_dir(struct pvr2_hdw
*hdw
,u32
*dp
)
5123 return pvr2_read_register(hdw
,PVR2_GPIO_DIR
,dp
);
5127 int pvr2_hdw_gpio_get_out(struct pvr2_hdw
*hdw
,u32
*dp
)
5129 return pvr2_read_register(hdw
,PVR2_GPIO_OUT
,dp
);
5133 int pvr2_hdw_gpio_get_in(struct pvr2_hdw
*hdw
,u32
*dp
)
5135 return pvr2_read_register(hdw
,PVR2_GPIO_IN
,dp
);
5139 int pvr2_hdw_gpio_chg_dir(struct pvr2_hdw
*hdw
,u32 msk
,u32 val
)
5144 ret
= pvr2_read_register(hdw
,PVR2_GPIO_DIR
,&cval
);
5145 if (ret
) return ret
;
5146 nval
= (cval
& ~msk
) | (val
& msk
);
5147 pvr2_trace(PVR2_TRACE_GPIO
,
5148 "GPIO direction changing 0x%x:0x%x"
5149 " from 0x%x to 0x%x",
5153 pvr2_trace(PVR2_TRACE_GPIO
,
5154 "GPIO direction changing to 0x%x",nval
);
5156 return pvr2_write_register(hdw
,PVR2_GPIO_DIR
,nval
);
5160 int pvr2_hdw_gpio_chg_out(struct pvr2_hdw
*hdw
,u32 msk
,u32 val
)
5165 ret
= pvr2_read_register(hdw
,PVR2_GPIO_OUT
,&cval
);
5166 if (ret
) return ret
;
5167 nval
= (cval
& ~msk
) | (val
& msk
);
5168 pvr2_trace(PVR2_TRACE_GPIO
,
5169 "GPIO output changing 0x%x:0x%x from 0x%x to 0x%x",
5173 pvr2_trace(PVR2_TRACE_GPIO
,
5174 "GPIO output changing to 0x%x",nval
);
5176 return pvr2_write_register(hdw
,PVR2_GPIO_OUT
,nval
);
5180 void pvr2_hdw_status_poll(struct pvr2_hdw
*hdw
)
5182 struct v4l2_tuner
*vtp
= &hdw
->tuner_signal_info
;
5183 memset(vtp
, 0, sizeof(*vtp
));
5184 vtp
->type
= (hdw
->input_val
== PVR2_CVAL_INPUT_RADIO
) ?
5185 V4L2_TUNER_RADIO
: V4L2_TUNER_ANALOG_TV
;
5186 hdw
->tuner_signal_stale
= 0;
5187 /* Note: There apparently is no replacement for VIDIOC_CROPCAP
5188 using v4l2-subdev - therefore we can't support that AT ALL right
5189 now. (Of course, no sub-drivers seem to implement it either.
5190 But now it's a a chicken and egg problem...) */
5191 v4l2_device_call_all(&hdw
->v4l2_dev
, 0, tuner
, g_tuner
, vtp
);
5192 pvr2_trace(PVR2_TRACE_CHIPS
, "subdev status poll"
5193 " type=%u strength=%u audio=0x%x cap=0x%x"
5196 vtp
->signal
, vtp
->rxsubchans
, vtp
->capability
,
5197 vtp
->rangelow
, vtp
->rangehigh
);
5199 /* We have to do this to avoid getting into constant polling if
5200 there's nobody to answer a poll of cropcap info. */
5201 hdw
->cropcap_stale
= 0;
5205 unsigned int pvr2_hdw_get_input_available(struct pvr2_hdw
*hdw
)
5207 return hdw
->input_avail_mask
;
5211 unsigned int pvr2_hdw_get_input_allowed(struct pvr2_hdw
*hdw
)
5213 return hdw
->input_allowed_mask
;
5217 static int pvr2_hdw_set_input(struct pvr2_hdw
*hdw
,int v
)
5219 if (hdw
->input_val
!= v
) {
5221 hdw
->input_dirty
= !0;
5224 /* Handle side effects - if we switch to a mode that needs the RF
5225 tuner, then select the right frequency choice as well and mark
5227 if (hdw
->input_val
== PVR2_CVAL_INPUT_RADIO
) {
5228 hdw
->freqSelector
= 0;
5229 hdw
->freqDirty
= !0;
5230 } else if ((hdw
->input_val
== PVR2_CVAL_INPUT_TV
) ||
5231 (hdw
->input_val
== PVR2_CVAL_INPUT_DTV
)) {
5232 hdw
->freqSelector
= 1;
5233 hdw
->freqDirty
= !0;
5239 int pvr2_hdw_set_input_allowed(struct pvr2_hdw
*hdw
,
5240 unsigned int change_mask
,
5241 unsigned int change_val
)
5244 unsigned int nv
,m
,idx
;
5245 LOCK_TAKE(hdw
->big_lock
);
5247 nv
= hdw
->input_allowed_mask
& ~change_mask
;
5248 nv
|= (change_val
& change_mask
);
5249 nv
&= hdw
->input_avail_mask
;
5251 /* No legal modes left; return error instead. */
5255 hdw
->input_allowed_mask
= nv
;
5256 if ((1 << hdw
->input_val
) & hdw
->input_allowed_mask
) {
5257 /* Current mode is still in the allowed mask, so
5261 /* Select and switch to a mode that is still in the allowed
5263 if (!hdw
->input_allowed_mask
) {
5264 /* Nothing legal; give up */
5267 m
= hdw
->input_allowed_mask
;
5268 for (idx
= 0; idx
< (sizeof(m
) << 3); idx
++) {
5269 if (!((1 << idx
) & m
)) continue;
5270 pvr2_hdw_set_input(hdw
,idx
);
5274 LOCK_GIVE(hdw
->big_lock
);
5279 /* Find I2C address of eeprom */
5280 static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw
*hdw
)
5283 LOCK_TAKE(hdw
->ctl_lock
); do {
5284 hdw
->cmd_buffer
[0] = FX2CMD_GET_EEPROM_ADDR
;
5285 result
= pvr2_send_request(hdw
,
5288 if (result
< 0) break;
5289 result
= hdw
->cmd_buffer
[0];
5290 } while(0); LOCK_GIVE(hdw
->ctl_lock
);
5295 int pvr2_hdw_register_access(struct pvr2_hdw
*hdw
,
5296 struct v4l2_dbg_match
*match
, u64 reg_id
,
5297 int setFl
, u64
*val_ptr
)
5299 #ifdef CONFIG_VIDEO_ADV_DEBUG
5300 struct v4l2_dbg_register req
;
5304 if (!capable(CAP_SYS_ADMIN
)) return -EPERM
;
5308 if (setFl
) req
.val
= *val_ptr
;
5309 /* It would be nice to know if a sub-device answered the request */
5310 v4l2_device_call_all(&hdw
->v4l2_dev
, 0, core
, g_register
, &req
);
5311 if (!setFl
) *val_ptr
= req
.val
;
5323 Stuff for Emacs to see, in order to encourage consistent editing style:
5324 *** Local Variables: ***
5326 *** fill-column: 75 ***
5327 *** tab-width: 8 ***
5328 *** c-basic-offset: 8 ***