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[mirror_ubuntu-zesty-kernel.git] / drivers / media / video / tvaudio.c
1 /*
2 * Driver for simple i2c audio chips.
3 *
4 * Copyright (c) 2000 Gerd Knorr
5 * based on code by:
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
9 *
10 * Copyright(c) 2005-2008 Mauro Carvalho Chehab
11 * - Some cleanups, code fixes, etc
12 * - Convert it to V4L2 API
13 *
14 * This code is placed under the terms of the GNU General Public License
15 *
16 * OPTIONS:
17 * debug - set to 1 if you'd like to see debug messages
18 *
19 */
20
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/sched.h>
24 #include <linux/string.h>
25 #include <linux/timer.h>
26 #include <linux/delay.h>
27 #include <linux/errno.h>
28 #include <linux/slab.h>
29 #include <linux/videodev2.h>
30 #include <linux/i2c.h>
31 #include <linux/init.h>
32 #include <linux/kthread.h>
33 #include <linux/freezer.h>
34
35 #include <media/tvaudio.h>
36 #include <media/v4l2-device.h>
37 #include <media/v4l2-chip-ident.h>
38 #include <media/v4l2-i2c-drv-legacy.h>
39
40 #include <media/i2c-addr.h>
41
42 /* ---------------------------------------------------------------------- */
43 /* insmod args */
44
45 static int debug; /* insmod parameter */
46 module_param(debug, int, 0644);
47
48 MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
49 MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
50 MODULE_LICENSE("GPL");
51
52 #define UNSET (-1U)
53
54 /* ---------------------------------------------------------------------- */
55 /* our structs */
56
57 #define MAXREGS 256
58
59 struct CHIPSTATE;
60 typedef int (*getvalue)(int);
61 typedef int (*checkit)(struct CHIPSTATE*);
62 typedef int (*initialize)(struct CHIPSTATE*);
63 typedef int (*getmode)(struct CHIPSTATE*);
64 typedef void (*setmode)(struct CHIPSTATE*, int mode);
65
66 /* i2c command */
67 typedef struct AUDIOCMD {
68 int count; /* # of bytes to send */
69 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
70 } audiocmd;
71
72 /* chip description */
73 struct CHIPDESC {
74 char *name; /* chip name */
75 int addr_lo, addr_hi; /* i2c address range */
76 int registers; /* # of registers */
77
78 int *insmodopt;
79 checkit checkit;
80 initialize initialize;
81 int flags;
82 #define CHIP_HAS_VOLUME 1
83 #define CHIP_HAS_BASSTREBLE 2
84 #define CHIP_HAS_INPUTSEL 4
85 #define CHIP_NEED_CHECKMODE 8
86
87 /* various i2c command sequences */
88 audiocmd init;
89
90 /* which register has which value */
91 int leftreg,rightreg,treblereg,bassreg;
92
93 /* initialize with (defaults to 65535/65535/32768/32768 */
94 int leftinit,rightinit,trebleinit,bassinit;
95
96 /* functions to convert the values (v4l -> chip) */
97 getvalue volfunc,treblefunc,bassfunc;
98
99 /* get/set mode */
100 getmode getmode;
101 setmode setmode;
102
103 /* input switch register + values for v4l inputs */
104 int inputreg;
105 int inputmap[4];
106 int inputmute;
107 int inputmask;
108 };
109
110 /* current state of the chip */
111 struct CHIPSTATE {
112 struct v4l2_subdev sd;
113
114 /* chip-specific description - should point to
115 an entry at CHIPDESC table */
116 struct CHIPDESC *desc;
117
118 /* shadow register set */
119 audiocmd shadow;
120
121 /* current settings */
122 __u16 left,right,treble,bass,muted,mode;
123 int prevmode;
124 int radio;
125 int input;
126
127 /* thread */
128 struct task_struct *thread;
129 struct timer_list wt;
130 int watch_stereo;
131 int audmode;
132 };
133
134 static inline struct CHIPSTATE *to_state(struct v4l2_subdev *sd)
135 {
136 return container_of(sd, struct CHIPSTATE, sd);
137 }
138
139 /* ---------------------------------------------------------------------- */
140 /* i2c addresses */
141
142 static unsigned short normal_i2c[] = {
143 I2C_ADDR_TDA8425 >> 1,
144 I2C_ADDR_TEA6300 >> 1,
145 I2C_ADDR_TEA6420 >> 1,
146 I2C_ADDR_TDA9840 >> 1,
147 I2C_ADDR_TDA985x_L >> 1,
148 I2C_ADDR_TDA985x_H >> 1,
149 I2C_ADDR_TDA9874 >> 1,
150 I2C_ADDR_PIC16C54 >> 1,
151 I2C_CLIENT_END };
152 I2C_CLIENT_INSMOD;
153
154 /* ---------------------------------------------------------------------- */
155 /* i2c I/O functions */
156
157 static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
158 {
159 struct v4l2_subdev *sd = &chip->sd;
160 struct i2c_client *c = v4l2_get_subdevdata(sd);
161 unsigned char buffer[2];
162
163 if (subaddr < 0) {
164 v4l2_dbg(1, debug, sd, "chip_write: 0x%x\n", val);
165 chip->shadow.bytes[1] = val;
166 buffer[0] = val;
167 if (1 != i2c_master_send(c, buffer, 1)) {
168 v4l2_warn(sd, "I/O error (write 0x%x)\n", val);
169 return -1;
170 }
171 } else {
172 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
173 v4l2_info(sd,
174 "Tried to access a non-existent register: %d\n",
175 subaddr);
176 return -EINVAL;
177 }
178
179 v4l2_dbg(1, debug, sd, "chip_write: reg%d=0x%x\n",
180 subaddr, val);
181 chip->shadow.bytes[subaddr+1] = val;
182 buffer[0] = subaddr;
183 buffer[1] = val;
184 if (2 != i2c_master_send(c, buffer, 2)) {
185 v4l2_warn(sd, "I/O error (write reg%d=0x%x)\n",
186 subaddr, val);
187 return -1;
188 }
189 }
190 return 0;
191 }
192
193 static int chip_write_masked(struct CHIPSTATE *chip,
194 int subaddr, int val, int mask)
195 {
196 struct v4l2_subdev *sd = &chip->sd;
197
198 if (mask != 0) {
199 if (subaddr < 0) {
200 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
201 } else {
202 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
203 v4l2_info(sd,
204 "Tried to access a non-existent register: %d\n",
205 subaddr);
206 return -EINVAL;
207 }
208
209 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
210 }
211 }
212 return chip_write(chip, subaddr, val);
213 }
214
215 static int chip_read(struct CHIPSTATE *chip)
216 {
217 struct v4l2_subdev *sd = &chip->sd;
218 struct i2c_client *c = v4l2_get_subdevdata(sd);
219 unsigned char buffer;
220
221 if (1 != i2c_master_recv(c, &buffer, 1)) {
222 v4l2_warn(sd, "I/O error (read)\n");
223 return -1;
224 }
225 v4l2_dbg(1, debug, sd, "chip_read: 0x%x\n", buffer);
226 return buffer;
227 }
228
229 static int chip_read2(struct CHIPSTATE *chip, int subaddr)
230 {
231 struct v4l2_subdev *sd = &chip->sd;
232 struct i2c_client *c = v4l2_get_subdevdata(sd);
233 unsigned char write[1];
234 unsigned char read[1];
235 struct i2c_msg msgs[2] = {
236 { c->addr, 0, 1, write },
237 { c->addr, I2C_M_RD, 1, read }
238 };
239
240 write[0] = subaddr;
241
242 if (2 != i2c_transfer(c->adapter, msgs, 2)) {
243 v4l2_warn(sd, "I/O error (read2)\n");
244 return -1;
245 }
246 v4l2_dbg(1, debug, sd, "chip_read2: reg%d=0x%x\n",
247 subaddr, read[0]);
248 return read[0];
249 }
250
251 static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
252 {
253 struct v4l2_subdev *sd = &chip->sd;
254 struct i2c_client *c = v4l2_get_subdevdata(sd);
255 int i;
256
257 if (0 == cmd->count)
258 return 0;
259
260 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
261 v4l2_info(sd,
262 "Tried to access a non-existent register range: %d to %d\n",
263 cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1);
264 return -EINVAL;
265 }
266
267 /* FIXME: it seems that the shadow bytes are wrong bellow !*/
268
269 /* update our shadow register set; print bytes if (debug > 0) */
270 v4l2_dbg(1, debug, sd, "chip_cmd(%s): reg=%d, data:",
271 name, cmd->bytes[0]);
272 for (i = 1; i < cmd->count; i++) {
273 if (debug)
274 printk(KERN_CONT " 0x%x", cmd->bytes[i]);
275 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
276 }
277 if (debug)
278 printk(KERN_CONT "\n");
279
280 /* send data to the chip */
281 if (cmd->count != i2c_master_send(c, cmd->bytes, cmd->count)) {
282 v4l2_warn(sd, "I/O error (%s)\n", name);
283 return -1;
284 }
285 return 0;
286 }
287
288 /* ---------------------------------------------------------------------- */
289 /* kernel thread for doing i2c stuff asyncronly
290 * right now it is used only to check the audio mode (mono/stereo/whatever)
291 * some time after switching to another TV channel, then turn on stereo
292 * if available, ...
293 */
294
295 static void chip_thread_wake(unsigned long data)
296 {
297 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
298 wake_up_process(chip->thread);
299 }
300
301 static int chip_thread(void *data)
302 {
303 struct CHIPSTATE *chip = data;
304 struct CHIPDESC *desc = chip->desc;
305 struct v4l2_subdev *sd = &chip->sd;
306 int mode;
307
308 v4l2_dbg(1, debug, sd, "thread started\n");
309 set_freezable();
310 for (;;) {
311 set_current_state(TASK_INTERRUPTIBLE);
312 if (!kthread_should_stop())
313 schedule();
314 set_current_state(TASK_RUNNING);
315 try_to_freeze();
316 if (kthread_should_stop())
317 break;
318 v4l2_dbg(1, debug, sd, "thread wakeup\n");
319
320 /* don't do anything for radio or if mode != auto */
321 if (chip->radio || chip->mode != 0)
322 continue;
323
324 /* have a look what's going on */
325 mode = desc->getmode(chip);
326 if (mode == chip->prevmode)
327 continue;
328
329 /* chip detected a new audio mode - set it */
330 v4l2_dbg(1, debug, sd, "thread checkmode\n");
331
332 chip->prevmode = mode;
333
334 if (mode & V4L2_TUNER_MODE_STEREO)
335 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
336 if (mode & V4L2_TUNER_MODE_LANG1_LANG2)
337 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
338 else if (mode & V4L2_TUNER_MODE_LANG1)
339 desc->setmode(chip, V4L2_TUNER_MODE_LANG1);
340 else if (mode & V4L2_TUNER_MODE_LANG2)
341 desc->setmode(chip, V4L2_TUNER_MODE_LANG2);
342 else
343 desc->setmode(chip, V4L2_TUNER_MODE_MONO);
344
345 /* schedule next check */
346 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
347 }
348
349 v4l2_dbg(1, debug, sd, "thread exiting\n");
350 return 0;
351 }
352
353 /* ---------------------------------------------------------------------- */
354 /* audio chip descriptions - defines+functions for tda9840 */
355
356 #define TDA9840_SW 0x00
357 #define TDA9840_LVADJ 0x02
358 #define TDA9840_STADJ 0x03
359 #define TDA9840_TEST 0x04
360
361 #define TDA9840_MONO 0x10
362 #define TDA9840_STEREO 0x2a
363 #define TDA9840_DUALA 0x12
364 #define TDA9840_DUALB 0x1e
365 #define TDA9840_DUALAB 0x1a
366 #define TDA9840_DUALBA 0x16
367 #define TDA9840_EXTERNAL 0x7a
368
369 #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
370 #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
371 #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
372
373 #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
374 #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
375
376 static int tda9840_getmode(struct CHIPSTATE *chip)
377 {
378 struct v4l2_subdev *sd = &chip->sd;
379 int val, mode;
380
381 val = chip_read(chip);
382 mode = V4L2_TUNER_MODE_MONO;
383 if (val & TDA9840_DS_DUAL)
384 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
385 if (val & TDA9840_ST_STEREO)
386 mode |= V4L2_TUNER_MODE_STEREO;
387
388 v4l2_dbg(1, debug, sd, "tda9840_getmode(): raw chip read: %d, return: %d\n",
389 val, mode);
390 return mode;
391 }
392
393 static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
394 {
395 int update = 1;
396 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
397
398 switch (mode) {
399 case V4L2_TUNER_MODE_MONO:
400 t |= TDA9840_MONO;
401 break;
402 case V4L2_TUNER_MODE_STEREO:
403 t |= TDA9840_STEREO;
404 break;
405 case V4L2_TUNER_MODE_LANG1:
406 t |= TDA9840_DUALA;
407 break;
408 case V4L2_TUNER_MODE_LANG2:
409 t |= TDA9840_DUALB;
410 break;
411 default:
412 update = 0;
413 }
414
415 if (update)
416 chip_write(chip, TDA9840_SW, t);
417 }
418
419 static int tda9840_checkit(struct CHIPSTATE *chip)
420 {
421 int rc;
422 rc = chip_read(chip);
423 /* lower 5 bits should be 0 */
424 return ((rc & 0x1f) == 0) ? 1 : 0;
425 }
426
427 /* ---------------------------------------------------------------------- */
428 /* audio chip descriptions - defines+functions for tda985x */
429
430 /* subaddresses for TDA9855 */
431 #define TDA9855_VR 0x00 /* Volume, right */
432 #define TDA9855_VL 0x01 /* Volume, left */
433 #define TDA9855_BA 0x02 /* Bass */
434 #define TDA9855_TR 0x03 /* Treble */
435 #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
436
437 /* subaddresses for TDA9850 */
438 #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
439
440 /* subaddesses for both chips */
441 #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
442 #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
443 #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
444 #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
445 #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
446 #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
447
448 /* Masks for bits in TDA9855 subaddresses */
449 /* 0x00 - VR in TDA9855 */
450 /* 0x01 - VL in TDA9855 */
451 /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
452 * in 1dB steps - mute is 0x27 */
453
454
455 /* 0x02 - BA in TDA9855 */
456 /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
457 * in .5dB steps - 0 is 0x0E */
458
459
460 /* 0x03 - TR in TDA9855 */
461 /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
462 * in 3dB steps - 0 is 0x7 */
463
464 /* Masks for bits in both chips' subaddresses */
465 /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
466 /* Unique to TDA9855: */
467 /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
468 * in 3dB steps - mute is 0x0 */
469
470 /* Unique to TDA9850: */
471 /* lower 4 bits control stereo noise threshold, over which stereo turns off
472 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
473
474
475 /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
476 /* Unique to TDA9855: */
477 #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
478 #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
479 #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
480 #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
481 /* Bits 0 to 3 select various combinations
482 * of line in and line out, only the
483 * interesting ones are defined */
484 #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
485 #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
486
487 /* Unique to TDA9850: */
488 /* lower 4 bits contol SAP noise threshold, over which SAP turns off
489 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
490
491
492 /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
493 /* Common to TDA9855 and TDA9850: */
494 #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
495 #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
496 #define TDA985x_MONO 0 /* Forces Mono output */
497 #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
498
499 /* Unique to TDA9855: */
500 #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
501 #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
502 #define TDA9855_LINEAR 0 /* Linear Stereo */
503 #define TDA9855_PSEUDO 1 /* Pseudo Stereo */
504 #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
505 #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
506 #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
507
508 /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
509 /* Common to both TDA9855 and TDA9850: */
510 /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
511 * in .5dB steps - 0dB is 0x7 */
512
513 /* 0x08, 0x09 - A1 and A2 (read/write) */
514 /* Common to both TDA9855 and TDA9850: */
515 /* lower 5 bites are wideband and spectral expander alignment
516 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
517 #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
518 #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
519 #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
520
521 /* 0x0a - A3 */
522 /* Common to both TDA9855 and TDA9850: */
523 /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
524 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
525 #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
526
527 static int tda9855_volume(int val) { return val/0x2e8+0x27; }
528 static int tda9855_bass(int val) { return val/0xccc+0x06; }
529 static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
530
531 static int tda985x_getmode(struct CHIPSTATE *chip)
532 {
533 int mode;
534
535 mode = ((TDA985x_STP | TDA985x_SAPP) &
536 chip_read(chip)) >> 4;
537 /* Add mono mode regardless of SAP and stereo */
538 /* Allows forced mono */
539 return mode | V4L2_TUNER_MODE_MONO;
540 }
541
542 static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
543 {
544 int update = 1;
545 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
546
547 switch (mode) {
548 case V4L2_TUNER_MODE_MONO:
549 c6 |= TDA985x_MONO;
550 break;
551 case V4L2_TUNER_MODE_STEREO:
552 c6 |= TDA985x_STEREO;
553 break;
554 case V4L2_TUNER_MODE_LANG1:
555 c6 |= TDA985x_SAP;
556 break;
557 default:
558 update = 0;
559 }
560 if (update)
561 chip_write(chip,TDA985x_C6,c6);
562 }
563
564
565 /* ---------------------------------------------------------------------- */
566 /* audio chip descriptions - defines+functions for tda9873h */
567
568 /* Subaddresses for TDA9873H */
569
570 #define TDA9873_SW 0x00 /* Switching */
571 #define TDA9873_AD 0x01 /* Adjust */
572 #define TDA9873_PT 0x02 /* Port */
573
574 /* Subaddress 0x00: Switching Data
575 * B7..B0:
576 *
577 * B1, B0: Input source selection
578 * 0, 0 internal
579 * 1, 0 external stereo
580 * 0, 1 external mono
581 */
582 #define TDA9873_INP_MASK 3
583 #define TDA9873_INTERNAL 0
584 #define TDA9873_EXT_STEREO 2
585 #define TDA9873_EXT_MONO 1
586
587 /* B3, B2: output signal select
588 * B4 : transmission mode
589 * 0, 0, 1 Mono
590 * 1, 0, 0 Stereo
591 * 1, 1, 1 Stereo (reversed channel)
592 * 0, 0, 0 Dual AB
593 * 0, 0, 1 Dual AA
594 * 0, 1, 0 Dual BB
595 * 0, 1, 1 Dual BA
596 */
597
598 #define TDA9873_TR_MASK (7 << 2)
599 #define TDA9873_TR_MONO 4
600 #define TDA9873_TR_STEREO 1 << 4
601 #define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
602 #define TDA9873_TR_DUALA 1 << 2
603 #define TDA9873_TR_DUALB 1 << 3
604
605 /* output level controls
606 * B5: output level switch (0 = reduced gain, 1 = normal gain)
607 * B6: mute (1 = muted)
608 * B7: auto-mute (1 = auto-mute enabled)
609 */
610
611 #define TDA9873_GAIN_NORMAL 1 << 5
612 #define TDA9873_MUTE 1 << 6
613 #define TDA9873_AUTOMUTE 1 << 7
614
615 /* Subaddress 0x01: Adjust/standard */
616
617 /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
618 * Recommended value is +0 dB
619 */
620
621 #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
622
623 /* Bits C6..C4 control FM stantard
624 * C6, C5, C4
625 * 0, 0, 0 B/G (PAL FM)
626 * 0, 0, 1 M
627 * 0, 1, 0 D/K(1)
628 * 0, 1, 1 D/K(2)
629 * 1, 0, 0 D/K(3)
630 * 1, 0, 1 I
631 */
632 #define TDA9873_BG 0
633 #define TDA9873_M 1
634 #define TDA9873_DK1 2
635 #define TDA9873_DK2 3
636 #define TDA9873_DK3 4
637 #define TDA9873_I 5
638
639 /* C7 controls identification response time (1=fast/0=normal)
640 */
641 #define TDA9873_IDR_NORM 0
642 #define TDA9873_IDR_FAST 1 << 7
643
644
645 /* Subaddress 0x02: Port data */
646
647 /* E1, E0 free programmable ports P1/P2
648 0, 0 both ports low
649 0, 1 P1 high
650 1, 0 P2 high
651 1, 1 both ports high
652 */
653
654 #define TDA9873_PORTS 3
655
656 /* E2: test port */
657 #define TDA9873_TST_PORT 1 << 2
658
659 /* E5..E3 control mono output channel (together with transmission mode bit B4)
660 *
661 * E5 E4 E3 B4 OUTM
662 * 0 0 0 0 mono
663 * 0 0 1 0 DUAL B
664 * 0 1 0 1 mono (from stereo decoder)
665 */
666 #define TDA9873_MOUT_MONO 0
667 #define TDA9873_MOUT_FMONO 0
668 #define TDA9873_MOUT_DUALA 0
669 #define TDA9873_MOUT_DUALB 1 << 3
670 #define TDA9873_MOUT_ST 1 << 4
671 #define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
672 #define TDA9873_MOUT_EXTL 1 << 5
673 #define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
674 #define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
675 #define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
676
677 /* Status bits: (chip read) */
678 #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
679 #define TDA9873_STEREO 2 /* Stereo sound is identified */
680 #define TDA9873_DUAL 4 /* Dual sound is identified */
681
682 static int tda9873_getmode(struct CHIPSTATE *chip)
683 {
684 struct v4l2_subdev *sd = &chip->sd;
685 int val,mode;
686
687 val = chip_read(chip);
688 mode = V4L2_TUNER_MODE_MONO;
689 if (val & TDA9873_STEREO)
690 mode |= V4L2_TUNER_MODE_STEREO;
691 if (val & TDA9873_DUAL)
692 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
693 v4l2_dbg(1, debug, sd, "tda9873_getmode(): raw chip read: %d, return: %d\n",
694 val, mode);
695 return mode;
696 }
697
698 static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
699 {
700 struct v4l2_subdev *sd = &chip->sd;
701 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
702 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
703
704 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
705 v4l2_dbg(1, debug, sd, "tda9873_setmode(): external input\n");
706 return;
707 }
708
709 v4l2_dbg(1, debug, sd, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
710 v4l2_dbg(1, debug, sd, "tda9873_setmode(): sw_data = %d\n", sw_data);
711
712 switch (mode) {
713 case V4L2_TUNER_MODE_MONO:
714 sw_data |= TDA9873_TR_MONO;
715 break;
716 case V4L2_TUNER_MODE_STEREO:
717 sw_data |= TDA9873_TR_STEREO;
718 break;
719 case V4L2_TUNER_MODE_LANG1:
720 sw_data |= TDA9873_TR_DUALA;
721 break;
722 case V4L2_TUNER_MODE_LANG2:
723 sw_data |= TDA9873_TR_DUALB;
724 break;
725 default:
726 chip->mode = 0;
727 return;
728 }
729
730 chip_write(chip, TDA9873_SW, sw_data);
731 v4l2_dbg(1, debug, sd, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
732 mode, sw_data);
733 }
734
735 static int tda9873_checkit(struct CHIPSTATE *chip)
736 {
737 int rc;
738
739 if (-1 == (rc = chip_read2(chip,254)))
740 return 0;
741 return (rc & ~0x1f) == 0x80;
742 }
743
744
745 /* ---------------------------------------------------------------------- */
746 /* audio chip description - defines+functions for tda9874h and tda9874a */
747 /* Dariusz Kowalewski <darekk@automex.pl> */
748
749 /* Subaddresses for TDA9874H and TDA9874A (slave rx) */
750 #define TDA9874A_AGCGR 0x00 /* AGC gain */
751 #define TDA9874A_GCONR 0x01 /* general config */
752 #define TDA9874A_MSR 0x02 /* monitor select */
753 #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
754 #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
755 #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
756 #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
757 #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
758 #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
759 #define TDA9874A_DCR 0x09 /* demodulator config */
760 #define TDA9874A_FMER 0x0a /* FM de-emphasis */
761 #define TDA9874A_FMMR 0x0b /* FM dematrix */
762 #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
763 #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
764 #define TDA9874A_NCONR 0x0e /* NICAM config */
765 #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
766 #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
767 #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
768 #define TDA9874A_AMCONR 0x12 /* audio mute control */
769 #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
770 #define TDA9874A_AOSR 0x14 /* analog output select */
771 #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
772 #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
773 #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
774 #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
775 #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
776
777 /* Subaddresses for TDA9874H and TDA9874A (slave tx) */
778 #define TDA9874A_DSR 0x00 /* device status */
779 #define TDA9874A_NSR 0x01 /* NICAM status */
780 #define TDA9874A_NECR 0x02 /* NICAM error count */
781 #define TDA9874A_DR1 0x03 /* add. data LSB */
782 #define TDA9874A_DR2 0x04 /* add. data MSB */
783 #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
784 #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
785 #define TDA9874A_SIFLR 0x07 /* SIF level */
786 #define TDA9874A_TR2 252 /* test reg. 2 */
787 #define TDA9874A_TR1 253 /* test reg. 1 */
788 #define TDA9874A_DIC 254 /* device id. code */
789 #define TDA9874A_SIC 255 /* software id. code */
790
791
792 static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
793 static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
794 static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
795 static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
796 static int tda9874a_dic = -1; /* device id. code */
797
798 /* insmod options for tda9874a */
799 static unsigned int tda9874a_SIF = UNSET;
800 static unsigned int tda9874a_AMSEL = UNSET;
801 static unsigned int tda9874a_STD = UNSET;
802 module_param(tda9874a_SIF, int, 0444);
803 module_param(tda9874a_AMSEL, int, 0444);
804 module_param(tda9874a_STD, int, 0444);
805
806 /*
807 * initialization table for tda9874 decoder:
808 * - carrier 1 freq. registers (3 bytes)
809 * - carrier 2 freq. registers (3 bytes)
810 * - demudulator config register
811 * - FM de-emphasis register (slow identification mode)
812 * Note: frequency registers must be written in single i2c transfer.
813 */
814 static struct tda9874a_MODES {
815 char *name;
816 audiocmd cmd;
817 } tda9874a_modelist[9] = {
818 { "A2, B/G", /* default */
819 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
820 { "A2, M (Korea)",
821 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
822 { "A2, D/K (1)",
823 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
824 { "A2, D/K (2)",
825 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
826 { "A2, D/K (3)",
827 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
828 { "NICAM, I",
829 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
830 { "NICAM, B/G",
831 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
832 { "NICAM, D/K",
833 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
834 { "NICAM, L",
835 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
836 };
837
838 static int tda9874a_setup(struct CHIPSTATE *chip)
839 {
840 struct v4l2_subdev *sd = &chip->sd;
841
842 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
843 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
844 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
845 if(tda9874a_dic == 0x11) {
846 chip_write(chip, TDA9874A_FMMR, 0x80);
847 } else { /* dic == 0x07 */
848 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
849 chip_write(chip, TDA9874A_FMMR, 0x00);
850 }
851 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
852 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
853 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
854 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
855 /* Note: If signal quality is poor you may want to change NICAM */
856 /* error limit registers (NLELR and NUELR) to some greater values. */
857 /* Then the sound would remain stereo, but won't be so clear. */
858 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
859 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
860
861 if(tda9874a_dic == 0x11) {
862 chip_write(chip, TDA9874A_AMCONR, 0xf9);
863 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
864 chip_write(chip, TDA9874A_AOSR, 0x80);
865 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
866 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
867 } else { /* dic == 0x07 */
868 chip_write(chip, TDA9874A_AMCONR, 0xfb);
869 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
870 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
871 }
872 v4l2_dbg(1, debug, sd, "tda9874a_setup(): %s [0x%02X].\n",
873 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
874 return 1;
875 }
876
877 static int tda9874a_getmode(struct CHIPSTATE *chip)
878 {
879 struct v4l2_subdev *sd = &chip->sd;
880 int dsr,nsr,mode;
881 int necr; /* just for debugging */
882
883 mode = V4L2_TUNER_MODE_MONO;
884
885 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
886 return mode;
887 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
888 return mode;
889 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
890 return mode;
891
892 /* need to store dsr/nsr somewhere */
893 chip->shadow.bytes[MAXREGS-2] = dsr;
894 chip->shadow.bytes[MAXREGS-1] = nsr;
895
896 if(tda9874a_mode) {
897 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
898 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
899 * that sound has (temporarily) switched from NICAM to
900 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
901 * error count. So in fact there is no stereo in this case :-(
902 * But changing the mode to V4L2_TUNER_MODE_MONO would switch
903 * external 4052 multiplexer in audio_hook().
904 */
905 if(nsr & 0x02) /* NSR.S/MB=1 */
906 mode |= V4L2_TUNER_MODE_STEREO;
907 if(nsr & 0x01) /* NSR.D/SB=1 */
908 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
909 } else {
910 if(dsr & 0x02) /* DSR.IDSTE=1 */
911 mode |= V4L2_TUNER_MODE_STEREO;
912 if(dsr & 0x04) /* DSR.IDDUA=1 */
913 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
914 }
915
916 v4l2_dbg(1, debug, sd, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
917 dsr, nsr, necr, mode);
918 return mode;
919 }
920
921 static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
922 {
923 struct v4l2_subdev *sd = &chip->sd;
924
925 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
926 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
927 if (tda9874a_mode) {
928 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
929 tda9874a_NCONR &= 0xfe; /* enable */
930 else
931 tda9874a_NCONR |= 0x01; /* disable */
932 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
933 }
934
935 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
936 * and has auto-select function for audio output (AOSR register).
937 * Old TDA9874H doesn't support these features.
938 * TDA9874A also has additional mono output pin (OUTM), which
939 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
940 */
941 if(tda9874a_dic == 0x11) {
942 int aosr = 0x80;
943 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
944
945 switch(mode) {
946 case V4L2_TUNER_MODE_MONO:
947 case V4L2_TUNER_MODE_STEREO:
948 break;
949 case V4L2_TUNER_MODE_LANG1:
950 aosr = 0x80; /* auto-select, dual A/A */
951 mdacosr = (tda9874a_mode) ? 0x82:0x80;
952 break;
953 case V4L2_TUNER_MODE_LANG2:
954 aosr = 0xa0; /* auto-select, dual B/B */
955 mdacosr = (tda9874a_mode) ? 0x83:0x81;
956 break;
957 default:
958 chip->mode = 0;
959 return;
960 }
961 chip_write(chip, TDA9874A_AOSR, aosr);
962 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
963
964 v4l2_dbg(1, debug, sd, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
965 mode, aosr, mdacosr);
966
967 } else { /* dic == 0x07 */
968 int fmmr,aosr;
969
970 switch(mode) {
971 case V4L2_TUNER_MODE_MONO:
972 fmmr = 0x00; /* mono */
973 aosr = 0x10; /* A/A */
974 break;
975 case V4L2_TUNER_MODE_STEREO:
976 if(tda9874a_mode) {
977 fmmr = 0x00;
978 aosr = 0x00; /* handled by NICAM auto-mute */
979 } else {
980 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
981 aosr = 0x00;
982 }
983 break;
984 case V4L2_TUNER_MODE_LANG1:
985 fmmr = 0x02; /* dual */
986 aosr = 0x10; /* dual A/A */
987 break;
988 case V4L2_TUNER_MODE_LANG2:
989 fmmr = 0x02; /* dual */
990 aosr = 0x20; /* dual B/B */
991 break;
992 default:
993 chip->mode = 0;
994 return;
995 }
996 chip_write(chip, TDA9874A_FMMR, fmmr);
997 chip_write(chip, TDA9874A_AOSR, aosr);
998
999 v4l2_dbg(1, debug, sd, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
1000 mode, fmmr, aosr);
1001 }
1002 }
1003
1004 static int tda9874a_checkit(struct CHIPSTATE *chip)
1005 {
1006 struct v4l2_subdev *sd = &chip->sd;
1007 int dic,sic; /* device id. and software id. codes */
1008
1009 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
1010 return 0;
1011 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
1012 return 0;
1013
1014 v4l2_dbg(1, debug, sd, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
1015
1016 if((dic == 0x11)||(dic == 0x07)) {
1017 v4l2_info(sd, "found tda9874%s.\n", (dic == 0x11) ? "a" : "h");
1018 tda9874a_dic = dic; /* remember device id. */
1019 return 1;
1020 }
1021 return 0; /* not found */
1022 }
1023
1024 static int tda9874a_initialize(struct CHIPSTATE *chip)
1025 {
1026 if (tda9874a_SIF > 2)
1027 tda9874a_SIF = 1;
1028 if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist))
1029 tda9874a_STD = 0;
1030 if(tda9874a_AMSEL > 1)
1031 tda9874a_AMSEL = 0;
1032
1033 if(tda9874a_SIF == 1)
1034 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
1035 else
1036 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
1037
1038 tda9874a_ESP = tda9874a_STD;
1039 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1040
1041 if(tda9874a_AMSEL == 0)
1042 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
1043 else
1044 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1045
1046 tda9874a_setup(chip);
1047 return 0;
1048 }
1049
1050 /* ---------------------------------------------------------------------- */
1051 /* audio chip description - defines+functions for tda9875 */
1052 /* The TDA9875 is made by Philips Semiconductor
1053 * http://www.semiconductors.philips.com
1054 * TDA9875: I2C-bus controlled DSP audio processor, FM demodulator
1055 *
1056 */
1057
1058 /* subaddresses for TDA9875 */
1059 #define TDA9875_MUT 0x12 /*General mute (value --> 0b11001100*/
1060 #define TDA9875_CFG 0x01 /* Config register (value --> 0b00000000 */
1061 #define TDA9875_DACOS 0x13 /*DAC i/o select (ADC) 0b0000100*/
1062 #define TDA9875_LOSR 0x16 /*Line output select regirter 0b0100 0001*/
1063
1064 #define TDA9875_CH1V 0x0c /*Channel 1 volume (mute)*/
1065 #define TDA9875_CH2V 0x0d /*Channel 2 volume (mute)*/
1066 #define TDA9875_SC1 0x14 /*SCART 1 in (mono)*/
1067 #define TDA9875_SC2 0x15 /*SCART 2 in (mono)*/
1068
1069 #define TDA9875_ADCIS 0x17 /*ADC input select (mono) 0b0110 000*/
1070 #define TDA9875_AER 0x19 /*Audio effect (AVL+Pseudo) 0b0000 0110*/
1071 #define TDA9875_MCS 0x18 /*Main channel select (DAC) 0b0000100*/
1072 #define TDA9875_MVL 0x1a /* Main volume gauche */
1073 #define TDA9875_MVR 0x1b /* Main volume droite */
1074 #define TDA9875_MBA 0x1d /* Main Basse */
1075 #define TDA9875_MTR 0x1e /* Main treble */
1076 #define TDA9875_ACS 0x1f /* Auxilary channel select (FM) 0b0000000*/
1077 #define TDA9875_AVL 0x20 /* Auxilary volume gauche */
1078 #define TDA9875_AVR 0x21 /* Auxilary volume droite */
1079 #define TDA9875_ABA 0x22 /* Auxilary Basse */
1080 #define TDA9875_ATR 0x23 /* Auxilary treble */
1081
1082 #define TDA9875_MSR 0x02 /* Monitor select register */
1083 #define TDA9875_C1MSB 0x03 /* Carrier 1 (FM) frequency register MSB */
1084 #define TDA9875_C1MIB 0x04 /* Carrier 1 (FM) frequency register (16-8]b */
1085 #define TDA9875_C1LSB 0x05 /* Carrier 1 (FM) frequency register LSB */
1086 #define TDA9875_C2MSB 0x06 /* Carrier 2 (nicam) frequency register MSB */
1087 #define TDA9875_C2MIB 0x07 /* Carrier 2 (nicam) frequency register (16-8]b */
1088 #define TDA9875_C2LSB 0x08 /* Carrier 2 (nicam) frequency register LSB */
1089 #define TDA9875_DCR 0x09 /* Demodulateur configuration regirter*/
1090 #define TDA9875_DEEM 0x0a /* FM de-emphasis regirter*/
1091 #define TDA9875_FMAT 0x0b /* FM Matrix regirter*/
1092
1093 /* values */
1094 #define TDA9875_MUTE_ON 0xff /* general mute */
1095 #define TDA9875_MUTE_OFF 0xcc /* general no mute */
1096
1097 static int tda9875_initialize(struct CHIPSTATE *chip)
1098 {
1099 chip_write(chip, TDA9875_CFG, 0xd0); /*reg de config 0 (reset)*/
1100 chip_write(chip, TDA9875_MSR, 0x03); /* Monitor 0b00000XXX*/
1101 chip_write(chip, TDA9875_C1MSB, 0x00); /*Car1(FM) MSB XMHz*/
1102 chip_write(chip, TDA9875_C1MIB, 0x00); /*Car1(FM) MIB XMHz*/
1103 chip_write(chip, TDA9875_C1LSB, 0x00); /*Car1(FM) LSB XMHz*/
1104 chip_write(chip, TDA9875_C2MSB, 0x00); /*Car2(NICAM) MSB XMHz*/
1105 chip_write(chip, TDA9875_C2MIB, 0x00); /*Car2(NICAM) MIB XMHz*/
1106 chip_write(chip, TDA9875_C2LSB, 0x00); /*Car2(NICAM) LSB XMHz*/
1107 chip_write(chip, TDA9875_DCR, 0x00); /*Demod config 0x00*/
1108 chip_write(chip, TDA9875_DEEM, 0x44); /*DE-Emph 0b0100 0100*/
1109 chip_write(chip, TDA9875_FMAT, 0x00); /*FM Matrix reg 0x00*/
1110 chip_write(chip, TDA9875_SC1, 0x00); /* SCART 1 (SC1)*/
1111 chip_write(chip, TDA9875_SC2, 0x01); /* SCART 2 (sc2)*/
1112
1113 chip_write(chip, TDA9875_CH1V, 0x10); /* Channel volume 1 mute*/
1114 chip_write(chip, TDA9875_CH2V, 0x10); /* Channel volume 2 mute */
1115 chip_write(chip, TDA9875_DACOS, 0x02); /* sig DAC i/o(in:nicam)*/
1116 chip_write(chip, TDA9875_ADCIS, 0x6f); /* sig ADC input(in:mono)*/
1117 chip_write(chip, TDA9875_LOSR, 0x00); /* line out (in:mono)*/
1118 chip_write(chip, TDA9875_AER, 0x00); /*06 Effect (AVL+PSEUDO) */
1119 chip_write(chip, TDA9875_MCS, 0x44); /* Main ch select (DAC) */
1120 chip_write(chip, TDA9875_MVL, 0x03); /* Vol Main left 10dB */
1121 chip_write(chip, TDA9875_MVR, 0x03); /* Vol Main right 10dB*/
1122 chip_write(chip, TDA9875_MBA, 0x00); /* Main Bass Main 0dB*/
1123 chip_write(chip, TDA9875_MTR, 0x00); /* Main Treble Main 0dB*/
1124 chip_write(chip, TDA9875_ACS, 0x44); /* Aux chan select (dac)*/
1125 chip_write(chip, TDA9875_AVL, 0x00); /* Vol Aux left 0dB*/
1126 chip_write(chip, TDA9875_AVR, 0x00); /* Vol Aux right 0dB*/
1127 chip_write(chip, TDA9875_ABA, 0x00); /* Aux Bass Main 0dB*/
1128 chip_write(chip, TDA9875_ATR, 0x00); /* Aux Aigus Main 0dB*/
1129
1130 chip_write(chip, TDA9875_MUT, 0xcc); /* General mute */
1131 return 0;
1132 }
1133
1134 static int tda9875_volume(int val) { return (unsigned char)(val / 602 - 84); }
1135 static int tda9875_bass(int val) { return (unsigned char)(max(-12, val / 2115 - 15)); }
1136 static int tda9875_treble(int val) { return (unsigned char)(val / 2622 - 12); }
1137
1138 /* ----------------------------------------------------------------------- */
1139
1140
1141 /* *********************** *
1142 * i2c interface functions *
1143 * *********************** */
1144
1145 static int tda9875_checkit(struct CHIPSTATE *chip)
1146 {
1147 struct v4l2_subdev *sd = &chip->sd;
1148 int dic, rev;
1149
1150 dic = chip_read2(chip, 254);
1151 rev = chip_read2(chip, 255);
1152
1153 if (dic == 0 || dic == 2) { /* tda9875 and tda9875A */
1154 v4l2_info(sd, "found tda9875%s rev. %d.\n",
1155 dic == 0 ? "" : "A", rev);
1156 return 1;
1157 }
1158 return 0;
1159 }
1160
1161 /* ---------------------------------------------------------------------- */
1162 /* audio chip descriptions - defines+functions for tea6420 */
1163
1164 #define TEA6300_VL 0x00 /* volume left */
1165 #define TEA6300_VR 0x01 /* volume right */
1166 #define TEA6300_BA 0x02 /* bass */
1167 #define TEA6300_TR 0x03 /* treble */
1168 #define TEA6300_FA 0x04 /* fader control */
1169 #define TEA6300_S 0x05 /* switch register */
1170 /* values for those registers: */
1171 #define TEA6300_S_SA 0x01 /* stereo A input */
1172 #define TEA6300_S_SB 0x02 /* stereo B */
1173 #define TEA6300_S_SC 0x04 /* stereo C */
1174 #define TEA6300_S_GMU 0x80 /* general mute */
1175
1176 #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1177 #define TEA6320_FFR 0x01 /* fader front right (0-5) */
1178 #define TEA6320_FFL 0x02 /* fader front left (0-5) */
1179 #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1180 #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1181 #define TEA6320_BA 0x05 /* bass (0-4) */
1182 #define TEA6320_TR 0x06 /* treble (0-4) */
1183 #define TEA6320_S 0x07 /* switch register */
1184 /* values for those registers: */
1185 #define TEA6320_S_SA 0x07 /* stereo A input */
1186 #define TEA6320_S_SB 0x06 /* stereo B */
1187 #define TEA6320_S_SC 0x05 /* stereo C */
1188 #define TEA6320_S_SD 0x04 /* stereo D */
1189 #define TEA6320_S_GMU 0x80 /* general mute */
1190
1191 #define TEA6420_S_SA 0x00 /* stereo A input */
1192 #define TEA6420_S_SB 0x01 /* stereo B */
1193 #define TEA6420_S_SC 0x02 /* stereo C */
1194 #define TEA6420_S_SD 0x03 /* stereo D */
1195 #define TEA6420_S_SE 0x04 /* stereo E */
1196 #define TEA6420_S_GMU 0x05 /* general mute */
1197
1198 static int tea6300_shift10(int val) { return val >> 10; }
1199 static int tea6300_shift12(int val) { return val >> 12; }
1200
1201 /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1202 /* 0x0c mirror those immediately higher) */
1203 static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1204 static int tea6320_shift11(int val) { return val >> 11; }
1205 static int tea6320_initialize(struct CHIPSTATE * chip)
1206 {
1207 chip_write(chip, TEA6320_FFR, 0x3f);
1208 chip_write(chip, TEA6320_FFL, 0x3f);
1209 chip_write(chip, TEA6320_FRR, 0x3f);
1210 chip_write(chip, TEA6320_FRL, 0x3f);
1211
1212 return 0;
1213 }
1214
1215
1216 /* ---------------------------------------------------------------------- */
1217 /* audio chip descriptions - defines+functions for tda8425 */
1218
1219 #define TDA8425_VL 0x00 /* volume left */
1220 #define TDA8425_VR 0x01 /* volume right */
1221 #define TDA8425_BA 0x02 /* bass */
1222 #define TDA8425_TR 0x03 /* treble */
1223 #define TDA8425_S1 0x08 /* switch functions */
1224 /* values for those registers: */
1225 #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1226 #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1227 #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1228 #define TDA8425_S1_MU 0x20 /* mute bit */
1229 #define TDA8425_S1_STEREO 0x18 /* stereo bits */
1230 #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1231 #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1232 #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1233 #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1234 #define TDA8425_S1_ML 0x06 /* language selector */
1235 #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1236 #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1237 #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1238 #define TDA8425_S1_IS 0x01 /* channel selector */
1239
1240
1241 static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1242 static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1243
1244 static int tda8425_initialize(struct CHIPSTATE *chip)
1245 {
1246 struct CHIPDESC *desc = chip->desc;
1247 struct i2c_client *c = v4l2_get_subdevdata(&chip->sd);
1248 int inputmap[4] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
1249 /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF};
1250
1251 if (c->adapter->id == I2C_HW_B_RIVA)
1252 memcpy(desc->inputmap, inputmap, sizeof(inputmap));
1253 return 0;
1254 }
1255
1256 static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1257 {
1258 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1259
1260 if (mode & V4L2_TUNER_MODE_LANG1) {
1261 s1 |= TDA8425_S1_ML_SOUND_A;
1262 s1 |= TDA8425_S1_STEREO_PSEUDO;
1263
1264 } else if (mode & V4L2_TUNER_MODE_LANG2) {
1265 s1 |= TDA8425_S1_ML_SOUND_B;
1266 s1 |= TDA8425_S1_STEREO_PSEUDO;
1267
1268 } else {
1269 s1 |= TDA8425_S1_ML_STEREO;
1270
1271 if (mode & V4L2_TUNER_MODE_MONO)
1272 s1 |= TDA8425_S1_STEREO_MONO;
1273 if (mode & V4L2_TUNER_MODE_STEREO)
1274 s1 |= TDA8425_S1_STEREO_SPATIAL;
1275 }
1276 chip_write(chip,TDA8425_S1,s1);
1277 }
1278
1279
1280 /* ---------------------------------------------------------------------- */
1281 /* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1282
1283 /* the registers of 16C54, I2C sub address. */
1284 #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1285 #define PIC16C54_REG_MISC 0x02
1286
1287 /* bit definition of the RESET register, I2C data. */
1288 #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
1289 /* code of remote controller */
1290 #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1291 #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1292 #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1293 #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1294 #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1295 #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1296 #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1297
1298 /* ---------------------------------------------------------------------- */
1299 /* audio chip descriptions - defines+functions for TA8874Z */
1300
1301 /* write 1st byte */
1302 #define TA8874Z_LED_STE 0x80
1303 #define TA8874Z_LED_BIL 0x40
1304 #define TA8874Z_LED_EXT 0x20
1305 #define TA8874Z_MONO_SET 0x10
1306 #define TA8874Z_MUTE 0x08
1307 #define TA8874Z_F_MONO 0x04
1308 #define TA8874Z_MODE_SUB 0x02
1309 #define TA8874Z_MODE_MAIN 0x01
1310
1311 /* write 2nd byte */
1312 /*#define TA8874Z_TI 0x80 */ /* test mode */
1313 #define TA8874Z_SEPARATION 0x3f
1314 #define TA8874Z_SEPARATION_DEFAULT 0x10
1315
1316 /* read */
1317 #define TA8874Z_B1 0x80
1318 #define TA8874Z_B0 0x40
1319 #define TA8874Z_CHAG_FLAG 0x20
1320
1321 /*
1322 * B1 B0
1323 * mono L H
1324 * stereo L L
1325 * BIL H L
1326 */
1327 static int ta8874z_getmode(struct CHIPSTATE *chip)
1328 {
1329 int val, mode;
1330
1331 val = chip_read(chip);
1332 mode = V4L2_TUNER_MODE_MONO;
1333 if (val & TA8874Z_B1){
1334 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1335 }else if (!(val & TA8874Z_B0)){
1336 mode |= V4L2_TUNER_MODE_STEREO;
1337 }
1338 /* v4l_dbg(1, debug, chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1339 return mode;
1340 }
1341
1342 static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1343 static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1344 static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1345 static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1346
1347 static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1348 {
1349 struct v4l2_subdev *sd = &chip->sd;
1350 int update = 1;
1351 audiocmd *t = NULL;
1352
1353 v4l2_dbg(1, debug, sd, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1354
1355 switch(mode){
1356 case V4L2_TUNER_MODE_MONO:
1357 t = &ta8874z_mono;
1358 break;
1359 case V4L2_TUNER_MODE_STEREO:
1360 t = &ta8874z_stereo;
1361 break;
1362 case V4L2_TUNER_MODE_LANG1:
1363 t = &ta8874z_main;
1364 break;
1365 case V4L2_TUNER_MODE_LANG2:
1366 t = &ta8874z_sub;
1367 break;
1368 default:
1369 update = 0;
1370 }
1371
1372 if(update)
1373 chip_cmd(chip, "TA8874Z", t);
1374 }
1375
1376 static int ta8874z_checkit(struct CHIPSTATE *chip)
1377 {
1378 int rc;
1379 rc = chip_read(chip);
1380 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1381 }
1382
1383 /* ---------------------------------------------------------------------- */
1384 /* audio chip descriptions - struct CHIPDESC */
1385
1386 /* insmod options to enable/disable individual audio chips */
1387 static int tda8425 = 1;
1388 static int tda9840 = 1;
1389 static int tda9850 = 1;
1390 static int tda9855 = 1;
1391 static int tda9873 = 1;
1392 static int tda9874a = 1;
1393 static int tda9875 = 1;
1394 static int tea6300; /* default 0 - address clash with msp34xx */
1395 static int tea6320; /* default 0 - address clash with msp34xx */
1396 static int tea6420 = 1;
1397 static int pic16c54 = 1;
1398 static int ta8874z; /* default 0 - address clash with tda9840 */
1399
1400 module_param(tda8425, int, 0444);
1401 module_param(tda9840, int, 0444);
1402 module_param(tda9850, int, 0444);
1403 module_param(tda9855, int, 0444);
1404 module_param(tda9873, int, 0444);
1405 module_param(tda9874a, int, 0444);
1406 module_param(tda9875, int, 0444);
1407 module_param(tea6300, int, 0444);
1408 module_param(tea6320, int, 0444);
1409 module_param(tea6420, int, 0444);
1410 module_param(pic16c54, int, 0444);
1411 module_param(ta8874z, int, 0444);
1412
1413 static struct CHIPDESC chiplist[] = {
1414 {
1415 .name = "tda9840",
1416 .insmodopt = &tda9840,
1417 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1418 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1419 .registers = 5,
1420 .flags = CHIP_NEED_CHECKMODE,
1421
1422 /* callbacks */
1423 .checkit = tda9840_checkit,
1424 .getmode = tda9840_getmode,
1425 .setmode = tda9840_setmode,
1426
1427 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1428 /* ,TDA9840_SW, TDA9840_MONO */} }
1429 },
1430 {
1431 .name = "tda9873h",
1432 .insmodopt = &tda9873,
1433 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1434 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1435 .registers = 3,
1436 .flags = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE,
1437
1438 /* callbacks */
1439 .checkit = tda9873_checkit,
1440 .getmode = tda9873_getmode,
1441 .setmode = tda9873_setmode,
1442
1443 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1444 .inputreg = TDA9873_SW,
1445 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1446 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1447 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1448
1449 },
1450 {
1451 .name = "tda9874h/a",
1452 .insmodopt = &tda9874a,
1453 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1454 .addr_hi = I2C_ADDR_TDA9874 >> 1,
1455 .flags = CHIP_NEED_CHECKMODE,
1456
1457 /* callbacks */
1458 .initialize = tda9874a_initialize,
1459 .checkit = tda9874a_checkit,
1460 .getmode = tda9874a_getmode,
1461 .setmode = tda9874a_setmode,
1462 },
1463 {
1464 .name = "tda9875",
1465 .insmodopt = &tda9875,
1466 .addr_lo = I2C_ADDR_TDA9875 >> 1,
1467 .addr_hi = I2C_ADDR_TDA9875 >> 1,
1468 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1469
1470 /* callbacks */
1471 .initialize = tda9875_initialize,
1472 .checkit = tda9875_checkit,
1473 .volfunc = tda9875_volume,
1474 .bassfunc = tda9875_bass,
1475 .treblefunc = tda9875_treble,
1476 .leftreg = TDA9875_MVL,
1477 .rightreg = TDA9875_MVR,
1478 .bassreg = TDA9875_MBA,
1479 .treblereg = TDA9875_MTR,
1480 .leftinit = 58880,
1481 .rightinit = 58880,
1482 },
1483 {
1484 .name = "tda9850",
1485 .insmodopt = &tda9850,
1486 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1487 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1488 .registers = 11,
1489
1490 .getmode = tda985x_getmode,
1491 .setmode = tda985x_setmode,
1492
1493 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1494 },
1495 {
1496 .name = "tda9855",
1497 .insmodopt = &tda9855,
1498 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1499 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1500 .registers = 11,
1501 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1502
1503 .leftreg = TDA9855_VL,
1504 .rightreg = TDA9855_VR,
1505 .bassreg = TDA9855_BA,
1506 .treblereg = TDA9855_TR,
1507
1508 /* callbacks */
1509 .volfunc = tda9855_volume,
1510 .bassfunc = tda9855_bass,
1511 .treblefunc = tda9855_treble,
1512 .getmode = tda985x_getmode,
1513 .setmode = tda985x_setmode,
1514
1515 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1516 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1517 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1518 0x07, 0x10, 0x10, 0x03 }}
1519 },
1520 {
1521 .name = "tea6300",
1522 .insmodopt = &tea6300,
1523 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1524 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1525 .registers = 6,
1526 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1527
1528 .leftreg = TEA6300_VR,
1529 .rightreg = TEA6300_VL,
1530 .bassreg = TEA6300_BA,
1531 .treblereg = TEA6300_TR,
1532
1533 /* callbacks */
1534 .volfunc = tea6300_shift10,
1535 .bassfunc = tea6300_shift12,
1536 .treblefunc = tea6300_shift12,
1537
1538 .inputreg = TEA6300_S,
1539 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1540 .inputmute = TEA6300_S_GMU,
1541 },
1542 {
1543 .name = "tea6320",
1544 .insmodopt = &tea6320,
1545 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1546 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1547 .registers = 8,
1548 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1549
1550 .leftreg = TEA6320_V,
1551 .rightreg = TEA6320_V,
1552 .bassreg = TEA6320_BA,
1553 .treblereg = TEA6320_TR,
1554
1555 /* callbacks */
1556 .initialize = tea6320_initialize,
1557 .volfunc = tea6320_volume,
1558 .bassfunc = tea6320_shift11,
1559 .treblefunc = tea6320_shift11,
1560
1561 .inputreg = TEA6320_S,
1562 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1563 .inputmute = TEA6300_S_GMU,
1564 },
1565 {
1566 .name = "tea6420",
1567 .insmodopt = &tea6420,
1568 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1569 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1570 .registers = 1,
1571 .flags = CHIP_HAS_INPUTSEL,
1572
1573 .inputreg = -1,
1574 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1575 .inputmute = TEA6300_S_GMU,
1576 },
1577 {
1578 .name = "tda8425",
1579 .insmodopt = &tda8425,
1580 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1581 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1582 .registers = 9,
1583 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1584
1585 .leftreg = TDA8425_VL,
1586 .rightreg = TDA8425_VR,
1587 .bassreg = TDA8425_BA,
1588 .treblereg = TDA8425_TR,
1589
1590 /* callbacks */
1591 .initialize = tda8425_initialize,
1592 .volfunc = tda8425_shift10,
1593 .bassfunc = tda8425_shift12,
1594 .treblefunc = tda8425_shift12,
1595 .setmode = tda8425_setmode,
1596
1597 .inputreg = TDA8425_S1,
1598 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1599 .inputmute = TDA8425_S1_OFF,
1600
1601 },
1602 {
1603 .name = "pic16c54 (PV951)",
1604 .insmodopt = &pic16c54,
1605 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1606 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1607 .registers = 2,
1608 .flags = CHIP_HAS_INPUTSEL,
1609
1610 .inputreg = PIC16C54_REG_MISC,
1611 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1612 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1613 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1614 PIC16C54_MISC_SND_MUTE},
1615 .inputmute = PIC16C54_MISC_SND_MUTE,
1616 },
1617 {
1618 .name = "ta8874z",
1619 .checkit = ta8874z_checkit,
1620 .insmodopt = &ta8874z,
1621 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1622 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1623 .registers = 2,
1624 .flags = CHIP_NEED_CHECKMODE,
1625
1626 /* callbacks */
1627 .getmode = ta8874z_getmode,
1628 .setmode = ta8874z_setmode,
1629
1630 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1631 },
1632 { .name = NULL } /* EOF */
1633 };
1634
1635
1636 /* ---------------------------------------------------------------------- */
1637
1638 static int tvaudio_g_ctrl(struct v4l2_subdev *sd,
1639 struct v4l2_control *ctrl)
1640 {
1641 struct CHIPSTATE *chip = to_state(sd);
1642 struct CHIPDESC *desc = chip->desc;
1643
1644 switch (ctrl->id) {
1645 case V4L2_CID_AUDIO_MUTE:
1646 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1647 break;
1648 ctrl->value=chip->muted;
1649 return 0;
1650 case V4L2_CID_AUDIO_VOLUME:
1651 if (!(desc->flags & CHIP_HAS_VOLUME))
1652 break;
1653 ctrl->value = max(chip->left,chip->right);
1654 return 0;
1655 case V4L2_CID_AUDIO_BALANCE:
1656 {
1657 int volume;
1658 if (!(desc->flags & CHIP_HAS_VOLUME))
1659 break;
1660 volume = max(chip->left,chip->right);
1661 if (volume)
1662 ctrl->value=(32768*min(chip->left,chip->right))/volume;
1663 else
1664 ctrl->value=32768;
1665 return 0;
1666 }
1667 case V4L2_CID_AUDIO_BASS:
1668 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1669 break;
1670 ctrl->value = chip->bass;
1671 return 0;
1672 case V4L2_CID_AUDIO_TREBLE:
1673 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1674 break;
1675 ctrl->value = chip->treble;
1676 return 0;
1677 }
1678 return -EINVAL;
1679 }
1680
1681 static int tvaudio_s_ctrl(struct v4l2_subdev *sd,
1682 struct v4l2_control *ctrl)
1683 {
1684 struct CHIPSTATE *chip = to_state(sd);
1685 struct CHIPDESC *desc = chip->desc;
1686
1687 switch (ctrl->id) {
1688 case V4L2_CID_AUDIO_MUTE:
1689 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1690 break;
1691
1692 if (ctrl->value < 0 || ctrl->value >= 2)
1693 return -ERANGE;
1694 chip->muted = ctrl->value;
1695 if (chip->muted)
1696 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1697 else
1698 chip_write_masked(chip,desc->inputreg,
1699 desc->inputmap[chip->input],desc->inputmask);
1700 return 0;
1701 case V4L2_CID_AUDIO_VOLUME:
1702 {
1703 int volume,balance;
1704
1705 if (!(desc->flags & CHIP_HAS_VOLUME))
1706 break;
1707
1708 volume = max(chip->left,chip->right);
1709 if (volume)
1710 balance=(32768*min(chip->left,chip->right))/volume;
1711 else
1712 balance=32768;
1713
1714 volume=ctrl->value;
1715 chip->left = (min(65536 - balance,32768) * volume) / 32768;
1716 chip->right = (min(balance,volume *(__u16)32768)) / 32768;
1717
1718 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1719 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1720
1721 return 0;
1722 }
1723 case V4L2_CID_AUDIO_BALANCE:
1724 {
1725 int volume, balance;
1726 if (!(desc->flags & CHIP_HAS_VOLUME))
1727 break;
1728
1729 volume = max(chip->left,chip->right);
1730 balance = ctrl->value;
1731
1732 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1733 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1734
1735 return 0;
1736 }
1737 case V4L2_CID_AUDIO_BASS:
1738 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1739 break;
1740 chip->bass = ctrl->value;
1741 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1742
1743 return 0;
1744 case V4L2_CID_AUDIO_TREBLE:
1745 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1746 break;
1747 chip->treble = ctrl->value;
1748 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1749
1750 return 0;
1751 }
1752 return -EINVAL;
1753 }
1754
1755
1756 /* ---------------------------------------------------------------------- */
1757 /* video4linux interface */
1758
1759 static int tvaudio_s_radio(struct v4l2_subdev *sd)
1760 {
1761 struct CHIPSTATE *chip = to_state(sd);
1762
1763 chip->radio = 1;
1764 chip->watch_stereo = 0;
1765 /* del_timer(&chip->wt); */
1766 return 0;
1767 }
1768
1769 static int tvaudio_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
1770 {
1771 struct CHIPSTATE *chip = to_state(sd);
1772 struct CHIPDESC *desc = chip->desc;
1773
1774 switch (qc->id) {
1775 case V4L2_CID_AUDIO_MUTE:
1776 if (desc->flags & CHIP_HAS_INPUTSEL)
1777 return v4l2_ctrl_query_fill(qc, 0, 1, 1, 0);
1778 break;
1779 case V4L2_CID_AUDIO_VOLUME:
1780 if (desc->flags & CHIP_HAS_VOLUME)
1781 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 58880);
1782 break;
1783 case V4L2_CID_AUDIO_BALANCE:
1784 if (desc->flags & CHIP_HAS_VOLUME)
1785 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1786 break;
1787 case V4L2_CID_AUDIO_BASS:
1788 case V4L2_CID_AUDIO_TREBLE:
1789 if (desc->flags & CHIP_HAS_BASSTREBLE)
1790 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1791 break;
1792 default:
1793 break;
1794 }
1795 return -EINVAL;
1796 }
1797
1798 static int tvaudio_s_routing(struct v4l2_subdev *sd, const struct v4l2_routing *rt)
1799 {
1800 struct CHIPSTATE *chip = to_state(sd);
1801 struct CHIPDESC *desc = chip->desc;
1802
1803 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1804 return 0;
1805 if (rt->input >= 4)
1806 return -EINVAL;
1807 /* There are four inputs: tuner, radio, extern and intern. */
1808 chip->input = rt->input;
1809 if (chip->muted)
1810 return 0;
1811 chip_write_masked(chip, desc->inputreg,
1812 desc->inputmap[chip->input], desc->inputmask);
1813 return 0;
1814 }
1815
1816 static int tvaudio_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1817 {
1818 struct CHIPSTATE *chip = to_state(sd);
1819 struct CHIPDESC *desc = chip->desc;
1820 int mode = 0;
1821
1822 if (!desc->setmode)
1823 return 0;
1824 if (chip->radio)
1825 return 0;
1826
1827 switch (vt->audmode) {
1828 case V4L2_TUNER_MODE_MONO:
1829 case V4L2_TUNER_MODE_STEREO:
1830 case V4L2_TUNER_MODE_LANG1:
1831 case V4L2_TUNER_MODE_LANG2:
1832 mode = vt->audmode;
1833 break;
1834 case V4L2_TUNER_MODE_LANG1_LANG2:
1835 mode = V4L2_TUNER_MODE_STEREO;
1836 break;
1837 default:
1838 return -EINVAL;
1839 }
1840 chip->audmode = vt->audmode;
1841
1842 if (mode) {
1843 chip->watch_stereo = 0;
1844 /* del_timer(&chip->wt); */
1845 chip->mode = mode;
1846 desc->setmode(chip, mode);
1847 }
1848 return 0;
1849 }
1850
1851 static int tvaudio_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1852 {
1853 struct CHIPSTATE *chip = to_state(sd);
1854 struct CHIPDESC *desc = chip->desc;
1855 int mode = V4L2_TUNER_MODE_MONO;
1856
1857 if (!desc->getmode)
1858 return 0;
1859 if (chip->radio)
1860 return 0;
1861
1862 vt->audmode = chip->audmode;
1863 vt->rxsubchans = 0;
1864 vt->capability = V4L2_TUNER_CAP_STEREO |
1865 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1866
1867 mode = desc->getmode(chip);
1868
1869 if (mode & V4L2_TUNER_MODE_MONO)
1870 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1871 if (mode & V4L2_TUNER_MODE_STEREO)
1872 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
1873 /* Note: for SAP it should be mono/lang2 or stereo/lang2.
1874 When this module is converted fully to v4l2, then this
1875 should change for those chips that can detect SAP. */
1876 if (mode & V4L2_TUNER_MODE_LANG1)
1877 vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
1878 V4L2_TUNER_SUB_LANG2;
1879 return 0;
1880 }
1881
1882 static int tvaudio_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1883 {
1884 struct CHIPSTATE *chip = to_state(sd);
1885
1886 chip->radio = 0;
1887 return 0;
1888 }
1889
1890 static int tvaudio_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *freq)
1891 {
1892 struct CHIPSTATE *chip = to_state(sd);
1893 struct CHIPDESC *desc = chip->desc;
1894
1895 chip->mode = 0; /* automatic */
1896
1897 /* For chips that provide getmode and setmode, and doesn't
1898 automatically follows the stereo carrier, a kthread is
1899 created to set the audio standard. In this case, when then
1900 the video channel is changed, tvaudio starts on MONO mode.
1901 After waiting for 2 seconds, the kernel thread is called,
1902 to follow whatever audio standard is pointed by the
1903 audio carrier.
1904 */
1905 if (chip->thread) {
1906 desc->setmode(chip, V4L2_TUNER_MODE_MONO);
1907 if (chip->prevmode != V4L2_TUNER_MODE_MONO)
1908 chip->prevmode = -1; /* reset previous mode */
1909 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1910 }
1911 return 0;
1912 }
1913
1914 static int tvaudio_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
1915 {
1916 struct i2c_client *client = v4l2_get_subdevdata(sd);
1917
1918 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVAUDIO, 0);
1919 }
1920
1921 static int tvaudio_command(struct i2c_client *client, unsigned cmd, void *arg)
1922 {
1923 return v4l2_subdev_command(i2c_get_clientdata(client), cmd, arg);
1924 }
1925
1926 /* ----------------------------------------------------------------------- */
1927
1928 static const struct v4l2_subdev_core_ops tvaudio_core_ops = {
1929 .g_chip_ident = tvaudio_g_chip_ident,
1930 .queryctrl = tvaudio_queryctrl,
1931 .g_ctrl = tvaudio_g_ctrl,
1932 .s_ctrl = tvaudio_s_ctrl,
1933 };
1934
1935 static const struct v4l2_subdev_tuner_ops tvaudio_tuner_ops = {
1936 .s_radio = tvaudio_s_radio,
1937 .s_frequency = tvaudio_s_frequency,
1938 .s_std = tvaudio_s_std,
1939 .s_tuner = tvaudio_s_tuner,
1940 .s_tuner = tvaudio_g_tuner,
1941 };
1942
1943 static const struct v4l2_subdev_audio_ops tvaudio_audio_ops = {
1944 .s_routing = tvaudio_s_routing,
1945 };
1946
1947 static const struct v4l2_subdev_ops tvaudio_ops = {
1948 .core = &tvaudio_core_ops,
1949 .tuner = &tvaudio_tuner_ops,
1950 .audio = &tvaudio_audio_ops,
1951 };
1952
1953 /* ----------------------------------------------------------------------- */
1954
1955
1956 /* i2c registration */
1957
1958 static int tvaudio_probe(struct i2c_client *client, const struct i2c_device_id *id)
1959 {
1960 struct CHIPSTATE *chip;
1961 struct CHIPDESC *desc;
1962 struct v4l2_subdev *sd;
1963
1964 if (debug) {
1965 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1966 printk(KERN_INFO "tvaudio: known chips: ");
1967 for (desc = chiplist; desc->name != NULL; desc++)
1968 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1969 printk("\n");
1970 }
1971
1972 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1973 if (!chip)
1974 return -ENOMEM;
1975 sd = &chip->sd;
1976 v4l2_i2c_subdev_init(sd, client, &tvaudio_ops);
1977
1978 /* find description for the chip */
1979 v4l2_dbg(1, debug, sd, "chip found @ 0x%x\n", client->addr<<1);
1980 for (desc = chiplist; desc->name != NULL; desc++) {
1981 if (0 == *(desc->insmodopt))
1982 continue;
1983 if (client->addr < desc->addr_lo ||
1984 client->addr > desc->addr_hi)
1985 continue;
1986 if (desc->checkit && !desc->checkit(chip))
1987 continue;
1988 break;
1989 }
1990 if (desc->name == NULL) {
1991 v4l2_dbg(1, debug, sd, "no matching chip description found\n");
1992 kfree(chip);
1993 return -EIO;
1994 }
1995 v4l2_info(sd, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
1996 if (desc->flags) {
1997 v4l2_dbg(1, debug, sd, "matches:%s%s%s.\n",
1998 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1999 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
2000 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
2001 }
2002
2003 /* fill required data structures */
2004 if (!id)
2005 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
2006 chip->desc = desc;
2007 chip->shadow.count = desc->registers+1;
2008 chip->prevmode = -1;
2009 chip->audmode = V4L2_TUNER_MODE_LANG1;
2010
2011 /* initialization */
2012 if (desc->initialize != NULL)
2013 desc->initialize(chip);
2014 else
2015 chip_cmd(chip, "init", &desc->init);
2016
2017 if (desc->flags & CHIP_HAS_VOLUME) {
2018 if (!desc->volfunc) {
2019 /* This shouldn't be happen. Warn user, but keep working
2020 without volume controls
2021 */
2022 v4l2_info(sd, "volume callback undefined!\n");
2023 desc->flags &= ~CHIP_HAS_VOLUME;
2024 } else {
2025 chip->left = desc->leftinit ? desc->leftinit : 65535;
2026 chip->right = desc->rightinit ? desc->rightinit : 65535;
2027 chip_write(chip, desc->leftreg,
2028 desc->volfunc(chip->left));
2029 chip_write(chip, desc->rightreg,
2030 desc->volfunc(chip->right));
2031 }
2032 }
2033 if (desc->flags & CHIP_HAS_BASSTREBLE) {
2034 if (!desc->bassfunc || !desc->treblefunc) {
2035 /* This shouldn't be happen. Warn user, but keep working
2036 without bass/treble controls
2037 */
2038 v4l2_info(sd, "bass/treble callbacks undefined!\n");
2039 desc->flags &= ~CHIP_HAS_BASSTREBLE;
2040 } else {
2041 chip->treble = desc->trebleinit ?
2042 desc->trebleinit : 32768;
2043 chip->bass = desc->bassinit ?
2044 desc->bassinit : 32768;
2045 chip_write(chip, desc->bassreg,
2046 desc->bassfunc(chip->bass));
2047 chip_write(chip, desc->treblereg,
2048 desc->treblefunc(chip->treble));
2049 }
2050 }
2051
2052 chip->thread = NULL;
2053 if (desc->flags & CHIP_NEED_CHECKMODE) {
2054 if (!desc->getmode || !desc->setmode) {
2055 /* This shouldn't be happen. Warn user, but keep working
2056 without kthread
2057 */
2058 v4l2_info(sd, "set/get mode callbacks undefined!\n");
2059 return 0;
2060 }
2061 /* start async thread */
2062 init_timer(&chip->wt);
2063 chip->wt.function = chip_thread_wake;
2064 chip->wt.data = (unsigned long)chip;
2065 chip->thread = kthread_run(chip_thread, chip, client->name);
2066 if (IS_ERR(chip->thread)) {
2067 v4l2_warn(sd, "failed to create kthread\n");
2068 chip->thread = NULL;
2069 }
2070 }
2071 return 0;
2072 }
2073
2074 static int tvaudio_remove(struct i2c_client *client)
2075 {
2076 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2077 struct CHIPSTATE *chip = to_state(sd);
2078
2079 del_timer_sync(&chip->wt);
2080 if (chip->thread) {
2081 /* shutdown async thread */
2082 kthread_stop(chip->thread);
2083 chip->thread = NULL;
2084 }
2085
2086 v4l2_device_unregister_subdev(sd);
2087 kfree(chip);
2088 return 0;
2089 }
2090
2091 static int tvaudio_legacy_probe(struct i2c_adapter *adap)
2092 {
2093 /* don't attach on saa7146 based cards,
2094 because dedicated drivers are used */
2095 if ((adap->id == I2C_HW_SAA7146))
2096 return 0;
2097 if (adap->class & I2C_CLASS_TV_ANALOG)
2098 return 1;
2099 return 0;
2100 }
2101
2102 /* This driver supports many devices and the idea is to let the driver
2103 detect which device is present. So rather than listing all supported
2104 devices here, we pretend to support a single, fake device type. */
2105 static const struct i2c_device_id tvaudio_id[] = {
2106 { "tvaudio", 0 },
2107 { }
2108 };
2109 MODULE_DEVICE_TABLE(i2c, tvaudio_id);
2110
2111 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
2112 .name = "tvaudio",
2113 .driverid = I2C_DRIVERID_TVAUDIO,
2114 .command = tvaudio_command,
2115 .probe = tvaudio_probe,
2116 .remove = tvaudio_remove,
2117 .legacy_probe = tvaudio_legacy_probe,
2118 .id_table = tvaudio_id,
2119 };
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