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1 #
2 # Memory devices
3 #
4
5 menuconfig MEMORY
6 bool "Memory Controller drivers"
7
8 if MEMORY
9
10 config ARM_PL172_MPMC
11 tristate "ARM PL172 MPMC driver"
12 depends on ARM_AMBA && OF
13 help
14 This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
15 If you have an embedded system with an AMBA bus and a PL172
16 controller, say Y or M here.
17
18 config ATMEL_SDRAMC
19 bool "Atmel (Multi-port DDR-)SDRAM Controller"
20 default y
21 depends on ARCH_AT91 && OF
22 help
23 This driver is for Atmel SDRAM Controller or Atmel Multi-port
24 DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
25 Starting with the at91sam9g45, this controller supports SDR, DDR and
26 LP-DDR memories.
27
28 config ATMEL_EBI
29 bool "Atmel EBI driver"
30 default y
31 depends on ARCH_AT91 && OF
32 select MFD_SYSCON
33 help
34 Driver for Atmel EBI controller.
35 Used to configure the EBI (external bus interface) when the device-
36 tree is used. This bus supports NANDs, external ethernet controller,
37 SRAMs, ATA devices, etc.
38
39 config TI_AEMIF
40 tristate "Texas Instruments AEMIF driver"
41 depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
42 help
43 This driver is for the AEMIF module available in Texas Instruments
44 SoCs. AEMIF stands for Asynchronous External Memory Interface and
45 is intended to provide a glue-less interface to a variety of
46 asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
47 of 256M bytes of any of these memories can be accessed at a given
48 time via four chip selects with 64M byte access per chip select.
49
50 config TI_EMIF
51 tristate "Texas Instruments EMIF driver"
52 depends on ARCH_OMAP2PLUS
53 select DDR
54 help
55 This driver is for the EMIF module available in Texas Instruments
56 SoCs. EMIF is an SDRAM controller that, based on its revision,
57 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
58 This driver takes care of only LPDDR2 memories presently. The
59 functions of the driver includes re-configuring AC timing
60 parameters and other settings during frequency, voltage and
61 temperature changes
62
63 config OMAP_GPMC
64 bool
65 select GPIOLIB
66 help
67 This driver is for the General Purpose Memory Controller (GPMC)
68 present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
69 interfacing to a variety of asynchronous as well as synchronous
70 memory drives like NOR, NAND, OneNAND, SRAM.
71
72 config OMAP_GPMC_DEBUG
73 bool "Enable GPMC debug output and skip reset of GPMC during init"
74 depends on OMAP_GPMC
75 help
76 Enables verbose debugging mostly to decode the bootloader provided
77 timings. To preserve the bootloader provided timings, the reset
78 of GPMC is skipped during init. Enable this during development to
79 configure devices connected to the GPMC bus.
80
81 NOTE: In addition to matching the register setup with the bootloader
82 you also need to match the GPMC FCLK frequency used by the
83 bootloader or else the GPMC timings won't be identical with the
84 bootloader timings.
85
86 config MVEBU_DEVBUS
87 bool "Marvell EBU Device Bus Controller"
88 default y
89 depends on PLAT_ORION && OF
90 help
91 This driver is for the Device Bus controller available in some
92 Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
93 Armada 370 and Armada XP. This controller allows to handle flash
94 devices such as NOR, NAND, SRAM, and FPGA.
95
96 config TEGRA20_MC
97 bool "Tegra20 Memory Controller(MC) driver"
98 default y
99 depends on ARCH_TEGRA_2x_SOC
100 help
101 This driver is for the Memory Controller(MC) module available
102 in Tegra20 SoCs, mainly for a address translation fault
103 analysis, especially for IOMMU/GART(Graphics Address
104 Relocation Table) module.
105
106 config FSL_CORENET_CF
107 tristate "Freescale CoreNet Error Reporting"
108 depends on FSL_SOC_BOOKE
109 help
110 Say Y for reporting of errors from the Freescale CoreNet
111 Coherency Fabric. Errors reported include accesses to
112 physical addresses that mapped by no local access window
113 (LAW) or an invalid LAW, as well as bad cache state that
114 represents a coherency violation.
115
116 config FSL_IFC
117 bool
118 depends on FSL_SOC || ARCH_LAYERSCAPE
119
120 config JZ4780_NEMC
121 bool "Ingenic JZ4780 SoC NEMC driver"
122 default y
123 depends on MACH_JZ4780
124 help
125 This driver is for the NAND/External Memory Controller (NEMC) in
126 the Ingenic JZ4780. This controller is used to handle external
127 memory devices such as NAND and SRAM.
128
129 config MTK_SMI
130 bool
131 depends on ARCH_MEDIATEK || COMPILE_TEST
132 help
133 This driver is for the Memory Controller module in MediaTek SoCs,
134 mainly help enable/disable iommu and control the power domain and
135 clocks for each local arbiter.
136
137 source "drivers/memory/samsung/Kconfig"
138 source "drivers/memory/tegra/Kconfig"
139
140 endif