drivers/message/fusion/lsi/mpi_targ.h

   1 /*
   2  *  Copyright (c) 2000-2003 LSI Logic Corporation.
   3  *
   4  *
   5  *           Name:  mpi_targ.h
   6  *          Title:  MPI Target mode messages and structures
   7  *  Creation Date:  June 22, 2000
   8  *
   9  *    mpi_targ.h Version:  01.05.xx
  10  *
  11  *  Version History
  12  *  ---------------
  13  *
  14  *  Date      Version   Description
  15  *  --------  --------  ------------------------------------------------------
  16  *  05-08-00  00.10.01  Original release for 0.10 spec dated 4/26/2000.
  17  *  06-06-00  01.00.01  Update version number for 1.0 release.
  18  *  06-22-00  01.00.02  Added _MSG_TARGET_CMD_BUFFER_POST_REPLY structure.
  19  *                      Corrected DECSRIPTOR typo to DESCRIPTOR.
  20  *  11-02-00  01.01.01  Original release for post 1.0 work
  21  *                      Modified target mode to use IoIndex instead of
  22  *                      HostIndex and IocIndex. Added Alias.
  23  *  01-09-01  01.01.02  Added defines for TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER
  24  *                      and TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER.
  25  *  02-20-01  01.01.03  Started using MPI_POINTER.
  26  *                      Added structures for MPI_TARGET_SCSI_SPI_CMD_BUFFER and
  27  *                      MPI_TARGET_FCP_CMD_BUFFER.
  28  *  03-27-01  01.01.04  Added structure offset comments.
  29  *  08-08-01  01.02.01  Original release for v1.2 work.
  30  *  09-28-01  01.02.02  Added structure for MPI_TARGET_SCSI_SPI_STATUS_IU.
  31  *                      Added PriorityReason field to some replies and
  32  *                      defined more PriorityReason codes.
  33  *                      Added some defines for to support previous version
  34  *                      of MPI.
  35  *  10-04-01  01.02.03  Added PriorityReason to MSG_TARGET_ERROR_REPLY.
  36  *  11-01-01  01.02.04  Added define for TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY.
  37  *  03-14-02  01.02.05  Modified MPI_TARGET_FCP_RSP_BUFFER to get the proper
  38  *                      byte ordering.
  39  *  05-31-02  01.02.06  Modified TARGET_MODE_REPLY_ALIAS_MASK to only include
  40  *                      one bit.
  41  *                      Added AliasIndex field to MPI_TARGET_FCP_CMD_BUFFER.
  42  *  09-16-02  01.02.07  Added flags for confirmed completion.
  43  *                      Added PRIORITY_REASON_TARGET_BUSY.
  44  *  11-15-02  01.02.08  Added AliasID field to MPI_TARGET_SCSI_SPI_CMD_BUFFER.
  45  *  04-01-03  01.02.09  Added OptionalOxid field to MPI_TARGET_FCP_CMD_BUFFER.
  46  *  --------------------------------------------------------------------------
  47  */
  48
  49 #ifndef MPI_TARG_H
  50 #define MPI_TARG_H
  51
  52
  53 /******************************************************************************
  54 *
  55 *        S C S I    T a r g e t    M e s s a g e s
  56 *
  57 *******************************************************************************/
  58
  59 typedef struct _CMD_BUFFER_DESCRIPTOR
  60 {
  61     U16                     IoIndex;                    /* 00h */
  62     U16                     Reserved;                   /* 02h */
  63     union                                               /* 04h */
  64     {
  65         U32                 PhysicalAddress32;
  66         U64                 PhysicalAddress64;
  67     } u;
  68 } CMD_BUFFER_DESCRIPTOR, MPI_POINTER PTR_CMD_BUFFER_DESCRIPTOR,
  69   CmdBufferDescriptor_t, MPI_POINTER pCmdBufferDescriptor_t;
  70
  71
  72 /****************************************************************************/
  73 /* Target Command Buffer Post Request                                       */
  74 /****************************************************************************/
  75
  76 typedef struct _MSG_TARGET_CMD_BUFFER_POST_REQUEST
  77 {
  78     U8                      BufferPostFlags;            /* 00h */
  79     U8                      BufferCount;                /* 01h */
  80     U8                      ChainOffset;                /* 02h */
  81     U8                      Function;                   /* 03h */
  82     U8                      BufferLength;               /* 04h */
  83     U8                      Reserved;                   /* 05h */
  84     U8                      Reserved1;                  /* 06h */
  85     U8                      MsgFlags;                   /* 07h */
  86     U32                     MsgContext;                 /* 08h */
  87     CMD_BUFFER_DESCRIPTOR   Buffer[1];                  /* 0Ch */
  88 } MSG_TARGET_CMD_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REQUEST,
  89   TargetCmdBufferPostRequest_t, MPI_POINTER pTargetCmdBufferPostRequest_t;
  90
  91 #define CMD_BUFFER_POST_FLAGS_PORT_MASK         (0x01)
  92 #define CMD_BUFFER_POST_FLAGS_ADDR_MODE_MASK    (0x80)
  93 #define CMD_BUFFER_POST_FLAGS_ADDR_MODE_32      (0)
  94 #define CMD_BUFFER_POST_FLAGS_ADDR_MODE_64      (1)
  95 #define CMD_BUFFER_POST_FLAGS_64_BIT_ADDR       (0x80)
  96
  97 #define CMD_BUFFER_POST_IO_INDEX_MASK           (0x00003FFF)
  98 #define CMD_BUFFER_POST_IO_INDEX_MASK_0100      (0x000003FF) /* obsolete */
  99
 100
 101 typedef struct _MSG_TARGET_CMD_BUFFER_POST_REPLY
 102 {
 103     U8                      BufferPostFlags;            /* 00h */
 104     U8                      BufferCount;                /* 01h */
 105     U8                      MsgLength;                  /* 02h */
 106     U8                      Function;                   /* 03h */
 107     U8                      BufferLength;               /* 04h */
 108     U8                      Reserved;                   /* 05h */
 109     U8                      Reserved1;                  /* 06h */
 110     U8                      MsgFlags;                   /* 07h */
 111     U32                     MsgContext;                 /* 08h */
 112     U16                     Reserved2;                  /* 0Ch */
 113     U16                     IOCStatus;                  /* 0Eh */
 114     U32                     IOCLogInfo;                 /* 10h */
 115 } MSG_TARGET_CMD_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REPLY,
 116   TargetCmdBufferPostReply_t, MPI_POINTER pTargetCmdBufferPostReply_t;
 117
 118 /* the following structure is obsolete as of MPI v1.2 */
 119 typedef struct _MSG_PRIORITY_CMD_RECEIVED_REPLY
 120 {
 121     U16                     Reserved;                   /* 00h */
 122     U8                      MsgLength;                  /* 02h */
 123     U8                      Function;                   /* 03h */
 124     U16                     Reserved1;                  /* 04h */
 125     U8                      Reserved2;                  /* 06h */
 126     U8                      MsgFlags;                   /* 07h */
 127     U32                     MsgContext;                 /* 08h */
 128     U8                      PriorityReason;             /* 0Ch */
 129     U8                      Reserved3;                  /* 0Dh */
 130     U16                     IOCStatus;                  /* 0Eh */
 131     U32                     IOCLogInfo;                 /* 10h */
 132     U32                     ReplyWord;                  /* 14h */
 133 } MSG_PRIORITY_CMD_RECEIVED_REPLY, MPI_POINTER PTR_MSG_PRIORITY_CMD_RECEIVED_REPLY,
 134   PriorityCommandReceivedReply_t, MPI_POINTER pPriorityCommandReceivedReply_t;
 135
 136 #define PRIORITY_REASON_NO_DISCONNECT           (0x00)
 137 #define PRIORITY_REASON_SCSI_TASK_MANAGEMENT    (0x01)
 138 #define PRIORITY_REASON_CMD_PARITY_ERR          (0x02)
 139 #define PRIORITY_REASON_MSG_OUT_PARITY_ERR      (0x03)
 140 #define PRIORITY_REASON_LQ_CRC_ERR              (0x04)
 141 #define PRIORITY_REASON_CMD_CRC_ERR             (0x05)
 142 #define PRIORITY_REASON_PROTOCOL_ERR            (0x06)
 143 #define PRIORITY_REASON_DATA_OUT_PARITY_ERR     (0x07)
 144 #define PRIORITY_REASON_DATA_OUT_CRC_ERR        (0x08)
 145 #define PRIORITY_REASON_TARGET_BUSY             (0x09)
 146 #define PRIORITY_REASON_UNKNOWN                 (0xFF)
 147
 148
 149 typedef struct _MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY
 150 {
 151     U16                     Reserved;                   /* 00h */
 152     U8                      MsgLength;                  /* 02h */
 153     U8                      Function;                   /* 03h */
 154     U16                     Reserved1;                  /* 04h */
 155     U8                      Reserved2;                  /* 06h */
 156     U8                      MsgFlags;                   /* 07h */
 157     U32                     MsgContext;                 /* 08h */
 158     U8                      PriorityReason;             /* 0Ch */
 159     U8                      Reserved3;                  /* 0Dh */
 160     U16                     IOCStatus;                  /* 0Eh */
 161     U32                     IOCLogInfo;                 /* 10h */
 162     U32                     ReplyWord;                  /* 14h */
 163 } MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
 164   MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
 165   TargetCmdBufferPostErrorReply_t, MPI_POINTER pTargetCmdBufferPostErrorReply_t;
 166
 167
 168 typedef struct _MPI_TARGET_FCP_CMD_BUFFER
 169 {
 170     U8      FcpLun[8];                                  /* 00h */
 171     U8      FcpCntl[4];                                 /* 08h */
 172     U8      FcpCdb[16];                                 /* 0Ch */
 173     U32     FcpDl;                                      /* 1Ch */
 174     U8      AliasIndex;                                 /* 20h */
 175     U8      Reserved1;                                  /* 21h */
 176     U16     OptionalOxid;                               /* 22h */
 177 } MPI_TARGET_FCP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_CMD_BUFFER,
 178   MpiTargetFcpCmdBuffer, MPI_POINTER pMpiTargetFcpCmdBuffer;
 179
 180
 181 typedef struct _MPI_TARGET_SCSI_SPI_CMD_BUFFER
 182 {
 183     /* SPI L_Q information unit */
 184     U8      L_QType;                                    /* 00h */
 185     U8      Reserved;                                   /* 01h */
 186     U16     Tag;                                        /* 02h */
 187     U8      LogicalUnitNumber[8];                       /* 04h */
 188     U32     DataLength;                                 /* 0Ch */
 189     /* SPI command information unit */
 190     U8      ReservedFirstByteOfCommandIU;               /* 10h */
 191     U8      TaskAttribute;                              /* 11h */
 192     U8      TaskManagementFlags;                        /* 12h */
 193     U8      AdditionalCDBLength;                        /* 13h */
 194     U8      CDB[16];                                    /* 14h */
 195     /* Alias ID */
 196     U8      AliasID;                                    /* 24h */
 197     U8      Reserved1;                                  /* 25h */
 198     U16     Reserved2;                                  /* 26h */
 199 } MPI_TARGET_SCSI_SPI_CMD_BUFFER,
 200   MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_CMD_BUFFER,
 201   MpiTargetScsiSpiCmdBuffer, MPI_POINTER pMpiTargetScsiSpiCmdBuffer;
 202
 203
 204 /****************************************************************************/
 205 /* Target Assist Request                                                    */
 206 /****************************************************************************/
 207
 208 typedef struct _MSG_TARGET_ASSIST_REQUEST
 209 {
 210     U8                      StatusCode;                 /* 00h */
 211     U8                      TargetAssistFlags;          /* 01h */
 212     U8                      ChainOffset;                /* 02h */
 213     U8                      Function;                   /* 03h */
 214     U16                     QueueTag;                   /* 04h */
 215     U8                      Reserved;                   /* 06h */
 216     U8                      MsgFlags;                   /* 07h */
 217     U32                     MsgContext;                 /* 08h */
 218     U32                     ReplyWord;                  /* 0Ch */
 219     U8                      LUN[8];                     /* 10h */
 220     U32                     RelativeOffset;             /* 18h */
 221     U32                     DataLength;                 /* 1Ch */
 222     SGE_IO_UNION            SGL[1];                     /* 20h */
 223 } MSG_TARGET_ASSIST_REQUEST, MPI_POINTER PTR_MSG_TARGET_ASSIST_REQUEST,
 224   TargetAssistRequest_t, MPI_POINTER pTargetAssistRequest_t;
 225
 226 #define TARGET_ASSIST_FLAGS_DATA_DIRECTION          (0x01)
 227 #define TARGET_ASSIST_FLAGS_AUTO_STATUS             (0x02)
 228 #define TARGET_ASSIST_FLAGS_HIGH_PRIORITY           (0x04)
 229 #define TARGET_ASSIST_FLAGS_CONFIRMED               (0x08)
 230 #define TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER       (0x80)
 231
 232
 233 typedef struct _MSG_TARGET_ERROR_REPLY
 234 {
 235     U16                     Reserved;                   /* 00h */
 236     U8                      MsgLength;                  /* 02h */
 237     U8                      Function;                   /* 03h */
 238     U16                     Reserved1;                  /* 04h */
 239     U8                      Reserved2;                  /* 06h */
 240     U8                      MsgFlags;                   /* 07h */
 241     U32                     MsgContext;                 /* 08h */
 242     U8                      PriorityReason;             /* 0Ch */
 243     U8                      Reserved3;                  /* 0Dh */
 244     U16                     IOCStatus;                  /* 0Eh */
 245     U32                     IOCLogInfo;                 /* 10h */
 246     U32                     ReplyWord;                  /* 14h */
 247     U32                     TransferCount;              /* 18h */
 248 } MSG_TARGET_ERROR_REPLY, MPI_POINTER PTR_MSG_TARGET_ERROR_REPLY,
 249   TargetErrorReply_t, MPI_POINTER pTargetErrorReply_t;
 250
 251
 252 /****************************************************************************/
 253 /* Target Status Send Request                                               */
 254 /****************************************************************************/
 255
 256 typedef struct _MSG_TARGET_STATUS_SEND_REQUEST
 257 {
 258     U8                      StatusCode;                 /* 00h */
 259     U8                      StatusFlags;                /* 01h */
 260     U8                      ChainOffset;                /* 02h */
 261     U8                      Function;                   /* 03h */
 262     U16                     QueueTag;                   /* 04h */
 263     U8                      Reserved;                   /* 06h */
 264     U8                      MsgFlags;                   /* 07h */
 265     U32                     MsgContext;                 /* 08h */
 266     U32                     ReplyWord;                  /* 0Ch */
 267     U8                      LUN[8];                     /* 10h */
 268     SGE_SIMPLE_UNION        StatusDataSGE;              /* 18h */
 269 } MSG_TARGET_STATUS_SEND_REQUEST, MPI_POINTER PTR_MSG_TARGET_STATUS_SEND_REQUEST,
 270   TargetStatusSendRequest_t, MPI_POINTER pTargetStatusSendRequest_t;
 271
 272 #define TARGET_STATUS_SEND_FLAGS_AUTO_GOOD_STATUS   (0x01)
 273 #define TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY      (0x04)
 274 #define TARGET_STATUS_SEND_FLAGS_CONFIRMED          (0x08)
 275 #define TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER  (0x80)
 276
 277 /*
 278  * NOTE: FCP_RSP data is big-endian. When used on a little-endian system, this
 279  * structure properly orders the bytes.
 280  */
 281 typedef struct _MPI_TARGET_FCP_RSP_BUFFER
 282 {
 283     U8      Reserved0[8];                               /* 00h */
 284     U8      Reserved1[2];                               /* 08h */
 285     U8      FcpFlags;                                   /* 0Ah */
 286     U8      FcpStatus;                                  /* 0Bh */
 287     U32     FcpResid;                                   /* 0Ch */
 288     U32     FcpSenseLength;                             /* 10h */
 289     U32     FcpResponseLength;                          /* 14h */
 290     U8      FcpResponseData[8];                         /* 18h */
 291     U8      FcpSenseData[32]; /* Pad to 64 bytes */     /* 20h */
 292 } MPI_TARGET_FCP_RSP_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_RSP_BUFFER,
 293   MpiTargetFcpRspBuffer, MPI_POINTER pMpiTargetFcpRspBuffer;
 294
 295 /*
 296  * NOTE: The SPI status IU is big-endian. When used on a little-endian system,
 297  * this structure properly orders the bytes.
 298  */
 299 typedef struct _MPI_TARGET_SCSI_SPI_STATUS_IU
 300 {
 301     U8      Reserved0;                                  /* 00h */
 302     U8      Reserved1;                                  /* 01h */
 303     U8      Valid;                                      /* 02h */
 304     U8      Status;                                     /* 03h */
 305     U32     SenseDataListLength;                        /* 04h */
 306     U32     PktFailuresListLength;                      /* 08h */
 307     U8      SenseData[52]; /* Pad the IU to 64 bytes */ /* 0Ch */
 308 } MPI_TARGET_SCSI_SPI_STATUS_IU, MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_STATUS_IU,
 309   TargetScsiSpiStatusIU_t, MPI_POINTER pTargetScsiSpiStatusIU_t;
 310
 311 /****************************************************************************/
 312 /* Target Mode Abort Request                                                */
 313 /****************************************************************************/
 314
 315 typedef struct _MSG_TARGET_MODE_ABORT_REQUEST
 316 {
 317     U8                      AbortType;                  /* 00h */
 318     U8                      Reserved;                   /* 01h */
 319     U8                      ChainOffset;                /* 02h */
 320     U8                      Function;                   /* 03h */
 321     U16                     Reserved1;                  /* 04h */
 322     U8                      Reserved2;                  /* 06h */
 323     U8                      MsgFlags;                   /* 07h */
 324     U32                     MsgContext;                 /* 08h */
 325     U32                     ReplyWord;                  /* 0Ch */
 326     U32                     MsgContextToAbort;          /* 10h */
 327 } MSG_TARGET_MODE_ABORT, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT,
 328   TargetModeAbort_t, MPI_POINTER pTargetModeAbort_t;
 329
 330 #define TARGET_MODE_ABORT_TYPE_ALL_CMD_BUFFERS      (0x00)
 331 #define TARGET_MODE_ABORT_TYPE_ALL_IO               (0x01)
 332 #define TARGET_MODE_ABORT_TYPE_EXACT_IO             (0x02)
 333 #define TARGET_MODE_ABORT_TYPE_EXACT_IO_REQUEST     (0x03)
 334
 335 /* Target Mode Abort Reply */
 336
 337 typedef struct _MSG_TARGET_MODE_ABORT_REPLY
 338 {
 339     U16                     Reserved;                   /* 00h */
 340     U8                      MsgLength;                  /* 02h */
 341     U8                      Function;                   /* 03h */
 342     U16                     Reserved1;                  /* 04h */
 343     U8                      Reserved2;                  /* 06h */
 344     U8                      MsgFlags;                   /* 07h */
 345     U32                     MsgContext;                 /* 08h */
 346     U16                     Reserved3;                  /* 0Ch */
 347     U16                     IOCStatus;                  /* 0Eh */
 348     U32                     IOCLogInfo;                 /* 10h */
 349     U32                     AbortCount;                 /* 14h */
 350 } MSG_TARGET_MODE_ABORT_REPLY, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT_REPLY,
 351   TargetModeAbortReply_t, MPI_POINTER pTargetModeAbortReply_t;
 352
 353
 354 /****************************************************************************/
 355 /* Target Mode Context Reply                                                */
 356 /****************************************************************************/
 357
 358 #define TARGET_MODE_REPLY_IO_INDEX_MASK         (0x00003FFF)
 359 #define TARGET_MODE_REPLY_IO_INDEX_SHIFT        (0)
 360 #define TARGET_MODE_REPLY_INITIATOR_INDEX_MASK  (0x03FFC000)
 361 #define TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT (14)
 362 #define TARGET_MODE_REPLY_ALIAS_MASK            (0x04000000)
 363 #define TARGET_MODE_REPLY_ALIAS_SHIFT           (26)
 364 #define TARGET_MODE_REPLY_PORT_MASK             (0x10000000)
 365 #define TARGET_MODE_REPLY_PORT_SHIFT            (28)
 366
 367
 368 #define GET_IO_INDEX(x)     (((x) & TARGET_MODE_REPLY_IO_INDEX_MASK)           \
 369                                     >> TARGET_MODE_REPLY_IO_INDEX_SHIFT)
 370
 371 #define SET_IO_INDEX(t, i)                                                     \
 372             ((t) = ((t) & ~TARGET_MODE_REPLY_IO_INDEX_MASK) |                  \
 373                               (((i) << TARGET_MODE_REPLY_IO_INDEX_SHIFT) &     \
 374                                              TARGET_MODE_REPLY_IO_INDEX_MASK))
 375
 376 #define GET_INITIATOR_INDEX(x) (((x) & TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) \
 377                                    >> TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT)
 378
 379 #define SET_INITIATOR_INDEX(t, ii)                                             \
 380         ((t) = ((t) & ~TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) |               \
 381                         (((ii) << TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT) &   \
 382                                       TARGET_MODE_REPLY_INITIATOR_INDEX_MASK))
 383
 384 #define GET_ALIAS(x) (((x) & TARGET_MODE_REPLY_ALIAS_MASK)                     \
 385                                                >> TARGET_MODE_REPLY_ALIAS_SHIFT)
 386
 387 #define SET_ALIAS(t, a)  ((t) = ((t) & ~TARGET_MODE_REPLY_ALIAS_MASK) |        \
 388                                     (((a) << TARGET_MODE_REPLY_ALIAS_SHIFT) &  \
 389                                                  TARGET_MODE_REPLY_ALIAS_MASK))
 390
 391 #define GET_PORT(x) (((x) & TARGET_MODE_REPLY_PORT_MASK)                       \
 392                                                >> TARGET_MODE_REPLY_PORT_SHIFT)
 393
 394 #define SET_PORT(t, p)  ((t) = ((t) & ~TARGET_MODE_REPLY_PORT_MASK) |          \
 395                                     (((p) << TARGET_MODE_REPLY_PORT_SHIFT) &   \
 396                                                   TARGET_MODE_REPLY_PORT_MASK))
 397
 398 /* the following obsolete values are for MPI v1.0 support */
 399 #define TARGET_MODE_REPLY_0100_MASK_HOST_INDEX       (0x000003FF)
 400 #define TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX      (0)
 401 #define TARGET_MODE_REPLY_0100_MASK_IOC_INDEX        (0x001FF800)
 402 #define TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX       (11)
 403 #define TARGET_MODE_REPLY_0100_PORT_MASK             (0x00400000)
 404 #define TARGET_MODE_REPLY_0100_PORT_SHIFT            (22)
 405 #define TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX  (0x1F800000)
 406 #define TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX (23)
 407
 408 #define GET_HOST_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) \
 409                                   >> TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX)
 410
 411 #define SET_HOST_INDEX_0100(t, hi)                                             \
 412             ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) |           \
 413                          (((hi) << TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX) &  \
 414                                       TARGET_MODE_REPLY_0100_MASK_HOST_INDEX))
 415
 416 #define GET_IOC_INDEX_0100(x)   (((x) & TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) \
 417                                   >> TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX)
 418
 419 #define SET_IOC_INDEX_0100(t, ii)                                              \
 420             ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) |            \
 421                         (((ii) << TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX) &    \
 422                                      TARGET_MODE_REPLY_0100_MASK_IOC_INDEX))
 423
 424 #define GET_INITIATOR_INDEX_0100(x)                                            \
 425             (((x) & TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX)               \
 426                               >> TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX)
 427
 428 #define SET_INITIATOR_INDEX_0100(t, ii)                                        \
 429         ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) |          \
 430                    (((ii) << TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX) &   \
 431                                 TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX))
 432
 433
 434 #endif
 435