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1 /*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
8 */
9
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/init.h>
13 #include <linux/irq.h>
14 #include <linux/delay.h>
15 #include <linux/interrupt.h>
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/mfd/core.h>
19 #include <linux/mfd/abx500.h>
20 #include <linux/mfd/ab8500.h>
21 #include <linux/regulator/ab8500.h>
22
23 /*
24 * Interrupt register offsets
25 * Bank : 0x0E
26 */
27 #define AB8500_IT_SOURCE1_REG 0x00
28 #define AB8500_IT_SOURCE2_REG 0x01
29 #define AB8500_IT_SOURCE3_REG 0x02
30 #define AB8500_IT_SOURCE4_REG 0x03
31 #define AB8500_IT_SOURCE5_REG 0x04
32 #define AB8500_IT_SOURCE6_REG 0x05
33 #define AB8500_IT_SOURCE7_REG 0x06
34 #define AB8500_IT_SOURCE8_REG 0x07
35 #define AB8500_IT_SOURCE19_REG 0x12
36 #define AB8500_IT_SOURCE20_REG 0x13
37 #define AB8500_IT_SOURCE21_REG 0x14
38 #define AB8500_IT_SOURCE22_REG 0x15
39 #define AB8500_IT_SOURCE23_REG 0x16
40 #define AB8500_IT_SOURCE24_REG 0x17
41
42 /*
43 * latch registers
44 */
45 #define AB8500_IT_LATCH1_REG 0x20
46 #define AB8500_IT_LATCH2_REG 0x21
47 #define AB8500_IT_LATCH3_REG 0x22
48 #define AB8500_IT_LATCH4_REG 0x23
49 #define AB8500_IT_LATCH5_REG 0x24
50 #define AB8500_IT_LATCH6_REG 0x25
51 #define AB8500_IT_LATCH7_REG 0x26
52 #define AB8500_IT_LATCH8_REG 0x27
53 #define AB8500_IT_LATCH9_REG 0x28
54 #define AB8500_IT_LATCH10_REG 0x29
55 #define AB8500_IT_LATCH12_REG 0x2B
56 #define AB8500_IT_LATCH19_REG 0x32
57 #define AB8500_IT_LATCH20_REG 0x33
58 #define AB8500_IT_LATCH21_REG 0x34
59 #define AB8500_IT_LATCH22_REG 0x35
60 #define AB8500_IT_LATCH23_REG 0x36
61 #define AB8500_IT_LATCH24_REG 0x37
62
63 /*
64 * mask registers
65 */
66
67 #define AB8500_IT_MASK1_REG 0x40
68 #define AB8500_IT_MASK2_REG 0x41
69 #define AB8500_IT_MASK3_REG 0x42
70 #define AB8500_IT_MASK4_REG 0x43
71 #define AB8500_IT_MASK5_REG 0x44
72 #define AB8500_IT_MASK6_REG 0x45
73 #define AB8500_IT_MASK7_REG 0x46
74 #define AB8500_IT_MASK8_REG 0x47
75 #define AB8500_IT_MASK9_REG 0x48
76 #define AB8500_IT_MASK10_REG 0x49
77 #define AB8500_IT_MASK11_REG 0x4A
78 #define AB8500_IT_MASK12_REG 0x4B
79 #define AB8500_IT_MASK13_REG 0x4C
80 #define AB8500_IT_MASK14_REG 0x4D
81 #define AB8500_IT_MASK15_REG 0x4E
82 #define AB8500_IT_MASK16_REG 0x4F
83 #define AB8500_IT_MASK17_REG 0x50
84 #define AB8500_IT_MASK18_REG 0x51
85 #define AB8500_IT_MASK19_REG 0x52
86 #define AB8500_IT_MASK20_REG 0x53
87 #define AB8500_IT_MASK21_REG 0x54
88 #define AB8500_IT_MASK22_REG 0x55
89 #define AB8500_IT_MASK23_REG 0x56
90 #define AB8500_IT_MASK24_REG 0x57
91
92 #define AB8500_REV_REG 0x80
93 #define AB8500_SWITCH_OFF_STATUS 0x00
94
95 /*
96 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
97 * numbers are indexed into this array with (num / 8).
98 *
99 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
100 * offset 0.
101 */
102 static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
103 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
104 };
105
106 static int ab8500_get_chip_id(struct device *dev)
107 {
108 struct ab8500 *ab8500;
109
110 if (!dev)
111 return -EINVAL;
112 ab8500 = dev_get_drvdata(dev->parent);
113 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
114 }
115
116 static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
117 u8 reg, u8 data)
118 {
119 int ret;
120 /*
121 * Put the u8 bank and u8 register together into a an u16.
122 * The bank on higher 8 bits and register in lower 8 bits.
123 * */
124 u16 addr = ((u16)bank) << 8 | reg;
125
126 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
127
128 ret = mutex_lock_interruptible(&ab8500->lock);
129 if (ret)
130 return ret;
131
132 ret = ab8500->write(ab8500, addr, data);
133 if (ret < 0)
134 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
135 addr, ret);
136 mutex_unlock(&ab8500->lock);
137
138 return ret;
139 }
140
141 static int ab8500_set_register(struct device *dev, u8 bank,
142 u8 reg, u8 value)
143 {
144 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
145
146 return set_register_interruptible(ab8500, bank, reg, value);
147 }
148
149 static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
150 u8 reg, u8 *value)
151 {
152 int ret;
153 /* put the u8 bank and u8 reg together into a an u16.
154 * bank on higher 8 bits and reg in lower */
155 u16 addr = ((u16)bank) << 8 | reg;
156
157 ret = mutex_lock_interruptible(&ab8500->lock);
158 if (ret)
159 return ret;
160
161 ret = ab8500->read(ab8500, addr);
162 if (ret < 0)
163 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
164 addr, ret);
165 else
166 *value = ret;
167
168 mutex_unlock(&ab8500->lock);
169 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
170
171 return ret;
172 }
173
174 static int ab8500_get_register(struct device *dev, u8 bank,
175 u8 reg, u8 *value)
176 {
177 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
178
179 return get_register_interruptible(ab8500, bank, reg, value);
180 }
181
182 static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
183 u8 reg, u8 bitmask, u8 bitvalues)
184 {
185 int ret;
186 u8 data;
187 /* put the u8 bank and u8 reg together into a an u16.
188 * bank on higher 8 bits and reg in lower */
189 u16 addr = ((u16)bank) << 8 | reg;
190
191 ret = mutex_lock_interruptible(&ab8500->lock);
192 if (ret)
193 return ret;
194
195 ret = ab8500->read(ab8500, addr);
196 if (ret < 0) {
197 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
198 addr, ret);
199 goto out;
200 }
201
202 data = (u8)ret;
203 data = (~bitmask & data) | (bitmask & bitvalues);
204
205 ret = ab8500->write(ab8500, addr, data);
206 if (ret < 0)
207 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
208 addr, ret);
209
210 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data);
211 out:
212 mutex_unlock(&ab8500->lock);
213 return ret;
214 }
215
216 static int ab8500_mask_and_set_register(struct device *dev,
217 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
218 {
219 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
220
221 return mask_and_set_register_interruptible(ab8500, bank, reg,
222 bitmask, bitvalues);
223
224 }
225
226 static struct abx500_ops ab8500_ops = {
227 .get_chip_id = ab8500_get_chip_id,
228 .get_register = ab8500_get_register,
229 .set_register = ab8500_set_register,
230 .get_register_page = NULL,
231 .set_register_page = NULL,
232 .mask_and_set_register = ab8500_mask_and_set_register,
233 .event_registers_startup_state_get = NULL,
234 .startup_irq_enabled = NULL,
235 };
236
237 static void ab8500_irq_lock(struct irq_data *data)
238 {
239 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
240
241 mutex_lock(&ab8500->irq_lock);
242 }
243
244 static void ab8500_irq_sync_unlock(struct irq_data *data)
245 {
246 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
247 int i;
248
249 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
250 u8 old = ab8500->oldmask[i];
251 u8 new = ab8500->mask[i];
252 int reg;
253
254 if (new == old)
255 continue;
256
257 /* Interrupt register 12 does'nt exist prior to version 0x20 */
258 if (ab8500_irq_regoffset[i] == 11 && ab8500->chip_id < 0x20)
259 continue;
260
261 ab8500->oldmask[i] = new;
262
263 reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i];
264 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
265 }
266
267 mutex_unlock(&ab8500->irq_lock);
268 }
269
270 static void ab8500_irq_mask(struct irq_data *data)
271 {
272 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
273 int offset = data->irq - ab8500->irq_base;
274 int index = offset / 8;
275 int mask = 1 << (offset % 8);
276
277 ab8500->mask[index] |= mask;
278 }
279
280 static void ab8500_irq_unmask(struct irq_data *data)
281 {
282 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
283 int offset = data->irq - ab8500->irq_base;
284 int index = offset / 8;
285 int mask = 1 << (offset % 8);
286
287 ab8500->mask[index] &= ~mask;
288 }
289
290 static struct irq_chip ab8500_irq_chip = {
291 .name = "ab8500",
292 .irq_bus_lock = ab8500_irq_lock,
293 .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
294 .irq_mask = ab8500_irq_mask,
295 .irq_unmask = ab8500_irq_unmask,
296 };
297
298 static irqreturn_t ab8500_irq(int irq, void *dev)
299 {
300 struct ab8500 *ab8500 = dev;
301 int i;
302
303 dev_vdbg(ab8500->dev, "interrupt\n");
304
305 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
306 int regoffset = ab8500_irq_regoffset[i];
307 int status;
308 u8 value;
309
310 /* Interrupt register 12 does'nt exist prior to version 0x20 */
311 if (regoffset == 11 && ab8500->chip_id < 0x20)
312 continue;
313
314 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
315 AB8500_IT_LATCH1_REG + regoffset, &value);
316 if (status < 0 || value == 0)
317 continue;
318
319 do {
320 int bit = __ffs(value);
321 int line = i * 8 + bit;
322
323 handle_nested_irq(ab8500->irq_base + line);
324 value &= ~(1 << bit);
325 } while (value);
326 }
327
328 return IRQ_HANDLED;
329 }
330
331 static int ab8500_irq_init(struct ab8500 *ab8500)
332 {
333 int base = ab8500->irq_base;
334 int irq;
335
336 for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
337 set_irq_chip_data(irq, ab8500);
338 set_irq_chip_and_handler(irq, &ab8500_irq_chip,
339 handle_simple_irq);
340 set_irq_nested_thread(irq, 1);
341 #ifdef CONFIG_ARM
342 set_irq_flags(irq, IRQF_VALID);
343 #else
344 set_irq_noprobe(irq);
345 #endif
346 }
347
348 return 0;
349 }
350
351 static void ab8500_irq_remove(struct ab8500 *ab8500)
352 {
353 int base = ab8500->irq_base;
354 int irq;
355
356 for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
357 #ifdef CONFIG_ARM
358 set_irq_flags(irq, 0);
359 #endif
360 set_irq_chip_and_handler(irq, NULL, NULL);
361 set_irq_chip_data(irq, NULL);
362 }
363 }
364
365 static struct resource ab8500_gpadc_resources[] = {
366 {
367 .name = "HW_CONV_END",
368 .start = AB8500_INT_GP_HW_ADC_CONV_END,
369 .end = AB8500_INT_GP_HW_ADC_CONV_END,
370 .flags = IORESOURCE_IRQ,
371 },
372 {
373 .name = "SW_CONV_END",
374 .start = AB8500_INT_GP_SW_ADC_CONV_END,
375 .end = AB8500_INT_GP_SW_ADC_CONV_END,
376 .flags = IORESOURCE_IRQ,
377 },
378 };
379
380 static struct resource ab8500_rtc_resources[] = {
381 {
382 .name = "60S",
383 .start = AB8500_INT_RTC_60S,
384 .end = AB8500_INT_RTC_60S,
385 .flags = IORESOURCE_IRQ,
386 },
387 {
388 .name = "ALARM",
389 .start = AB8500_INT_RTC_ALARM,
390 .end = AB8500_INT_RTC_ALARM,
391 .flags = IORESOURCE_IRQ,
392 },
393 };
394
395 static struct resource ab8500_poweronkey_db_resources[] = {
396 {
397 .name = "ONKEY_DBF",
398 .start = AB8500_INT_PON_KEY1DB_F,
399 .end = AB8500_INT_PON_KEY1DB_F,
400 .flags = IORESOURCE_IRQ,
401 },
402 {
403 .name = "ONKEY_DBR",
404 .start = AB8500_INT_PON_KEY1DB_R,
405 .end = AB8500_INT_PON_KEY1DB_R,
406 .flags = IORESOURCE_IRQ,
407 },
408 };
409
410 static struct resource ab8500_bm_resources[] = {
411 {
412 .name = "MAIN_EXT_CH_NOT_OK",
413 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
414 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
415 .flags = IORESOURCE_IRQ,
416 },
417 {
418 .name = "BATT_OVV",
419 .start = AB8500_INT_BATT_OVV,
420 .end = AB8500_INT_BATT_OVV,
421 .flags = IORESOURCE_IRQ,
422 },
423 {
424 .name = "MAIN_CH_UNPLUG_DET",
425 .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
426 .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
427 .flags = IORESOURCE_IRQ,
428 },
429 {
430 .name = "MAIN_CHARGE_PLUG_DET",
431 .start = AB8500_INT_MAIN_CH_PLUG_DET,
432 .end = AB8500_INT_MAIN_CH_PLUG_DET,
433 .flags = IORESOURCE_IRQ,
434 },
435 {
436 .name = "VBUS_DET_F",
437 .start = AB8500_INT_VBUS_DET_F,
438 .end = AB8500_INT_VBUS_DET_F,
439 .flags = IORESOURCE_IRQ,
440 },
441 {
442 .name = "VBUS_DET_R",
443 .start = AB8500_INT_VBUS_DET_R,
444 .end = AB8500_INT_VBUS_DET_R,
445 .flags = IORESOURCE_IRQ,
446 },
447 {
448 .name = "BAT_CTRL_INDB",
449 .start = AB8500_INT_BAT_CTRL_INDB,
450 .end = AB8500_INT_BAT_CTRL_INDB,
451 .flags = IORESOURCE_IRQ,
452 },
453 {
454 .name = "CH_WD_EXP",
455 .start = AB8500_INT_CH_WD_EXP,
456 .end = AB8500_INT_CH_WD_EXP,
457 .flags = IORESOURCE_IRQ,
458 },
459 {
460 .name = "VBUS_OVV",
461 .start = AB8500_INT_VBUS_OVV,
462 .end = AB8500_INT_VBUS_OVV,
463 .flags = IORESOURCE_IRQ,
464 },
465 {
466 .name = "NCONV_ACCU",
467 .start = AB8500_INT_CCN_CONV_ACC,
468 .end = AB8500_INT_CCN_CONV_ACC,
469 .flags = IORESOURCE_IRQ,
470 },
471 {
472 .name = "LOW_BAT_F",
473 .start = AB8500_INT_LOW_BAT_F,
474 .end = AB8500_INT_LOW_BAT_F,
475 .flags = IORESOURCE_IRQ,
476 },
477 {
478 .name = "LOW_BAT_R",
479 .start = AB8500_INT_LOW_BAT_R,
480 .end = AB8500_INT_LOW_BAT_R,
481 .flags = IORESOURCE_IRQ,
482 },
483 {
484 .name = "BTEMP_LOW",
485 .start = AB8500_INT_BTEMP_LOW,
486 .end = AB8500_INT_BTEMP_LOW,
487 .flags = IORESOURCE_IRQ,
488 },
489 {
490 .name = "BTEMP_HIGH",
491 .start = AB8500_INT_BTEMP_HIGH,
492 .end = AB8500_INT_BTEMP_HIGH,
493 .flags = IORESOURCE_IRQ,
494 },
495 {
496 .name = "USB_CHARGER_NOT_OKR",
497 .start = AB8500_INT_USB_CHARGER_NOT_OK,
498 .end = AB8500_INT_USB_CHARGER_NOT_OK,
499 .flags = IORESOURCE_IRQ,
500 },
501 {
502 .name = "USB_CHARGE_DET_DONE",
503 .start = AB8500_INT_USB_CHG_DET_DONE,
504 .end = AB8500_INT_USB_CHG_DET_DONE,
505 .flags = IORESOURCE_IRQ,
506 },
507 {
508 .name = "USB_CH_TH_PROT_R",
509 .start = AB8500_INT_USB_CH_TH_PROT_R,
510 .end = AB8500_INT_USB_CH_TH_PROT_R,
511 .flags = IORESOURCE_IRQ,
512 },
513 {
514 .name = "MAIN_CH_TH_PROT_R",
515 .start = AB8500_INT_MAIN_CH_TH_PROT_R,
516 .end = AB8500_INT_MAIN_CH_TH_PROT_R,
517 .flags = IORESOURCE_IRQ,
518 },
519 {
520 .name = "USB_CHARGER_NOT_OKF",
521 .start = AB8500_INT_USB_CHARGER_NOT_OKF,
522 .end = AB8500_INT_USB_CHARGER_NOT_OKF,
523 .flags = IORESOURCE_IRQ,
524 },
525 };
526
527 static struct resource ab8500_debug_resources[] = {
528 {
529 .name = "IRQ_FIRST",
530 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
531 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
532 .flags = IORESOURCE_IRQ,
533 },
534 {
535 .name = "IRQ_LAST",
536 .start = AB8500_INT_USB_CHARGER_NOT_OKF,
537 .end = AB8500_INT_USB_CHARGER_NOT_OKF,
538 .flags = IORESOURCE_IRQ,
539 },
540 };
541
542 static struct resource ab8500_usb_resources[] = {
543 {
544 .name = "ID_WAKEUP_R",
545 .start = AB8500_INT_ID_WAKEUP_R,
546 .end = AB8500_INT_ID_WAKEUP_R,
547 .flags = IORESOURCE_IRQ,
548 },
549 {
550 .name = "ID_WAKEUP_F",
551 .start = AB8500_INT_ID_WAKEUP_F,
552 .end = AB8500_INT_ID_WAKEUP_F,
553 .flags = IORESOURCE_IRQ,
554 },
555 {
556 .name = "VBUS_DET_F",
557 .start = AB8500_INT_VBUS_DET_F,
558 .end = AB8500_INT_VBUS_DET_F,
559 .flags = IORESOURCE_IRQ,
560 },
561 {
562 .name = "VBUS_DET_R",
563 .start = AB8500_INT_VBUS_DET_R,
564 .end = AB8500_INT_VBUS_DET_R,
565 .flags = IORESOURCE_IRQ,
566 },
567 {
568 .name = "USB_LINK_STATUS",
569 .start = AB8500_INT_USB_LINK_STATUS,
570 .end = AB8500_INT_USB_LINK_STATUS,
571 .flags = IORESOURCE_IRQ,
572 },
573 };
574
575 static struct resource ab8500_temp_resources[] = {
576 {
577 .name = "AB8500_TEMP_WARM",
578 .start = AB8500_INT_TEMP_WARM,
579 .end = AB8500_INT_TEMP_WARM,
580 .flags = IORESOURCE_IRQ,
581 },
582 };
583
584 static struct mfd_cell ab8500_devs[] = {
585 #ifdef CONFIG_DEBUG_FS
586 {
587 .name = "ab8500-debug",
588 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
589 .resources = ab8500_debug_resources,
590 },
591 #endif
592 {
593 .name = "ab8500-sysctrl",
594 },
595 {
596 .name = "ab8500-regulator",
597 },
598 {
599 .name = "ab8500-gpadc",
600 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
601 .resources = ab8500_gpadc_resources,
602 },
603 {
604 .name = "ab8500-rtc",
605 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
606 .resources = ab8500_rtc_resources,
607 },
608 {
609 .name = "ab8500-bm",
610 .num_resources = ARRAY_SIZE(ab8500_bm_resources),
611 .resources = ab8500_bm_resources,
612 },
613 { .name = "ab8500-codec", },
614 {
615 .name = "ab8500-usb",
616 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
617 .resources = ab8500_usb_resources,
618 },
619 {
620 .name = "ab8500-poweron-key",
621 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
622 .resources = ab8500_poweronkey_db_resources,
623 },
624 {
625 .name = "ab8500-pwm",
626 .id = 1,
627 },
628 {
629 .name = "ab8500-pwm",
630 .id = 2,
631 },
632 {
633 .name = "ab8500-pwm",
634 .id = 3,
635 },
636 { .name = "ab8500-leds", },
637 {
638 .name = "ab8500-denc",
639 },
640 {
641 .name = "ab8500-temp",
642 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
643 .resources = ab8500_temp_resources,
644 },
645 };
646
647 static ssize_t show_chip_id(struct device *dev,
648 struct device_attribute *attr, char *buf)
649 {
650 struct ab8500 *ab8500;
651
652 ab8500 = dev_get_drvdata(dev);
653 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
654 }
655
656 /*
657 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
658 * 0x01 Swoff bit programming
659 * 0x02 Thermal protection activation
660 * 0x04 Vbat lower then BattOk falling threshold
661 * 0x08 Watchdog expired
662 * 0x10 Non presence of 32kHz clock
663 * 0x20 Battery level lower than power on reset threshold
664 * 0x40 Power on key 1 pressed longer than 10 seconds
665 * 0x80 DB8500 thermal shutdown
666 */
667 static ssize_t show_switch_off_status(struct device *dev,
668 struct device_attribute *attr, char *buf)
669 {
670 int ret;
671 u8 value;
672 struct ab8500 *ab8500;
673
674 ab8500 = dev_get_drvdata(dev);
675 ret = get_register_interruptible(ab8500, AB8500_RTC,
676 AB8500_SWITCH_OFF_STATUS, &value);
677 if (ret < 0)
678 return ret;
679 return sprintf(buf, "%#x\n", value);
680 }
681
682 static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
683 static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
684
685 static struct attribute *ab8500_sysfs_entries[] = {
686 &dev_attr_chip_id.attr,
687 &dev_attr_switch_off_status.attr,
688 NULL,
689 };
690
691 static struct attribute_group ab8500_attr_group = {
692 .attrs = ab8500_sysfs_entries,
693 };
694
695 int __devinit ab8500_init(struct ab8500 *ab8500)
696 {
697 struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev);
698 int ret;
699 int i;
700 u8 value;
701
702 if (plat)
703 ab8500->irq_base = plat->irq_base;
704
705 mutex_init(&ab8500->lock);
706 mutex_init(&ab8500->irq_lock);
707
708 ret = get_register_interruptible(ab8500, AB8500_MISC,
709 AB8500_REV_REG, &value);
710 if (ret < 0)
711 return ret;
712
713 /*
714 * 0x0 - Early Drop
715 * 0x10 - Cut 1.0
716 * 0x11 - Cut 1.1
717 * 0x20 - Cut 2.0
718 * 0x30 - Cut 3.0
719 */
720 if (value == 0x0 || value == 0x10 || value == 0x11 || value == 0x20 ||
721 value == 0x30) {
722 dev_info(ab8500->dev, "detected chip, revision: %#x\n", value);
723 } else {
724 dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value);
725 return -EINVAL;
726 }
727 ab8500->chip_id = value;
728
729 /*
730 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
731 * 0x01 Swoff bit programming
732 * 0x02 Thermal protection activation
733 * 0x04 Vbat lower then BattOk falling threshold
734 * 0x08 Watchdog expired
735 * 0x10 Non presence of 32kHz clock
736 * 0x20 Battery level lower than power on reset threshold
737 * 0x40 Power on key 1 pressed longer than 10 seconds
738 * 0x80 DB8500 thermal shutdown
739 */
740
741 ret = get_register_interruptible(ab8500, AB8500_RTC,
742 AB8500_SWITCH_OFF_STATUS, &value);
743 if (ret < 0)
744 return ret;
745 dev_info(ab8500->dev, "switch off status: %#x", value);
746
747 if (plat && plat->init)
748 plat->init(ab8500);
749
750 /* Clear and mask all interrupts */
751 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
752 /* Interrupt register 12 does'nt exist prior to version 0x20 */
753 if (ab8500_irq_regoffset[i] == 11 && ab8500->chip_id < 0x20)
754 continue;
755
756 get_register_interruptible(ab8500, AB8500_INTERRUPT,
757 AB8500_IT_LATCH1_REG + ab8500_irq_regoffset[i],
758 &value);
759 set_register_interruptible(ab8500, AB8500_INTERRUPT,
760 AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i], 0xff);
761 }
762
763 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
764 if (ret)
765 return ret;
766
767 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++)
768 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
769
770 if (ab8500->irq_base) {
771 ret = ab8500_irq_init(ab8500);
772 if (ret)
773 return ret;
774
775 ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq,
776 IRQF_ONESHOT | IRQF_NO_SUSPEND,
777 "ab8500", ab8500);
778 if (ret)
779 goto out_removeirq;
780 }
781
782 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
783 ARRAY_SIZE(ab8500_devs), NULL,
784 ab8500->irq_base);
785 if (ret)
786 goto out_freeirq;
787
788 ret = sysfs_create_group(&ab8500->dev->kobj, &ab8500_attr_group);
789 if (ret)
790 dev_err(ab8500->dev, "error creating sysfs entries\n");
791
792 return ret;
793
794 out_freeirq:
795 if (ab8500->irq_base) {
796 free_irq(ab8500->irq, ab8500);
797 out_removeirq:
798 ab8500_irq_remove(ab8500);
799 }
800 return ret;
801 }
802
803 int __devexit ab8500_exit(struct ab8500 *ab8500)
804 {
805 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
806 mfd_remove_devices(ab8500->dev);
807 if (ab8500->irq_base) {
808 free_irq(ab8500->irq, ab8500);
809 ab8500_irq_remove(ab8500);
810 }
811
812 return 0;
813 }
814
815 MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
816 MODULE_DESCRIPTION("AB8500 MFD core");
817 MODULE_LICENSE("GPL v2");