]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - drivers/mfd/ab8500-core.c
Merge branch 'for-linus-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mason...
[mirror_ubuntu-artful-kernel.git] / drivers / mfd / ab8500-core.c
1 /*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
8 */
9
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/init.h>
13 #include <linux/irq.h>
14 #include <linux/irqdomain.h>
15 #include <linux/delay.h>
16 #include <linux/interrupt.h>
17 #include <linux/module.h>
18 #include <linux/platform_device.h>
19 #include <linux/mfd/core.h>
20 #include <linux/mfd/abx500.h>
21 #include <linux/mfd/abx500/ab8500.h>
22 #include <linux/mfd/abx500/ab8500-bm.h>
23 #include <linux/mfd/dbx500-prcmu.h>
24 #include <linux/regulator/ab8500.h>
25 #include <linux/of.h>
26 #include <linux/of_device.h>
27
28 /*
29 * Interrupt register offsets
30 * Bank : 0x0E
31 */
32 #define AB8500_IT_SOURCE1_REG 0x00
33 #define AB8500_IT_SOURCE2_REG 0x01
34 #define AB8500_IT_SOURCE3_REG 0x02
35 #define AB8500_IT_SOURCE4_REG 0x03
36 #define AB8500_IT_SOURCE5_REG 0x04
37 #define AB8500_IT_SOURCE6_REG 0x05
38 #define AB8500_IT_SOURCE7_REG 0x06
39 #define AB8500_IT_SOURCE8_REG 0x07
40 #define AB9540_IT_SOURCE13_REG 0x0C
41 #define AB8500_IT_SOURCE19_REG 0x12
42 #define AB8500_IT_SOURCE20_REG 0x13
43 #define AB8500_IT_SOURCE21_REG 0x14
44 #define AB8500_IT_SOURCE22_REG 0x15
45 #define AB8500_IT_SOURCE23_REG 0x16
46 #define AB8500_IT_SOURCE24_REG 0x17
47
48 /*
49 * latch registers
50 */
51 #define AB8500_IT_LATCH1_REG 0x20
52 #define AB8500_IT_LATCH2_REG 0x21
53 #define AB8500_IT_LATCH3_REG 0x22
54 #define AB8500_IT_LATCH4_REG 0x23
55 #define AB8500_IT_LATCH5_REG 0x24
56 #define AB8500_IT_LATCH6_REG 0x25
57 #define AB8500_IT_LATCH7_REG 0x26
58 #define AB8500_IT_LATCH8_REG 0x27
59 #define AB8500_IT_LATCH9_REG 0x28
60 #define AB8500_IT_LATCH10_REG 0x29
61 #define AB8500_IT_LATCH12_REG 0x2B
62 #define AB9540_IT_LATCH13_REG 0x2C
63 #define AB8500_IT_LATCH19_REG 0x32
64 #define AB8500_IT_LATCH20_REG 0x33
65 #define AB8500_IT_LATCH21_REG 0x34
66 #define AB8500_IT_LATCH22_REG 0x35
67 #define AB8500_IT_LATCH23_REG 0x36
68 #define AB8500_IT_LATCH24_REG 0x37
69
70 /*
71 * mask registers
72 */
73
74 #define AB8500_IT_MASK1_REG 0x40
75 #define AB8500_IT_MASK2_REG 0x41
76 #define AB8500_IT_MASK3_REG 0x42
77 #define AB8500_IT_MASK4_REG 0x43
78 #define AB8500_IT_MASK5_REG 0x44
79 #define AB8500_IT_MASK6_REG 0x45
80 #define AB8500_IT_MASK7_REG 0x46
81 #define AB8500_IT_MASK8_REG 0x47
82 #define AB8500_IT_MASK9_REG 0x48
83 #define AB8500_IT_MASK10_REG 0x49
84 #define AB8500_IT_MASK11_REG 0x4A
85 #define AB8500_IT_MASK12_REG 0x4B
86 #define AB8500_IT_MASK13_REG 0x4C
87 #define AB8500_IT_MASK14_REG 0x4D
88 #define AB8500_IT_MASK15_REG 0x4E
89 #define AB8500_IT_MASK16_REG 0x4F
90 #define AB8500_IT_MASK17_REG 0x50
91 #define AB8500_IT_MASK18_REG 0x51
92 #define AB8500_IT_MASK19_REG 0x52
93 #define AB8500_IT_MASK20_REG 0x53
94 #define AB8500_IT_MASK21_REG 0x54
95 #define AB8500_IT_MASK22_REG 0x55
96 #define AB8500_IT_MASK23_REG 0x56
97 #define AB8500_IT_MASK24_REG 0x57
98 #define AB8500_IT_MASK25_REG 0x58
99
100 /*
101 * latch hierarchy registers
102 */
103 #define AB8500_IT_LATCHHIER1_REG 0x60
104 #define AB8500_IT_LATCHHIER2_REG 0x61
105 #define AB8500_IT_LATCHHIER3_REG 0x62
106 #define AB8540_IT_LATCHHIER4_REG 0x63
107
108 #define AB8500_IT_LATCHHIER_NUM 3
109 #define AB8540_IT_LATCHHIER_NUM 4
110
111 #define AB8500_REV_REG 0x80
112 #define AB8500_IC_NAME_REG 0x82
113 #define AB8500_SWITCH_OFF_STATUS 0x00
114
115 #define AB8500_TURN_ON_STATUS 0x00
116 #define AB8505_TURN_ON_STATUS_2 0x04
117
118 #define AB8500_CH_USBCH_STAT1_REG 0x02
119 #define VBUS_DET_DBNC100 0x02
120 #define VBUS_DET_DBNC1 0x01
121
122 static DEFINE_SPINLOCK(on_stat_lock);
123 static u8 turn_on_stat_mask = 0xFF;
124 static u8 turn_on_stat_set;
125 static bool no_bm; /* No battery management */
126 module_param(no_bm, bool, S_IRUGO);
127
128 #define AB9540_MODEM_CTRL2_REG 0x23
129 #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
130
131 /*
132 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
133 * numbers are indexed into this array with (num / 8). The interupts are
134 * defined in linux/mfd/ab8500.h
135 *
136 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
137 * offset 0.
138 */
139 /* AB8500 support */
140 static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
141 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
142 };
143
144 /* AB9540 / AB8505 support */
145 static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
146 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23
147 };
148
149 /* AB8540 support */
150 static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = {
151 0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22,
152 23, 25, 26, 27, 28, 29, 30, 31,
153 };
154
155 static const char ab8500_version_str[][7] = {
156 [AB8500_VERSION_AB8500] = "AB8500",
157 [AB8500_VERSION_AB8505] = "AB8505",
158 [AB8500_VERSION_AB9540] = "AB9540",
159 [AB8500_VERSION_AB8540] = "AB8540",
160 };
161
162 static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data)
163 {
164 int ret;
165
166 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
167 if (ret < 0)
168 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
169 return ret;
170 }
171
172 static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
173 u8 data)
174 {
175 int ret;
176
177 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
178 &mask, 1);
179 if (ret < 0)
180 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
181 return ret;
182 }
183
184 static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr)
185 {
186 int ret;
187 u8 data;
188
189 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
190 if (ret < 0) {
191 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
192 return ret;
193 }
194 return (int)data;
195 }
196
197 static int ab8500_get_chip_id(struct device *dev)
198 {
199 struct ab8500 *ab8500;
200
201 if (!dev)
202 return -EINVAL;
203 ab8500 = dev_get_drvdata(dev->parent);
204 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
205 }
206
207 static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
208 u8 reg, u8 data)
209 {
210 int ret;
211 /*
212 * Put the u8 bank and u8 register together into a an u16.
213 * The bank on higher 8 bits and register in lower 8 bits.
214 */
215 u16 addr = ((u16)bank) << 8 | reg;
216
217 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
218
219 mutex_lock(&ab8500->lock);
220
221 ret = ab8500->write(ab8500, addr, data);
222 if (ret < 0)
223 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
224 addr, ret);
225 mutex_unlock(&ab8500->lock);
226
227 return ret;
228 }
229
230 static int ab8500_set_register(struct device *dev, u8 bank,
231 u8 reg, u8 value)
232 {
233 int ret;
234 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
235
236 atomic_inc(&ab8500->transfer_ongoing);
237 ret = set_register_interruptible(ab8500, bank, reg, value);
238 atomic_dec(&ab8500->transfer_ongoing);
239 return ret;
240 }
241
242 static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
243 u8 reg, u8 *value)
244 {
245 int ret;
246 u16 addr = ((u16)bank) << 8 | reg;
247
248 mutex_lock(&ab8500->lock);
249
250 ret = ab8500->read(ab8500, addr);
251 if (ret < 0)
252 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
253 addr, ret);
254 else
255 *value = ret;
256
257 mutex_unlock(&ab8500->lock);
258 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
259
260 return ret;
261 }
262
263 static int ab8500_get_register(struct device *dev, u8 bank,
264 u8 reg, u8 *value)
265 {
266 int ret;
267 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
268
269 atomic_inc(&ab8500->transfer_ongoing);
270 ret = get_register_interruptible(ab8500, bank, reg, value);
271 atomic_dec(&ab8500->transfer_ongoing);
272 return ret;
273 }
274
275 static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
276 u8 reg, u8 bitmask, u8 bitvalues)
277 {
278 int ret;
279 u16 addr = ((u16)bank) << 8 | reg;
280
281 mutex_lock(&ab8500->lock);
282
283 if (ab8500->write_masked == NULL) {
284 u8 data;
285
286 ret = ab8500->read(ab8500, addr);
287 if (ret < 0) {
288 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
289 addr, ret);
290 goto out;
291 }
292
293 data = (u8)ret;
294 data = (~bitmask & data) | (bitmask & bitvalues);
295
296 ret = ab8500->write(ab8500, addr, data);
297 if (ret < 0)
298 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
299 addr, ret);
300
301 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
302 data);
303 goto out;
304 }
305 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
306 if (ret < 0)
307 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
308 ret);
309 out:
310 mutex_unlock(&ab8500->lock);
311 return ret;
312 }
313
314 static int ab8500_mask_and_set_register(struct device *dev,
315 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
316 {
317 int ret;
318 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
319
320 atomic_inc(&ab8500->transfer_ongoing);
321 ret = mask_and_set_register_interruptible(ab8500, bank, reg,
322 bitmask, bitvalues);
323 atomic_dec(&ab8500->transfer_ongoing);
324 return ret;
325 }
326
327 static struct abx500_ops ab8500_ops = {
328 .get_chip_id = ab8500_get_chip_id,
329 .get_register = ab8500_get_register,
330 .set_register = ab8500_set_register,
331 .get_register_page = NULL,
332 .set_register_page = NULL,
333 .mask_and_set_register = ab8500_mask_and_set_register,
334 .event_registers_startup_state_get = NULL,
335 .startup_irq_enabled = NULL,
336 .dump_all_banks = ab8500_dump_all_banks,
337 };
338
339 static void ab8500_irq_lock(struct irq_data *data)
340 {
341 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
342
343 mutex_lock(&ab8500->irq_lock);
344 atomic_inc(&ab8500->transfer_ongoing);
345 }
346
347 static void ab8500_irq_sync_unlock(struct irq_data *data)
348 {
349 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
350 int i;
351
352 for (i = 0; i < ab8500->mask_size; i++) {
353 u8 old = ab8500->oldmask[i];
354 u8 new = ab8500->mask[i];
355 int reg;
356
357 if (new == old)
358 continue;
359
360 /*
361 * Interrupt register 12 doesn't exist prior to AB8500 version
362 * 2.0
363 */
364 if (ab8500->irq_reg_offset[i] == 11 &&
365 is_ab8500_1p1_or_earlier(ab8500))
366 continue;
367
368 if (ab8500->irq_reg_offset[i] < 0)
369 continue;
370
371 ab8500->oldmask[i] = new;
372
373 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
374 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
375 }
376 atomic_dec(&ab8500->transfer_ongoing);
377 mutex_unlock(&ab8500->irq_lock);
378 }
379
380 static void ab8500_irq_mask(struct irq_data *data)
381 {
382 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
383 int offset = data->hwirq;
384 int index = offset / 8;
385 int mask = 1 << (offset % 8);
386
387 ab8500->mask[index] |= mask;
388
389 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
390 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
391 ab8500->mask[index + 2] |= mask;
392 if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
393 ab8500->mask[index + 1] |= mask;
394 if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
395 /* Here the falling IRQ is one bit lower */
396 ab8500->mask[index] |= (mask << 1);
397 }
398
399 static void ab8500_irq_unmask(struct irq_data *data)
400 {
401 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
402 unsigned int type = irqd_get_trigger_type(data);
403 int offset = data->hwirq;
404 int index = offset / 8;
405 int mask = 1 << (offset % 8);
406
407 if (type & IRQ_TYPE_EDGE_RISING)
408 ab8500->mask[index] &= ~mask;
409
410 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
411 if (type & IRQ_TYPE_EDGE_FALLING) {
412 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
413 ab8500->mask[index + 2] &= ~mask;
414 else if (offset >= AB9540_INT_GPIO50R &&
415 offset <= AB9540_INT_GPIO54R)
416 ab8500->mask[index + 1] &= ~mask;
417 else if (offset == AB8540_INT_GPIO43R ||
418 offset == AB8540_INT_GPIO44R)
419 /* Here the falling IRQ is one bit lower */
420 ab8500->mask[index] &= ~(mask << 1);
421 else
422 ab8500->mask[index] &= ~mask;
423 } else {
424 /* Satisfies the case where type is not set. */
425 ab8500->mask[index] &= ~mask;
426 }
427 }
428
429 static int ab8500_irq_set_type(struct irq_data *data, unsigned int type)
430 {
431 return 0;
432 }
433
434 static struct irq_chip ab8500_irq_chip = {
435 .name = "ab8500",
436 .irq_bus_lock = ab8500_irq_lock,
437 .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
438 .irq_mask = ab8500_irq_mask,
439 .irq_disable = ab8500_irq_mask,
440 .irq_unmask = ab8500_irq_unmask,
441 .irq_set_type = ab8500_irq_set_type,
442 };
443
444 static void update_latch_offset(u8 *offset, int i)
445 {
446 /* Fix inconsistent ITFromLatch25 bit mapping... */
447 if (unlikely(*offset == 17))
448 *offset = 24;
449 /* Fix inconsistent ab8540 bit mapping... */
450 if (unlikely(*offset == 16))
451 *offset = 25;
452 if ((i == 3) && (*offset >= 24))
453 *offset += 2;
454 }
455
456 static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
457 int latch_offset, u8 latch_val)
458 {
459 int int_bit, line, i;
460
461 for (i = 0; i < ab8500->mask_size; i++)
462 if (ab8500->irq_reg_offset[i] == latch_offset)
463 break;
464
465 if (i >= ab8500->mask_size) {
466 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
467 latch_offset);
468 return -ENXIO;
469 }
470
471 /* ignore masked out interrupts */
472 latch_val &= ~ab8500->mask[i];
473
474 while (latch_val) {
475 int_bit = __ffs(latch_val);
476 line = (i << 3) + int_bit;
477 latch_val &= ~(1 << int_bit);
478
479 /*
480 * This handles the falling edge hwirqs from the GPIO
481 * lines. Route them back to the line registered for the
482 * rising IRQ, as this is merely a flag for the same IRQ
483 * in linux terms.
484 */
485 if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F)
486 line -= 16;
487 if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F)
488 line -= 8;
489 if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F)
490 line += 1;
491
492 handle_nested_irq(irq_create_mapping(ab8500->domain, line));
493 }
494
495 return 0;
496 }
497
498 static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
499 int hier_offset, u8 hier_val)
500 {
501 int latch_bit, status;
502 u8 latch_offset, latch_val;
503
504 do {
505 latch_bit = __ffs(hier_val);
506 latch_offset = (hier_offset << 3) + latch_bit;
507
508 update_latch_offset(&latch_offset, hier_offset);
509
510 status = get_register_interruptible(ab8500,
511 AB8500_INTERRUPT,
512 AB8500_IT_LATCH1_REG + latch_offset,
513 &latch_val);
514 if (status < 0 || latch_val == 0)
515 goto discard;
516
517 status = ab8500_handle_hierarchical_line(ab8500,
518 latch_offset, latch_val);
519 if (status < 0)
520 return status;
521 discard:
522 hier_val &= ~(1 << latch_bit);
523 } while (hier_val);
524
525 return 0;
526 }
527
528 static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
529 {
530 struct ab8500 *ab8500 = dev;
531 u8 i;
532
533 dev_vdbg(ab8500->dev, "interrupt\n");
534
535 /* Hierarchical interrupt version */
536 for (i = 0; i < (ab8500->it_latchhier_num); i++) {
537 int status;
538 u8 hier_val;
539
540 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
541 AB8500_IT_LATCHHIER1_REG + i, &hier_val);
542 if (status < 0 || hier_val == 0)
543 continue;
544
545 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
546 if (status < 0)
547 break;
548 }
549 return IRQ_HANDLED;
550 }
551
552 static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
553 irq_hw_number_t hwirq)
554 {
555 struct ab8500 *ab8500 = d->host_data;
556
557 if (!ab8500)
558 return -EINVAL;
559
560 irq_set_chip_data(virq, ab8500);
561 irq_set_chip_and_handler(virq, &ab8500_irq_chip,
562 handle_simple_irq);
563 irq_set_nested_thread(virq, 1);
564 irq_set_noprobe(virq);
565
566 return 0;
567 }
568
569 static const struct irq_domain_ops ab8500_irq_ops = {
570 .map = ab8500_irq_map,
571 .xlate = irq_domain_xlate_twocell,
572 };
573
574 static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
575 {
576 int num_irqs;
577
578 if (is_ab8540(ab8500))
579 num_irqs = AB8540_NR_IRQS;
580 else if (is_ab9540(ab8500))
581 num_irqs = AB9540_NR_IRQS;
582 else if (is_ab8505(ab8500))
583 num_irqs = AB8505_NR_IRQS;
584 else
585 num_irqs = AB8500_NR_IRQS;
586
587 /* If ->irq_base is zero this will give a linear mapping */
588 ab8500->domain = irq_domain_add_simple(ab8500->dev->of_node,
589 num_irqs, 0,
590 &ab8500_irq_ops, ab8500);
591
592 if (!ab8500->domain) {
593 dev_err(ab8500->dev, "Failed to create irqdomain\n");
594 return -ENODEV;
595 }
596
597 return 0;
598 }
599
600 int ab8500_suspend(struct ab8500 *ab8500)
601 {
602 if (atomic_read(&ab8500->transfer_ongoing))
603 return -EINVAL;
604
605 return 0;
606 }
607
608 static const struct mfd_cell ab8500_bm_devs[] = {
609 {
610 .name = "ab8500-charger",
611 .of_compatible = "stericsson,ab8500-charger",
612 .platform_data = &ab8500_bm_data,
613 .pdata_size = sizeof(ab8500_bm_data),
614 },
615 {
616 .name = "ab8500-btemp",
617 .of_compatible = "stericsson,ab8500-btemp",
618 .platform_data = &ab8500_bm_data,
619 .pdata_size = sizeof(ab8500_bm_data),
620 },
621 {
622 .name = "ab8500-fg",
623 .of_compatible = "stericsson,ab8500-fg",
624 .platform_data = &ab8500_bm_data,
625 .pdata_size = sizeof(ab8500_bm_data),
626 },
627 {
628 .name = "ab8500-chargalg",
629 .of_compatible = "stericsson,ab8500-chargalg",
630 .platform_data = &ab8500_bm_data,
631 .pdata_size = sizeof(ab8500_bm_data),
632 },
633 };
634
635 static const struct mfd_cell ab8500_devs[] = {
636 #ifdef CONFIG_DEBUG_FS
637 {
638 .name = "ab8500-debug",
639 .of_compatible = "stericsson,ab8500-debug",
640 },
641 #endif
642 {
643 .name = "ab8500-sysctrl",
644 .of_compatible = "stericsson,ab8500-sysctrl",
645 },
646 {
647 .name = "ab8500-ext-regulator",
648 .of_compatible = "stericsson,ab8500-ext-regulator",
649 },
650 {
651 .name = "ab8500-regulator",
652 .of_compatible = "stericsson,ab8500-regulator",
653 },
654 {
655 .name = "abx500-clk",
656 .of_compatible = "stericsson,abx500-clk",
657 },
658 {
659 .name = "ab8500-gpadc",
660 .of_compatible = "stericsson,ab8500-gpadc",
661 },
662 {
663 .name = "ab8500-rtc",
664 .of_compatible = "stericsson,ab8500-rtc",
665 },
666 {
667 .name = "ab8500-acc-det",
668 .of_compatible = "stericsson,ab8500-acc-det",
669 },
670 {
671
672 .name = "ab8500-poweron-key",
673 .of_compatible = "stericsson,ab8500-poweron-key",
674 },
675 {
676 .name = "ab8500-pwm",
677 .of_compatible = "stericsson,ab8500-pwm",
678 .id = 1,
679 },
680 {
681 .name = "ab8500-pwm",
682 .of_compatible = "stericsson,ab8500-pwm",
683 .id = 2,
684 },
685 {
686 .name = "ab8500-pwm",
687 .of_compatible = "stericsson,ab8500-pwm",
688 .id = 3,
689 },
690 {
691 .name = "ab8500-denc",
692 .of_compatible = "stericsson,ab8500-denc",
693 },
694 {
695 .name = "pinctrl-ab8500",
696 .of_compatible = "stericsson,ab8500-gpio",
697 },
698 {
699 .name = "abx500-temp",
700 .of_compatible = "stericsson,abx500-temp",
701 },
702 {
703 .name = "ab8500-usb",
704 .of_compatible = "stericsson,ab8500-usb",
705 },
706 {
707 .name = "ab8500-codec",
708 .of_compatible = "stericsson,ab8500-codec",
709 },
710 };
711
712 static const struct mfd_cell ab9540_devs[] = {
713 #ifdef CONFIG_DEBUG_FS
714 {
715 .name = "ab8500-debug",
716 },
717 #endif
718 {
719 .name = "ab8500-sysctrl",
720 },
721 {
722 .name = "ab8500-ext-regulator",
723 },
724 {
725 .name = "ab8500-regulator",
726 },
727 {
728 .name = "abx500-clk",
729 .of_compatible = "stericsson,abx500-clk",
730 },
731 {
732 .name = "ab8500-gpadc",
733 .of_compatible = "stericsson,ab8500-gpadc",
734 },
735 {
736 .name = "ab8500-rtc",
737 },
738 {
739 .name = "ab8500-acc-det",
740 },
741 {
742 .name = "ab8500-poweron-key",
743 },
744 {
745 .name = "ab8500-pwm",
746 .id = 1,
747 },
748 {
749 .name = "abx500-temp",
750 },
751 {
752 .name = "pinctrl-ab9540",
753 .of_compatible = "stericsson,ab9540-gpio",
754 },
755 {
756 .name = "ab9540-usb",
757 },
758 {
759 .name = "ab9540-codec",
760 },
761 {
762 .name = "ab-iddet",
763 },
764 };
765
766 /* Device list for ab8505 */
767 static const struct mfd_cell ab8505_devs[] = {
768 #ifdef CONFIG_DEBUG_FS
769 {
770 .name = "ab8500-debug",
771 },
772 #endif
773 {
774 .name = "ab8500-sysctrl",
775 },
776 {
777 .name = "ab8500-regulator",
778 },
779 {
780 .name = "abx500-clk",
781 .of_compatible = "stericsson,abx500-clk",
782 },
783 {
784 .name = "ab8500-gpadc",
785 .of_compatible = "stericsson,ab8500-gpadc",
786 },
787 {
788 .name = "ab8500-rtc",
789 },
790 {
791 .name = "ab8500-acc-det",
792 },
793 {
794 .name = "ab8500-poweron-key",
795 },
796 {
797 .name = "ab8500-pwm",
798 .id = 1,
799 },
800 {
801 .name = "pinctrl-ab8505",
802 },
803 {
804 .name = "ab8500-usb",
805 },
806 {
807 .name = "ab8500-codec",
808 },
809 {
810 .name = "ab-iddet",
811 },
812 };
813
814 static const struct mfd_cell ab8540_devs[] = {
815 #ifdef CONFIG_DEBUG_FS
816 {
817 .name = "ab8500-debug",
818 },
819 #endif
820 {
821 .name = "ab8500-sysctrl",
822 },
823 {
824 .name = "ab8500-ext-regulator",
825 },
826 {
827 .name = "ab8500-regulator",
828 },
829 {
830 .name = "abx500-clk",
831 .of_compatible = "stericsson,abx500-clk",
832 },
833 {
834 .name = "ab8500-gpadc",
835 .of_compatible = "stericsson,ab8500-gpadc",
836 },
837 {
838 .name = "ab8500-acc-det",
839 },
840 {
841 .name = "ab8500-poweron-key",
842 },
843 {
844 .name = "ab8500-pwm",
845 .id = 1,
846 },
847 {
848 .name = "abx500-temp",
849 },
850 {
851 .name = "pinctrl-ab8540",
852 },
853 {
854 .name = "ab8540-usb",
855 },
856 {
857 .name = "ab8540-codec",
858 },
859 {
860 .name = "ab-iddet",
861 },
862 };
863
864 static const struct mfd_cell ab8540_cut1_devs[] = {
865 {
866 .name = "ab8500-rtc",
867 .of_compatible = "stericsson,ab8500-rtc",
868 },
869 };
870
871 static const struct mfd_cell ab8540_cut2_devs[] = {
872 {
873 .name = "ab8540-rtc",
874 .of_compatible = "stericsson,ab8540-rtc",
875 },
876 };
877
878 static ssize_t show_chip_id(struct device *dev,
879 struct device_attribute *attr, char *buf)
880 {
881 struct ab8500 *ab8500;
882
883 ab8500 = dev_get_drvdata(dev);
884
885 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
886 }
887
888 /*
889 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
890 * 0x01 Swoff bit programming
891 * 0x02 Thermal protection activation
892 * 0x04 Vbat lower then BattOk falling threshold
893 * 0x08 Watchdog expired
894 * 0x10 Non presence of 32kHz clock
895 * 0x20 Battery level lower than power on reset threshold
896 * 0x40 Power on key 1 pressed longer than 10 seconds
897 * 0x80 DB8500 thermal shutdown
898 */
899 static ssize_t show_switch_off_status(struct device *dev,
900 struct device_attribute *attr, char *buf)
901 {
902 int ret;
903 u8 value;
904 struct ab8500 *ab8500;
905
906 ab8500 = dev_get_drvdata(dev);
907 ret = get_register_interruptible(ab8500, AB8500_RTC,
908 AB8500_SWITCH_OFF_STATUS, &value);
909 if (ret < 0)
910 return ret;
911 return sprintf(buf, "%#x\n", value);
912 }
913
914 /* use mask and set to override the register turn_on_stat value */
915 void ab8500_override_turn_on_stat(u8 mask, u8 set)
916 {
917 spin_lock(&on_stat_lock);
918 turn_on_stat_mask = mask;
919 turn_on_stat_set = set;
920 spin_unlock(&on_stat_lock);
921 }
922
923 /*
924 * ab8500 has turned on due to (TURN_ON_STATUS):
925 * 0x01 PORnVbat
926 * 0x02 PonKey1dbF
927 * 0x04 PonKey2dbF
928 * 0x08 RTCAlarm
929 * 0x10 MainChDet
930 * 0x20 VbusDet
931 * 0x40 UsbIDDetect
932 * 0x80 Reserved
933 */
934 static ssize_t show_turn_on_status(struct device *dev,
935 struct device_attribute *attr, char *buf)
936 {
937 int ret;
938 u8 value;
939 struct ab8500 *ab8500;
940
941 ab8500 = dev_get_drvdata(dev);
942 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
943 AB8500_TURN_ON_STATUS, &value);
944 if (ret < 0)
945 return ret;
946
947 /*
948 * In L9540, turn_on_status register is not updated correctly if
949 * the device is rebooted with AC/USB charger connected. Due to
950 * this, the device boots android instead of entering into charge
951 * only mode. Read the AC/USB status register to detect the charger
952 * presence and update the turn on status manually.
953 */
954 if (is_ab9540(ab8500)) {
955 spin_lock(&on_stat_lock);
956 value = (value & turn_on_stat_mask) | turn_on_stat_set;
957 spin_unlock(&on_stat_lock);
958 }
959
960 return sprintf(buf, "%#x\n", value);
961 }
962
963 static ssize_t show_turn_on_status_2(struct device *dev,
964 struct device_attribute *attr, char *buf)
965 {
966 int ret;
967 u8 value;
968 struct ab8500 *ab8500;
969
970 ab8500 = dev_get_drvdata(dev);
971 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
972 AB8505_TURN_ON_STATUS_2, &value);
973 if (ret < 0)
974 return ret;
975 return sprintf(buf, "%#x\n", (value & 0x1));
976 }
977
978 static ssize_t show_ab9540_dbbrstn(struct device *dev,
979 struct device_attribute *attr, char *buf)
980 {
981 struct ab8500 *ab8500;
982 int ret;
983 u8 value;
984
985 ab8500 = dev_get_drvdata(dev);
986
987 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
988 AB9540_MODEM_CTRL2_REG, &value);
989 if (ret < 0)
990 return ret;
991
992 return sprintf(buf, "%d\n",
993 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
994 }
995
996 static ssize_t store_ab9540_dbbrstn(struct device *dev,
997 struct device_attribute *attr, const char *buf, size_t count)
998 {
999 struct ab8500 *ab8500;
1000 int ret = count;
1001 int err;
1002 u8 bitvalues;
1003
1004 ab8500 = dev_get_drvdata(dev);
1005
1006 if (count > 0) {
1007 switch (buf[0]) {
1008 case '0':
1009 bitvalues = 0;
1010 break;
1011 case '1':
1012 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
1013 break;
1014 default:
1015 goto exit;
1016 }
1017
1018 err = mask_and_set_register_interruptible(ab8500,
1019 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
1020 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
1021 if (err)
1022 dev_info(ab8500->dev,
1023 "Failed to set DBBRSTN %c, err %#x\n",
1024 buf[0], err);
1025 }
1026
1027 exit:
1028 return ret;
1029 }
1030
1031 static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
1032 static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
1033 static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL);
1034 static DEVICE_ATTR(turn_on_status_2, S_IRUGO, show_turn_on_status_2, NULL);
1035 static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR,
1036 show_ab9540_dbbrstn, store_ab9540_dbbrstn);
1037
1038 static struct attribute *ab8500_sysfs_entries[] = {
1039 &dev_attr_chip_id.attr,
1040 &dev_attr_switch_off_status.attr,
1041 &dev_attr_turn_on_status.attr,
1042 NULL,
1043 };
1044
1045 static struct attribute *ab8505_sysfs_entries[] = {
1046 &dev_attr_turn_on_status_2.attr,
1047 NULL,
1048 };
1049
1050 static struct attribute *ab9540_sysfs_entries[] = {
1051 &dev_attr_chip_id.attr,
1052 &dev_attr_switch_off_status.attr,
1053 &dev_attr_turn_on_status.attr,
1054 &dev_attr_dbbrstn.attr,
1055 NULL,
1056 };
1057
1058 static struct attribute_group ab8500_attr_group = {
1059 .attrs = ab8500_sysfs_entries,
1060 };
1061
1062 static struct attribute_group ab8505_attr_group = {
1063 .attrs = ab8505_sysfs_entries,
1064 };
1065
1066 static struct attribute_group ab9540_attr_group = {
1067 .attrs = ab9540_sysfs_entries,
1068 };
1069
1070 static int ab8500_probe(struct platform_device *pdev)
1071 {
1072 static const char * const switch_off_status[] = {
1073 "Swoff bit programming",
1074 "Thermal protection activation",
1075 "Vbat lower then BattOk falling threshold",
1076 "Watchdog expired",
1077 "Non presence of 32kHz clock",
1078 "Battery level lower than power on reset threshold",
1079 "Power on key 1 pressed longer than 10 seconds",
1080 "DB8500 thermal shutdown"};
1081 static const char * const turn_on_status[] = {
1082 "Battery rising (Vbat)",
1083 "Power On Key 1 dbF",
1084 "Power On Key 2 dbF",
1085 "RTC Alarm",
1086 "Main Charger Detect",
1087 "Vbus Detect (USB)",
1088 "USB ID Detect",
1089 "UART Factory Mode Detect"};
1090 const struct platform_device_id *platid = platform_get_device_id(pdev);
1091 enum ab8500_version version = AB8500_VERSION_UNDEFINED;
1092 struct device_node *np = pdev->dev.of_node;
1093 struct ab8500 *ab8500;
1094 struct resource *resource;
1095 int ret;
1096 int i;
1097 u8 value;
1098
1099 ab8500 = devm_kzalloc(&pdev->dev, sizeof(*ab8500), GFP_KERNEL);
1100 if (!ab8500)
1101 return -ENOMEM;
1102
1103 ab8500->dev = &pdev->dev;
1104
1105 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1106 if (!resource) {
1107 dev_err(&pdev->dev, "no IRQ resource\n");
1108 return -ENODEV;
1109 }
1110
1111 ab8500->irq = resource->start;
1112
1113 ab8500->read = ab8500_prcmu_read;
1114 ab8500->write = ab8500_prcmu_write;
1115 ab8500->write_masked = ab8500_prcmu_write_masked;
1116
1117 mutex_init(&ab8500->lock);
1118 mutex_init(&ab8500->irq_lock);
1119 atomic_set(&ab8500->transfer_ongoing, 0);
1120
1121 platform_set_drvdata(pdev, ab8500);
1122
1123 if (platid)
1124 version = platid->driver_data;
1125
1126 if (version != AB8500_VERSION_UNDEFINED)
1127 ab8500->version = version;
1128 else {
1129 ret = get_register_interruptible(ab8500, AB8500_MISC,
1130 AB8500_IC_NAME_REG, &value);
1131 if (ret < 0) {
1132 dev_err(&pdev->dev, "could not probe HW\n");
1133 return ret;
1134 }
1135
1136 ab8500->version = value;
1137 }
1138
1139 ret = get_register_interruptible(ab8500, AB8500_MISC,
1140 AB8500_REV_REG, &value);
1141 if (ret < 0)
1142 return ret;
1143
1144 ab8500->chip_id = value;
1145
1146 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
1147 ab8500_version_str[ab8500->version],
1148 ab8500->chip_id >> 4,
1149 ab8500->chip_id & 0x0F);
1150
1151 /* Configure AB8540 */
1152 if (is_ab8540(ab8500)) {
1153 ab8500->mask_size = AB8540_NUM_IRQ_REGS;
1154 ab8500->irq_reg_offset = ab8540_irq_regoffset;
1155 ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM;
1156 } /* Configure AB8500 or AB9540 IRQ */
1157 else if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
1158 ab8500->mask_size = AB9540_NUM_IRQ_REGS;
1159 ab8500->irq_reg_offset = ab9540_irq_regoffset;
1160 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
1161 } else {
1162 ab8500->mask_size = AB8500_NUM_IRQ_REGS;
1163 ab8500->irq_reg_offset = ab8500_irq_regoffset;
1164 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
1165 }
1166 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size,
1167 GFP_KERNEL);
1168 if (!ab8500->mask)
1169 return -ENOMEM;
1170 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size,
1171 GFP_KERNEL);
1172 if (!ab8500->oldmask)
1173 return -ENOMEM;
1174
1175 /*
1176 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1177 * 0x01 Swoff bit programming
1178 * 0x02 Thermal protection activation
1179 * 0x04 Vbat lower then BattOk falling threshold
1180 * 0x08 Watchdog expired
1181 * 0x10 Non presence of 32kHz clock
1182 * 0x20 Battery level lower than power on reset threshold
1183 * 0x40 Power on key 1 pressed longer than 10 seconds
1184 * 0x80 DB8500 thermal shutdown
1185 */
1186
1187 ret = get_register_interruptible(ab8500, AB8500_RTC,
1188 AB8500_SWITCH_OFF_STATUS, &value);
1189 if (ret < 0)
1190 return ret;
1191 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value);
1192
1193 if (value) {
1194 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) {
1195 if (value & 1)
1196 pr_cont(" \"%s\"", switch_off_status[i]);
1197 value = value >> 1;
1198
1199 }
1200 pr_cont("\n");
1201 } else {
1202 pr_cont(" None\n");
1203 }
1204 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1205 AB8500_TURN_ON_STATUS, &value);
1206 if (ret < 0)
1207 return ret;
1208 dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value);
1209
1210 if (value) {
1211 for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) {
1212 if (value & 1)
1213 pr_cont("\"%s\" ", turn_on_status[i]);
1214 value = value >> 1;
1215 }
1216 pr_cont("\n");
1217 } else {
1218 pr_cont("None\n");
1219 }
1220
1221 if (is_ab9540(ab8500)) {
1222 ret = get_register_interruptible(ab8500, AB8500_CHARGER,
1223 AB8500_CH_USBCH_STAT1_REG, &value);
1224 if (ret < 0)
1225 return ret;
1226 if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100))
1227 ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON,
1228 AB8500_VBUS_DET);
1229 }
1230
1231 /* Clear and mask all interrupts */
1232 for (i = 0; i < ab8500->mask_size; i++) {
1233 /*
1234 * Interrupt register 12 doesn't exist prior to AB8500 version
1235 * 2.0
1236 */
1237 if (ab8500->irq_reg_offset[i] == 11 &&
1238 is_ab8500_1p1_or_earlier(ab8500))
1239 continue;
1240
1241 if (ab8500->irq_reg_offset[i] < 0)
1242 continue;
1243
1244 get_register_interruptible(ab8500, AB8500_INTERRUPT,
1245 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
1246 &value);
1247 set_register_interruptible(ab8500, AB8500_INTERRUPT,
1248 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
1249 }
1250
1251 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
1252 if (ret)
1253 return ret;
1254
1255 for (i = 0; i < ab8500->mask_size; i++)
1256 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
1257
1258 ret = ab8500_irq_init(ab8500, np);
1259 if (ret)
1260 return ret;
1261
1262 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1263 ab8500_hierarchical_irq,
1264 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1265 "ab8500", ab8500);
1266 if (ret)
1267 return ret;
1268
1269 if (is_ab9540(ab8500))
1270 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1271 ARRAY_SIZE(ab9540_devs), NULL,
1272 0, ab8500->domain);
1273 else if (is_ab8540(ab8500)) {
1274 ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs,
1275 ARRAY_SIZE(ab8540_devs), NULL,
1276 0, ab8500->domain);
1277 if (ret)
1278 return ret;
1279
1280 if (is_ab8540_1p2_or_earlier(ab8500))
1281 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut1_devs,
1282 ARRAY_SIZE(ab8540_cut1_devs), NULL,
1283 0, ab8500->domain);
1284 else /* ab8540 >= cut2 */
1285 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut2_devs,
1286 ARRAY_SIZE(ab8540_cut2_devs), NULL,
1287 0, ab8500->domain);
1288 } else if (is_ab8505(ab8500))
1289 ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs,
1290 ARRAY_SIZE(ab8505_devs), NULL,
1291 0, ab8500->domain);
1292 else
1293 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
1294 ARRAY_SIZE(ab8500_devs), NULL,
1295 0, ab8500->domain);
1296 if (ret)
1297 return ret;
1298
1299 if (!no_bm) {
1300 /* Add battery management devices */
1301 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1302 ARRAY_SIZE(ab8500_bm_devs), NULL,
1303 0, ab8500->domain);
1304 if (ret)
1305 dev_err(ab8500->dev, "error adding bm devices\n");
1306 }
1307
1308 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1309 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
1310 ret = sysfs_create_group(&ab8500->dev->kobj,
1311 &ab9540_attr_group);
1312 else
1313 ret = sysfs_create_group(&ab8500->dev->kobj,
1314 &ab8500_attr_group);
1315
1316 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1317 ab8500->chip_id >= AB8500_CUT2P0)
1318 ret = sysfs_create_group(&ab8500->dev->kobj,
1319 &ab8505_attr_group);
1320
1321 if (ret)
1322 dev_err(ab8500->dev, "error creating sysfs entries\n");
1323
1324 return ret;
1325 }
1326
1327 static int ab8500_remove(struct platform_device *pdev)
1328 {
1329 struct ab8500 *ab8500 = platform_get_drvdata(pdev);
1330
1331 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1332 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
1333 sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group);
1334 else
1335 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
1336
1337 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1338 ab8500->chip_id >= AB8500_CUT2P0)
1339 sysfs_remove_group(&ab8500->dev->kobj, &ab8505_attr_group);
1340
1341 mfd_remove_devices(ab8500->dev);
1342
1343 return 0;
1344 }
1345
1346 static const struct platform_device_id ab8500_id[] = {
1347 { "ab8500-core", AB8500_VERSION_AB8500 },
1348 { "ab8505-i2c", AB8500_VERSION_AB8505 },
1349 { "ab9540-i2c", AB8500_VERSION_AB9540 },
1350 { "ab8540-i2c", AB8500_VERSION_AB8540 },
1351 { }
1352 };
1353
1354 static struct platform_driver ab8500_core_driver = {
1355 .driver = {
1356 .name = "ab8500-core",
1357 },
1358 .probe = ab8500_probe,
1359 .remove = ab8500_remove,
1360 .id_table = ab8500_id,
1361 };
1362
1363 static int __init ab8500_core_init(void)
1364 {
1365 return platform_driver_register(&ab8500_core_driver);
1366 }
1367
1368 static void __exit ab8500_core_exit(void)
1369 {
1370 platform_driver_unregister(&ab8500_core_driver);
1371 }
1372 core_initcall(ab8500_core_init);
1373 module_exit(ab8500_core_exit);
1374
1375 MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
1376 MODULE_DESCRIPTION("AB8500 MFD core");
1377 MODULE_LICENSE("GPL v2");