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[mirror_ubuntu-focal-kernel.git] / drivers / mfd / arizona-core.c
1 /*
2 * Arizona core driver
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
21 #include <linux/of_gpio.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regmap.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/slab.h>
27
28 #include <linux/mfd/arizona/core.h>
29 #include <linux/mfd/arizona/registers.h>
30
31 #include "arizona.h"
32
33 static const char *wm5102_core_supplies[] = {
34 "AVDD",
35 "DBVDD1",
36 };
37
38 int arizona_clk32k_enable(struct arizona *arizona)
39 {
40 int ret = 0;
41
42 mutex_lock(&arizona->clk_lock);
43
44 arizona->clk32k_ref++;
45
46 if (arizona->clk32k_ref == 1) {
47 switch (arizona->pdata.clk32k_src) {
48 case ARIZONA_32KZ_MCLK1:
49 ret = pm_runtime_get_sync(arizona->dev);
50 if (ret != 0)
51 goto out;
52 break;
53 }
54
55 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
56 ARIZONA_CLK_32K_ENA,
57 ARIZONA_CLK_32K_ENA);
58 }
59
60 out:
61 if (ret != 0)
62 arizona->clk32k_ref--;
63
64 mutex_unlock(&arizona->clk_lock);
65
66 return ret;
67 }
68 EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
69
70 int arizona_clk32k_disable(struct arizona *arizona)
71 {
72 int ret = 0;
73
74 mutex_lock(&arizona->clk_lock);
75
76 BUG_ON(arizona->clk32k_ref <= 0);
77
78 arizona->clk32k_ref--;
79
80 if (arizona->clk32k_ref == 0) {
81 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
82 ARIZONA_CLK_32K_ENA, 0);
83
84 switch (arizona->pdata.clk32k_src) {
85 case ARIZONA_32KZ_MCLK1:
86 pm_runtime_put_sync(arizona->dev);
87 break;
88 }
89 }
90
91 mutex_unlock(&arizona->clk_lock);
92
93 return ret;
94 }
95 EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
96
97 static irqreturn_t arizona_clkgen_err(int irq, void *data)
98 {
99 struct arizona *arizona = data;
100
101 dev_err(arizona->dev, "CLKGEN error\n");
102
103 return IRQ_HANDLED;
104 }
105
106 static irqreturn_t arizona_underclocked(int irq, void *data)
107 {
108 struct arizona *arizona = data;
109 unsigned int val;
110 int ret;
111
112 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
113 &val);
114 if (ret != 0) {
115 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
116 ret);
117 return IRQ_NONE;
118 }
119
120 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
121 dev_err(arizona->dev, "AIF3 underclocked\n");
122 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
123 dev_err(arizona->dev, "AIF2 underclocked\n");
124 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
125 dev_err(arizona->dev, "AIF1 underclocked\n");
126 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
127 dev_err(arizona->dev, "ISRC3 underclocked\n");
128 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
129 dev_err(arizona->dev, "ISRC2 underclocked\n");
130 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
131 dev_err(arizona->dev, "ISRC1 underclocked\n");
132 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
133 dev_err(arizona->dev, "FX underclocked\n");
134 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "ASRC underclocked\n");
136 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
137 dev_err(arizona->dev, "DAC underclocked\n");
138 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
139 dev_err(arizona->dev, "ADC underclocked\n");
140 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
141 dev_err(arizona->dev, "Mixer dropped sample\n");
142
143 return IRQ_HANDLED;
144 }
145
146 static irqreturn_t arizona_overclocked(int irq, void *data)
147 {
148 struct arizona *arizona = data;
149 unsigned int val[2];
150 int ret;
151
152 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
153 &val[0], 2);
154 if (ret != 0) {
155 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
156 ret);
157 return IRQ_NONE;
158 }
159
160 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
161 dev_err(arizona->dev, "PWM overclocked\n");
162 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
163 dev_err(arizona->dev, "FX core overclocked\n");
164 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
165 dev_err(arizona->dev, "DAC SYS overclocked\n");
166 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
167 dev_err(arizona->dev, "DAC WARP overclocked\n");
168 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
169 dev_err(arizona->dev, "ADC overclocked\n");
170 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
171 dev_err(arizona->dev, "Mixer overclocked\n");
172 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
173 dev_err(arizona->dev, "AIF3 overclocked\n");
174 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
175 dev_err(arizona->dev, "AIF2 overclocked\n");
176 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
177 dev_err(arizona->dev, "AIF1 overclocked\n");
178 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
179 dev_err(arizona->dev, "Pad control overclocked\n");
180
181 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
182 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
183 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
184 dev_err(arizona->dev, "Slimbus async overclocked\n");
185 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
186 dev_err(arizona->dev, "Slimbus sync overclocked\n");
187 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
188 dev_err(arizona->dev, "ASRC async system overclocked\n");
189 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
190 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
191 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
192 dev_err(arizona->dev, "ASRC sync system overclocked\n");
193 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
194 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
195 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
196 dev_err(arizona->dev, "DSP1 overclocked\n");
197 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
198 dev_err(arizona->dev, "ISRC3 overclocked\n");
199 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
200 dev_err(arizona->dev, "ISRC2 overclocked\n");
201 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
202 dev_err(arizona->dev, "ISRC1 overclocked\n");
203
204 return IRQ_HANDLED;
205 }
206
207 static int arizona_poll_reg(struct arizona *arizona,
208 int timeout, unsigned int reg,
209 unsigned int mask, unsigned int target)
210 {
211 unsigned int val = 0;
212 int ret, i;
213
214 for (i = 0; i < timeout; i++) {
215 ret = regmap_read(arizona->regmap, reg, &val);
216 if (ret != 0) {
217 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
218 reg, ret);
219 continue;
220 }
221
222 if ((val & mask) == target)
223 return 0;
224
225 msleep(1);
226 }
227
228 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
229 return -ETIMEDOUT;
230 }
231
232 static int arizona_wait_for_boot(struct arizona *arizona)
233 {
234 int ret;
235
236 /*
237 * We can't use an interrupt as we need to runtime resume to do so,
238 * we won't race with the interrupt handler as it'll be blocked on
239 * runtime resume.
240 */
241 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
242 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
243
244 if (!ret)
245 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
246 ARIZONA_BOOT_DONE_STS);
247
248 pm_runtime_mark_last_busy(arizona->dev);
249
250 return ret;
251 }
252
253 static inline void arizona_enable_reset(struct arizona *arizona)
254 {
255 if (arizona->pdata.reset)
256 gpio_set_value_cansleep(arizona->pdata.reset, 0);
257 }
258
259 static void arizona_disable_reset(struct arizona *arizona)
260 {
261 if (arizona->pdata.reset) {
262 gpio_set_value_cansleep(arizona->pdata.reset, 1);
263 msleep(1);
264 }
265 }
266
267 static int arizona_apply_hardware_patch(struct arizona* arizona)
268 {
269 unsigned int fll, sysclk;
270 int ret, err;
271
272 /* Cache existing FLL and SYSCLK settings */
273 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll);
274 if (ret != 0) {
275 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
276 ret);
277 return ret;
278 }
279 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk);
280 if (ret != 0) {
281 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
282 ret);
283 return ret;
284 }
285
286 /* Start up SYSCLK using the FLL in free running mode */
287 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
288 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
289 if (ret != 0) {
290 dev_err(arizona->dev,
291 "Failed to start FLL in freerunning mode: %d\n",
292 ret);
293 return ret;
294 }
295 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
296 ARIZONA_FLL1_CLOCK_OK_STS,
297 ARIZONA_FLL1_CLOCK_OK_STS);
298 if (ret != 0) {
299 ret = -ETIMEDOUT;
300 goto err_fll;
301 }
302
303 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
304 if (ret != 0) {
305 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
306 goto err_fll;
307 }
308
309 /* Start the write sequencer and wait for it to finish */
310 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
311 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
312 if (ret != 0) {
313 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
314 ret);
315 goto err_sysclk;
316 }
317 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
318 ARIZONA_WSEQ_BUSY, 0);
319 if (ret != 0) {
320 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
321 ARIZONA_WSEQ_ABORT);
322 ret = -ETIMEDOUT;
323 }
324
325 err_sysclk:
326 err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk);
327 if (err != 0) {
328 dev_err(arizona->dev,
329 "Failed to re-apply old SYSCLK settings: %d\n",
330 err);
331 }
332
333 err_fll:
334 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll);
335 if (err != 0) {
336 dev_err(arizona->dev,
337 "Failed to re-apply old FLL settings: %d\n",
338 err);
339 }
340
341 if (ret != 0)
342 return ret;
343 else
344 return err;
345 }
346
347 static int wm5102_clear_write_sequencer(struct arizona *arizona)
348 {
349 int ret;
350
351 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3,
352 0x0);
353 if (ret) {
354 dev_err(arizona->dev,
355 "Failed to clear write sequencer state: %d\n", ret);
356 return ret;
357 }
358
359 arizona_enable_reset(arizona);
360 regulator_disable(arizona->dcvdd);
361
362 msleep(20);
363
364 ret = regulator_enable(arizona->dcvdd);
365 if (ret) {
366 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret);
367 return ret;
368 }
369 arizona_disable_reset(arizona);
370
371 return 0;
372 }
373
374 #ifdef CONFIG_PM
375 static int arizona_runtime_resume(struct device *dev)
376 {
377 struct arizona *arizona = dev_get_drvdata(dev);
378 int ret;
379
380 dev_dbg(arizona->dev, "Leaving AoD mode\n");
381
382 ret = regulator_enable(arizona->dcvdd);
383 if (ret != 0) {
384 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
385 return ret;
386 }
387
388 regcache_cache_only(arizona->regmap, false);
389
390 switch (arizona->type) {
391 case WM5102:
392 if (arizona->external_dcvdd) {
393 ret = regmap_update_bits(arizona->regmap,
394 ARIZONA_ISOLATION_CONTROL,
395 ARIZONA_ISOLATE_DCVDD1, 0);
396 if (ret != 0) {
397 dev_err(arizona->dev,
398 "Failed to connect DCVDD: %d\n", ret);
399 goto err;
400 }
401 }
402
403 ret = wm5102_patch(arizona);
404 if (ret != 0) {
405 dev_err(arizona->dev, "Failed to apply patch: %d\n",
406 ret);
407 goto err;
408 }
409
410 ret = arizona_apply_hardware_patch(arizona);
411 if (ret != 0) {
412 dev_err(arizona->dev,
413 "Failed to apply hardware patch: %d\n",
414 ret);
415 goto err;
416 }
417 break;
418 default:
419 ret = arizona_wait_for_boot(arizona);
420 if (ret != 0) {
421 goto err;
422 }
423
424 if (arizona->external_dcvdd) {
425 ret = regmap_update_bits(arizona->regmap,
426 ARIZONA_ISOLATION_CONTROL,
427 ARIZONA_ISOLATE_DCVDD1, 0);
428 if (ret != 0) {
429 dev_err(arizona->dev,
430 "Failed to connect DCVDD: %d\n", ret);
431 goto err;
432 }
433 }
434 break;
435 }
436
437 ret = regcache_sync(arizona->regmap);
438 if (ret != 0) {
439 dev_err(arizona->dev, "Failed to restore register cache\n");
440 goto err;
441 }
442
443 return 0;
444
445 err:
446 regcache_cache_only(arizona->regmap, true);
447 regulator_disable(arizona->dcvdd);
448 return ret;
449 }
450
451 static int arizona_runtime_suspend(struct device *dev)
452 {
453 struct arizona *arizona = dev_get_drvdata(dev);
454 int ret;
455
456 dev_dbg(arizona->dev, "Entering AoD mode\n");
457
458 if (arizona->external_dcvdd) {
459 ret = regmap_update_bits(arizona->regmap,
460 ARIZONA_ISOLATION_CONTROL,
461 ARIZONA_ISOLATE_DCVDD1,
462 ARIZONA_ISOLATE_DCVDD1);
463 if (ret != 0) {
464 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n",
465 ret);
466 return ret;
467 }
468 }
469
470 regcache_cache_only(arizona->regmap, true);
471 regcache_mark_dirty(arizona->regmap);
472 regulator_disable(arizona->dcvdd);
473
474 return 0;
475 }
476 #endif
477
478 #ifdef CONFIG_PM_SLEEP
479 static int arizona_suspend(struct device *dev)
480 {
481 struct arizona *arizona = dev_get_drvdata(dev);
482
483 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
484 disable_irq(arizona->irq);
485
486 return 0;
487 }
488
489 static int arizona_suspend_late(struct device *dev)
490 {
491 struct arizona *arizona = dev_get_drvdata(dev);
492
493 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
494 enable_irq(arizona->irq);
495
496 return 0;
497 }
498
499 static int arizona_resume_noirq(struct device *dev)
500 {
501 struct arizona *arizona = dev_get_drvdata(dev);
502
503 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
504 disable_irq(arizona->irq);
505
506 return 0;
507 }
508
509 static int arizona_resume(struct device *dev)
510 {
511 struct arizona *arizona = dev_get_drvdata(dev);
512
513 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
514 enable_irq(arizona->irq);
515
516 return 0;
517 }
518 #endif
519
520 const struct dev_pm_ops arizona_pm_ops = {
521 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
522 arizona_runtime_resume,
523 NULL)
524 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
525 #ifdef CONFIG_PM_SLEEP
526 .suspend_late = arizona_suspend_late,
527 .resume_noirq = arizona_resume_noirq,
528 #endif
529 };
530 EXPORT_SYMBOL_GPL(arizona_pm_ops);
531
532 #ifdef CONFIG_OF
533 unsigned long arizona_of_get_type(struct device *dev)
534 {
535 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
536
537 if (id)
538 return (unsigned long)id->data;
539 else
540 return 0;
541 }
542 EXPORT_SYMBOL_GPL(arizona_of_get_type);
543
544 int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
545 bool mandatory)
546 {
547 int gpio;
548
549 gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0);
550 if (gpio < 0) {
551 if (mandatory)
552 dev_err(arizona->dev,
553 "Mandatory DT gpio %s missing/malformed: %d\n",
554 prop, gpio);
555
556 gpio = 0;
557 }
558
559 return gpio;
560 }
561 EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio);
562
563 static int arizona_of_get_core_pdata(struct arizona *arizona)
564 {
565 struct arizona_pdata *pdata = &arizona->pdata;
566 struct property *prop;
567 const __be32 *cur;
568 u32 val;
569 int ret, i;
570 int count = 0;
571
572 pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true);
573
574 ret = of_property_read_u32_array(arizona->dev->of_node,
575 "wlf,gpio-defaults",
576 arizona->pdata.gpio_defaults,
577 ARRAY_SIZE(arizona->pdata.gpio_defaults));
578 if (ret >= 0) {
579 /*
580 * All values are literal except out of range values
581 * which are chip default, translate into platform
582 * data which uses 0 as chip default and out of range
583 * as zero.
584 */
585 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
586 if (arizona->pdata.gpio_defaults[i] > 0xffff)
587 arizona->pdata.gpio_defaults[i] = 0;
588 else if (arizona->pdata.gpio_defaults[i] == 0)
589 arizona->pdata.gpio_defaults[i] = 0x10000;
590 }
591 } else {
592 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
593 ret);
594 }
595
596 of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop,
597 cur, val) {
598 if (count == ARRAY_SIZE(arizona->pdata.inmode))
599 break;
600
601 arizona->pdata.inmode[count] = val;
602 count++;
603 }
604
605 count = 0;
606 of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop,
607 cur, val) {
608 if (count == ARRAY_SIZE(arizona->pdata.dmic_ref))
609 break;
610
611 arizona->pdata.dmic_ref[count] = val;
612 count++;
613 }
614
615 return 0;
616 }
617
618 const struct of_device_id arizona_of_match[] = {
619 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
620 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
621 { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
622 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
623 {},
624 };
625 EXPORT_SYMBOL_GPL(arizona_of_match);
626 #else
627 static inline int arizona_of_get_core_pdata(struct arizona *arizona)
628 {
629 return 0;
630 }
631 #endif
632
633 static const struct mfd_cell early_devs[] = {
634 { .name = "arizona-ldo1" },
635 };
636
637 static const char *wm5102_supplies[] = {
638 "MICVDD",
639 "DBVDD2",
640 "DBVDD3",
641 "CPVDD",
642 "SPKVDDL",
643 "SPKVDDR",
644 };
645
646 static const struct mfd_cell wm5102_devs[] = {
647 { .name = "arizona-micsupp" },
648 {
649 .name = "arizona-extcon",
650 .parent_supplies = wm5102_supplies,
651 .num_parent_supplies = 1, /* We only need MICVDD */
652 },
653 { .name = "arizona-gpio" },
654 { .name = "arizona-haptics" },
655 { .name = "arizona-pwm" },
656 {
657 .name = "wm5102-codec",
658 .parent_supplies = wm5102_supplies,
659 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
660 },
661 };
662
663 static const struct mfd_cell wm5110_devs[] = {
664 { .name = "arizona-micsupp" },
665 {
666 .name = "arizona-extcon",
667 .parent_supplies = wm5102_supplies,
668 .num_parent_supplies = 1, /* We only need MICVDD */
669 },
670 { .name = "arizona-gpio" },
671 { .name = "arizona-haptics" },
672 { .name = "arizona-pwm" },
673 {
674 .name = "wm5110-codec",
675 .parent_supplies = wm5102_supplies,
676 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
677 },
678 };
679
680 static const char *wm8997_supplies[] = {
681 "MICVDD",
682 "DBVDD2",
683 "CPVDD",
684 "SPKVDD",
685 };
686
687 static const struct mfd_cell wm8997_devs[] = {
688 { .name = "arizona-micsupp" },
689 {
690 .name = "arizona-extcon",
691 .parent_supplies = wm8997_supplies,
692 .num_parent_supplies = 1, /* We only need MICVDD */
693 },
694 { .name = "arizona-gpio" },
695 { .name = "arizona-haptics" },
696 { .name = "arizona-pwm" },
697 {
698 .name = "wm8997-codec",
699 .parent_supplies = wm8997_supplies,
700 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
701 },
702 };
703
704 int arizona_dev_init(struct arizona *arizona)
705 {
706 struct device *dev = arizona->dev;
707 const char *type_name;
708 unsigned int reg, val;
709 int (*apply_patch)(struct arizona *) = NULL;
710 int ret, i;
711
712 dev_set_drvdata(arizona->dev, arizona);
713 mutex_init(&arizona->clk_lock);
714
715 if (dev_get_platdata(arizona->dev))
716 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
717 sizeof(arizona->pdata));
718 else
719 arizona_of_get_core_pdata(arizona);
720
721 regcache_cache_only(arizona->regmap, true);
722
723 switch (arizona->type) {
724 case WM5102:
725 case WM5110:
726 case WM8280:
727 case WM8997:
728 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
729 arizona->core_supplies[i].supply
730 = wm5102_core_supplies[i];
731 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
732 break;
733 default:
734 dev_err(arizona->dev, "Unknown device type %d\n",
735 arizona->type);
736 return -EINVAL;
737 }
738
739 /* Mark DCVDD as external, LDO1 driver will clear if internal */
740 arizona->external_dcvdd = true;
741
742 ret = mfd_add_devices(arizona->dev, -1, early_devs,
743 ARRAY_SIZE(early_devs), NULL, 0, NULL);
744 if (ret != 0) {
745 dev_err(dev, "Failed to add early children: %d\n", ret);
746 return ret;
747 }
748
749 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
750 arizona->core_supplies);
751 if (ret != 0) {
752 dev_err(dev, "Failed to request core supplies: %d\n",
753 ret);
754 goto err_early;
755 }
756
757 /**
758 * Don't use devres here because the only device we have to get
759 * against is the MFD device and DCVDD will likely be supplied by
760 * one of its children. Meaning that the regulator will be
761 * destroyed by the time devres calls regulator put.
762 */
763 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
764 if (IS_ERR(arizona->dcvdd)) {
765 ret = PTR_ERR(arizona->dcvdd);
766 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
767 goto err_early;
768 }
769
770 if (arizona->pdata.reset) {
771 /* Start out with /RESET low to put the chip into reset */
772 ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset,
773 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
774 "arizona /RESET");
775 if (ret != 0) {
776 dev_err(dev, "Failed to request /RESET: %d\n", ret);
777 goto err_dcvdd;
778 }
779 }
780
781 ret = regulator_bulk_enable(arizona->num_core_supplies,
782 arizona->core_supplies);
783 if (ret != 0) {
784 dev_err(dev, "Failed to enable core supplies: %d\n",
785 ret);
786 goto err_dcvdd;
787 }
788
789 ret = regulator_enable(arizona->dcvdd);
790 if (ret != 0) {
791 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
792 goto err_enable;
793 }
794
795 arizona_disable_reset(arizona);
796
797 regcache_cache_only(arizona->regmap, false);
798
799 /* Verify that this is a chip we know about */
800 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
801 if (ret != 0) {
802 dev_err(dev, "Failed to read ID register: %d\n", ret);
803 goto err_reset;
804 }
805
806 switch (reg) {
807 case 0x5102:
808 case 0x5110:
809 case 0x8997:
810 break;
811 default:
812 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
813 goto err_reset;
814 }
815
816 /* If we have a /RESET GPIO we'll already be reset */
817 if (!arizona->pdata.reset) {
818 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
819 if (ret != 0) {
820 dev_err(dev, "Failed to reset device: %d\n", ret);
821 goto err_reset;
822 }
823
824 msleep(1);
825 }
826
827 /* Ensure device startup is complete */
828 switch (arizona->type) {
829 case WM5102:
830 ret = regmap_read(arizona->regmap,
831 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
832 if (ret) {
833 dev_err(dev,
834 "Failed to check write sequencer state: %d\n",
835 ret);
836 } else if (val & 0x01) {
837 ret = wm5102_clear_write_sequencer(arizona);
838 if (ret)
839 return ret;
840 }
841 break;
842 default:
843 break;
844 }
845
846 ret = arizona_wait_for_boot(arizona);
847 if (ret) {
848 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
849 goto err_reset;
850 }
851
852 /* Read the device ID information & do device specific stuff */
853 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
854 if (ret != 0) {
855 dev_err(dev, "Failed to read ID register: %d\n", ret);
856 goto err_reset;
857 }
858
859 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
860 &arizona->rev);
861 if (ret != 0) {
862 dev_err(dev, "Failed to read revision register: %d\n", ret);
863 goto err_reset;
864 }
865 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
866
867 switch (reg) {
868 #ifdef CONFIG_MFD_WM5102
869 case 0x5102:
870 type_name = "WM5102";
871 if (arizona->type != WM5102) {
872 dev_err(arizona->dev, "WM5102 registered as %d\n",
873 arizona->type);
874 arizona->type = WM5102;
875 }
876 apply_patch = wm5102_patch;
877 arizona->rev &= 0x7;
878 break;
879 #endif
880 #ifdef CONFIG_MFD_WM5110
881 case 0x5110:
882 switch (arizona->type) {
883 case WM5110:
884 type_name = "WM5110";
885 break;
886 case WM8280:
887 type_name = "WM8280";
888 break;
889 default:
890 type_name = "WM5110";
891 dev_err(arizona->dev, "WM5110 registered as %d\n",
892 arizona->type);
893 arizona->type = WM5110;
894 break;
895 }
896 apply_patch = wm5110_patch;
897 break;
898 #endif
899 #ifdef CONFIG_MFD_WM8997
900 case 0x8997:
901 type_name = "WM8997";
902 if (arizona->type != WM8997) {
903 dev_err(arizona->dev, "WM8997 registered as %d\n",
904 arizona->type);
905 arizona->type = WM8997;
906 }
907 apply_patch = wm8997_patch;
908 break;
909 #endif
910 default:
911 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
912 goto err_reset;
913 }
914
915 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
916
917 if (apply_patch) {
918 ret = apply_patch(arizona);
919 if (ret != 0) {
920 dev_err(arizona->dev, "Failed to apply patch: %d\n",
921 ret);
922 goto err_reset;
923 }
924
925 switch (arizona->type) {
926 case WM5102:
927 ret = arizona_apply_hardware_patch(arizona);
928 if (ret != 0) {
929 dev_err(arizona->dev,
930 "Failed to apply hardware patch: %d\n",
931 ret);
932 goto err_reset;
933 }
934 break;
935 default:
936 break;
937 }
938 }
939
940 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
941 if (!arizona->pdata.gpio_defaults[i])
942 continue;
943
944 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
945 arizona->pdata.gpio_defaults[i]);
946 }
947
948 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
949 pm_runtime_use_autosuspend(arizona->dev);
950 pm_runtime_enable(arizona->dev);
951
952 /* Chip default */
953 if (!arizona->pdata.clk32k_src)
954 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
955
956 switch (arizona->pdata.clk32k_src) {
957 case ARIZONA_32KZ_MCLK1:
958 case ARIZONA_32KZ_MCLK2:
959 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
960 ARIZONA_CLK_32K_SRC_MASK,
961 arizona->pdata.clk32k_src - 1);
962 arizona_clk32k_enable(arizona);
963 break;
964 case ARIZONA_32KZ_NONE:
965 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
966 ARIZONA_CLK_32K_SRC_MASK, 2);
967 break;
968 default:
969 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
970 arizona->pdata.clk32k_src);
971 ret = -EINVAL;
972 goto err_reset;
973 }
974
975 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
976 if (!arizona->pdata.micbias[i].mV &&
977 !arizona->pdata.micbias[i].bypass)
978 continue;
979
980 /* Apply default for bypass mode */
981 if (!arizona->pdata.micbias[i].mV)
982 arizona->pdata.micbias[i].mV = 2800;
983
984 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
985
986 val <<= ARIZONA_MICB1_LVL_SHIFT;
987
988 if (arizona->pdata.micbias[i].ext_cap)
989 val |= ARIZONA_MICB1_EXT_CAP;
990
991 if (arizona->pdata.micbias[i].discharge)
992 val |= ARIZONA_MICB1_DISCH;
993
994 if (arizona->pdata.micbias[i].soft_start)
995 val |= ARIZONA_MICB1_RATE;
996
997 if (arizona->pdata.micbias[i].bypass)
998 val |= ARIZONA_MICB1_BYPASS;
999
1000 regmap_update_bits(arizona->regmap,
1001 ARIZONA_MIC_BIAS_CTRL_1 + i,
1002 ARIZONA_MICB1_LVL_MASK |
1003 ARIZONA_MICB1_EXT_CAP |
1004 ARIZONA_MICB1_DISCH |
1005 ARIZONA_MICB1_BYPASS |
1006 ARIZONA_MICB1_RATE, val);
1007 }
1008
1009 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
1010 /* Default for both is 0 so noop with defaults */
1011 val = arizona->pdata.dmic_ref[i]
1012 << ARIZONA_IN1_DMIC_SUP_SHIFT;
1013 val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
1014
1015 regmap_update_bits(arizona->regmap,
1016 ARIZONA_IN1L_CONTROL + (i * 8),
1017 ARIZONA_IN1_DMIC_SUP_MASK |
1018 ARIZONA_IN1_MODE_MASK, val);
1019 }
1020
1021 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
1022 /* Default is 0 so noop with defaults */
1023 if (arizona->pdata.out_mono[i])
1024 val = ARIZONA_OUT1_MONO;
1025 else
1026 val = 0;
1027
1028 regmap_update_bits(arizona->regmap,
1029 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
1030 ARIZONA_OUT1_MONO, val);
1031 }
1032
1033 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
1034 if (arizona->pdata.spk_mute[i])
1035 regmap_update_bits(arizona->regmap,
1036 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
1037 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
1038 ARIZONA_SPK1_MUTE_SEQ1_MASK,
1039 arizona->pdata.spk_mute[i]);
1040
1041 if (arizona->pdata.spk_fmt[i])
1042 regmap_update_bits(arizona->regmap,
1043 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
1044 ARIZONA_SPK1_FMT_MASK,
1045 arizona->pdata.spk_fmt[i]);
1046 }
1047
1048 /* Set up for interrupts */
1049 ret = arizona_irq_init(arizona);
1050 if (ret != 0)
1051 goto err_reset;
1052
1053 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
1054 arizona_clkgen_err, arizona);
1055 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
1056 arizona_overclocked, arizona);
1057 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
1058 arizona_underclocked, arizona);
1059
1060 switch (arizona->type) {
1061 case WM5102:
1062 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
1063 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
1064 break;
1065 case WM5110:
1066 case WM8280:
1067 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
1068 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
1069 break;
1070 case WM8997:
1071 ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
1072 ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
1073 break;
1074 }
1075
1076 if (ret != 0) {
1077 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1078 goto err_irq;
1079 }
1080
1081 #ifdef CONFIG_PM
1082 regulator_disable(arizona->dcvdd);
1083 #endif
1084
1085 return 0;
1086
1087 err_irq:
1088 arizona_irq_exit(arizona);
1089 err_reset:
1090 arizona_enable_reset(arizona);
1091 regulator_disable(arizona->dcvdd);
1092 err_enable:
1093 regulator_bulk_disable(arizona->num_core_supplies,
1094 arizona->core_supplies);
1095 err_dcvdd:
1096 regulator_put(arizona->dcvdd);
1097 err_early:
1098 mfd_remove_devices(dev);
1099 return ret;
1100 }
1101 EXPORT_SYMBOL_GPL(arizona_dev_init);
1102
1103 int arizona_dev_exit(struct arizona *arizona)
1104 {
1105 pm_runtime_disable(arizona->dev);
1106
1107 regulator_disable(arizona->dcvdd);
1108 regulator_put(arizona->dcvdd);
1109
1110 mfd_remove_devices(arizona->dev);
1111 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1112 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1113 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
1114 arizona_irq_exit(arizona);
1115 arizona_enable_reset(arizona);
1116
1117 regulator_bulk_disable(arizona->num_core_supplies,
1118 arizona->core_supplies);
1119 return 0;
1120 }
1121 EXPORT_SYMBOL_GPL(arizona_dev_exit);
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