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Merge tag 'powerpc-5.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc...
[mirror_ubuntu-hirsute-kernel.git] / drivers / mfd / axp20x.c
1 /*
2 * MFD core driver for the X-Powers' Power Management ICs
3 *
4 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
5 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
6 * as well as configurable GPIOs.
7 *
8 * This file contains the interface independent core functions.
9 *
10 * Copyright (C) 2014 Carlo Caione
11 *
12 * Author: Carlo Caione <carlo@caione.org>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19 #include <linux/acpi.h>
20 #include <linux/bitops.h>
21 #include <linux/delay.h>
22 #include <linux/err.h>
23 #include <linux/interrupt.h>
24 #include <linux/kernel.h>
25 #include <linux/mfd/axp20x.h>
26 #include <linux/mfd/core.h>
27 #include <linux/module.h>
28 #include <linux/of_device.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/regmap.h>
31 #include <linux/regulator/consumer.h>
32
33 #define AXP20X_OFF BIT(7)
34
35 #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0
36 #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4)
37
38 static const char * const axp20x_model_names[] = {
39 "AXP152",
40 "AXP202",
41 "AXP209",
42 "AXP221",
43 "AXP223",
44 "AXP288",
45 "AXP803",
46 "AXP806",
47 "AXP809",
48 "AXP813",
49 };
50
51 static const struct regmap_range axp152_writeable_ranges[] = {
52 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
53 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
54 };
55
56 static const struct regmap_range axp152_volatile_ranges[] = {
57 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
58 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
59 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
60 };
61
62 static const struct regmap_access_table axp152_writeable_table = {
63 .yes_ranges = axp152_writeable_ranges,
64 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges),
65 };
66
67 static const struct regmap_access_table axp152_volatile_table = {
68 .yes_ranges = axp152_volatile_ranges,
69 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges),
70 };
71
72 static const struct regmap_range axp20x_writeable_ranges[] = {
73 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
74 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
75 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
76 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
77 };
78
79 static const struct regmap_range axp20x_volatile_ranges[] = {
80 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
81 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
82 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
83 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
84 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
85 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
86 };
87
88 static const struct regmap_access_table axp20x_writeable_table = {
89 .yes_ranges = axp20x_writeable_ranges,
90 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges),
91 };
92
93 static const struct regmap_access_table axp20x_volatile_table = {
94 .yes_ranges = axp20x_volatile_ranges,
95 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges),
96 };
97
98 /* AXP22x ranges are shared with the AXP809, as they cover the same range */
99 static const struct regmap_range axp22x_writeable_ranges[] = {
100 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
101 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3),
102 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
103 };
104
105 static const struct regmap_range axp22x_volatile_ranges[] = {
106 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE),
107 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
108 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
109 regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L),
110 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES),
111 };
112
113 static const struct regmap_access_table axp22x_writeable_table = {
114 .yes_ranges = axp22x_writeable_ranges,
115 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges),
116 };
117
118 static const struct regmap_access_table axp22x_volatile_table = {
119 .yes_ranges = axp22x_volatile_ranges,
120 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges),
121 };
122
123 /* AXP288 ranges are shared with the AXP803, as they cover the same range */
124 static const struct regmap_range axp288_writeable_ranges[] = {
125 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
126 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
127 };
128
129 static const struct regmap_range axp288_volatile_ranges[] = {
130 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON),
131 regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL),
132 regmap_reg_range(AXP288_BC_DET_STAT, AXP288_BC_DET_STAT),
133 regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL),
134 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
135 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
136 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
137 regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L),
138 regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG),
139 };
140
141 static const struct regmap_access_table axp288_writeable_table = {
142 .yes_ranges = axp288_writeable_ranges,
143 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges),
144 };
145
146 static const struct regmap_access_table axp288_volatile_table = {
147 .yes_ranges = axp288_volatile_ranges,
148 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges),
149 };
150
151 static const struct regmap_range axp806_writeable_ranges[] = {
152 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)),
153 regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL),
154 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN),
155 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
156 regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT),
157 };
158
159 static const struct regmap_range axp806_volatile_ranges[] = {
160 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
161 };
162
163 static const struct regmap_access_table axp806_writeable_table = {
164 .yes_ranges = axp806_writeable_ranges,
165 .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges),
166 };
167
168 static const struct regmap_access_table axp806_volatile_table = {
169 .yes_ranges = axp806_volatile_ranges,
170 .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges),
171 };
172
173 static const struct resource axp152_pek_resources[] = {
174 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
175 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
176 };
177
178 static const struct resource axp20x_ac_power_supply_resources[] = {
179 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
180 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
181 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
182 };
183
184 static const struct resource axp20x_pek_resources[] = {
185 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
186 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
187 };
188
189 static const struct resource axp20x_usb_power_supply_resources[] = {
190 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
191 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
192 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"),
193 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
194 };
195
196 static const struct resource axp22x_usb_power_supply_resources[] = {
197 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
198 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
199 };
200
201 /* AXP803 and AXP813/AXP818 share the same interrupts */
202 static const struct resource axp803_usb_power_supply_resources[] = {
203 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
204 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
205 };
206
207 static const struct resource axp22x_pek_resources[] = {
208 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
209 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
210 };
211
212 static const struct resource axp288_power_button_resources[] = {
213 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"),
214 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"),
215 };
216
217 static const struct resource axp288_fuel_gauge_resources[] = {
218 DEFINE_RES_IRQ(AXP288_IRQ_QWBTU),
219 DEFINE_RES_IRQ(AXP288_IRQ_WBTU),
220 DEFINE_RES_IRQ(AXP288_IRQ_QWBTO),
221 DEFINE_RES_IRQ(AXP288_IRQ_WBTO),
222 DEFINE_RES_IRQ(AXP288_IRQ_WL2),
223 DEFINE_RES_IRQ(AXP288_IRQ_WL1),
224 };
225
226 static const struct resource axp803_pek_resources[] = {
227 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
228 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
229 };
230
231 static const struct resource axp806_pek_resources[] = {
232 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"),
233 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"),
234 };
235
236 static const struct resource axp809_pek_resources[] = {
237 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
238 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
239 };
240
241 static const struct regmap_config axp152_regmap_config = {
242 .reg_bits = 8,
243 .val_bits = 8,
244 .wr_table = &axp152_writeable_table,
245 .volatile_table = &axp152_volatile_table,
246 .max_register = AXP152_PWM1_DUTY_CYCLE,
247 .cache_type = REGCACHE_RBTREE,
248 };
249
250 static const struct regmap_config axp20x_regmap_config = {
251 .reg_bits = 8,
252 .val_bits = 8,
253 .wr_table = &axp20x_writeable_table,
254 .volatile_table = &axp20x_volatile_table,
255 .max_register = AXP20X_OCV(AXP20X_OCV_MAX),
256 .cache_type = REGCACHE_RBTREE,
257 };
258
259 static const struct regmap_config axp22x_regmap_config = {
260 .reg_bits = 8,
261 .val_bits = 8,
262 .wr_table = &axp22x_writeable_table,
263 .volatile_table = &axp22x_volatile_table,
264 .max_register = AXP22X_BATLOW_THRES1,
265 .cache_type = REGCACHE_RBTREE,
266 };
267
268 static const struct regmap_config axp288_regmap_config = {
269 .reg_bits = 8,
270 .val_bits = 8,
271 .wr_table = &axp288_writeable_table,
272 .volatile_table = &axp288_volatile_table,
273 .max_register = AXP288_FG_TUNE5,
274 .cache_type = REGCACHE_RBTREE,
275 };
276
277 static const struct regmap_config axp806_regmap_config = {
278 .reg_bits = 8,
279 .val_bits = 8,
280 .wr_table = &axp806_writeable_table,
281 .volatile_table = &axp806_volatile_table,
282 .max_register = AXP806_REG_ADDR_EXT,
283 .cache_type = REGCACHE_RBTREE,
284 };
285
286 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
287 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
288
289 static const struct regmap_irq axp152_regmap_irqs[] = {
290 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6),
291 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5),
292 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3),
293 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2),
294 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5),
295 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4),
296 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3),
297 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2),
298 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1),
299 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0),
300 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7),
301 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6),
302 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5),
303 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3),
304 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2),
305 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1),
306 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0),
307 };
308
309 static const struct regmap_irq axp20x_regmap_irqs[] = {
310 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7),
311 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6),
312 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5),
313 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4),
314 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3),
315 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2),
316 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1),
317 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7),
318 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6),
319 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5),
320 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4),
321 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3),
322 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2),
323 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1),
324 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0),
325 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7),
326 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6),
327 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5),
328 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4),
329 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3),
330 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1),
331 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0),
332 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7),
333 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6),
334 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5),
335 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4),
336 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3),
337 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2),
338 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1),
339 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0),
340 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7),
341 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6),
342 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5),
343 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3),
344 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2),
345 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1),
346 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0),
347 };
348
349 static const struct regmap_irq axp22x_regmap_irqs[] = {
350 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7),
351 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6),
352 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5),
353 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4),
354 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3),
355 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2),
356 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1),
357 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7),
358 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6),
359 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5),
360 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4),
361 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3),
362 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2),
363 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1),
364 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0),
365 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7),
366 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1),
367 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0),
368 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1),
369 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0),
370 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7),
371 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6),
372 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5),
373 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1),
374 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0),
375 };
376
377 /* some IRQs are compatible with axp20x models */
378 static const struct regmap_irq axp288_regmap_irqs[] = {
379 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2),
380 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3),
381 INIT_REGMAP_IRQ(AXP288, OV, 0, 4),
382 INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5),
383 INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6),
384 INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7),
385
386 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2),
387 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3),
388 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4),
389 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5),
390 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6),
391 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7),
392
393 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0),
394 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1),
395 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2),
396 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3),
397 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4),
398 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5),
399 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6),
400 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7),
401
402 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0),
403 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1),
404 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2),
405 INIT_REGMAP_IRQ(AXP288, OT, 3, 7),
406
407 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0),
408 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1),
409 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2),
410 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3),
411 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4),
412 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5),
413 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6),
414 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7),
415
416 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0),
417 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
418 };
419
420 static const struct regmap_irq axp803_regmap_irqs[] = {
421 INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7),
422 INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6),
423 INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL, 0, 5),
424 INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V, 0, 4),
425 INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN, 0, 3),
426 INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL, 0, 2),
427 INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN, 1, 7),
428 INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL, 1, 6),
429 INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE, 1, 5),
430 INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE, 1, 4),
431 INIT_REGMAP_IRQ(AXP803, CHARG, 1, 3),
432 INIT_REGMAP_IRQ(AXP803, CHARG_DONE, 1, 2),
433 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH, 2, 7),
434 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6),
435 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW, 2, 5),
436 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END, 2, 4),
437 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH, 2, 3),
438 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2),
439 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW, 2, 1),
440 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END, 2, 0),
441 INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH, 3, 7),
442 INIT_REGMAP_IRQ(AXP803, GPADC, 3, 2),
443 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1, 3, 1),
444 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2, 3, 0),
445 INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7),
446 INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE, 4, 6),
447 INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE, 4, 5),
448 INIT_REGMAP_IRQ(AXP803, PEK_SHORT, 4, 4),
449 INIT_REGMAP_IRQ(AXP803, PEK_LONG, 4, 3),
450 INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF, 4, 2),
451 INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT, 4, 1),
452 INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT, 4, 0),
453 INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG, 5, 1),
454 INIT_REGMAP_IRQ(AXP803, MV_CHNG, 5, 0),
455 };
456
457 static const struct regmap_irq axp806_regmap_irqs[] = {
458 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0),
459 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1),
460 INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3),
461 INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4),
462 INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5),
463 INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6),
464 INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7),
465 INIT_REGMAP_IRQ(AXP806, POK_LONG, 1, 0),
466 INIT_REGMAP_IRQ(AXP806, POK_SHORT, 1, 1),
467 INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4),
468 INIT_REGMAP_IRQ(AXP806, POK_FALL, 1, 5),
469 INIT_REGMAP_IRQ(AXP806, POK_RISE, 1, 6),
470 };
471
472 static const struct regmap_irq axp809_regmap_irqs[] = {
473 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7),
474 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6),
475 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5),
476 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4),
477 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3),
478 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2),
479 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1),
480 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7),
481 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6),
482 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5),
483 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4),
484 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3),
485 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2),
486 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7),
487 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6),
488 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5),
489 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4),
490 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3),
491 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2),
492 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1),
493 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0),
494 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7),
495 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1),
496 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0),
497 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7),
498 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6),
499 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5),
500 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4),
501 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3),
502 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2),
503 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1),
504 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0),
505 };
506
507 static const struct regmap_irq_chip axp152_regmap_irq_chip = {
508 .name = "axp152_irq_chip",
509 .status_base = AXP152_IRQ1_STATE,
510 .ack_base = AXP152_IRQ1_STATE,
511 .mask_base = AXP152_IRQ1_EN,
512 .mask_invert = true,
513 .init_ack_masked = true,
514 .irqs = axp152_regmap_irqs,
515 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs),
516 .num_regs = 3,
517 };
518
519 static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
520 .name = "axp20x_irq_chip",
521 .status_base = AXP20X_IRQ1_STATE,
522 .ack_base = AXP20X_IRQ1_STATE,
523 .mask_base = AXP20X_IRQ1_EN,
524 .mask_invert = true,
525 .init_ack_masked = true,
526 .irqs = axp20x_regmap_irqs,
527 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs),
528 .num_regs = 5,
529
530 };
531
532 static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
533 .name = "axp22x_irq_chip",
534 .status_base = AXP20X_IRQ1_STATE,
535 .ack_base = AXP20X_IRQ1_STATE,
536 .mask_base = AXP20X_IRQ1_EN,
537 .mask_invert = true,
538 .init_ack_masked = true,
539 .irqs = axp22x_regmap_irqs,
540 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs),
541 .num_regs = 5,
542 };
543
544 static const struct regmap_irq_chip axp288_regmap_irq_chip = {
545 .name = "axp288_irq_chip",
546 .status_base = AXP20X_IRQ1_STATE,
547 .ack_base = AXP20X_IRQ1_STATE,
548 .mask_base = AXP20X_IRQ1_EN,
549 .mask_invert = true,
550 .init_ack_masked = true,
551 .irqs = axp288_regmap_irqs,
552 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs),
553 .num_regs = 6,
554
555 };
556
557 static const struct regmap_irq_chip axp803_regmap_irq_chip = {
558 .name = "axp803",
559 .status_base = AXP20X_IRQ1_STATE,
560 .ack_base = AXP20X_IRQ1_STATE,
561 .mask_base = AXP20X_IRQ1_EN,
562 .mask_invert = true,
563 .init_ack_masked = true,
564 .irqs = axp803_regmap_irqs,
565 .num_irqs = ARRAY_SIZE(axp803_regmap_irqs),
566 .num_regs = 6,
567 };
568
569 static const struct regmap_irq_chip axp806_regmap_irq_chip = {
570 .name = "axp806",
571 .status_base = AXP20X_IRQ1_STATE,
572 .ack_base = AXP20X_IRQ1_STATE,
573 .mask_base = AXP20X_IRQ1_EN,
574 .mask_invert = true,
575 .init_ack_masked = true,
576 .irqs = axp806_regmap_irqs,
577 .num_irqs = ARRAY_SIZE(axp806_regmap_irqs),
578 .num_regs = 2,
579 };
580
581 static const struct regmap_irq_chip axp809_regmap_irq_chip = {
582 .name = "axp809",
583 .status_base = AXP20X_IRQ1_STATE,
584 .ack_base = AXP20X_IRQ1_STATE,
585 .mask_base = AXP20X_IRQ1_EN,
586 .mask_invert = true,
587 .init_ack_masked = true,
588 .irqs = axp809_regmap_irqs,
589 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs),
590 .num_regs = 5,
591 };
592
593 static const struct mfd_cell axp20x_cells[] = {
594 {
595 .name = "axp20x-gpio",
596 .of_compatible = "x-powers,axp209-gpio",
597 }, {
598 .name = "axp20x-pek",
599 .num_resources = ARRAY_SIZE(axp20x_pek_resources),
600 .resources = axp20x_pek_resources,
601 }, {
602 .name = "axp20x-regulator",
603 }, {
604 .name = "axp20x-adc",
605 .of_compatible = "x-powers,axp209-adc",
606 }, {
607 .name = "axp20x-battery-power-supply",
608 .of_compatible = "x-powers,axp209-battery-power-supply",
609 }, {
610 .name = "axp20x-ac-power-supply",
611 .of_compatible = "x-powers,axp202-ac-power-supply",
612 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
613 .resources = axp20x_ac_power_supply_resources,
614 }, {
615 .name = "axp20x-usb-power-supply",
616 .of_compatible = "x-powers,axp202-usb-power-supply",
617 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources),
618 .resources = axp20x_usb_power_supply_resources,
619 },
620 };
621
622 static const struct mfd_cell axp221_cells[] = {
623 {
624 .name = "axp221-pek",
625 .num_resources = ARRAY_SIZE(axp22x_pek_resources),
626 .resources = axp22x_pek_resources,
627 }, {
628 .name = "axp20x-regulator",
629 }, {
630 .name = "axp22x-adc",
631 .of_compatible = "x-powers,axp221-adc",
632 }, {
633 .name = "axp20x-ac-power-supply",
634 .of_compatible = "x-powers,axp221-ac-power-supply",
635 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
636 .resources = axp20x_ac_power_supply_resources,
637 }, {
638 .name = "axp20x-battery-power-supply",
639 .of_compatible = "x-powers,axp221-battery-power-supply",
640 }, {
641 .name = "axp20x-usb-power-supply",
642 .of_compatible = "x-powers,axp221-usb-power-supply",
643 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
644 .resources = axp22x_usb_power_supply_resources,
645 },
646 };
647
648 static const struct mfd_cell axp223_cells[] = {
649 {
650 .name = "axp221-pek",
651 .num_resources = ARRAY_SIZE(axp22x_pek_resources),
652 .resources = axp22x_pek_resources,
653 }, {
654 .name = "axp22x-adc",
655 .of_compatible = "x-powers,axp221-adc",
656 }, {
657 .name = "axp20x-battery-power-supply",
658 .of_compatible = "x-powers,axp221-battery-power-supply",
659 }, {
660 .name = "axp20x-regulator",
661 }, {
662 .name = "axp20x-ac-power-supply",
663 .of_compatible = "x-powers,axp221-ac-power-supply",
664 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
665 .resources = axp20x_ac_power_supply_resources,
666 }, {
667 .name = "axp20x-usb-power-supply",
668 .of_compatible = "x-powers,axp223-usb-power-supply",
669 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
670 .resources = axp22x_usb_power_supply_resources,
671 },
672 };
673
674 static const struct mfd_cell axp152_cells[] = {
675 {
676 .name = "axp20x-pek",
677 .num_resources = ARRAY_SIZE(axp152_pek_resources),
678 .resources = axp152_pek_resources,
679 },
680 };
681
682 static const struct resource axp288_adc_resources[] = {
683 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"),
684 };
685
686 static const struct resource axp288_extcon_resources[] = {
687 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL),
688 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE),
689 DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG),
690 DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG),
691 };
692
693 static const struct resource axp288_charger_resources[] = {
694 DEFINE_RES_IRQ(AXP288_IRQ_OV),
695 DEFINE_RES_IRQ(AXP288_IRQ_DONE),
696 DEFINE_RES_IRQ(AXP288_IRQ_CHARGING),
697 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT),
698 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER),
699 DEFINE_RES_IRQ(AXP288_IRQ_QCBTU),
700 DEFINE_RES_IRQ(AXP288_IRQ_CBTU),
701 DEFINE_RES_IRQ(AXP288_IRQ_QCBTO),
702 DEFINE_RES_IRQ(AXP288_IRQ_CBTO),
703 };
704
705 static const struct mfd_cell axp288_cells[] = {
706 {
707 .name = "axp288_adc",
708 .num_resources = ARRAY_SIZE(axp288_adc_resources),
709 .resources = axp288_adc_resources,
710 }, {
711 .name = "axp288_extcon",
712 .num_resources = ARRAY_SIZE(axp288_extcon_resources),
713 .resources = axp288_extcon_resources,
714 }, {
715 .name = "axp288_charger",
716 .num_resources = ARRAY_SIZE(axp288_charger_resources),
717 .resources = axp288_charger_resources,
718 }, {
719 .name = "axp288_fuel_gauge",
720 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources),
721 .resources = axp288_fuel_gauge_resources,
722 }, {
723 .name = "axp221-pek",
724 .num_resources = ARRAY_SIZE(axp288_power_button_resources),
725 .resources = axp288_power_button_resources,
726 }, {
727 .name = "axp288_pmic_acpi",
728 },
729 };
730
731 static const struct mfd_cell axp803_cells[] = {
732 {
733 .name = "axp221-pek",
734 .num_resources = ARRAY_SIZE(axp803_pek_resources),
735 .resources = axp803_pek_resources,
736 }, {
737 .name = "axp20x-gpio",
738 .of_compatible = "x-powers,axp813-gpio",
739 }, {
740 .name = "axp813-adc",
741 .of_compatible = "x-powers,axp813-adc",
742 }, {
743 .name = "axp20x-battery-power-supply",
744 .of_compatible = "x-powers,axp813-battery-power-supply",
745 }, {
746 .name = "axp20x-ac-power-supply",
747 .of_compatible = "x-powers,axp813-ac-power-supply",
748 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
749 .resources = axp20x_ac_power_supply_resources,
750 }, {
751 .name = "axp20x-usb-power-supply",
752 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources),
753 .resources = axp803_usb_power_supply_resources,
754 .of_compatible = "x-powers,axp813-usb-power-supply",
755 },
756 { .name = "axp20x-regulator" },
757 };
758
759 static const struct mfd_cell axp806_self_working_cells[] = {
760 {
761 .name = "axp221-pek",
762 .num_resources = ARRAY_SIZE(axp806_pek_resources),
763 .resources = axp806_pek_resources,
764 },
765 { .name = "axp20x-regulator" },
766 };
767
768 static const struct mfd_cell axp806_cells[] = {
769 {
770 .id = 2,
771 .name = "axp20x-regulator",
772 },
773 };
774
775 static const struct mfd_cell axp809_cells[] = {
776 {
777 .name = "axp221-pek",
778 .num_resources = ARRAY_SIZE(axp809_pek_resources),
779 .resources = axp809_pek_resources,
780 }, {
781 .id = 1,
782 .name = "axp20x-regulator",
783 },
784 };
785
786 static const struct mfd_cell axp813_cells[] = {
787 {
788 .name = "axp221-pek",
789 .num_resources = ARRAY_SIZE(axp803_pek_resources),
790 .resources = axp803_pek_resources,
791 }, {
792 .name = "axp20x-regulator",
793 }, {
794 .name = "axp20x-gpio",
795 .of_compatible = "x-powers,axp813-gpio",
796 }, {
797 .name = "axp813-adc",
798 .of_compatible = "x-powers,axp813-adc",
799 }, {
800 .name = "axp20x-battery-power-supply",
801 .of_compatible = "x-powers,axp813-battery-power-supply",
802 }, {
803 .name = "axp20x-ac-power-supply",
804 .of_compatible = "x-powers,axp813-ac-power-supply",
805 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
806 .resources = axp20x_ac_power_supply_resources,
807 }, {
808 .name = "axp20x-usb-power-supply",
809 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources),
810 .resources = axp803_usb_power_supply_resources,
811 .of_compatible = "x-powers,axp813-usb-power-supply",
812 },
813 };
814
815 static struct axp20x_dev *axp20x_pm_power_off;
816 static void axp20x_power_off(void)
817 {
818 if (axp20x_pm_power_off->variant == AXP288_ID)
819 return;
820
821 regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL,
822 AXP20X_OFF);
823
824 /* Give capacitors etc. time to drain to avoid kernel panic msg. */
825 msleep(500);
826 }
827
828 int axp20x_match_device(struct axp20x_dev *axp20x)
829 {
830 struct device *dev = axp20x->dev;
831 const struct acpi_device_id *acpi_id;
832 const struct of_device_id *of_id;
833
834 if (dev->of_node) {
835 of_id = of_match_device(dev->driver->of_match_table, dev);
836 if (!of_id) {
837 dev_err(dev, "Unable to match OF ID\n");
838 return -ENODEV;
839 }
840 axp20x->variant = (long)of_id->data;
841 } else {
842 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
843 if (!acpi_id || !acpi_id->driver_data) {
844 dev_err(dev, "Unable to match ACPI ID and data\n");
845 return -ENODEV;
846 }
847 axp20x->variant = (long)acpi_id->driver_data;
848 }
849
850 switch (axp20x->variant) {
851 case AXP152_ID:
852 axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
853 axp20x->cells = axp152_cells;
854 axp20x->regmap_cfg = &axp152_regmap_config;
855 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
856 break;
857 case AXP202_ID:
858 case AXP209_ID:
859 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
860 axp20x->cells = axp20x_cells;
861 axp20x->regmap_cfg = &axp20x_regmap_config;
862 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
863 break;
864 case AXP221_ID:
865 axp20x->nr_cells = ARRAY_SIZE(axp221_cells);
866 axp20x->cells = axp221_cells;
867 axp20x->regmap_cfg = &axp22x_regmap_config;
868 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
869 break;
870 case AXP223_ID:
871 axp20x->nr_cells = ARRAY_SIZE(axp223_cells);
872 axp20x->cells = axp223_cells;
873 axp20x->regmap_cfg = &axp22x_regmap_config;
874 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
875 break;
876 case AXP288_ID:
877 axp20x->cells = axp288_cells;
878 axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
879 axp20x->regmap_cfg = &axp288_regmap_config;
880 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
881 axp20x->irq_flags = IRQF_TRIGGER_LOW;
882 break;
883 case AXP803_ID:
884 axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
885 axp20x->cells = axp803_cells;
886 axp20x->regmap_cfg = &axp288_regmap_config;
887 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
888 break;
889 case AXP806_ID:
890 if (of_property_read_bool(axp20x->dev->of_node,
891 "x-powers,self-working-mode")) {
892 axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells);
893 axp20x->cells = axp806_self_working_cells;
894 } else {
895 axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
896 axp20x->cells = axp806_cells;
897 }
898 axp20x->regmap_cfg = &axp806_regmap_config;
899 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip;
900 break;
901 case AXP809_ID:
902 axp20x->nr_cells = ARRAY_SIZE(axp809_cells);
903 axp20x->cells = axp809_cells;
904 axp20x->regmap_cfg = &axp22x_regmap_config;
905 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip;
906 break;
907 case AXP813_ID:
908 axp20x->nr_cells = ARRAY_SIZE(axp813_cells);
909 axp20x->cells = axp813_cells;
910 axp20x->regmap_cfg = &axp288_regmap_config;
911 /*
912 * The IRQ table given in the datasheet is incorrect.
913 * In IRQ enable/status registers 1, there are separate
914 * IRQs for ACIN and VBUS, instead of bits [7:5] being
915 * the same as bits [4:2]. So it shares the same IRQs
916 * as the AXP803, rather than the AXP288.
917 */
918 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
919 break;
920 default:
921 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
922 return -EINVAL;
923 }
924 dev_info(dev, "AXP20x variant %s found\n",
925 axp20x_model_names[axp20x->variant]);
926
927 return 0;
928 }
929 EXPORT_SYMBOL(axp20x_match_device);
930
931 int axp20x_device_probe(struct axp20x_dev *axp20x)
932 {
933 int ret;
934
935 /*
936 * The AXP806 supports either master/standalone or slave mode.
937 * Slave mode allows sharing the serial bus, even with multiple
938 * AXP806 which all have the same hardware address.
939 *
940 * This is done with extra "serial interface address extension",
941 * or AXP806_BUS_ADDR_EXT, and "register address extension", or
942 * AXP806_REG_ADDR_EXT, registers. The former is read-only, with
943 * 1 bit customizable at the factory, and 1 bit depending on the
944 * state of an external pin. The latter is writable. The device
945 * will only respond to operations to its other registers when
946 * the these device addressing bits (in the upper 4 bits of the
947 * registers) match.
948 *
949 * By default we support an AXP806 chained to an AXP809 in slave
950 * mode. Boards which use an AXP806 in master mode can set the
951 * property "x-powers,master-mode" to override the default.
952 */
953 if (axp20x->variant == AXP806_ID) {
954 if (of_property_read_bool(axp20x->dev->of_node,
955 "x-powers,master-mode") ||
956 of_property_read_bool(axp20x->dev->of_node,
957 "x-powers,self-working-mode"))
958 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
959 AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE);
960 else
961 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
962 AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE);
963 }
964
965 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
966 IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags,
967 -1, axp20x->regmap_irq_chip, &axp20x->regmap_irqc);
968 if (ret) {
969 dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret);
970 return ret;
971 }
972
973 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells,
974 axp20x->nr_cells, NULL, 0, NULL);
975
976 if (ret) {
977 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);
978 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
979 return ret;
980 }
981
982 if (!pm_power_off) {
983 axp20x_pm_power_off = axp20x;
984 pm_power_off = axp20x_power_off;
985 }
986
987 dev_info(axp20x->dev, "AXP20X driver loaded\n");
988
989 return 0;
990 }
991 EXPORT_SYMBOL(axp20x_device_probe);
992
993 int axp20x_device_remove(struct axp20x_dev *axp20x)
994 {
995 if (axp20x == axp20x_pm_power_off) {
996 axp20x_pm_power_off = NULL;
997 pm_power_off = NULL;
998 }
999
1000 mfd_remove_devices(axp20x->dev);
1001 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
1002
1003 return 0;
1004 }
1005 EXPORT_SYMBOL(axp20x_device_remove);
1006
1007 MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
1008 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
1009 MODULE_LICENSE("GPL");
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