1 // SPDX-License-Identifier: GPL-2.0
3 * SGI IOC3 multifunction device driver
5 * Copyright (C) 2018, 2019 Thomas Bogendoerfer <tbogendoerfer@suse.de>
8 * Stanislaw Skowronek <skylark@unaligned.org>
9 * Joshua Kinard <kumba@gentoo.org>
10 * Brent Casavant <bcasavan@sgi.com> - IOC4 master driver
11 * Pat Gefre <pfg@sgi.com> - IOC3 serial port IRQ demuxer
14 #include <linux/delay.h>
15 #include <linux/errno.h>
16 #include <linux/interrupt.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
19 #include <linux/pci.h>
20 #include <linux/platform_device.h>
21 #include <linux/platform_data/sgi-w1.h>
22 #include <linux/rtc/ds1685.h>
24 #include <asm/pci/bridge.h>
25 #include <asm/sn/ioc3.h>
27 #define IOC3_IRQ_SERIAL_A 6
28 #define IOC3_IRQ_SERIAL_B 15
29 #define IOC3_IRQ_KBD 22
31 /* Bitmask for selecting which IRQs are level triggered */
32 #define IOC3_LVL_MASK (BIT(IOC3_IRQ_SERIAL_A) | BIT(IOC3_IRQ_SERIAL_B))
34 #define M48T35_REG_SIZE 32768 /* size of m48t35 registers */
36 /* 1.2 us latency timer (40 cycles at 33 MHz) */
37 #define IOC3_LATENCY 40
39 struct ioc3_priv_data
{
40 struct irq_domain
*domain
;
41 struct ioc3 __iomem
*regs
;
46 static void ioc3_irq_ack(struct irq_data
*d
)
48 struct ioc3_priv_data
*ipd
= irq_data_get_irq_chip_data(d
);
49 unsigned int hwirq
= irqd_to_hwirq(d
);
51 writel(BIT(hwirq
), &ipd
->regs
->sio_ir
);
54 static void ioc3_irq_mask(struct irq_data
*d
)
56 struct ioc3_priv_data
*ipd
= irq_data_get_irq_chip_data(d
);
57 unsigned int hwirq
= irqd_to_hwirq(d
);
59 writel(BIT(hwirq
), &ipd
->regs
->sio_iec
);
62 static void ioc3_irq_unmask(struct irq_data
*d
)
64 struct ioc3_priv_data
*ipd
= irq_data_get_irq_chip_data(d
);
65 unsigned int hwirq
= irqd_to_hwirq(d
);
67 writel(BIT(hwirq
), &ipd
->regs
->sio_ies
);
70 static struct irq_chip ioc3_irq_chip
= {
72 .irq_ack
= ioc3_irq_ack
,
73 .irq_mask
= ioc3_irq_mask
,
74 .irq_unmask
= ioc3_irq_unmask
,
77 static int ioc3_irq_domain_map(struct irq_domain
*d
, unsigned int irq
,
78 irq_hw_number_t hwirq
)
80 /* Set level IRQs for every interrupt contained in IOC3_LVL_MASK */
81 if (BIT(hwirq
) & IOC3_LVL_MASK
)
82 irq_set_chip_and_handler(irq
, &ioc3_irq_chip
, handle_level_irq
);
84 irq_set_chip_and_handler(irq
, &ioc3_irq_chip
, handle_edge_irq
);
86 irq_set_chip_data(irq
, d
->host_data
);
90 static void ioc3_irq_domain_unmap(struct irq_domain
*d
, unsigned int irq
)
92 irq_set_chip_and_handler(irq
, NULL
, NULL
);
93 irq_set_chip_data(irq
, NULL
);
96 static const struct irq_domain_ops ioc3_irq_domain_ops
= {
97 .map
= ioc3_irq_domain_map
,
98 .unmap
= ioc3_irq_domain_unmap
,
101 static void ioc3_irq_handler(struct irq_desc
*desc
)
103 struct irq_domain
*domain
= irq_desc_get_handler_data(desc
);
104 struct ioc3_priv_data
*ipd
= domain
->host_data
;
105 struct ioc3 __iomem
*regs
= ipd
->regs
;
109 pending
= readl(®s
->sio_ir
);
110 mask
= readl(®s
->sio_ies
);
111 pending
&= mask
; /* Mask off not enabled interrupts */
114 irq
= irq_find_mapping(domain
, __ffs(pending
));
116 generic_handle_irq(irq
);
118 spurious_interrupt();
123 * System boards/BaseIOs use more interrupt pins of the bridge ASIC
124 * to which the IOC3 is connected. Since the IOC3 MFD driver
125 * knows wiring of these extra pins, we use the map_irq function
126 * to get interrupts activated
128 static int ioc3_map_irq(struct pci_dev
*pdev
, int slot
, int pin
)
130 struct pci_host_bridge
*hbrg
= pci_find_host_bridge(pdev
->bus
);
132 return hbrg
->map_irq(pdev
, slot
, pin
);
135 static int ioc3_irq_domain_setup(struct ioc3_priv_data
*ipd
, int irq
)
137 struct irq_domain
*domain
;
138 struct fwnode_handle
*fn
;
140 fn
= irq_domain_alloc_named_fwnode("IOC3");
144 domain
= irq_domain_create_linear(fn
, 24, &ioc3_irq_domain_ops
, ipd
);
146 irq_domain_free_fwnode(fn
);
150 ipd
->domain
= domain
;
152 irq_set_chained_handler_and_data(irq
, ioc3_irq_handler
, domain
);
153 ipd
->domain_irq
= irq
;
157 dev_err(&ipd
->pdev
->dev
, "irq domain setup failed\n");
161 static struct resource ioc3_uarta_resources
[] = {
162 DEFINE_RES_MEM(offsetof(struct ioc3
, sregs
.uarta
),
163 sizeof_field(struct ioc3
, sregs
.uarta
)),
164 DEFINE_RES_IRQ(IOC3_IRQ_SERIAL_A
)
167 static struct resource ioc3_uartb_resources
[] = {
168 DEFINE_RES_MEM(offsetof(struct ioc3
, sregs
.uartb
),
169 sizeof_field(struct ioc3
, sregs
.uartb
)),
170 DEFINE_RES_IRQ(IOC3_IRQ_SERIAL_B
)
173 static struct mfd_cell ioc3_serial_cells
[] = {
175 .name
= "ioc3-serial8250",
176 .resources
= ioc3_uarta_resources
,
177 .num_resources
= ARRAY_SIZE(ioc3_uarta_resources
),
180 .name
= "ioc3-serial8250",
181 .resources
= ioc3_uartb_resources
,
182 .num_resources
= ARRAY_SIZE(ioc3_uartb_resources
),
186 static int ioc3_serial_setup(struct ioc3_priv_data
*ipd
)
190 /* Set gpio pins for RS232/RS422 mode selection */
191 writel(GPCR_UARTA_MODESEL
| GPCR_UARTB_MODESEL
,
193 /* Select RS232 mode for uart a */
194 writel(0, &ipd
->regs
->gppr
[6]);
195 /* Select RS232 mode for uart b */
196 writel(0, &ipd
->regs
->gppr
[7]);
198 /* Switch both ports to 16650 mode */
199 writel(readl(&ipd
->regs
->port_a
.sscr
) & ~SSCR_DMA_EN
,
200 &ipd
->regs
->port_a
.sscr
);
201 writel(readl(&ipd
->regs
->port_b
.sscr
) & ~SSCR_DMA_EN
,
202 &ipd
->regs
->port_b
.sscr
);
203 udelay(1000); /* Wait until mode switch is done */
205 ret
= mfd_add_devices(&ipd
->pdev
->dev
, PLATFORM_DEVID_AUTO
,
206 ioc3_serial_cells
, ARRAY_SIZE(ioc3_serial_cells
),
207 &ipd
->pdev
->resource
[0], 0, ipd
->domain
);
209 dev_err(&ipd
->pdev
->dev
, "Failed to add 16550 subdevs\n");
216 static struct resource ioc3_kbd_resources
[] = {
217 DEFINE_RES_MEM(offsetof(struct ioc3
, serio
),
218 sizeof_field(struct ioc3
, serio
)),
219 DEFINE_RES_IRQ(IOC3_IRQ_KBD
)
222 static struct mfd_cell ioc3_kbd_cells
[] = {
225 .resources
= ioc3_kbd_resources
,
226 .num_resources
= ARRAY_SIZE(ioc3_kbd_resources
),
230 static int ioc3_kbd_setup(struct ioc3_priv_data
*ipd
)
234 ret
= mfd_add_devices(&ipd
->pdev
->dev
, PLATFORM_DEVID_AUTO
,
235 ioc3_kbd_cells
, ARRAY_SIZE(ioc3_kbd_cells
),
236 &ipd
->pdev
->resource
[0], 0, ipd
->domain
);
238 dev_err(&ipd
->pdev
->dev
, "Failed to add 16550 subdevs\n");
245 static struct resource ioc3_eth_resources
[] = {
246 DEFINE_RES_MEM(offsetof(struct ioc3
, eth
),
247 sizeof_field(struct ioc3
, eth
)),
248 DEFINE_RES_MEM(offsetof(struct ioc3
, ssram
),
249 sizeof_field(struct ioc3
, ssram
)),
253 static struct resource ioc3_w1_resources
[] = {
254 DEFINE_RES_MEM(offsetof(struct ioc3
, mcr
),
255 sizeof_field(struct ioc3
, mcr
)),
257 static struct sgi_w1_platform_data ioc3_w1_platform_data
;
259 static struct mfd_cell ioc3_eth_cells
[] = {
262 .resources
= ioc3_eth_resources
,
263 .num_resources
= ARRAY_SIZE(ioc3_eth_resources
),
267 .resources
= ioc3_w1_resources
,
268 .num_resources
= ARRAY_SIZE(ioc3_w1_resources
),
269 .platform_data
= &ioc3_w1_platform_data
,
270 .pdata_size
= sizeof(ioc3_w1_platform_data
),
274 static int ioc3_eth_setup(struct ioc3_priv_data
*ipd
)
278 /* Enable One-Wire bus */
279 writel(GPCR_MLAN_EN
, &ipd
->regs
->gpcr_s
);
281 /* Generate unique identifier */
282 snprintf(ioc3_w1_platform_data
.dev_id
,
283 sizeof(ioc3_w1_platform_data
.dev_id
), "ioc3-%012llx",
284 ipd
->pdev
->resource
->start
);
286 ret
= mfd_add_devices(&ipd
->pdev
->dev
, PLATFORM_DEVID_AUTO
,
287 ioc3_eth_cells
, ARRAY_SIZE(ioc3_eth_cells
),
288 &ipd
->pdev
->resource
[0], ipd
->pdev
->irq
, NULL
);
290 dev_err(&ipd
->pdev
->dev
, "Failed to add ETH/W1 subdev\n");
297 static struct resource ioc3_m48t35_resources
[] = {
298 DEFINE_RES_MEM(IOC3_BYTEBUS_DEV0
, M48T35_REG_SIZE
)
301 static struct mfd_cell ioc3_m48t35_cells
[] = {
303 .name
= "rtc-m48t35",
304 .resources
= ioc3_m48t35_resources
,
305 .num_resources
= ARRAY_SIZE(ioc3_m48t35_resources
),
309 static int ioc3_m48t35_setup(struct ioc3_priv_data
*ipd
)
313 ret
= mfd_add_devices(&ipd
->pdev
->dev
, PLATFORM_DEVID_AUTO
,
314 ioc3_m48t35_cells
, ARRAY_SIZE(ioc3_m48t35_cells
),
315 &ipd
->pdev
->resource
[0], 0, ipd
->domain
);
317 dev_err(&ipd
->pdev
->dev
, "Failed to add M48T35 subdev\n");
322 static struct ds1685_rtc_platform_data ip30_rtc_platform_data
= {
325 .uie_unsupported
= true,
326 .access_type
= ds1685_reg_indirect
,
329 static struct resource ioc3_rtc_ds1685_resources
[] = {
330 DEFINE_RES_MEM(IOC3_BYTEBUS_DEV1
, 1),
331 DEFINE_RES_MEM(IOC3_BYTEBUS_DEV2
, 1),
335 static struct mfd_cell ioc3_ds1685_cells
[] = {
337 .name
= "rtc-ds1685",
338 .resources
= ioc3_rtc_ds1685_resources
,
339 .num_resources
= ARRAY_SIZE(ioc3_rtc_ds1685_resources
),
340 .platform_data
= &ip30_rtc_platform_data
,
341 .pdata_size
= sizeof(ip30_rtc_platform_data
),
342 .id
= PLATFORM_DEVID_NONE
,
346 static int ioc3_ds1685_setup(struct ioc3_priv_data
*ipd
)
350 irq
= ioc3_map_irq(ipd
->pdev
, 6, 0);
352 ret
= mfd_add_devices(&ipd
->pdev
->dev
, 0, ioc3_ds1685_cells
,
353 ARRAY_SIZE(ioc3_ds1685_cells
),
354 &ipd
->pdev
->resource
[0], irq
, NULL
);
356 dev_err(&ipd
->pdev
->dev
, "Failed to add DS1685 subdev\n");
362 static struct resource ioc3_leds_resources
[] = {
363 DEFINE_RES_MEM(offsetof(struct ioc3
, gppr
[0]),
364 sizeof_field(struct ioc3
, gppr
[0])),
365 DEFINE_RES_MEM(offsetof(struct ioc3
, gppr
[1]),
366 sizeof_field(struct ioc3
, gppr
[1])),
369 static struct mfd_cell ioc3_led_cells
[] = {
372 .resources
= ioc3_leds_resources
,
373 .num_resources
= ARRAY_SIZE(ioc3_leds_resources
),
374 .id
= PLATFORM_DEVID_NONE
,
378 static int ioc3_led_setup(struct ioc3_priv_data
*ipd
)
382 ret
= mfd_add_devices(&ipd
->pdev
->dev
, 0, ioc3_led_cells
,
383 ARRAY_SIZE(ioc3_led_cells
),
384 &ipd
->pdev
->resource
[0], 0, ipd
->domain
);
386 dev_err(&ipd
->pdev
->dev
, "Failed to add LED subdev\n");
391 static int ip27_baseio_setup(struct ioc3_priv_data
*ipd
)
395 io_irq
= ioc3_map_irq(ipd
->pdev
, PCI_SLOT(ipd
->pdev
->devfn
),
397 ret
= ioc3_irq_domain_setup(ipd
, io_irq
);
401 ret
= ioc3_eth_setup(ipd
);
405 ret
= ioc3_serial_setup(ipd
);
409 return ioc3_m48t35_setup(ipd
);
412 static int ip27_baseio6g_setup(struct ioc3_priv_data
*ipd
)
416 io_irq
= ioc3_map_irq(ipd
->pdev
, PCI_SLOT(ipd
->pdev
->devfn
),
418 ret
= ioc3_irq_domain_setup(ipd
, io_irq
);
422 ret
= ioc3_eth_setup(ipd
);
426 ret
= ioc3_serial_setup(ipd
);
430 ret
= ioc3_m48t35_setup(ipd
);
434 return ioc3_kbd_setup(ipd
);
437 static int ip27_mio_setup(struct ioc3_priv_data
*ipd
)
441 ret
= ioc3_irq_domain_setup(ipd
, ipd
->pdev
->irq
);
445 ret
= ioc3_serial_setup(ipd
);
449 return ioc3_kbd_setup(ipd
);
452 static int ip30_sysboard_setup(struct ioc3_priv_data
*ipd
)
456 io_irq
= ioc3_map_irq(ipd
->pdev
, PCI_SLOT(ipd
->pdev
->devfn
),
458 ret
= ioc3_irq_domain_setup(ipd
, io_irq
);
462 ret
= ioc3_eth_setup(ipd
);
466 ret
= ioc3_serial_setup(ipd
);
470 ret
= ioc3_kbd_setup(ipd
);
474 ret
= ioc3_ds1685_setup(ipd
);
478 return ioc3_led_setup(ipd
);
481 static int ioc3_menet_setup(struct ioc3_priv_data
*ipd
)
485 io_irq
= ioc3_map_irq(ipd
->pdev
, PCI_SLOT(ipd
->pdev
->devfn
),
487 ret
= ioc3_irq_domain_setup(ipd
, io_irq
);
491 ret
= ioc3_eth_setup(ipd
);
495 return ioc3_serial_setup(ipd
);
498 static int ioc3_menet4_setup(struct ioc3_priv_data
*ipd
)
500 return ioc3_eth_setup(ipd
);
503 static int ioc3_cad_duo_setup(struct ioc3_priv_data
*ipd
)
507 io_irq
= ioc3_map_irq(ipd
->pdev
, PCI_SLOT(ipd
->pdev
->devfn
),
509 ret
= ioc3_irq_domain_setup(ipd
, io_irq
);
513 ret
= ioc3_eth_setup(ipd
);
517 return ioc3_kbd_setup(ipd
);
520 /* Helper macro for filling ioc3_info array */
521 #define IOC3_SID(_name, _sid, _setup) \
524 .sid = PCI_VENDOR_ID_SGI | (IOC3_SUBSYS_ ## _sid << 16), \
531 int (*setup
)(struct ioc3_priv_data
*ipd
);
533 IOC3_SID("IP27 BaseIO6G", IP27_BASEIO6G
, &ip27_baseio6g_setup
),
534 IOC3_SID("IP27 MIO", IP27_MIO
, &ip27_mio_setup
),
535 IOC3_SID("IP27 BaseIO", IP27_BASEIO
, &ip27_baseio_setup
),
536 IOC3_SID("IP29 System Board", IP29_SYSBOARD
, &ip27_baseio6g_setup
),
537 IOC3_SID("IP30 System Board", IP30_SYSBOARD
, &ip30_sysboard_setup
),
538 IOC3_SID("MENET", MENET
, &ioc3_menet_setup
),
539 IOC3_SID("MENET4", MENET4
, &ioc3_menet4_setup
)
543 static int ioc3_setup(struct ioc3_priv_data
*ipd
)
549 writel(~0, &ipd
->regs
->sio_iec
);
550 writel(~0, &ipd
->regs
->sio_ir
);
551 writel(0, &ipd
->regs
->eth
.eier
);
552 writel(~0, &ipd
->regs
->eth
.eisr
);
554 /* Read subsystem vendor id and subsystem id */
555 pci_read_config_dword(ipd
->pdev
, PCI_SUBSYSTEM_VENDOR_ID
, &sid
);
557 for (i
= 0; i
< ARRAY_SIZE(ioc3_infos
); i
++)
558 if (sid
== ioc3_infos
[i
].sid
) {
559 pr_info("ioc3: %s\n", ioc3_infos
[i
].name
);
560 return ioc3_infos
[i
].setup(ipd
);
563 /* Treat everything not identified by PCI subid as CAD DUO */
564 pr_info("ioc3: CAD DUO\n");
565 return ioc3_cad_duo_setup(ipd
);
568 static int ioc3_mfd_probe(struct pci_dev
*pdev
,
569 const struct pci_device_id
*pci_id
)
571 struct ioc3_priv_data
*ipd
;
572 struct ioc3 __iomem
*regs
;
575 ret
= pci_enable_device(pdev
);
579 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, IOC3_LATENCY
);
580 pci_set_master(pdev
);
582 ret
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64));
584 pr_err("%s: No usable DMA configuration, aborting.\n",
586 goto out_disable_device
;
589 /* Set up per-IOC3 data */
590 ipd
= devm_kzalloc(&pdev
->dev
, sizeof(struct ioc3_priv_data
),
594 goto out_disable_device
;
599 * Map all IOC3 registers. These are shared between subdevices
600 * so the main IOC3 module manages them.
602 regs
= pci_ioremap_bar(pdev
, 0);
604 dev_warn(&pdev
->dev
, "ioc3: Unable to remap PCI BAR for %s.\n",
607 goto out_disable_device
;
611 /* Track PCI-device specific data */
612 pci_set_drvdata(pdev
, ipd
);
614 ret
= ioc3_setup(ipd
);
616 /* Remove all already added MFD devices */
617 mfd_remove_devices(&ipd
->pdev
->dev
);
619 struct fwnode_handle
*fn
= ipd
->domain
->fwnode
;
621 irq_domain_remove(ipd
->domain
);
622 irq_domain_free_fwnode(fn
);
623 free_irq(ipd
->domain_irq
, (void *)ipd
);
625 pci_iounmap(pdev
, regs
);
626 goto out_disable_device
;
632 pci_disable_device(pdev
);
636 static void ioc3_mfd_remove(struct pci_dev
*pdev
)
638 struct ioc3_priv_data
*ipd
;
640 ipd
= pci_get_drvdata(pdev
);
642 /* Clear and disable all IRQs */
643 writel(~0, &ipd
->regs
->sio_iec
);
644 writel(~0, &ipd
->regs
->sio_ir
);
646 /* Release resources */
647 mfd_remove_devices(&ipd
->pdev
->dev
);
649 struct fwnode_handle
*fn
= ipd
->domain
->fwnode
;
651 irq_domain_remove(ipd
->domain
);
652 irq_domain_free_fwnode(fn
);
653 free_irq(ipd
->domain_irq
, (void *)ipd
);
655 pci_iounmap(pdev
, ipd
->regs
);
656 pci_disable_device(pdev
);
659 static struct pci_device_id ioc3_mfd_id_table
[] = {
660 { PCI_VENDOR_ID_SGI
, PCI_DEVICE_ID_SGI_IOC3
, PCI_ANY_ID
, PCI_ANY_ID
},
663 MODULE_DEVICE_TABLE(pci
, ioc3_mfd_id_table
);
665 static struct pci_driver ioc3_mfd_driver
= {
667 .id_table
= ioc3_mfd_id_table
,
668 .probe
= ioc3_mfd_probe
,
669 .remove
= ioc3_mfd_remove
,
672 module_pci_driver(ioc3_mfd_driver
);
674 MODULE_AUTHOR("Thomas Bogendoerfer <tbogendoerfer@suse.de>");
675 MODULE_DESCRIPTION("SGI IOC3 MFD driver");
676 MODULE_LICENSE("GPL v2");