drivers/misc/mei/hw-me.c

   1 /*
   2  *
   3  * Intel Management Engine Interface (Intel MEI) Linux driver
   4  * Copyright (c) 2003-2012, Intel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  */
  16
  17 #include <linux/pci.h>
  18
  19 #include <linux/kthread.h>
  20 #include <linux/interrupt.h>
  21
  22 #include "mei_dev.h"
  23 #include "hw-me.h"
  24
  25 #include "hbm.h"
  26
  27
  28 /**
  29  * mei_me_reg_read - Reads 32bit data from the mei device
  30  *
  31  * @dev: the device structure
  32  * @offset: offset from which to read the data
  33  *
  34  * returns register value (u32)
  35  */
  36 static inline u32 mei_me_reg_read(const struct mei_me_hw *hw,
  37                                unsigned long offset)
  38 {
  39         return ioread32(hw->mem_addr + offset);
  40 }
  41
  42
  43 /**
  44  * mei_me_reg_write - Writes 32bit data to the mei device
  45  *
  46  * @dev: the device structure
  47  * @offset: offset from which to write the data
  48  * @value: register value to write (u32)
  49  */
  50 static inline void mei_me_reg_write(const struct mei_me_hw *hw,
  51                                  unsigned long offset, u32 value)
  52 {
  53         iowrite32(value, hw->mem_addr + offset);
  54 }
  55
  56 /**
  57  * mei_me_mecbrw_read - Reads 32bit data from ME circular buffer
  58  *  read window register
  59  *
  60  * @dev: the device structure
  61  *
  62  * returns ME_CB_RW register value (u32)
  63  */
  64 static u32 mei_me_mecbrw_read(const struct mei_device *dev)
  65 {
  66         return mei_me_reg_read(to_me_hw(dev), ME_CB_RW);
  67 }
  68 /**
  69  * mei_me_mecsr_read - Reads 32bit data from the ME CSR
  70  *
  71  * @dev: the device structure
  72  *
  73  * returns ME_CSR_HA register value (u32)
  74  */
  75 static inline u32 mei_me_mecsr_read(const struct mei_me_hw *hw)
  76 {
  77         return mei_me_reg_read(hw, ME_CSR_HA);
  78 }
  79
  80 /**
  81  * mei_hcsr_read - Reads 32bit data from the host CSR
  82  *
  83  * @dev: the device structure
  84  *
  85  * returns H_CSR register value (u32)
  86  */
  87 static inline u32 mei_hcsr_read(const struct mei_me_hw *hw)
  88 {
  89         return mei_me_reg_read(hw, H_CSR);
  90 }
  91
  92 /**
  93  * mei_hcsr_set - writes H_CSR register to the mei device,
  94  * and ignores the H_IS bit for it is write-one-to-zero.
  95  *
  96  * @dev: the device structure
  97  */
  98 static inline void mei_hcsr_set(struct mei_me_hw *hw, u32 hcsr)
  99 {
 100         hcsr &= ~H_IS;
 101         mei_me_reg_write(hw, H_CSR, hcsr);
 102 }
 103
 104
 105 /**
 106  * mei_me_hw_config - configure hw dependent settings
 107  *
 108  * @dev: mei device
 109  */
 110 static void mei_me_hw_config(struct mei_device *dev)
 111 {
 112         u32 hcsr = mei_hcsr_read(to_me_hw(dev));
 113         /* Doesn't change in runtime */
 114         dev->hbuf_depth = (hcsr & H_CBD) >> 24;
 115 }
 116 /**
 117  * mei_clear_interrupts - clear and stop interrupts
 118  *
 119  * @dev: the device structure
 120  */
 121 static void mei_me_intr_clear(struct mei_device *dev)
 122 {
 123         struct mei_me_hw *hw = to_me_hw(dev);
 124         u32 hcsr = mei_hcsr_read(hw);
 125         if ((hcsr & H_IS) == H_IS)
 126                 mei_me_reg_write(hw, H_CSR, hcsr);
 127 }
 128 /**
 129  * mei_me_intr_enable - enables mei device interrupts
 130  *
 131  * @dev: the device structure
 132  */
 133 static void mei_me_intr_enable(struct mei_device *dev)
 134 {
 135         struct mei_me_hw *hw = to_me_hw(dev);
 136         u32 hcsr = mei_hcsr_read(hw);
 137         hcsr |= H_IE;
 138         mei_hcsr_set(hw, hcsr);
 139 }
 140
 141 /**
 142  * mei_disable_interrupts - disables mei device interrupts
 143  *
 144  * @dev: the device structure
 145  */
 146 static void mei_me_intr_disable(struct mei_device *dev)
 147 {
 148         struct mei_me_hw *hw = to_me_hw(dev);
 149         u32 hcsr = mei_hcsr_read(hw);
 150         hcsr  &= ~H_IE;
 151         mei_hcsr_set(hw, hcsr);
 152 }
 153
 154 /**
 155  * mei_me_hw_reset_release - release device from the reset
 156  *
 157  * @dev: the device structure
 158  */
 159 static void mei_me_hw_reset_release(struct mei_device *dev)
 160 {
 161         struct mei_me_hw *hw = to_me_hw(dev);
 162         u32 hcsr = mei_hcsr_read(hw);
 163
 164         hcsr |= H_IG;
 165         hcsr &= ~H_RST;
 166         mei_hcsr_set(hw, hcsr);
 167 }
 168 /**
 169  * mei_me_hw_reset - resets fw via mei csr register.
 170  *
 171  * @dev: the device structure
 172  * @intr_enable: if interrupt should be enabled after reset.
 173  */
 174 static void mei_me_hw_reset(struct mei_device *dev, bool intr_enable)
 175 {
 176         struct mei_me_hw *hw = to_me_hw(dev);
 177         u32 hcsr = mei_hcsr_read(hw);
 178
 179         dev_dbg(&dev->pdev->dev, "before reset HCSR = 0x%08x.\n", hcsr);
 180
 181         hcsr |= (H_RST | H_IG);
 182
 183         if (intr_enable)
 184                 hcsr |= H_IE;
 185         else
 186                 hcsr |= ~H_IE;
 187
 188         mei_hcsr_set(hw, hcsr);
 189
 190         if (dev->dev_state == MEI_DEV_POWER_DOWN)
 191                 mei_me_hw_reset_release(dev);
 192
 193         dev_dbg(&dev->pdev->dev, "current HCSR = 0x%08x.\n", mei_hcsr_read(hw));
 194 }
 195
 196 /**
 197  * mei_me_host_set_ready - enable device
 198  *
 199  * @dev - mei device
 200  * returns bool
 201  */
 202
 203 static void mei_me_host_set_ready(struct mei_device *dev)
 204 {
 205         struct mei_me_hw *hw = to_me_hw(dev);
 206         hw->host_hw_state |= H_IE | H_IG | H_RDY;
 207         mei_hcsr_set(hw, hw->host_hw_state);
 208 }
 209 /**
 210  * mei_me_host_is_ready - check whether the host has turned ready
 211  *
 212  * @dev - mei device
 213  * returns bool
 214  */
 215 static bool mei_me_host_is_ready(struct mei_device *dev)
 216 {
 217         struct mei_me_hw *hw = to_me_hw(dev);
 218         hw->host_hw_state = mei_hcsr_read(hw);
 219         return (hw->host_hw_state & H_RDY) == H_RDY;
 220 }
 221
 222 /**
 223  * mei_me_hw_is_ready - check whether the me(hw) has turned ready
 224  *
 225  * @dev - mei device
 226  * returns bool
 227  */
 228 static bool mei_me_hw_is_ready(struct mei_device *dev)
 229 {
 230         struct mei_me_hw *hw = to_me_hw(dev);
 231         hw->me_hw_state = mei_me_mecsr_read(hw);
 232         return (hw->me_hw_state & ME_RDY_HRA) == ME_RDY_HRA;
 233 }
 234
 235 static int mei_me_hw_ready_wait(struct mei_device *dev)
 236 {
 237         int err;
 238         if (mei_me_hw_is_ready(dev))
 239                 return 0;
 240
 241         mutex_unlock(&dev->device_lock);
 242         err = wait_event_interruptible_timeout(dev->wait_hw_ready,
 243                         dev->recvd_hw_ready, MEI_INTEROP_TIMEOUT);
 244         mutex_lock(&dev->device_lock);
 245         if (!err && !dev->recvd_hw_ready) {
 246                 dev_err(&dev->pdev->dev,
 247                         "wait hw ready failed. status = 0x%x\n", err);
 248                 return -ETIMEDOUT;
 249         }
 250
 251         dev->recvd_hw_ready = false;
 252         return 0;
 253 }
 254
 255 static int mei_me_hw_start(struct mei_device *dev)
 256 {
 257         int ret = mei_me_hw_ready_wait(dev);
 258         if (ret)
 259                 return ret;
 260         dev_dbg(&dev->pdev->dev, "hw is ready\n");
 261
 262         mei_me_host_set_ready(dev);
 263         return ret;
 264 }
 265
 266
 267 /**
 268  * mei_hbuf_filled_slots - gets number of device filled buffer slots
 269  *
 270  * @dev: the device structure
 271  *
 272  * returns number of filled slots
 273  */
 274 static unsigned char mei_hbuf_filled_slots(struct mei_device *dev)
 275 {
 276         struct mei_me_hw *hw = to_me_hw(dev);
 277         char read_ptr, write_ptr;
 278
 279         hw->host_hw_state = mei_hcsr_read(hw);
 280
 281         read_ptr = (char) ((hw->host_hw_state & H_CBRP) >> 8);
 282         write_ptr = (char) ((hw->host_hw_state & H_CBWP) >> 16);
 283
 284         return (unsigned char) (write_ptr - read_ptr);
 285 }
 286
 287 /**
 288  * mei_me_hbuf_is_empty - checks if host buffer is empty.
 289  *
 290  * @dev: the device structure
 291  *
 292  * returns true if empty, false - otherwise.
 293  */
 294 static bool mei_me_hbuf_is_empty(struct mei_device *dev)
 295 {
 296         return mei_hbuf_filled_slots(dev) == 0;
 297 }
 298
 299 /**
 300  * mei_me_hbuf_empty_slots - counts write empty slots.
 301  *
 302  * @dev: the device structure
 303  *
 304  * returns -1(ESLOTS_OVERFLOW) if overflow, otherwise empty slots count
 305  */
 306 static int mei_me_hbuf_empty_slots(struct mei_device *dev)
 307 {
 308         unsigned char filled_slots, empty_slots;
 309
 310         filled_slots = mei_hbuf_filled_slots(dev);
 311         empty_slots = dev->hbuf_depth - filled_slots;
 312
 313         /* check for overflow */
 314         if (filled_slots > dev->hbuf_depth)
 315                 return -EOVERFLOW;
 316
 317         return empty_slots;
 318 }
 319
 320 static size_t mei_me_hbuf_max_len(const struct mei_device *dev)
 321 {
 322         return dev->hbuf_depth * sizeof(u32) - sizeof(struct mei_msg_hdr);
 323 }
 324
 325
 326 /**
 327  * mei_write_message - writes a message to mei device.
 328  *
 329  * @dev: the device structure
 330  * @header: mei HECI header of message
 331  * @buf: message payload will be written
 332  *
 333  * This function returns -EIO if write has failed
 334  */
 335 static int mei_me_write_message(struct mei_device *dev,
 336                         struct mei_msg_hdr *header,
 337                         unsigned char *buf)
 338 {
 339         struct mei_me_hw *hw = to_me_hw(dev);
 340         unsigned long rem;
 341         unsigned long length = header->length;
 342         u32 *reg_buf = (u32 *)buf;
 343         u32 hcsr;
 344         u32 dw_cnt;
 345         int i;
 346         int empty_slots;
 347
 348         dev_dbg(&dev->pdev->dev, MEI_HDR_FMT, MEI_HDR_PRM(header));
 349
 350         empty_slots = mei_hbuf_empty_slots(dev);
 351         dev_dbg(&dev->pdev->dev, "empty slots = %hu.\n", empty_slots);
 352
 353         dw_cnt = mei_data2slots(length);
 354         if (empty_slots < 0 || dw_cnt > empty_slots)
 355                 return -EIO;
 356
 357         mei_me_reg_write(hw, H_CB_WW, *((u32 *) header));
 358
 359         for (i = 0; i < length / 4; i++)
 360                 mei_me_reg_write(hw, H_CB_WW, reg_buf[i]);
 361
 362         rem = length & 0x3;
 363         if (rem > 0) {
 364                 u32 reg = 0;
 365                 memcpy(&reg, &buf[length - rem], rem);
 366                 mei_me_reg_write(hw, H_CB_WW, reg);
 367         }
 368
 369         hcsr = mei_hcsr_read(hw) | H_IG;
 370         mei_hcsr_set(hw, hcsr);
 371         if (!mei_me_hw_is_ready(dev))
 372                 return -EIO;
 373
 374         return 0;
 375 }
 376
 377 /**
 378  * mei_me_count_full_read_slots - counts read full slots.
 379  *
 380  * @dev: the device structure
 381  *
 382  * returns -1(ESLOTS_OVERFLOW) if overflow, otherwise filled slots count
 383  */
 384 static int mei_me_count_full_read_slots(struct mei_device *dev)
 385 {
 386         struct mei_me_hw *hw = to_me_hw(dev);
 387         char read_ptr, write_ptr;
 388         unsigned char buffer_depth, filled_slots;
 389
 390         hw->me_hw_state = mei_me_mecsr_read(hw);
 391         buffer_depth = (unsigned char)((hw->me_hw_state & ME_CBD_HRA) >> 24);
 392         read_ptr = (char) ((hw->me_hw_state & ME_CBRP_HRA) >> 8);
 393         write_ptr = (char) ((hw->me_hw_state & ME_CBWP_HRA) >> 16);
 394         filled_slots = (unsigned char) (write_ptr - read_ptr);
 395
 396         /* check for overflow */
 397         if (filled_slots > buffer_depth)
 398                 return -EOVERFLOW;
 399
 400         dev_dbg(&dev->pdev->dev, "filled_slots =%08x\n", filled_slots);
 401         return (int)filled_slots;
 402 }
 403
 404 /**
 405  * mei_me_read_slots - reads a message from mei device.
 406  *
 407  * @dev: the device structure
 408  * @buffer: message buffer will be written
 409  * @buffer_length: message size will be read
 410  */
 411 static int mei_me_read_slots(struct mei_device *dev, unsigned char *buffer,
 412                     unsigned long buffer_length)
 413 {
 414         struct mei_me_hw *hw = to_me_hw(dev);
 415         u32 *reg_buf = (u32 *)buffer;
 416         u32 hcsr;
 417
 418         for (; buffer_length >= sizeof(u32); buffer_length -= sizeof(u32))
 419                 *reg_buf++ = mei_me_mecbrw_read(dev);
 420
 421         if (buffer_length > 0) {
 422                 u32 reg = mei_me_mecbrw_read(dev);
 423                 memcpy(reg_buf, &reg, buffer_length);
 424         }
 425
 426         hcsr = mei_hcsr_read(hw) | H_IG;
 427         mei_hcsr_set(hw, hcsr);
 428         return 0;
 429 }
 430
 431 /**
 432  * mei_me_irq_quick_handler - The ISR of the MEI device
 433  *
 434  * @irq: The irq number
 435  * @dev_id: pointer to the device structure
 436  *
 437  * returns irqreturn_t
 438  */
 439
 440 irqreturn_t mei_me_irq_quick_handler(int irq, void *dev_id)
 441 {
 442         struct mei_device *dev = (struct mei_device *) dev_id;
 443         struct mei_me_hw *hw = to_me_hw(dev);
 444         u32 csr_reg = mei_hcsr_read(hw);
 445
 446         if ((csr_reg & H_IS) != H_IS)
 447                 return IRQ_NONE;
 448
 449         /* clear H_IS bit in H_CSR */
 450         mei_me_reg_write(hw, H_CSR, csr_reg);
 451
 452         return IRQ_WAKE_THREAD;
 453 }
 454
 455 /**
 456  * mei_me_irq_thread_handler - function called after ISR to handle the interrupt
 457  * processing.
 458  *
 459  * @irq: The irq number
 460  * @dev_id: pointer to the device structure
 461  *
 462  * returns irqreturn_t
 463  *
 464  */
 465 irqreturn_t mei_me_irq_thread_handler(int irq, void *dev_id)
 466 {
 467         struct mei_device *dev = (struct mei_device *) dev_id;
 468         struct mei_cl_cb complete_list;
 469         s32 slots;
 470         int rets;
 471
 472         dev_dbg(&dev->pdev->dev, "function called after ISR to handle the interrupt processing.\n");
 473         /* initialize our complete list */
 474         mutex_lock(&dev->device_lock);
 475         mei_io_list_init(&complete_list);
 476
 477         /* Ack the interrupt here
 478          * In case of MSI we don't go through the quick handler */
 479         if (pci_dev_msi_enabled(dev->pdev))
 480                 mei_clear_interrupts(dev);
 481
 482         /* check if ME wants a reset */
 483         if (!mei_hw_is_ready(dev) &&
 484             dev->dev_state != MEI_DEV_RESETTING &&
 485             dev->dev_state != MEI_DEV_INITIALIZING) {
 486                 dev_dbg(&dev->pdev->dev, "FW not ready.\n");
 487                 mei_reset(dev, 1);
 488                 mutex_unlock(&dev->device_lock);
 489                 return IRQ_HANDLED;
 490         }
 491
 492         /*  check if we need to start the dev */
 493         if (!mei_host_is_ready(dev)) {
 494                 if (mei_hw_is_ready(dev)) {
 495                         dev_dbg(&dev->pdev->dev, "we need to start the dev.\n");
 496
 497                         dev->recvd_hw_ready = true;
 498                         wake_up_interruptible(&dev->wait_hw_ready);
 499
 500                         mutex_unlock(&dev->device_lock);
 501                         return IRQ_HANDLED;
 502                 } else {
 503                         dev_dbg(&dev->pdev->dev, "Reset Completed.\n");
 504                         mei_me_hw_reset_release(dev);
 505                         mutex_unlock(&dev->device_lock);
 506                         return IRQ_HANDLED;
 507                 }
 508         }
 509         /* check slots available for reading */
 510         slots = mei_count_full_read_slots(dev);
 511         while (slots > 0) {
 512                 /* we have urgent data to send so break the read */
 513                 if (dev->wr_ext_msg.hdr.length)
 514                         break;
 515                 dev_dbg(&dev->pdev->dev, "slots =%08x\n", slots);
 516                 dev_dbg(&dev->pdev->dev, "call mei_irq_read_handler.\n");
 517                 rets = mei_irq_read_handler(dev, &complete_list, &slots);
 518                 if (rets)
 519                         goto end;
 520         }
 521         rets = mei_irq_write_handler(dev, &complete_list);
 522 end:
 523         dev_dbg(&dev->pdev->dev, "end of bottom half function.\n");
 524         dev->hbuf_is_ready = mei_hbuf_is_ready(dev);
 525
 526         mutex_unlock(&dev->device_lock);
 527
 528         mei_irq_compl_handler(dev, &complete_list);
 529
 530         return IRQ_HANDLED;
 531 }
 532 static const struct mei_hw_ops mei_me_hw_ops = {
 533
 534         .host_is_ready = mei_me_host_is_ready,
 535
 536         .hw_is_ready = mei_me_hw_is_ready,
 537         .hw_reset = mei_me_hw_reset,
 538         .hw_config = mei_me_hw_config,
 539         .hw_start = mei_me_hw_start,
 540
 541         .intr_clear = mei_me_intr_clear,
 542         .intr_enable = mei_me_intr_enable,
 543         .intr_disable = mei_me_intr_disable,
 544
 545         .hbuf_free_slots = mei_me_hbuf_empty_slots,
 546         .hbuf_is_ready = mei_me_hbuf_is_empty,
 547         .hbuf_max_len = mei_me_hbuf_max_len,
 548
 549         .write = mei_me_write_message,
 550
 551         .rdbuf_full_slots = mei_me_count_full_read_slots,
 552         .read_hdr = mei_me_mecbrw_read,
 553         .read = mei_me_read_slots
 554 };
 555
 556 /**
 557  * mei_me_dev_init - allocates and initializes the mei device structure
 558  *
 559  * @pdev: The pci device structure
 560  *
 561  * returns The mei_device_device pointer on success, NULL on failure.
 562  */
 563 struct mei_device *mei_me_dev_init(struct pci_dev *pdev)
 564 {
 565         struct mei_device *dev;
 566
 567         dev = kzalloc(sizeof(struct mei_device) +
 568                          sizeof(struct mei_me_hw), GFP_KERNEL);
 569         if (!dev)
 570                 return NULL;
 571
 572         mei_device_init(dev);
 573
 574         dev->ops = &mei_me_hw_ops;
 575
 576         dev->pdev = pdev;
 577         return dev;
 578 }
 579