drivers/misc/mei/pci-me.c

   1 /*
   2  *
   3  * Intel Management Engine Interface (Intel MEI) Linux driver
   4  * Copyright (c) 2003-2012, Intel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  */
  16 #include <linux/module.h>
  17 #include <linux/moduleparam.h>
  18 #include <linux/kernel.h>
  19 #include <linux/device.h>
  20 #include <linux/fs.h>
  21 #include <linux/errno.h>
  22 #include <linux/types.h>
  23 #include <linux/fcntl.h>
  24 #include <linux/pci.h>
  25 #include <linux/poll.h>
  26 #include <linux/ioctl.h>
  27 #include <linux/cdev.h>
  28 #include <linux/sched.h>
  29 #include <linux/uuid.h>
  30 #include <linux/compat.h>
  31 #include <linux/jiffies.h>
  32 #include <linux/interrupt.h>
  33
  34 #include <linux/pm_domain.h>
  35 #include <linux/pm_runtime.h>
  36
  37 #include <linux/mei.h>
  38
  39 #include "mei_dev.h"
  40 #include "client.h"
  41 #include "hw-me-regs.h"
  42 #include "hw-me.h"
  43
  44 static bool disable_msi;
  45 module_param(disable_msi, bool, 0);
  46
  47 /* mei_pci_tbl - PCI Device ID Table */
  48 static const struct pci_device_id mei_me_pci_tbl[] = {
  49         {MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, mei_me_legacy_cfg)},
  50         {MEI_PCI_DEVICE(MEI_DEV_ID_82G35, mei_me_legacy_cfg)},
  51         {MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, mei_me_legacy_cfg)},
  52         {MEI_PCI_DEVICE(MEI_DEV_ID_82G965, mei_me_legacy_cfg)},
  53         {MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, mei_me_legacy_cfg)},
  54         {MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, mei_me_legacy_cfg)},
  55         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, mei_me_legacy_cfg)},
  56         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, mei_me_legacy_cfg)},
  57         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, mei_me_legacy_cfg)},
  58         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, mei_me_legacy_cfg)},
  59         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, mei_me_legacy_cfg)},
  60
  61         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, mei_me_legacy_cfg)},
  62         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, mei_me_legacy_cfg)},
  63         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, mei_me_legacy_cfg)},
  64         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, mei_me_legacy_cfg)},
  65         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, mei_me_legacy_cfg)},
  66         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, mei_me_legacy_cfg)},
  67         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, mei_me_legacy_cfg)},
  68         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, mei_me_legacy_cfg)},
  69         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, mei_me_legacy_cfg)},
  70         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, mei_me_ich_cfg)},
  71         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, mei_me_ich_cfg)},
  72         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, mei_me_ich_cfg)},
  73         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, mei_me_ich_cfg)},
  74
  75         {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, mei_me_pch_cfg)},
  76         {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, mei_me_pch_cfg)},
  77         {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, mei_me_pch_cpt_pbg_cfg)},
  78         {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, mei_me_pch_cpt_pbg_cfg)},
  79         {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, mei_me_pch_cfg)},
  80         {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, mei_me_pch_cfg)},
  81         {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, mei_me_pch_cfg)},
  82         {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, mei_me_pch8_sps_cfg)},
  83         {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, mei_me_pch8_sps_cfg)},
  84         {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, mei_me_pch8_cfg)},
  85         {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, mei_me_pch8_sps_cfg)},
  86         {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, mei_me_pch8_cfg)},
  87         {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, mei_me_pch8_cfg)},
  88
  89         {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, mei_me_pch8_cfg)},
  90         {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, mei_me_pch8_cfg)},
  91         {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, mei_me_pch8_sps_cfg)},
  92         {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, mei_me_pch8_sps_cfg)},
  93         {MEI_PCI_DEVICE(MEI_DEV_ID_LBG, mei_me_pch8_cfg)},
  94
  95         {MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, mei_me_pch8_cfg)},
  96         {MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, mei_me_pch8_cfg)},
  97
  98         {MEI_PCI_DEVICE(MEI_DEV_ID_KBP, mei_me_pch8_cfg)},
  99         {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_2, mei_me_pch8_cfg)},
 100
 101         /* required last entry */
 102         {0, }
 103 };
 104
 105 MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
 106
 107 #ifdef CONFIG_PM
 108 static inline void mei_me_set_pm_domain(struct mei_device *dev);
 109 static inline void mei_me_unset_pm_domain(struct mei_device *dev);
 110 #else
 111 static inline void mei_me_set_pm_domain(struct mei_device *dev) {}
 112 static inline void mei_me_unset_pm_domain(struct mei_device *dev) {}
 113 #endif /* CONFIG_PM */
 114
 115 /**
 116  * mei_me_quirk_probe - probe for devices that doesn't valid ME interface
 117  *
 118  * @pdev: PCI device structure
 119  * @cfg: per generation config
 120  *
 121  * Return: true if ME Interface is valid, false otherwise
 122  */
 123 static bool mei_me_quirk_probe(struct pci_dev *pdev,
 124                                 const struct mei_cfg *cfg)
 125 {
 126         if (cfg->quirk_probe && cfg->quirk_probe(pdev)) {
 127                 dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
 128                 return false;
 129         }
 130
 131         return true;
 132 }
 133
 134 /**
 135  * mei_me_probe - Device Initialization Routine
 136  *
 137  * @pdev: PCI device structure
 138  * @ent: entry in kcs_pci_tbl
 139  *
 140  * Return: 0 on success, <0 on failure.
 141  */
 142 static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 143 {
 144         const struct mei_cfg *cfg = (struct mei_cfg *)(ent->driver_data);
 145         struct mei_device *dev;
 146         struct mei_me_hw *hw;
 147         unsigned int irqflags;
 148         int err;
 149
 150
 151         if (!mei_me_quirk_probe(pdev, cfg))
 152                 return -ENODEV;
 153
 154         /* enable pci dev */
 155         err = pcim_enable_device(pdev);
 156         if (err) {
 157                 dev_err(&pdev->dev, "failed to enable pci device.\n");
 158                 goto end;
 159         }
 160         /* set PCI host mastering  */
 161         pci_set_master(pdev);
 162         /* pci request regions and mapping IO device memory for mei driver */
 163         err = pcim_iomap_regions(pdev, BIT(0), KBUILD_MODNAME);
 164         if (err) {
 165                 dev_err(&pdev->dev, "failed to get pci regions.\n");
 166                 goto end;
 167         }
 168
 169         if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) ||
 170             dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
 171
 172                 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
 173                 if (err)
 174                         err = dma_set_coherent_mask(&pdev->dev,
 175                                                     DMA_BIT_MASK(32));
 176         }
 177         if (err) {
 178                 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
 179                 goto end;
 180         }
 181
 182         /* allocates and initializes the mei dev structure */
 183         dev = mei_me_dev_init(pdev, cfg);
 184         if (!dev) {
 185                 err = -ENOMEM;
 186                 goto end;
 187         }
 188         hw = to_me_hw(dev);
 189         hw->mem_addr = pcim_iomap_table(pdev)[0];
 190
 191         if (!disable_msi)
 192                 pci_enable_msi(pdev);
 193
 194          /* request and enable interrupt */
 195         irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
 196
 197         err = request_threaded_irq(pdev->irq,
 198                         mei_me_irq_quick_handler,
 199                         mei_me_irq_thread_handler,
 200                         irqflags, KBUILD_MODNAME, dev);
 201         if (err) {
 202                 dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
 203                        pdev->irq);
 204                 goto end;
 205         }
 206
 207         if (mei_start(dev)) {
 208                 dev_err(&pdev->dev, "init hw failure.\n");
 209                 err = -ENODEV;
 210                 goto release_irq;
 211         }
 212
 213         pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT);
 214         pm_runtime_use_autosuspend(&pdev->dev);
 215
 216         err = mei_register(dev, &pdev->dev);
 217         if (err)
 218                 goto stop;
 219
 220         pci_set_drvdata(pdev, dev);
 221
 222         /*
 223          * MEI requires to resume from runtime suspend mode
 224          * in order to perform link reset flow upon system suspend.
 225          */
 226         pdev->dev_flags |= PCI_DEV_FLAGS_NEEDS_RESUME;
 227
 228         /*
 229          * ME maps runtime suspend/resume to D0i states,
 230          * hence we need to go around native PCI runtime service which
 231          * eventually brings the device into D3cold/hot state,
 232          * but the mei device cannot wake up from D3 unlike from D0i3.
 233          * To get around the PCI device native runtime pm,
 234          * ME uses runtime pm domain handlers which take precedence
 235          * over the driver's pm handlers.
 236          */
 237         mei_me_set_pm_domain(dev);
 238
 239         if (mei_pg_is_enabled(dev))
 240                 pm_runtime_put_noidle(&pdev->dev);
 241
 242         dev_dbg(&pdev->dev, "initialization successful.\n");
 243
 244         return 0;
 245
 246 stop:
 247         mei_stop(dev);
 248 release_irq:
 249         mei_cancel_work(dev);
 250         mei_disable_interrupts(dev);
 251         free_irq(pdev->irq, dev);
 252 end:
 253         dev_err(&pdev->dev, "initialization failed.\n");
 254         return err;
 255 }
 256
 257 /**
 258  * mei_me_shutdown - Device Removal Routine
 259  *
 260  * @pdev: PCI device structure
 261  *
 262  * mei_me_shutdown is called from the reboot notifier
 263  * it's a simplified version of remove so we go down
 264  * faster.
 265  */
 266 static void mei_me_shutdown(struct pci_dev *pdev)
 267 {
 268         struct mei_device *dev;
 269
 270         dev = pci_get_drvdata(pdev);
 271         if (!dev)
 272                 return;
 273
 274         dev_dbg(&pdev->dev, "shutdown\n");
 275         mei_stop(dev);
 276
 277         mei_me_unset_pm_domain(dev);
 278
 279         mei_disable_interrupts(dev);
 280         free_irq(pdev->irq, dev);
 281 }
 282
 283 /**
 284  * mei_me_remove - Device Removal Routine
 285  *
 286  * @pdev: PCI device structure
 287  *
 288  * mei_me_remove is called by the PCI subsystem to alert the driver
 289  * that it should release a PCI device.
 290  */
 291 static void mei_me_remove(struct pci_dev *pdev)
 292 {
 293         struct mei_device *dev;
 294
 295         dev = pci_get_drvdata(pdev);
 296         if (!dev)
 297                 return;
 298
 299         if (mei_pg_is_enabled(dev))
 300                 pm_runtime_get_noresume(&pdev->dev);
 301
 302         dev_dbg(&pdev->dev, "stop\n");
 303         mei_stop(dev);
 304
 305         mei_me_unset_pm_domain(dev);
 306
 307         mei_disable_interrupts(dev);
 308
 309         free_irq(pdev->irq, dev);
 310
 311         mei_deregister(dev);
 312 }
 313
 314 #ifdef CONFIG_PM_SLEEP
 315 static int mei_me_pci_suspend(struct device *device)
 316 {
 317         struct pci_dev *pdev = to_pci_dev(device);
 318         struct mei_device *dev = pci_get_drvdata(pdev);
 319
 320         if (!dev)
 321                 return -ENODEV;
 322
 323         dev_dbg(&pdev->dev, "suspend\n");
 324
 325         mei_stop(dev);
 326
 327         mei_disable_interrupts(dev);
 328
 329         free_irq(pdev->irq, dev);
 330         pci_disable_msi(pdev);
 331
 332         return 0;
 333 }
 334
 335 static int mei_me_pci_resume(struct device *device)
 336 {
 337         struct pci_dev *pdev = to_pci_dev(device);
 338         struct mei_device *dev;
 339         unsigned int irqflags;
 340         int err;
 341
 342         dev = pci_get_drvdata(pdev);
 343         if (!dev)
 344                 return -ENODEV;
 345
 346         pci_enable_msi(pdev);
 347
 348         irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
 349
 350         /* request and enable interrupt */
 351         err = request_threaded_irq(pdev->irq,
 352                         mei_me_irq_quick_handler,
 353                         mei_me_irq_thread_handler,
 354                         irqflags, KBUILD_MODNAME, dev);
 355
 356         if (err) {
 357                 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
 358                                 pdev->irq);
 359                 return err;
 360         }
 361
 362         err = mei_restart(dev);
 363         if (err)
 364                 return err;
 365
 366         /* Start timer if stopped in suspend */
 367         schedule_delayed_work(&dev->timer_work, HZ);
 368
 369         return 0;
 370 }
 371 #endif /* CONFIG_PM_SLEEP */
 372
 373 #ifdef CONFIG_PM
 374 static int mei_me_pm_runtime_idle(struct device *device)
 375 {
 376         struct pci_dev *pdev = to_pci_dev(device);
 377         struct mei_device *dev;
 378
 379         dev_dbg(&pdev->dev, "rpm: me: runtime_idle\n");
 380
 381         dev = pci_get_drvdata(pdev);
 382         if (!dev)
 383                 return -ENODEV;
 384         if (mei_write_is_idle(dev))
 385                 pm_runtime_autosuspend(device);
 386
 387         return -EBUSY;
 388 }
 389
 390 static int mei_me_pm_runtime_suspend(struct device *device)
 391 {
 392         struct pci_dev *pdev = to_pci_dev(device);
 393         struct mei_device *dev;
 394         int ret;
 395
 396         dev_dbg(&pdev->dev, "rpm: me: runtime suspend\n");
 397
 398         dev = pci_get_drvdata(pdev);
 399         if (!dev)
 400                 return -ENODEV;
 401
 402         mutex_lock(&dev->device_lock);
 403
 404         if (mei_write_is_idle(dev))
 405                 ret = mei_me_pg_enter_sync(dev);
 406         else
 407                 ret = -EAGAIN;
 408
 409         mutex_unlock(&dev->device_lock);
 410
 411         dev_dbg(&pdev->dev, "rpm: me: runtime suspend ret=%d\n", ret);
 412
 413         if (ret && ret != -EAGAIN)
 414                 schedule_work(&dev->reset_work);
 415
 416         return ret;
 417 }
 418
 419 static int mei_me_pm_runtime_resume(struct device *device)
 420 {
 421         struct pci_dev *pdev = to_pci_dev(device);
 422         struct mei_device *dev;
 423         int ret;
 424
 425         dev_dbg(&pdev->dev, "rpm: me: runtime resume\n");
 426
 427         dev = pci_get_drvdata(pdev);
 428         if (!dev)
 429                 return -ENODEV;
 430
 431         mutex_lock(&dev->device_lock);
 432
 433         ret = mei_me_pg_exit_sync(dev);
 434
 435         mutex_unlock(&dev->device_lock);
 436
 437         dev_dbg(&pdev->dev, "rpm: me: runtime resume ret = %d\n", ret);
 438
 439         if (ret)
 440                 schedule_work(&dev->reset_work);
 441
 442         return ret;
 443 }
 444
 445 /**
 446  * mei_me_set_pm_domain - fill and set pm domain structure for device
 447  *
 448  * @dev: mei_device
 449  */
 450 static inline void mei_me_set_pm_domain(struct mei_device *dev)
 451 {
 452         struct pci_dev *pdev  = to_pci_dev(dev->dev);
 453
 454         if (pdev->dev.bus && pdev->dev.bus->pm) {
 455                 dev->pg_domain.ops = *pdev->dev.bus->pm;
 456
 457                 dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend;
 458                 dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume;
 459                 dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle;
 460
 461                 dev_pm_domain_set(&pdev->dev, &dev->pg_domain);
 462         }
 463 }
 464
 465 /**
 466  * mei_me_unset_pm_domain - clean pm domain structure for device
 467  *
 468  * @dev: mei_device
 469  */
 470 static inline void mei_me_unset_pm_domain(struct mei_device *dev)
 471 {
 472         /* stop using pm callbacks if any */
 473         dev_pm_domain_set(dev->dev, NULL);
 474 }
 475
 476 static const struct dev_pm_ops mei_me_pm_ops = {
 477         SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend,
 478                                 mei_me_pci_resume)
 479         SET_RUNTIME_PM_OPS(
 480                 mei_me_pm_runtime_suspend,
 481                 mei_me_pm_runtime_resume,
 482                 mei_me_pm_runtime_idle)
 483 };
 484
 485 #define MEI_ME_PM_OPS   (&mei_me_pm_ops)
 486 #else
 487 #define MEI_ME_PM_OPS   NULL
 488 #endif /* CONFIG_PM */
 489 /*
 490  *  PCI driver structure
 491  */
 492 static struct pci_driver mei_me_driver = {
 493         .name = KBUILD_MODNAME,
 494         .id_table = mei_me_pci_tbl,
 495         .probe = mei_me_probe,
 496         .remove = mei_me_remove,
 497         .shutdown = mei_me_shutdown,
 498         .driver.pm = MEI_ME_PM_OPS,
 499 };
 500
 501 module_pci_driver(mei_me_driver);
 502
 503 MODULE_AUTHOR("Intel Corporation");
 504 MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
 505 MODULE_LICENSE("GPL v2");