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1 /*
2 * SN Platform GRU Driver
3 *
4 * FAULT HANDLER FOR GRU DETECTED TLB MISSES
5 *
6 * This file contains code that handles TLB misses within the GRU.
7 * These misses are reported either via interrupts or user polling of
8 * the user CB.
9 *
10 * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27 #include <linux/kernel.h>
28 #include <linux/errno.h>
29 #include <linux/spinlock.h>
30 #include <linux/mm.h>
31 #include <linux/hugetlb.h>
32 #include <linux/device.h>
33 #include <linux/io.h>
34 #include <linux/uaccess.h>
35 #include <linux/security.h>
36 #include <asm/pgtable.h>
37 #include "gru.h"
38 #include "grutables.h"
39 #include "grulib.h"
40 #include "gru_instructions.h"
41 #include <asm/uv/uv_hub.h>
42
43 /*
44 * Test if a physical address is a valid GRU GSEG address
45 */
46 static inline int is_gru_paddr(unsigned long paddr)
47 {
48 return paddr >= gru_start_paddr && paddr < gru_end_paddr;
49 }
50
51 /*
52 * Find the vma of a GRU segment. Caller must hold mmap_sem.
53 */
54 struct vm_area_struct *gru_find_vma(unsigned long vaddr)
55 {
56 struct vm_area_struct *vma;
57
58 vma = find_vma(current->mm, vaddr);
59 if (vma && vma->vm_start <= vaddr && vma->vm_ops == &gru_vm_ops)
60 return vma;
61 return NULL;
62 }
63
64 /*
65 * Find and lock the gts that contains the specified user vaddr.
66 *
67 * Returns:
68 * - *gts with the mmap_sem locked for read and the GTS locked.
69 * - NULL if vaddr invalid OR is not a valid GSEG vaddr.
70 */
71
72 static struct gru_thread_state *gru_find_lock_gts(unsigned long vaddr)
73 {
74 struct mm_struct *mm = current->mm;
75 struct vm_area_struct *vma;
76 struct gru_thread_state *gts = NULL;
77
78 down_read(&mm->mmap_sem);
79 vma = gru_find_vma(vaddr);
80 if (vma)
81 gts = gru_find_thread_state(vma, TSID(vaddr, vma));
82 if (gts)
83 mutex_lock(&gts->ts_ctxlock);
84 else
85 up_read(&mm->mmap_sem);
86 return gts;
87 }
88
89 static struct gru_thread_state *gru_alloc_locked_gts(unsigned long vaddr)
90 {
91 struct mm_struct *mm = current->mm;
92 struct vm_area_struct *vma;
93 struct gru_thread_state *gts = NULL;
94
95 down_write(&mm->mmap_sem);
96 vma = gru_find_vma(vaddr);
97 if (vma)
98 gts = gru_alloc_thread_state(vma, TSID(vaddr, vma));
99 if (gts) {
100 mutex_lock(&gts->ts_ctxlock);
101 downgrade_write(&mm->mmap_sem);
102 } else {
103 up_write(&mm->mmap_sem);
104 }
105
106 return gts;
107 }
108
109 /*
110 * Unlock a GTS that was previously locked with gru_find_lock_gts().
111 */
112 static void gru_unlock_gts(struct gru_thread_state *gts)
113 {
114 mutex_unlock(&gts->ts_ctxlock);
115 up_read(&current->mm->mmap_sem);
116 }
117
118 /*
119 * Set a CB.istatus to active using a user virtual address. This must be done
120 * just prior to a TFH RESTART. The new cb.istatus is an in-cache status ONLY.
121 * If the line is evicted, the status may be lost. The in-cache update
122 * is necessary to prevent the user from seeing a stale cb.istatus that will
123 * change as soon as the TFH restart is complete. Races may cause an
124 * occasional failure to clear the cb.istatus, but that is ok.
125 *
126 * If the cb address is not valid (should not happen, but...), nothing
127 * bad will happen.. The get_user()/put_user() will fail but there
128 * are no bad side-effects.
129 */
130 static void gru_cb_set_istatus_active(unsigned long __user *cb)
131 {
132 union {
133 struct gru_instruction_bits bits;
134 unsigned long dw;
135 } u;
136
137 if (cb) {
138 get_user(u.dw, cb);
139 u.bits.istatus = CBS_ACTIVE;
140 put_user(u.dw, cb);
141 }
142 }
143
144 /*
145 * Convert a interrupt IRQ to a pointer to the GRU GTS that caused the
146 * interrupt. Interrupts are always sent to a cpu on the blade that contains the
147 * GRU (except for headless blades which are not currently supported). A blade
148 * has N grus; a block of N consecutive IRQs is assigned to the GRUs. The IRQ
149 * number uniquely identifies the GRU chiplet on the local blade that caused the
150 * interrupt. Always called in interrupt context.
151 */
152 static inline struct gru_state *irq_to_gru(int irq)
153 {
154 return &gru_base[uv_numa_blade_id()]->bs_grus[irq - IRQ_GRU];
155 }
156
157 /*
158 * Read & clear a TFM
159 *
160 * The GRU has an array of fault maps. A map is private to a cpu
161 * Only one cpu will be accessing a cpu's fault map.
162 *
163 * This function scans the cpu-private fault map & clears all bits that
164 * are set. The function returns a bitmap that indicates the bits that
165 * were cleared. Note that sense the maps may be updated asynchronously by
166 * the GRU, atomic operations must be used to clear bits.
167 */
168 static void get_clear_fault_map(struct gru_state *gru,
169 struct gru_tlb_fault_map *imap,
170 struct gru_tlb_fault_map *dmap)
171 {
172 unsigned long i, k;
173 struct gru_tlb_fault_map *tfm;
174
175 tfm = get_tfm_for_cpu(gru, gru_cpu_fault_map_id());
176 prefetchw(tfm); /* Helps on hardware, required for emulator */
177 for (i = 0; i < BITS_TO_LONGS(GRU_NUM_CBE); i++) {
178 k = tfm->fault_bits[i];
179 if (k)
180 k = xchg(&tfm->fault_bits[i], 0UL);
181 imap->fault_bits[i] = k;
182 k = tfm->done_bits[i];
183 if (k)
184 k = xchg(&tfm->done_bits[i], 0UL);
185 dmap->fault_bits[i] = k;
186 }
187
188 /*
189 * Not functionally required but helps performance. (Required
190 * on emulator)
191 */
192 gru_flush_cache(tfm);
193 }
194
195 /*
196 * Atomic (interrupt context) & non-atomic (user context) functions to
197 * convert a vaddr into a physical address. The size of the page
198 * is returned in pageshift.
199 * returns:
200 * 0 - successful
201 * < 0 - error code
202 * 1 - (atomic only) try again in non-atomic context
203 */
204 static int non_atomic_pte_lookup(struct vm_area_struct *vma,
205 unsigned long vaddr, int write,
206 unsigned long *paddr, int *pageshift)
207 {
208 struct page *page;
209
210 /* ZZZ Need to handle HUGE pages */
211 if (is_vm_hugetlb_page(vma))
212 return -EFAULT;
213 *pageshift = PAGE_SHIFT;
214 if (get_user_pages
215 (current, current->mm, vaddr, 1, write, 0, &page, NULL) <= 0)
216 return -EFAULT;
217 *paddr = page_to_phys(page);
218 put_page(page);
219 return 0;
220 }
221
222 /*
223 * atomic_pte_lookup
224 *
225 * Convert a user virtual address to a physical address
226 * Only supports Intel large pages (2MB only) on x86_64.
227 * ZZZ - hugepage support is incomplete
228 *
229 * NOTE: mmap_sem is already held on entry to this function. This
230 * guarantees existence of the page tables.
231 */
232 static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr,
233 int write, unsigned long *paddr, int *pageshift)
234 {
235 pgd_t *pgdp;
236 pmd_t *pmdp;
237 pud_t *pudp;
238 pte_t pte;
239
240 pgdp = pgd_offset(vma->vm_mm, vaddr);
241 if (unlikely(pgd_none(*pgdp)))
242 goto err;
243
244 pudp = pud_offset(pgdp, vaddr);
245 if (unlikely(pud_none(*pudp)))
246 goto err;
247
248 pmdp = pmd_offset(pudp, vaddr);
249 if (unlikely(pmd_none(*pmdp)))
250 goto err;
251 #ifdef CONFIG_X86_64
252 if (unlikely(pmd_large(*pmdp)))
253 pte = *(pte_t *) pmdp;
254 else
255 #endif
256 pte = *pte_offset_kernel(pmdp, vaddr);
257
258 if (unlikely(!pte_present(pte) ||
259 (write && (!pte_write(pte) || !pte_dirty(pte)))))
260 return 1;
261
262 *paddr = pte_pfn(pte) << PAGE_SHIFT;
263 #ifdef CONFIG_HUGETLB_PAGE
264 *pageshift = is_vm_hugetlb_page(vma) ? HPAGE_SHIFT : PAGE_SHIFT;
265 #else
266 *pageshift = PAGE_SHIFT;
267 #endif
268 return 0;
269
270 err:
271 local_irq_enable();
272 return 1;
273 }
274
275 static int gru_vtop(struct gru_thread_state *gts, unsigned long vaddr,
276 int write, int atomic, unsigned long *gpa, int *pageshift)
277 {
278 struct mm_struct *mm = gts->ts_mm;
279 struct vm_area_struct *vma;
280 unsigned long paddr;
281 int ret, ps;
282
283 vma = find_vma(mm, vaddr);
284 if (!vma)
285 goto inval;
286
287 /*
288 * Atomic lookup is faster & usually works even if called in non-atomic
289 * context.
290 */
291 rmb(); /* Must/check ms_range_active before loading PTEs */
292 ret = atomic_pte_lookup(vma, vaddr, write, &paddr, &ps);
293 if (ret) {
294 if (atomic)
295 goto upm;
296 if (non_atomic_pte_lookup(vma, vaddr, write, &paddr, &ps))
297 goto inval;
298 }
299 if (is_gru_paddr(paddr))
300 goto inval;
301 paddr = paddr & ~((1UL << ps) - 1);
302 *gpa = uv_soc_phys_ram_to_gpa(paddr);
303 *pageshift = ps;
304 return 0;
305
306 inval:
307 return -1;
308 upm:
309 return -2;
310 }
311
312
313 /*
314 * Drop a TLB entry into the GRU. The fault is described by info in an TFH.
315 * Input:
316 * cb Address of user CBR. Null if not running in user context
317 * Return:
318 * 0 = dropin, exception, or switch to UPM successful
319 * 1 = range invalidate active
320 * < 0 = error code
321 *
322 */
323 static int gru_try_dropin(struct gru_thread_state *gts,
324 struct gru_tlb_fault_handle *tfh,
325 unsigned long __user *cb)
326 {
327 int pageshift = 0, asid, write, ret, atomic = !cb;
328 unsigned long gpa = 0, vaddr = 0;
329
330 /*
331 * NOTE: The GRU contains magic hardware that eliminates races between
332 * TLB invalidates and TLB dropins. If an invalidate occurs
333 * in the window between reading the TFH and the subsequent TLB dropin,
334 * the dropin is ignored. This eliminates the need for additional locks.
335 */
336
337 /*
338 * Error if TFH state is IDLE or FMM mode & the user issuing a UPM call.
339 * Might be a hardware race OR a stupid user. Ignore FMM because FMM
340 * is a transient state.
341 */
342 if (tfh->status != TFHSTATUS_EXCEPTION) {
343 gru_flush_cache(tfh);
344 if (tfh->status != TFHSTATUS_EXCEPTION)
345 goto failnoexception;
346 STAT(tfh_stale_on_fault);
347 }
348 if (tfh->state == TFHSTATE_IDLE)
349 goto failidle;
350 if (tfh->state == TFHSTATE_MISS_FMM && cb)
351 goto failfmm;
352
353 write = (tfh->cause & TFHCAUSE_TLB_MOD) != 0;
354 vaddr = tfh->missvaddr;
355 asid = tfh->missasid;
356 if (asid == 0)
357 goto failnoasid;
358
359 rmb(); /* TFH must be cache resident before reading ms_range_active */
360
361 /*
362 * TFH is cache resident - at least briefly. Fail the dropin
363 * if a range invalidate is active.
364 */
365 if (atomic_read(&gts->ts_gms->ms_range_active))
366 goto failactive;
367
368 ret = gru_vtop(gts, vaddr, write, atomic, &gpa, &pageshift);
369 if (ret == -1)
370 goto failinval;
371 if (ret == -2)
372 goto failupm;
373
374 if (!(gts->ts_sizeavail & GRU_SIZEAVAIL(pageshift))) {
375 gts->ts_sizeavail |= GRU_SIZEAVAIL(pageshift);
376 if (atomic || !gru_update_cch(gts, 0)) {
377 gts->ts_force_cch_reload = 1;
378 goto failupm;
379 }
380 }
381 gru_cb_set_istatus_active(cb);
382 tfh_write_restart(tfh, gpa, GAA_RAM, vaddr, asid, write,
383 GRU_PAGESIZE(pageshift));
384 STAT(tlb_dropin);
385 gru_dbg(grudev,
386 "%s: tfh 0x%p, vaddr 0x%lx, asid 0x%x, ps %d, gpa 0x%lx\n",
387 ret ? "non-atomic" : "atomic", tfh, vaddr, asid,
388 pageshift, gpa);
389 return 0;
390
391 failnoasid:
392 /* No asid (delayed unload). */
393 STAT(tlb_dropin_fail_no_asid);
394 gru_dbg(grudev, "FAILED no_asid tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
395 if (!cb)
396 tfh_user_polling_mode(tfh);
397 else
398 gru_flush_cache(tfh);
399 return -EAGAIN;
400
401 failupm:
402 /* Atomic failure switch CBR to UPM */
403 tfh_user_polling_mode(tfh);
404 STAT(tlb_dropin_fail_upm);
405 gru_dbg(grudev, "FAILED upm tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
406 return 1;
407
408 failfmm:
409 /* FMM state on UPM call */
410 gru_flush_cache(tfh);
411 STAT(tlb_dropin_fail_fmm);
412 gru_dbg(grudev, "FAILED fmm tfh: 0x%p, state %d\n", tfh, tfh->state);
413 return 0;
414
415 failnoexception:
416 /* TFH status did not show exception pending */
417 gru_flush_cache(tfh);
418 if (cb)
419 gru_flush_cache(cb);
420 STAT(tlb_dropin_fail_no_exception);
421 gru_dbg(grudev, "FAILED non-exception tfh: 0x%p, status %d, state %d\n", tfh, tfh->status, tfh->state);
422 return 0;
423
424 failidle:
425 /* TFH state was idle - no miss pending */
426 gru_flush_cache(tfh);
427 if (cb)
428 gru_flush_cache(cb);
429 STAT(tlb_dropin_fail_idle);
430 gru_dbg(grudev, "FAILED idle tfh: 0x%p, state %d\n", tfh, tfh->state);
431 return 0;
432
433 failinval:
434 /* All errors (atomic & non-atomic) switch CBR to EXCEPTION state */
435 tfh_exception(tfh);
436 STAT(tlb_dropin_fail_invalid);
437 gru_dbg(grudev, "FAILED inval tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
438 return -EFAULT;
439
440 failactive:
441 /* Range invalidate active. Switch to UPM iff atomic */
442 if (!cb)
443 tfh_user_polling_mode(tfh);
444 else
445 gru_flush_cache(tfh);
446 STAT(tlb_dropin_fail_range_active);
447 gru_dbg(grudev, "FAILED range active: tfh 0x%p, vaddr 0x%lx\n",
448 tfh, vaddr);
449 return 1;
450 }
451
452 /*
453 * Process an external interrupt from the GRU. This interrupt is
454 * caused by a TLB miss.
455 * Note that this is the interrupt handler that is registered with linux
456 * interrupt handlers.
457 */
458 irqreturn_t gru_intr(int irq, void *dev_id)
459 {
460 struct gru_state *gru;
461 struct gru_tlb_fault_map imap, dmap;
462 struct gru_thread_state *gts;
463 struct gru_tlb_fault_handle *tfh = NULL;
464 int cbrnum, ctxnum;
465
466 STAT(intr);
467
468 gru = irq_to_gru(irq);
469 if (!gru) {
470 dev_err(grudev, "GRU: invalid interrupt: cpu %d, irq %d\n",
471 raw_smp_processor_id(), irq);
472 return IRQ_NONE;
473 }
474 get_clear_fault_map(gru, &imap, &dmap);
475
476 for_each_cbr_in_tfm(cbrnum, dmap.fault_bits) {
477 complete(gru->gs_blade->bs_async_wq);
478 gru_dbg(grudev, "gid %d, cbr_done %d, done %d\n",
479 gru->gs_gid, cbrnum, gru->gs_blade->bs_async_wq->done);
480 }
481
482 for_each_cbr_in_tfm(cbrnum, imap.fault_bits) {
483 tfh = get_tfh_by_index(gru, cbrnum);
484 prefetchw(tfh); /* Helps on hdw, required for emulator */
485
486 /*
487 * When hardware sets a bit in the faultmap, it implicitly
488 * locks the GRU context so that it cannot be unloaded.
489 * The gts cannot change until a TFH start/writestart command
490 * is issued.
491 */
492 ctxnum = tfh->ctxnum;
493 gts = gru->gs_gts[ctxnum];
494
495 /*
496 * This is running in interrupt context. Trylock the mmap_sem.
497 * If it fails, retry the fault in user context.
498 */
499 if (!gts->ts_force_cch_reload &&
500 down_read_trylock(&gts->ts_mm->mmap_sem)) {
501 gru_try_dropin(gts, tfh, NULL);
502 up_read(&gts->ts_mm->mmap_sem);
503 } else {
504 tfh_user_polling_mode(tfh);
505 STAT(intr_mm_lock_failed);
506 }
507 }
508 return IRQ_HANDLED;
509 }
510
511
512 static int gru_user_dropin(struct gru_thread_state *gts,
513 struct gru_tlb_fault_handle *tfh,
514 unsigned long __user *cb)
515 {
516 struct gru_mm_struct *gms = gts->ts_gms;
517 int ret;
518
519 while (1) {
520 wait_event(gms->ms_wait_queue,
521 atomic_read(&gms->ms_range_active) == 0);
522 prefetchw(tfh); /* Helps on hdw, required for emulator */
523 ret = gru_try_dropin(gts, tfh, cb);
524 if (ret <= 0)
525 return ret;
526 STAT(call_os_wait_queue);
527 }
528 }
529
530 /*
531 * This interface is called as a result of a user detecting a "call OS" bit
532 * in a user CB. Normally means that a TLB fault has occurred.
533 * cb - user virtual address of the CB
534 */
535 int gru_handle_user_call_os(unsigned long cb)
536 {
537 struct gru_tlb_fault_handle *tfh;
538 struct gru_thread_state *gts;
539 unsigned long __user *cbp;
540 int ucbnum, cbrnum, ret = -EINVAL;
541
542 STAT(call_os);
543 gru_dbg(grudev, "address 0x%lx\n", cb);
544
545 /* sanity check the cb pointer */
546 ucbnum = get_cb_number((void *)cb);
547 if ((cb & (GRU_HANDLE_STRIDE - 1)) || ucbnum >= GRU_NUM_CB)
548 return -EINVAL;
549 cbp = (unsigned long *)cb;
550
551 gts = gru_find_lock_gts(cb);
552 if (!gts)
553 return -EINVAL;
554
555 if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE)
556 goto exit;
557
558 /*
559 * If force_unload is set, the UPM TLB fault is phony. The task
560 * has migrated to another node and the GSEG must be moved. Just
561 * unload the context. The task will page fault and assign a new
562 * context.
563 */
564 if (gts->ts_tgid_owner == current->tgid && gts->ts_blade >= 0 &&
565 gts->ts_blade != uv_numa_blade_id()) {
566 STAT(call_os_offnode_reference);
567 gts->ts_force_unload = 1;
568 }
569
570 /*
571 * CCH may contain stale data if ts_force_cch_reload is set.
572 */
573 if (gts->ts_gru && gts->ts_force_cch_reload) {
574 gts->ts_force_cch_reload = 0;
575 gru_update_cch(gts, 0);
576 }
577
578 ret = -EAGAIN;
579 cbrnum = thread_cbr_number(gts, ucbnum);
580 if (gts->ts_force_unload) {
581 gru_unload_context(gts, 1);
582 } else if (gts->ts_gru) {
583 tfh = get_tfh_by_index(gts->ts_gru, cbrnum);
584 ret = gru_user_dropin(gts, tfh, cbp);
585 }
586 exit:
587 gru_unlock_gts(gts);
588 return ret;
589 }
590
591 /*
592 * Fetch the exception detail information for a CB that terminated with
593 * an exception.
594 */
595 int gru_get_exception_detail(unsigned long arg)
596 {
597 struct control_block_extended_exc_detail excdet;
598 struct gru_control_block_extended *cbe;
599 struct gru_thread_state *gts;
600 int ucbnum, cbrnum, ret;
601
602 STAT(user_exception);
603 if (copy_from_user(&excdet, (void __user *)arg, sizeof(excdet)))
604 return -EFAULT;
605
606 gru_dbg(grudev, "address 0x%lx\n", excdet.cb);
607 gts = gru_find_lock_gts(excdet.cb);
608 if (!gts)
609 return -EINVAL;
610
611 ucbnum = get_cb_number((void *)excdet.cb);
612 if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) {
613 ret = -EINVAL;
614 } else if (gts->ts_gru) {
615 cbrnum = thread_cbr_number(gts, ucbnum);
616 cbe = get_cbe_by_index(gts->ts_gru, cbrnum);
617 prefetchw(cbe);/* Harmless on hardware, required for emulator */
618 excdet.opc = cbe->opccpy;
619 excdet.exopc = cbe->exopccpy;
620 excdet.ecause = cbe->ecause;
621 excdet.exceptdet0 = cbe->idef1upd;
622 excdet.exceptdet1 = cbe->idef3upd;
623 excdet.cbrstate = cbe->cbrstate;
624 excdet.cbrexecstatus = cbe->cbrexecstatus;
625 ret = 0;
626 } else {
627 ret = -EAGAIN;
628 }
629 gru_unlock_gts(gts);
630
631 gru_dbg(grudev,
632 "cb 0x%lx, op %d, exopc %d, cbrstate %d, cbrexecstatus 0x%x, ecause 0x%x, "
633 "exdet0 0x%lx, exdet1 0x%x\n",
634 excdet.cb, excdet.opc, excdet.exopc, excdet.cbrstate, excdet.cbrexecstatus,
635 excdet.ecause, excdet.exceptdet0, excdet.exceptdet1);
636 if (!ret && copy_to_user((void __user *)arg, &excdet, sizeof(excdet)))
637 ret = -EFAULT;
638 return ret;
639 }
640
641 /*
642 * User request to unload a context. Content is saved for possible reload.
643 */
644 static int gru_unload_all_contexts(void)
645 {
646 struct gru_thread_state *gts;
647 struct gru_state *gru;
648 int gid, ctxnum;
649
650 if (!capable(CAP_SYS_ADMIN))
651 return -EPERM;
652 foreach_gid(gid) {
653 gru = GID_TO_GRU(gid);
654 spin_lock(&gru->gs_lock);
655 for (ctxnum = 0; ctxnum < GRU_NUM_CCH; ctxnum++) {
656 gts = gru->gs_gts[ctxnum];
657 if (gts && mutex_trylock(&gts->ts_ctxlock)) {
658 spin_unlock(&gru->gs_lock);
659 gru_unload_context(gts, 1);
660 mutex_unlock(&gts->ts_ctxlock);
661 spin_lock(&gru->gs_lock);
662 }
663 }
664 spin_unlock(&gru->gs_lock);
665 }
666 return 0;
667 }
668
669 int gru_user_unload_context(unsigned long arg)
670 {
671 struct gru_thread_state *gts;
672 struct gru_unload_context_req req;
673
674 STAT(user_unload_context);
675 if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
676 return -EFAULT;
677
678 gru_dbg(grudev, "gseg 0x%lx\n", req.gseg);
679
680 if (!req.gseg)
681 return gru_unload_all_contexts();
682
683 gts = gru_find_lock_gts(req.gseg);
684 if (!gts)
685 return -EINVAL;
686
687 if (gts->ts_gru)
688 gru_unload_context(gts, 1);
689 gru_unlock_gts(gts);
690
691 return 0;
692 }
693
694 /*
695 * User request to flush a range of virtual addresses from the GRU TLB
696 * (Mainly for testing).
697 */
698 int gru_user_flush_tlb(unsigned long arg)
699 {
700 struct gru_thread_state *gts;
701 struct gru_flush_tlb_req req;
702
703 STAT(user_flush_tlb);
704 if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
705 return -EFAULT;
706
707 gru_dbg(grudev, "gseg 0x%lx, vaddr 0x%lx, len 0x%lx\n", req.gseg,
708 req.vaddr, req.len);
709
710 gts = gru_find_lock_gts(req.gseg);
711 if (!gts)
712 return -EINVAL;
713
714 gru_flush_tlb_range(gts->ts_gms, req.vaddr, req.len);
715 gru_unlock_gts(gts);
716
717 return 0;
718 }
719
720 /*
721 * Register the current task as the user of the GSEG slice.
722 * Needed for TLB fault interrupt targeting.
723 */
724 int gru_set_task_slice(long address)
725 {
726 struct gru_thread_state *gts;
727
728 STAT(set_task_slice);
729 gru_dbg(grudev, "address 0x%lx\n", address);
730 gts = gru_alloc_locked_gts(address);
731 if (!gts)
732 return -EINVAL;
733
734 gts->ts_tgid_owner = current->tgid;
735 gru_unlock_gts(gts);
736
737 return 0;
738 }