2 * Atmel MultiMedia Card Interface driver
4 * Copyright (C) 2004-2008 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/blkdev.h>
11 #include <linux/clk.h>
12 #include <linux/debugfs.h>
13 #include <linux/device.h>
14 #include <linux/dmaengine.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/err.h>
17 #include <linux/gpio.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioport.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/scatterlist.h>
24 #include <linux/seq_file.h>
25 #include <linux/slab.h>
26 #include <linux/stat.h>
28 #include <linux/mmc/host.h>
29 #include <linux/mmc/sdio.h>
31 #include <mach/atmel-mci.h>
32 #include <linux/atmel-mci.h>
33 #include <linux/atmel_pdc.h>
36 #include <asm/unaligned.h>
39 #include <mach/board.h>
41 #include "atmel-mci-regs.h"
43 #define ATMCI_DATA_ERROR_FLAGS (ATMCI_DCRCE | ATMCI_DTOE | ATMCI_OVRE | ATMCI_UNRE)
44 #define ATMCI_DMA_THRESHOLD 16
47 EVENT_CMD_COMPLETE
= 0,
53 enum atmel_mci_state
{
72 struct atmel_mci_caps
{
81 struct atmel_mci_dma
{
82 struct dma_chan
*chan
;
83 struct dma_async_tx_descriptor
*data_desc
;
87 * struct atmel_mci - MMC controller state shared between all slots
88 * @lock: Spinlock protecting the queue and associated data.
89 * @regs: Pointer to MMIO registers.
90 * @sg: Scatterlist entry currently being processed by PIO or PDC code.
91 * @pio_offset: Offset into the current scatterlist entry.
92 * @cur_slot: The slot which is currently using the controller.
93 * @mrq: The request currently being processed on @cur_slot,
94 * or NULL if the controller is idle.
95 * @cmd: The command currently being sent to the card, or NULL.
96 * @data: The data currently being transferred, or NULL if no data
97 * transfer is in progress.
98 * @data_size: just data->blocks * data->blksz.
99 * @dma: DMA client state.
100 * @data_chan: DMA channel being used for the current data transfer.
101 * @cmd_status: Snapshot of SR taken upon completion of the current
102 * command. Only valid when EVENT_CMD_COMPLETE is pending.
103 * @data_status: Snapshot of SR taken upon completion of the current
104 * data transfer. Only valid when EVENT_DATA_COMPLETE or
105 * EVENT_DATA_ERROR is pending.
106 * @stop_cmdr: Value to be loaded into CMDR when the stop command is
108 * @tasklet: Tasklet running the request state machine.
109 * @pending_events: Bitmask of events flagged by the interrupt handler
110 * to be processed by the tasklet.
111 * @completed_events: Bitmask of events which the state machine has
113 * @state: Tasklet state.
114 * @queue: List of slots waiting for access to the controller.
115 * @need_clock_update: Update the clock rate before the next request.
116 * @need_reset: Reset controller before next request.
117 * @mode_reg: Value of the MR register.
118 * @cfg_reg: Value of the CFG register.
119 * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
120 * rate and timeout calculations.
121 * @mapbase: Physical address of the MMIO registers.
122 * @mck: The peripheral bus clock hooked up to the MMC controller.
123 * @pdev: Platform device associated with the MMC controller.
124 * @slot: Slots sharing this MMC controller.
125 * @caps: MCI capabilities depending on MCI version.
126 * @prepare_data: function to setup MCI before data transfer which
127 * depends on MCI capabilities.
128 * @submit_data: function to start data transfer which depends on MCI
130 * @stop_transfer: function to stop data transfer which depends on MCI
136 * @lock is a softirq-safe spinlock protecting @queue as well as
137 * @cur_slot, @mrq and @state. These must always be updated
138 * at the same time while holding @lock.
140 * @lock also protects mode_reg and need_clock_update since these are
141 * used to synchronize mode register updates with the queue
144 * The @mrq field of struct atmel_mci_slot is also protected by @lock,
145 * and must always be written at the same time as the slot is added to
148 * @pending_events and @completed_events are accessed using atomic bit
149 * operations, so they don't need any locking.
151 * None of the fields touched by the interrupt handler need any
152 * locking. However, ordering is important: Before EVENT_DATA_ERROR or
153 * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
154 * interrupts must be disabled and @data_status updated with a
155 * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
156 * CMDRDY interrupt must be disabled and @cmd_status updated with a
157 * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
158 * bytes_xfered field of @data must be written. This is ensured by
165 struct scatterlist
*sg
;
166 unsigned int pio_offset
;
168 struct atmel_mci_slot
*cur_slot
;
169 struct mmc_request
*mrq
;
170 struct mmc_command
*cmd
;
171 struct mmc_data
*data
;
172 unsigned int data_size
;
174 struct atmel_mci_dma dma
;
175 struct dma_chan
*data_chan
;
181 struct tasklet_struct tasklet
;
182 unsigned long pending_events
;
183 unsigned long completed_events
;
184 enum atmel_mci_state state
;
185 struct list_head queue
;
187 bool need_clock_update
;
191 unsigned long bus_hz
;
192 unsigned long mapbase
;
194 struct platform_device
*pdev
;
196 struct atmel_mci_slot
*slot
[ATMCI_MAX_NR_SLOTS
];
198 struct atmel_mci_caps caps
;
200 u32 (*prepare_data
)(struct atmel_mci
*host
, struct mmc_data
*data
);
201 void (*submit_data
)(struct atmel_mci
*host
, struct mmc_data
*data
);
202 void (*stop_transfer
)(struct atmel_mci
*host
);
206 * struct atmel_mci_slot - MMC slot state
207 * @mmc: The mmc_host representing this slot.
208 * @host: The MMC controller this slot is using.
209 * @sdc_reg: Value of SDCR to be written before using this slot.
210 * @sdio_irq: SDIO irq mask for this slot.
211 * @mrq: mmc_request currently being processed or waiting to be
212 * processed, or NULL when the slot is idle.
213 * @queue_node: List node for placing this node in the @queue list of
215 * @clock: Clock rate configured by set_ios(). Protected by host->lock.
216 * @flags: Random state bits associated with the slot.
217 * @detect_pin: GPIO pin used for card detection, or negative if not
219 * @wp_pin: GPIO pin used for card write protect sending, or negative
221 * @detect_is_active_high: The state of the detect pin when it is active.
222 * @detect_timer: Timer used for debouncing @detect_pin interrupts.
224 struct atmel_mci_slot
{
225 struct mmc_host
*mmc
;
226 struct atmel_mci
*host
;
231 struct mmc_request
*mrq
;
232 struct list_head queue_node
;
236 #define ATMCI_CARD_PRESENT 0
237 #define ATMCI_CARD_NEED_INIT 1
238 #define ATMCI_SHUTDOWN 2
239 #define ATMCI_SUSPENDED 3
243 bool detect_is_active_high
;
245 struct timer_list detect_timer
;
248 #define atmci_test_and_clear_pending(host, event) \
249 test_and_clear_bit(event, &host->pending_events)
250 #define atmci_set_completed(host, event) \
251 set_bit(event, &host->completed_events)
252 #define atmci_set_pending(host, event) \
253 set_bit(event, &host->pending_events)
256 * The debugfs stuff below is mostly optimized away when
257 * CONFIG_DEBUG_FS is not set.
259 static int atmci_req_show(struct seq_file
*s
, void *v
)
261 struct atmel_mci_slot
*slot
= s
->private;
262 struct mmc_request
*mrq
;
263 struct mmc_command
*cmd
;
264 struct mmc_command
*stop
;
265 struct mmc_data
*data
;
267 /* Make sure we get a consistent snapshot */
268 spin_lock_bh(&slot
->host
->lock
);
278 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
279 cmd
->opcode
, cmd
->arg
, cmd
->flags
,
280 cmd
->resp
[0], cmd
->resp
[1], cmd
->resp
[2],
281 cmd
->resp
[3], cmd
->error
);
283 seq_printf(s
, "DATA %u / %u * %u flg %x err %d\n",
284 data
->bytes_xfered
, data
->blocks
,
285 data
->blksz
, data
->flags
, data
->error
);
288 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
289 stop
->opcode
, stop
->arg
, stop
->flags
,
290 stop
->resp
[0], stop
->resp
[1], stop
->resp
[2],
291 stop
->resp
[3], stop
->error
);
294 spin_unlock_bh(&slot
->host
->lock
);
299 static int atmci_req_open(struct inode
*inode
, struct file
*file
)
301 return single_open(file
, atmci_req_show
, inode
->i_private
);
304 static const struct file_operations atmci_req_fops
= {
305 .owner
= THIS_MODULE
,
306 .open
= atmci_req_open
,
309 .release
= single_release
,
312 static void atmci_show_status_reg(struct seq_file
*s
,
313 const char *regname
, u32 value
)
315 static const char *sr_bit
[] = {
346 seq_printf(s
, "%s:\t0x%08x", regname
, value
);
347 for (i
= 0; i
< ARRAY_SIZE(sr_bit
); i
++) {
348 if (value
& (1 << i
)) {
350 seq_printf(s
, " %s", sr_bit
[i
]);
352 seq_puts(s
, " UNKNOWN");
358 static int atmci_regs_show(struct seq_file
*s
, void *v
)
360 struct atmel_mci
*host
= s
->private;
363 buf
= kmalloc(ATMCI_REGS_SIZE
, GFP_KERNEL
);
368 * Grab a more or less consistent snapshot. Note that we're
369 * not disabling interrupts, so IMR and SR may not be
372 spin_lock_bh(&host
->lock
);
373 clk_enable(host
->mck
);
374 memcpy_fromio(buf
, host
->regs
, ATMCI_REGS_SIZE
);
375 clk_disable(host
->mck
);
376 spin_unlock_bh(&host
->lock
);
378 seq_printf(s
, "MR:\t0x%08x%s%s CLKDIV=%u\n",
380 buf
[ATMCI_MR
/ 4] & ATMCI_MR_RDPROOF
? " RDPROOF" : "",
381 buf
[ATMCI_MR
/ 4] & ATMCI_MR_WRPROOF
? " WRPROOF" : "",
382 buf
[ATMCI_MR
/ 4] & 0xff);
383 seq_printf(s
, "DTOR:\t0x%08x\n", buf
[ATMCI_DTOR
/ 4]);
384 seq_printf(s
, "SDCR:\t0x%08x\n", buf
[ATMCI_SDCR
/ 4]);
385 seq_printf(s
, "ARGR:\t0x%08x\n", buf
[ATMCI_ARGR
/ 4]);
386 seq_printf(s
, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
388 buf
[ATMCI_BLKR
/ 4] & 0xffff,
389 (buf
[ATMCI_BLKR
/ 4] >> 16) & 0xffff);
390 if (host
->caps
.has_cstor_reg
)
391 seq_printf(s
, "CSTOR:\t0x%08x\n", buf
[ATMCI_CSTOR
/ 4]);
393 /* Don't read RSPR and RDR; it will consume the data there */
395 atmci_show_status_reg(s
, "SR", buf
[ATMCI_SR
/ 4]);
396 atmci_show_status_reg(s
, "IMR", buf
[ATMCI_IMR
/ 4]);
398 if (host
->caps
.has_dma
) {
401 val
= buf
[ATMCI_DMA
/ 4];
402 seq_printf(s
, "DMA:\t0x%08x OFFSET=%u CHKSIZE=%u%s\n",
405 1 << (((val
>> 4) & 3) + 1) : 1,
406 val
& ATMCI_DMAEN
? " DMAEN" : "");
408 if (host
->caps
.has_cfg_reg
) {
411 val
= buf
[ATMCI_CFG
/ 4];
412 seq_printf(s
, "CFG:\t0x%08x%s%s%s%s\n",
414 val
& ATMCI_CFG_FIFOMODE_1DATA
? " FIFOMODE_ONE_DATA" : "",
415 val
& ATMCI_CFG_FERRCTRL_COR
? " FERRCTRL_CLEAR_ON_READ" : "",
416 val
& ATMCI_CFG_HSMODE
? " HSMODE" : "",
417 val
& ATMCI_CFG_LSYNC
? " LSYNC" : "");
425 static int atmci_regs_open(struct inode
*inode
, struct file
*file
)
427 return single_open(file
, atmci_regs_show
, inode
->i_private
);
430 static const struct file_operations atmci_regs_fops
= {
431 .owner
= THIS_MODULE
,
432 .open
= atmci_regs_open
,
435 .release
= single_release
,
438 static void atmci_init_debugfs(struct atmel_mci_slot
*slot
)
440 struct mmc_host
*mmc
= slot
->mmc
;
441 struct atmel_mci
*host
= slot
->host
;
445 root
= mmc
->debugfs_root
;
449 node
= debugfs_create_file("regs", S_IRUSR
, root
, host
,
456 node
= debugfs_create_file("req", S_IRUSR
, root
, slot
, &atmci_req_fops
);
460 node
= debugfs_create_u32("state", S_IRUSR
, root
, (u32
*)&host
->state
);
464 node
= debugfs_create_x32("pending_events", S_IRUSR
, root
,
465 (u32
*)&host
->pending_events
);
469 node
= debugfs_create_x32("completed_events", S_IRUSR
, root
,
470 (u32
*)&host
->completed_events
);
477 dev_err(&mmc
->class_dev
, "failed to initialize debugfs for slot\n");
480 static inline unsigned int atmci_ns_to_clocks(struct atmel_mci
*host
,
483 return (ns
* (host
->bus_hz
/ 1000000) + 999) / 1000;
486 static void atmci_set_timeout(struct atmel_mci
*host
,
487 struct atmel_mci_slot
*slot
, struct mmc_data
*data
)
489 static unsigned dtomul_to_shift
[] = {
490 0, 4, 7, 8, 10, 12, 16, 20
496 timeout
= atmci_ns_to_clocks(host
, data
->timeout_ns
)
497 + data
->timeout_clks
;
499 for (dtomul
= 0; dtomul
< 8; dtomul
++) {
500 unsigned shift
= dtomul_to_shift
[dtomul
];
501 dtocyc
= (timeout
+ (1 << shift
) - 1) >> shift
;
511 dev_vdbg(&slot
->mmc
->class_dev
, "setting timeout to %u cycles\n",
512 dtocyc
<< dtomul_to_shift
[dtomul
]);
513 atmci_writel(host
, ATMCI_DTOR
, (ATMCI_DTOMUL(dtomul
) | ATMCI_DTOCYC(dtocyc
)));
517 * Return mask with command flags to be enabled for this command.
519 static u32
atmci_prepare_command(struct mmc_host
*mmc
,
520 struct mmc_command
*cmd
)
522 struct mmc_data
*data
;
525 cmd
->error
= -EINPROGRESS
;
527 cmdr
= ATMCI_CMDR_CMDNB(cmd
->opcode
);
529 if (cmd
->flags
& MMC_RSP_PRESENT
) {
530 if (cmd
->flags
& MMC_RSP_136
)
531 cmdr
|= ATMCI_CMDR_RSPTYP_136BIT
;
533 cmdr
|= ATMCI_CMDR_RSPTYP_48BIT
;
537 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
538 * it's too difficult to determine whether this is an ACMD or
539 * not. Better make it 64.
541 cmdr
|= ATMCI_CMDR_MAXLAT_64CYC
;
543 if (mmc
->ios
.bus_mode
== MMC_BUSMODE_OPENDRAIN
)
544 cmdr
|= ATMCI_CMDR_OPDCMD
;
548 cmdr
|= ATMCI_CMDR_START_XFER
;
550 if (cmd
->opcode
== SD_IO_RW_EXTENDED
) {
551 cmdr
|= ATMCI_CMDR_SDIO_BLOCK
;
553 if (data
->flags
& MMC_DATA_STREAM
)
554 cmdr
|= ATMCI_CMDR_STREAM
;
555 else if (data
->blocks
> 1)
556 cmdr
|= ATMCI_CMDR_MULTI_BLOCK
;
558 cmdr
|= ATMCI_CMDR_BLOCK
;
561 if (data
->flags
& MMC_DATA_READ
)
562 cmdr
|= ATMCI_CMDR_TRDIR_READ
;
568 static void atmci_send_command(struct atmel_mci
*host
,
569 struct mmc_command
*cmd
, u32 cmd_flags
)
574 dev_vdbg(&host
->pdev
->dev
,
575 "start command: ARGR=0x%08x CMDR=0x%08x\n",
576 cmd
->arg
, cmd_flags
);
578 atmci_writel(host
, ATMCI_ARGR
, cmd
->arg
);
579 atmci_writel(host
, ATMCI_CMDR
, cmd_flags
);
582 static void atmci_send_stop_cmd(struct atmel_mci
*host
, struct mmc_data
*data
)
584 atmci_send_command(host
, data
->stop
, host
->stop_cmdr
);
585 atmci_writel(host
, ATMCI_IER
, ATMCI_CMDRDY
);
589 * Configure given PDC buffer taking care of alignement issues.
590 * Update host->data_size and host->sg.
592 static void atmci_pdc_set_single_buf(struct atmel_mci
*host
,
593 enum atmci_xfer_dir dir
, enum atmci_pdc_buf buf_nb
)
595 u32 pointer_reg
, counter_reg
;
597 if (dir
== XFER_RECEIVE
) {
598 pointer_reg
= ATMEL_PDC_RPR
;
599 counter_reg
= ATMEL_PDC_RCR
;
601 pointer_reg
= ATMEL_PDC_TPR
;
602 counter_reg
= ATMEL_PDC_TCR
;
605 if (buf_nb
== PDC_SECOND_BUF
) {
606 pointer_reg
+= ATMEL_PDC_SCND_BUF_OFF
;
607 counter_reg
+= ATMEL_PDC_SCND_BUF_OFF
;
610 atmci_writel(host
, pointer_reg
, sg_dma_address(host
->sg
));
611 if (host
->data_size
<= sg_dma_len(host
->sg
)) {
612 if (host
->data_size
& 0x3) {
613 /* If size is different from modulo 4, transfer bytes */
614 atmci_writel(host
, counter_reg
, host
->data_size
);
615 atmci_writel(host
, ATMCI_MR
, host
->mode_reg
| ATMCI_MR_PDCFBYTE
);
617 /* Else transfer 32-bits words */
618 atmci_writel(host
, counter_reg
, host
->data_size
/ 4);
622 /* We assume the size of a page is 32-bits aligned */
623 atmci_writel(host
, counter_reg
, sg_dma_len(host
->sg
) / 4);
624 host
->data_size
-= sg_dma_len(host
->sg
);
626 host
->sg
= sg_next(host
->sg
);
631 * Configure PDC buffer according to the data size ie configuring one or two
632 * buffers. Don't use this function if you want to configure only the second
633 * buffer. In this case, use atmci_pdc_set_single_buf.
635 static void atmci_pdc_set_both_buf(struct atmel_mci
*host
, int dir
)
637 atmci_pdc_set_single_buf(host
, dir
, PDC_FIRST_BUF
);
639 atmci_pdc_set_single_buf(host
, dir
, PDC_SECOND_BUF
);
643 * Unmap sg lists, called when transfer is finished.
645 static void atmci_pdc_cleanup(struct atmel_mci
*host
)
647 struct mmc_data
*data
= host
->data
;
650 dma_unmap_sg(&host
->pdev
->dev
,
651 data
->sg
, data
->sg_len
,
652 ((data
->flags
& MMC_DATA_WRITE
)
653 ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
));
657 * Disable PDC transfers. Update pending flags to EVENT_XFER_COMPLETE after
658 * having received ATMCI_TXBUFE or ATMCI_RXBUFF interrupt. Enable ATMCI_NOTBUSY
659 * interrupt needed for both transfer directions.
661 static void atmci_pdc_complete(struct atmel_mci
*host
)
663 atmci_writel(host
, ATMEL_PDC_PTCR
, ATMEL_PDC_RXTDIS
| ATMEL_PDC_TXTDIS
);
664 atmci_pdc_cleanup(host
);
667 * If the card was removed, data will be NULL. No point trying
668 * to send the stop command or waiting for NBUSY in this case.
671 atmci_set_pending(host
, EVENT_XFER_COMPLETE
);
672 tasklet_schedule(&host
->tasklet
);
673 atmci_writel(host
, ATMCI_IER
, ATMCI_NOTBUSY
);
677 static void atmci_dma_cleanup(struct atmel_mci
*host
)
679 struct mmc_data
*data
= host
->data
;
682 dma_unmap_sg(host
->dma
.chan
->device
->dev
,
683 data
->sg
, data
->sg_len
,
684 ((data
->flags
& MMC_DATA_WRITE
)
685 ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
));
689 * This function is called by the DMA driver from tasklet context.
691 static void atmci_dma_complete(void *arg
)
693 struct atmel_mci
*host
= arg
;
694 struct mmc_data
*data
= host
->data
;
696 dev_vdbg(&host
->pdev
->dev
, "DMA complete\n");
698 if (host
->caps
.has_dma
)
699 /* Disable DMA hardware handshaking on MCI */
700 atmci_writel(host
, ATMCI_DMA
, atmci_readl(host
, ATMCI_DMA
) & ~ATMCI_DMAEN
);
702 atmci_dma_cleanup(host
);
705 * If the card was removed, data will be NULL. No point trying
706 * to send the stop command or waiting for NBUSY in this case.
709 atmci_set_pending(host
, EVENT_XFER_COMPLETE
);
710 tasklet_schedule(&host
->tasklet
);
713 * Regardless of what the documentation says, we have
714 * to wait for NOTBUSY even after block read
717 * When the DMA transfer is complete, the controller
718 * may still be reading the CRC from the card, i.e.
719 * the data transfer is still in progress and we
720 * haven't seen all the potential error bits yet.
722 * The interrupt handler will schedule a different
723 * tasklet to finish things up when the data transfer
724 * is completely done.
726 * We may not complete the mmc request here anyway
727 * because the mmc layer may call back and cause us to
728 * violate the "don't submit new operations from the
729 * completion callback" rule of the dma engine
732 atmci_writel(host
, ATMCI_IER
, ATMCI_NOTBUSY
);
737 * Returns a mask of interrupt flags to be enabled after the whole
738 * request has been prepared.
740 static u32
atmci_prepare_data(struct atmel_mci
*host
, struct mmc_data
*data
)
744 data
->error
= -EINPROGRESS
;
748 host
->data_chan
= NULL
;
750 iflags
= ATMCI_DATA_ERROR_FLAGS
;
753 * Errata: MMC data write operation with less than 12
754 * bytes is impossible.
756 * Errata: MCI Transmit Data Register (TDR) FIFO
757 * corruption when length is not multiple of 4.
759 if (data
->blocks
* data
->blksz
< 12
760 || (data
->blocks
* data
->blksz
) & 3)
761 host
->need_reset
= true;
763 host
->pio_offset
= 0;
764 if (data
->flags
& MMC_DATA_READ
)
765 iflags
|= ATMCI_RXRDY
;
767 iflags
|= ATMCI_TXRDY
;
773 * Set interrupt flags and set block length into the MCI mode register even
774 * if this value is also accessible in the MCI block register. It seems to be
775 * necessary before the High Speed MCI version. It also map sg and configure
779 atmci_prepare_data_pdc(struct atmel_mci
*host
, struct mmc_data
*data
)
783 enum dma_data_direction dir
;
785 data
->error
= -EINPROGRESS
;
789 iflags
= ATMCI_DATA_ERROR_FLAGS
;
791 /* Enable pdc mode */
792 atmci_writel(host
, ATMCI_MR
, host
->mode_reg
| ATMCI_MR_PDCMODE
);
794 if (data
->flags
& MMC_DATA_READ
) {
795 dir
= DMA_FROM_DEVICE
;
796 iflags
|= ATMCI_ENDRX
| ATMCI_RXBUFF
;
799 iflags
|= ATMCI_ENDTX
| ATMCI_TXBUFE
;
803 tmp
= atmci_readl(host
, ATMCI_MR
);
805 tmp
|= ATMCI_BLKLEN(data
->blksz
);
806 atmci_writel(host
, ATMCI_MR
, tmp
);
809 host
->data_size
= data
->blocks
* data
->blksz
;
810 sg_len
= dma_map_sg(&host
->pdev
->dev
, data
->sg
, data
->sg_len
, dir
);
812 atmci_pdc_set_both_buf(host
,
813 ((dir
== DMA_FROM_DEVICE
) ? XFER_RECEIVE
: XFER_TRANSMIT
));
819 atmci_prepare_data_dma(struct atmel_mci
*host
, struct mmc_data
*data
)
821 struct dma_chan
*chan
;
822 struct dma_async_tx_descriptor
*desc
;
823 struct scatterlist
*sg
;
825 enum dma_data_direction direction
;
826 enum dma_transfer_direction slave_dirn
;
830 data
->error
= -EINPROGRESS
;
836 iflags
= ATMCI_DATA_ERROR_FLAGS
;
839 * We don't do DMA on "complex" transfers, i.e. with
840 * non-word-aligned buffers or lengths. Also, we don't bother
841 * with all the DMA setup overhead for short transfers.
843 if (data
->blocks
* data
->blksz
< ATMCI_DMA_THRESHOLD
)
844 return atmci_prepare_data(host
, data
);
846 return atmci_prepare_data(host
, data
);
848 for_each_sg(data
->sg
, sg
, data
->sg_len
, i
) {
849 if (sg
->offset
& 3 || sg
->length
& 3)
850 return atmci_prepare_data(host
, data
);
853 /* If we don't have a channel, we can't do DMA */
854 chan
= host
->dma
.chan
;
856 host
->data_chan
= chan
;
861 if (host
->caps
.has_dma
)
862 atmci_writel(host
, ATMCI_DMA
, ATMCI_DMA_CHKSIZE(3) | ATMCI_DMAEN
);
864 if (data
->flags
& MMC_DATA_READ
) {
865 direction
= DMA_FROM_DEVICE
;
866 slave_dirn
= DMA_DEV_TO_MEM
;
868 direction
= DMA_TO_DEVICE
;
869 slave_dirn
= DMA_MEM_TO_DEV
;
872 sglen
= dma_map_sg(chan
->device
->dev
, data
->sg
,
873 data
->sg_len
, direction
);
875 desc
= chan
->device
->device_prep_slave_sg(chan
,
876 data
->sg
, sglen
, slave_dirn
,
877 DMA_PREP_INTERRUPT
| DMA_CTRL_ACK
);
881 host
->dma
.data_desc
= desc
;
882 desc
->callback
= atmci_dma_complete
;
883 desc
->callback_param
= host
;
887 dma_unmap_sg(chan
->device
->dev
, data
->sg
, data
->sg_len
, direction
);
892 atmci_submit_data(struct atmel_mci
*host
, struct mmc_data
*data
)
898 * Start PDC according to transfer direction.
901 atmci_submit_data_pdc(struct atmel_mci
*host
, struct mmc_data
*data
)
903 if (data
->flags
& MMC_DATA_READ
)
904 atmci_writel(host
, ATMEL_PDC_PTCR
, ATMEL_PDC_RXTEN
);
906 atmci_writel(host
, ATMEL_PDC_PTCR
, ATMEL_PDC_TXTEN
);
910 atmci_submit_data_dma(struct atmel_mci
*host
, struct mmc_data
*data
)
912 struct dma_chan
*chan
= host
->data_chan
;
913 struct dma_async_tx_descriptor
*desc
= host
->dma
.data_desc
;
916 dmaengine_submit(desc
);
917 dma_async_issue_pending(chan
);
921 static void atmci_stop_transfer(struct atmel_mci
*host
)
923 atmci_set_pending(host
, EVENT_XFER_COMPLETE
);
924 atmci_writel(host
, ATMCI_IER
, ATMCI_NOTBUSY
);
928 * Stop data transfer because error(s) occured.
930 static void atmci_stop_transfer_pdc(struct atmel_mci
*host
)
932 atmci_set_pending(host
, EVENT_XFER_COMPLETE
);
933 atmci_writel(host
, ATMCI_IER
, ATMCI_NOTBUSY
);
936 static void atmci_stop_transfer_dma(struct atmel_mci
*host
)
938 struct dma_chan
*chan
= host
->data_chan
;
941 dmaengine_terminate_all(chan
);
942 atmci_dma_cleanup(host
);
944 /* Data transfer was stopped by the interrupt handler */
945 atmci_set_pending(host
, EVENT_XFER_COMPLETE
);
946 atmci_writel(host
, ATMCI_IER
, ATMCI_NOTBUSY
);
951 * Start a request: prepare data if needed, prepare the command and activate
954 static void atmci_start_request(struct atmel_mci
*host
,
955 struct atmel_mci_slot
*slot
)
957 struct mmc_request
*mrq
;
958 struct mmc_command
*cmd
;
959 struct mmc_data
*data
;
964 host
->cur_slot
= slot
;
967 host
->pending_events
= 0;
968 host
->completed_events
= 0;
969 host
->data_status
= 0;
971 if (host
->need_reset
) {
972 iflags
= atmci_readl(host
, ATMCI_IMR
);
973 iflags
&= (ATMCI_SDIOIRQA
| ATMCI_SDIOIRQB
);
974 atmci_writel(host
, ATMCI_CR
, ATMCI_CR_SWRST
);
975 atmci_writel(host
, ATMCI_CR
, ATMCI_CR_MCIEN
);
976 atmci_writel(host
, ATMCI_MR
, host
->mode_reg
);
977 if (host
->caps
.has_cfg_reg
)
978 atmci_writel(host
, ATMCI_CFG
, host
->cfg_reg
);
979 atmci_writel(host
, ATMCI_IER
, iflags
);
980 host
->need_reset
= false;
982 atmci_writel(host
, ATMCI_SDCR
, slot
->sdc_reg
);
984 iflags
= atmci_readl(host
, ATMCI_IMR
);
985 if (iflags
& ~(ATMCI_SDIOIRQA
| ATMCI_SDIOIRQB
))
986 dev_warn(&slot
->mmc
->class_dev
, "WARNING: IMR=0x%08x\n",
989 if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT
, &slot
->flags
))) {
990 /* Send init sequence (74 clock cycles) */
991 atmci_writel(host
, ATMCI_CMDR
, ATMCI_CMDR_SPCMD_INIT
);
992 while (!(atmci_readl(host
, ATMCI_SR
) & ATMCI_CMDRDY
))
998 atmci_set_timeout(host
, slot
, data
);
1000 /* Must set block count/size before sending command */
1001 atmci_writel(host
, ATMCI_BLKR
, ATMCI_BCNT(data
->blocks
)
1002 | ATMCI_BLKLEN(data
->blksz
));
1003 dev_vdbg(&slot
->mmc
->class_dev
, "BLKR=0x%08x\n",
1004 ATMCI_BCNT(data
->blocks
) | ATMCI_BLKLEN(data
->blksz
));
1006 iflags
|= host
->prepare_data(host
, data
);
1009 iflags
|= ATMCI_CMDRDY
;
1011 cmdflags
= atmci_prepare_command(slot
->mmc
, cmd
);
1012 atmci_send_command(host
, cmd
, cmdflags
);
1015 host
->submit_data(host
, data
);
1018 host
->stop_cmdr
= atmci_prepare_command(slot
->mmc
, mrq
->stop
);
1019 host
->stop_cmdr
|= ATMCI_CMDR_STOP_XFER
;
1020 if (!(data
->flags
& MMC_DATA_WRITE
))
1021 host
->stop_cmdr
|= ATMCI_CMDR_TRDIR_READ
;
1022 if (data
->flags
& MMC_DATA_STREAM
)
1023 host
->stop_cmdr
|= ATMCI_CMDR_STREAM
;
1025 host
->stop_cmdr
|= ATMCI_CMDR_MULTI_BLOCK
;
1029 * We could have enabled interrupts earlier, but I suspect
1030 * that would open up a nice can of interesting race
1031 * conditions (e.g. command and data complete, but stop not
1034 atmci_writel(host
, ATMCI_IER
, iflags
);
1037 static void atmci_queue_request(struct atmel_mci
*host
,
1038 struct atmel_mci_slot
*slot
, struct mmc_request
*mrq
)
1040 dev_vdbg(&slot
->mmc
->class_dev
, "queue request: state=%d\n",
1043 spin_lock_bh(&host
->lock
);
1045 if (host
->state
== STATE_IDLE
) {
1046 host
->state
= STATE_SENDING_CMD
;
1047 atmci_start_request(host
, slot
);
1049 list_add_tail(&slot
->queue_node
, &host
->queue
);
1051 spin_unlock_bh(&host
->lock
);
1054 static void atmci_request(struct mmc_host
*mmc
, struct mmc_request
*mrq
)
1056 struct atmel_mci_slot
*slot
= mmc_priv(mmc
);
1057 struct atmel_mci
*host
= slot
->host
;
1058 struct mmc_data
*data
;
1063 * We may "know" the card is gone even though there's still an
1064 * electrical connection. If so, we really need to communicate
1065 * this to the MMC core since there won't be any more
1066 * interrupts as the card is completely removed. Otherwise,
1067 * the MMC core might believe the card is still there even
1068 * though the card was just removed very slowly.
1070 if (!test_bit(ATMCI_CARD_PRESENT
, &slot
->flags
)) {
1071 mrq
->cmd
->error
= -ENOMEDIUM
;
1072 mmc_request_done(mmc
, mrq
);
1076 /* We don't support multiple blocks of weird lengths. */
1078 if (data
&& data
->blocks
> 1 && data
->blksz
& 3) {
1079 mrq
->cmd
->error
= -EINVAL
;
1080 mmc_request_done(mmc
, mrq
);
1083 atmci_queue_request(host
, slot
, mrq
);
1086 static void atmci_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
1088 struct atmel_mci_slot
*slot
= mmc_priv(mmc
);
1089 struct atmel_mci
*host
= slot
->host
;
1092 slot
->sdc_reg
&= ~ATMCI_SDCBUS_MASK
;
1093 switch (ios
->bus_width
) {
1094 case MMC_BUS_WIDTH_1
:
1095 slot
->sdc_reg
|= ATMCI_SDCBUS_1BIT
;
1097 case MMC_BUS_WIDTH_4
:
1098 slot
->sdc_reg
|= ATMCI_SDCBUS_4BIT
;
1103 unsigned int clock_min
= ~0U;
1106 spin_lock_bh(&host
->lock
);
1107 if (!host
->mode_reg
) {
1108 clk_enable(host
->mck
);
1109 atmci_writel(host
, ATMCI_CR
, ATMCI_CR_SWRST
);
1110 atmci_writel(host
, ATMCI_CR
, ATMCI_CR_MCIEN
);
1111 if (host
->caps
.has_cfg_reg
)
1112 atmci_writel(host
, ATMCI_CFG
, host
->cfg_reg
);
1116 * Use mirror of ios->clock to prevent race with mmc
1117 * core ios update when finding the minimum.
1119 slot
->clock
= ios
->clock
;
1120 for (i
= 0; i
< ATMCI_MAX_NR_SLOTS
; i
++) {
1121 if (host
->slot
[i
] && host
->slot
[i
]->clock
1122 && host
->slot
[i
]->clock
< clock_min
)
1123 clock_min
= host
->slot
[i
]->clock
;
1126 /* Calculate clock divider */
1127 clkdiv
= DIV_ROUND_UP(host
->bus_hz
, 2 * clock_min
) - 1;
1129 dev_warn(&mmc
->class_dev
,
1130 "clock %u too slow; using %lu\n",
1131 clock_min
, host
->bus_hz
/ (2 * 256));
1135 host
->mode_reg
= ATMCI_MR_CLKDIV(clkdiv
);
1138 * WRPROOF and RDPROOF prevent overruns/underruns by
1139 * stopping the clock when the FIFO is full/empty.
1140 * This state is not expected to last for long.
1142 if (host
->caps
.has_rwproof
)
1143 host
->mode_reg
|= (ATMCI_MR_WRPROOF
| ATMCI_MR_RDPROOF
);
1145 if (host
->caps
.has_cfg_reg
) {
1146 /* setup High Speed mode in relation with card capacity */
1147 if (ios
->timing
== MMC_TIMING_SD_HS
)
1148 host
->cfg_reg
|= ATMCI_CFG_HSMODE
;
1150 host
->cfg_reg
&= ~ATMCI_CFG_HSMODE
;
1153 if (list_empty(&host
->queue
)) {
1154 atmci_writel(host
, ATMCI_MR
, host
->mode_reg
);
1155 if (host
->caps
.has_cfg_reg
)
1156 atmci_writel(host
, ATMCI_CFG
, host
->cfg_reg
);
1158 host
->need_clock_update
= true;
1161 spin_unlock_bh(&host
->lock
);
1163 bool any_slot_active
= false;
1165 spin_lock_bh(&host
->lock
);
1167 for (i
= 0; i
< ATMCI_MAX_NR_SLOTS
; i
++) {
1168 if (host
->slot
[i
] && host
->slot
[i
]->clock
) {
1169 any_slot_active
= true;
1173 if (!any_slot_active
) {
1174 atmci_writel(host
, ATMCI_CR
, ATMCI_CR_MCIDIS
);
1175 if (host
->mode_reg
) {
1176 atmci_readl(host
, ATMCI_MR
);
1177 clk_disable(host
->mck
);
1181 spin_unlock_bh(&host
->lock
);
1184 switch (ios
->power_mode
) {
1186 set_bit(ATMCI_CARD_NEED_INIT
, &slot
->flags
);
1190 * TODO: None of the currently available AVR32-based
1191 * boards allow MMC power to be turned off. Implement
1192 * power control when this can be tested properly.
1194 * We also need to hook this into the clock management
1195 * somehow so that newly inserted cards aren't
1196 * subjected to a fast clock before we have a chance
1197 * to figure out what the maximum rate is. Currently,
1198 * there's no way to avoid this, and there never will
1199 * be for boards that don't support power control.
1205 static int atmci_get_ro(struct mmc_host
*mmc
)
1207 int read_only
= -ENOSYS
;
1208 struct atmel_mci_slot
*slot
= mmc_priv(mmc
);
1210 if (gpio_is_valid(slot
->wp_pin
)) {
1211 read_only
= gpio_get_value(slot
->wp_pin
);
1212 dev_dbg(&mmc
->class_dev
, "card is %s\n",
1213 read_only
? "read-only" : "read-write");
1219 static int atmci_get_cd(struct mmc_host
*mmc
)
1221 int present
= -ENOSYS
;
1222 struct atmel_mci_slot
*slot
= mmc_priv(mmc
);
1224 if (gpio_is_valid(slot
->detect_pin
)) {
1225 present
= !(gpio_get_value(slot
->detect_pin
) ^
1226 slot
->detect_is_active_high
);
1227 dev_dbg(&mmc
->class_dev
, "card is %spresent\n",
1228 present
? "" : "not ");
1234 static void atmci_enable_sdio_irq(struct mmc_host
*mmc
, int enable
)
1236 struct atmel_mci_slot
*slot
= mmc_priv(mmc
);
1237 struct atmel_mci
*host
= slot
->host
;
1240 atmci_writel(host
, ATMCI_IER
, slot
->sdio_irq
);
1242 atmci_writel(host
, ATMCI_IDR
, slot
->sdio_irq
);
1245 static const struct mmc_host_ops atmci_ops
= {
1246 .request
= atmci_request
,
1247 .set_ios
= atmci_set_ios
,
1248 .get_ro
= atmci_get_ro
,
1249 .get_cd
= atmci_get_cd
,
1250 .enable_sdio_irq
= atmci_enable_sdio_irq
,
1253 /* Called with host->lock held */
1254 static void atmci_request_end(struct atmel_mci
*host
, struct mmc_request
*mrq
)
1255 __releases(&host
->lock
)
1256 __acquires(&host
->lock
)
1258 struct atmel_mci_slot
*slot
= NULL
;
1259 struct mmc_host
*prev_mmc
= host
->cur_slot
->mmc
;
1261 WARN_ON(host
->cmd
|| host
->data
);
1264 * Update the MMC clock rate if necessary. This may be
1265 * necessary if set_ios() is called when a different slot is
1266 * busy transferring data.
1268 if (host
->need_clock_update
) {
1269 atmci_writel(host
, ATMCI_MR
, host
->mode_reg
);
1270 if (host
->caps
.has_cfg_reg
)
1271 atmci_writel(host
, ATMCI_CFG
, host
->cfg_reg
);
1274 host
->cur_slot
->mrq
= NULL
;
1276 if (!list_empty(&host
->queue
)) {
1277 slot
= list_entry(host
->queue
.next
,
1278 struct atmel_mci_slot
, queue_node
);
1279 list_del(&slot
->queue_node
);
1280 dev_vdbg(&host
->pdev
->dev
, "list not empty: %s is next\n",
1281 mmc_hostname(slot
->mmc
));
1282 host
->state
= STATE_SENDING_CMD
;
1283 atmci_start_request(host
, slot
);
1285 dev_vdbg(&host
->pdev
->dev
, "list empty\n");
1286 host
->state
= STATE_IDLE
;
1289 spin_unlock(&host
->lock
);
1290 mmc_request_done(prev_mmc
, mrq
);
1291 spin_lock(&host
->lock
);
1294 static void atmci_command_complete(struct atmel_mci
*host
,
1295 struct mmc_command
*cmd
)
1297 u32 status
= host
->cmd_status
;
1299 /* Read the response from the card (up to 16 bytes) */
1300 cmd
->resp
[0] = atmci_readl(host
, ATMCI_RSPR
);
1301 cmd
->resp
[1] = atmci_readl(host
, ATMCI_RSPR
);
1302 cmd
->resp
[2] = atmci_readl(host
, ATMCI_RSPR
);
1303 cmd
->resp
[3] = atmci_readl(host
, ATMCI_RSPR
);
1305 if (status
& ATMCI_RTOE
)
1306 cmd
->error
= -ETIMEDOUT
;
1307 else if ((cmd
->flags
& MMC_RSP_CRC
) && (status
& ATMCI_RCRCE
))
1308 cmd
->error
= -EILSEQ
;
1309 else if (status
& (ATMCI_RINDE
| ATMCI_RDIRE
| ATMCI_RENDE
))
1315 dev_dbg(&host
->pdev
->dev
,
1316 "command error: status=0x%08x\n", status
);
1319 host
->stop_transfer(host
);
1321 atmci_writel(host
, ATMCI_IDR
, ATMCI_NOTBUSY
1322 | ATMCI_TXRDY
| ATMCI_RXRDY
1323 | ATMCI_DATA_ERROR_FLAGS
);
1328 static void atmci_detect_change(unsigned long data
)
1330 struct atmel_mci_slot
*slot
= (struct atmel_mci_slot
*)data
;
1335 * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1336 * freeing the interrupt. We must not re-enable the interrupt
1337 * if it has been freed, and if we're shutting down, it
1338 * doesn't really matter whether the card is present or not.
1341 if (test_bit(ATMCI_SHUTDOWN
, &slot
->flags
))
1344 enable_irq(gpio_to_irq(slot
->detect_pin
));
1345 present
= !(gpio_get_value(slot
->detect_pin
) ^
1346 slot
->detect_is_active_high
);
1347 present_old
= test_bit(ATMCI_CARD_PRESENT
, &slot
->flags
);
1349 dev_vdbg(&slot
->mmc
->class_dev
, "detect change: %d (was %d)\n",
1350 present
, present_old
);
1352 if (present
!= present_old
) {
1353 struct atmel_mci
*host
= slot
->host
;
1354 struct mmc_request
*mrq
;
1356 dev_dbg(&slot
->mmc
->class_dev
, "card %s\n",
1357 present
? "inserted" : "removed");
1359 spin_lock(&host
->lock
);
1362 clear_bit(ATMCI_CARD_PRESENT
, &slot
->flags
);
1364 set_bit(ATMCI_CARD_PRESENT
, &slot
->flags
);
1366 /* Clean up queue if present */
1369 if (mrq
== host
->mrq
) {
1371 * Reset controller to terminate any ongoing
1372 * commands or data transfers.
1374 atmci_writel(host
, ATMCI_CR
, ATMCI_CR_SWRST
);
1375 atmci_writel(host
, ATMCI_CR
, ATMCI_CR_MCIEN
);
1376 atmci_writel(host
, ATMCI_MR
, host
->mode_reg
);
1377 if (host
->caps
.has_cfg_reg
)
1378 atmci_writel(host
, ATMCI_CFG
, host
->cfg_reg
);
1383 switch (host
->state
) {
1386 case STATE_SENDING_CMD
:
1387 mrq
->cmd
->error
= -ENOMEDIUM
;
1391 case STATE_SENDING_DATA
:
1392 mrq
->data
->error
= -ENOMEDIUM
;
1393 host
->stop_transfer(host
);
1395 case STATE_DATA_BUSY
:
1396 case STATE_DATA_ERROR
:
1397 if (mrq
->data
->error
== -EINPROGRESS
)
1398 mrq
->data
->error
= -ENOMEDIUM
;
1402 case STATE_SENDING_STOP
:
1403 mrq
->stop
->error
= -ENOMEDIUM
;
1407 atmci_request_end(host
, mrq
);
1409 list_del(&slot
->queue_node
);
1410 mrq
->cmd
->error
= -ENOMEDIUM
;
1412 mrq
->data
->error
= -ENOMEDIUM
;
1414 mrq
->stop
->error
= -ENOMEDIUM
;
1416 spin_unlock(&host
->lock
);
1417 mmc_request_done(slot
->mmc
, mrq
);
1418 spin_lock(&host
->lock
);
1421 spin_unlock(&host
->lock
);
1423 mmc_detect_change(slot
->mmc
, 0);
1427 static void atmci_tasklet_func(unsigned long priv
)
1429 struct atmel_mci
*host
= (struct atmel_mci
*)priv
;
1430 struct mmc_request
*mrq
= host
->mrq
;
1431 struct mmc_data
*data
= host
->data
;
1432 struct mmc_command
*cmd
= host
->cmd
;
1433 enum atmel_mci_state state
= host
->state
;
1434 enum atmel_mci_state prev_state
;
1437 spin_lock(&host
->lock
);
1439 state
= host
->state
;
1441 dev_vdbg(&host
->pdev
->dev
,
1442 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1443 state
, host
->pending_events
, host
->completed_events
,
1444 atmci_readl(host
, ATMCI_IMR
));
1453 case STATE_SENDING_CMD
:
1454 if (!atmci_test_and_clear_pending(host
,
1455 EVENT_CMD_COMPLETE
))
1459 atmci_set_completed(host
, EVENT_CMD_COMPLETE
);
1460 atmci_command_complete(host
, mrq
->cmd
);
1461 if (!mrq
->data
|| cmd
->error
) {
1462 atmci_request_end(host
, host
->mrq
);
1466 prev_state
= state
= STATE_SENDING_DATA
;
1469 case STATE_SENDING_DATA
:
1470 if (atmci_test_and_clear_pending(host
,
1471 EVENT_DATA_ERROR
)) {
1472 host
->stop_transfer(host
);
1474 atmci_send_stop_cmd(host
, data
);
1475 state
= STATE_DATA_ERROR
;
1479 if (!atmci_test_and_clear_pending(host
,
1480 EVENT_XFER_COMPLETE
))
1483 atmci_set_completed(host
, EVENT_XFER_COMPLETE
);
1484 prev_state
= state
= STATE_DATA_BUSY
;
1487 case STATE_DATA_BUSY
:
1488 if (!atmci_test_and_clear_pending(host
,
1489 EVENT_DATA_COMPLETE
))
1493 atmci_set_completed(host
, EVENT_DATA_COMPLETE
);
1494 status
= host
->data_status
;
1495 if (unlikely(status
& ATMCI_DATA_ERROR_FLAGS
)) {
1496 if (status
& ATMCI_DTOE
) {
1497 dev_dbg(&host
->pdev
->dev
,
1498 "data timeout error\n");
1499 data
->error
= -ETIMEDOUT
;
1500 } else if (status
& ATMCI_DCRCE
) {
1501 dev_dbg(&host
->pdev
->dev
,
1502 "data CRC error\n");
1503 data
->error
= -EILSEQ
;
1505 dev_dbg(&host
->pdev
->dev
,
1506 "data FIFO error (status=%08x)\n",
1511 data
->bytes_xfered
= data
->blocks
* data
->blksz
;
1513 atmci_writel(host
, ATMCI_IDR
, ATMCI_DATA_ERROR_FLAGS
);
1517 atmci_request_end(host
, host
->mrq
);
1521 prev_state
= state
= STATE_SENDING_STOP
;
1523 atmci_send_stop_cmd(host
, data
);
1526 case STATE_SENDING_STOP
:
1527 if (!atmci_test_and_clear_pending(host
,
1528 EVENT_CMD_COMPLETE
))
1532 atmci_command_complete(host
, mrq
->stop
);
1533 atmci_request_end(host
, host
->mrq
);
1536 case STATE_DATA_ERROR
:
1537 if (!atmci_test_and_clear_pending(host
,
1538 EVENT_XFER_COMPLETE
))
1541 state
= STATE_DATA_BUSY
;
1544 } while (state
!= prev_state
);
1546 host
->state
= state
;
1549 spin_unlock(&host
->lock
);
1552 static void atmci_read_data_pio(struct atmel_mci
*host
)
1554 struct scatterlist
*sg
= host
->sg
;
1555 void *buf
= sg_virt(sg
);
1556 unsigned int offset
= host
->pio_offset
;
1557 struct mmc_data
*data
= host
->data
;
1560 unsigned int nbytes
= 0;
1563 value
= atmci_readl(host
, ATMCI_RDR
);
1564 if (likely(offset
+ 4 <= sg
->length
)) {
1565 put_unaligned(value
, (u32
*)(buf
+ offset
));
1570 if (offset
== sg
->length
) {
1571 flush_dcache_page(sg_page(sg
));
1572 host
->sg
= sg
= sg_next(sg
);
1580 unsigned int remaining
= sg
->length
- offset
;
1581 memcpy(buf
+ offset
, &value
, remaining
);
1582 nbytes
+= remaining
;
1584 flush_dcache_page(sg_page(sg
));
1585 host
->sg
= sg
= sg_next(sg
);
1589 offset
= 4 - remaining
;
1591 memcpy(buf
, (u8
*)&value
+ remaining
, offset
);
1595 status
= atmci_readl(host
, ATMCI_SR
);
1596 if (status
& ATMCI_DATA_ERROR_FLAGS
) {
1597 atmci_writel(host
, ATMCI_IDR
, (ATMCI_NOTBUSY
| ATMCI_RXRDY
1598 | ATMCI_DATA_ERROR_FLAGS
));
1599 host
->data_status
= status
;
1600 data
->bytes_xfered
+= nbytes
;
1602 atmci_set_pending(host
, EVENT_DATA_ERROR
);
1603 tasklet_schedule(&host
->tasklet
);
1606 } while (status
& ATMCI_RXRDY
);
1608 host
->pio_offset
= offset
;
1609 data
->bytes_xfered
+= nbytes
;
1614 atmci_writel(host
, ATMCI_IDR
, ATMCI_RXRDY
);
1615 atmci_writel(host
, ATMCI_IER
, ATMCI_NOTBUSY
);
1616 data
->bytes_xfered
+= nbytes
;
1618 atmci_set_pending(host
, EVENT_XFER_COMPLETE
);
1621 static void atmci_write_data_pio(struct atmel_mci
*host
)
1623 struct scatterlist
*sg
= host
->sg
;
1624 void *buf
= sg_virt(sg
);
1625 unsigned int offset
= host
->pio_offset
;
1626 struct mmc_data
*data
= host
->data
;
1629 unsigned int nbytes
= 0;
1632 if (likely(offset
+ 4 <= sg
->length
)) {
1633 value
= get_unaligned((u32
*)(buf
+ offset
));
1634 atmci_writel(host
, ATMCI_TDR
, value
);
1638 if (offset
== sg
->length
) {
1639 host
->sg
= sg
= sg_next(sg
);
1647 unsigned int remaining
= sg
->length
- offset
;
1650 memcpy(&value
, buf
+ offset
, remaining
);
1651 nbytes
+= remaining
;
1653 host
->sg
= sg
= sg_next(sg
);
1655 atmci_writel(host
, ATMCI_TDR
, value
);
1659 offset
= 4 - remaining
;
1661 memcpy((u8
*)&value
+ remaining
, buf
, offset
);
1662 atmci_writel(host
, ATMCI_TDR
, value
);
1666 status
= atmci_readl(host
, ATMCI_SR
);
1667 if (status
& ATMCI_DATA_ERROR_FLAGS
) {
1668 atmci_writel(host
, ATMCI_IDR
, (ATMCI_NOTBUSY
| ATMCI_TXRDY
1669 | ATMCI_DATA_ERROR_FLAGS
));
1670 host
->data_status
= status
;
1671 data
->bytes_xfered
+= nbytes
;
1673 atmci_set_pending(host
, EVENT_DATA_ERROR
);
1674 tasklet_schedule(&host
->tasklet
);
1677 } while (status
& ATMCI_TXRDY
);
1679 host
->pio_offset
= offset
;
1680 data
->bytes_xfered
+= nbytes
;
1685 atmci_writel(host
, ATMCI_IDR
, ATMCI_TXRDY
);
1686 atmci_writel(host
, ATMCI_IER
, ATMCI_NOTBUSY
);
1687 data
->bytes_xfered
+= nbytes
;
1689 atmci_set_pending(host
, EVENT_XFER_COMPLETE
);
1692 static void atmci_cmd_interrupt(struct atmel_mci
*host
, u32 status
)
1694 atmci_writel(host
, ATMCI_IDR
, ATMCI_CMDRDY
);
1696 host
->cmd_status
= status
;
1698 atmci_set_pending(host
, EVENT_CMD_COMPLETE
);
1699 tasklet_schedule(&host
->tasklet
);
1702 static void atmci_sdio_interrupt(struct atmel_mci
*host
, u32 status
)
1706 for (i
= 0; i
< ATMCI_MAX_NR_SLOTS
; i
++) {
1707 struct atmel_mci_slot
*slot
= host
->slot
[i
];
1708 if (slot
&& (status
& slot
->sdio_irq
)) {
1709 mmc_signal_sdio_irq(slot
->mmc
);
1715 static irqreturn_t
atmci_interrupt(int irq
, void *dev_id
)
1717 struct atmel_mci
*host
= dev_id
;
1718 u32 status
, mask
, pending
;
1719 unsigned int pass_count
= 0;
1722 status
= atmci_readl(host
, ATMCI_SR
);
1723 mask
= atmci_readl(host
, ATMCI_IMR
);
1724 pending
= status
& mask
;
1728 if (pending
& ATMCI_DATA_ERROR_FLAGS
) {
1729 atmci_writel(host
, ATMCI_IDR
, ATMCI_DATA_ERROR_FLAGS
1730 | ATMCI_RXRDY
| ATMCI_TXRDY
);
1731 pending
&= atmci_readl(host
, ATMCI_IMR
);
1733 host
->data_status
= status
;
1735 atmci_set_pending(host
, EVENT_DATA_ERROR
);
1736 tasklet_schedule(&host
->tasklet
);
1739 if (pending
& ATMCI_TXBUFE
) {
1740 atmci_writel(host
, ATMCI_IDR
, ATMCI_TXBUFE
);
1741 atmci_writel(host
, ATMCI_IDR
, ATMCI_ENDTX
);
1743 * We can receive this interruption before having configured
1744 * the second pdc buffer, so we need to reconfigure first and
1745 * second buffers again
1747 if (host
->data_size
) {
1748 atmci_pdc_set_both_buf(host
, XFER_TRANSMIT
);
1749 atmci_writel(host
, ATMCI_IER
, ATMCI_ENDTX
);
1750 atmci_writel(host
, ATMCI_IER
, ATMCI_TXBUFE
);
1752 atmci_pdc_complete(host
);
1754 } else if (pending
& ATMCI_ENDTX
) {
1755 atmci_writel(host
, ATMCI_IDR
, ATMCI_ENDTX
);
1757 if (host
->data_size
) {
1758 atmci_pdc_set_single_buf(host
,
1759 XFER_TRANSMIT
, PDC_SECOND_BUF
);
1760 atmci_writel(host
, ATMCI_IER
, ATMCI_ENDTX
);
1764 if (pending
& ATMCI_RXBUFF
) {
1765 atmci_writel(host
, ATMCI_IDR
, ATMCI_RXBUFF
);
1766 atmci_writel(host
, ATMCI_IDR
, ATMCI_ENDRX
);
1768 * We can receive this interruption before having configured
1769 * the second pdc buffer, so we need to reconfigure first and
1770 * second buffers again
1772 if (host
->data_size
) {
1773 atmci_pdc_set_both_buf(host
, XFER_RECEIVE
);
1774 atmci_writel(host
, ATMCI_IER
, ATMCI_ENDRX
);
1775 atmci_writel(host
, ATMCI_IER
, ATMCI_RXBUFF
);
1777 atmci_pdc_complete(host
);
1779 } else if (pending
& ATMCI_ENDRX
) {
1780 atmci_writel(host
, ATMCI_IDR
, ATMCI_ENDRX
);
1782 if (host
->data_size
) {
1783 atmci_pdc_set_single_buf(host
,
1784 XFER_RECEIVE
, PDC_SECOND_BUF
);
1785 atmci_writel(host
, ATMCI_IER
, ATMCI_ENDRX
);
1790 if (pending
& ATMCI_NOTBUSY
) {
1791 atmci_writel(host
, ATMCI_IDR
,
1792 ATMCI_DATA_ERROR_FLAGS
| ATMCI_NOTBUSY
);
1793 if (!host
->data_status
)
1794 host
->data_status
= status
;
1796 atmci_set_pending(host
, EVENT_DATA_COMPLETE
);
1797 tasklet_schedule(&host
->tasklet
);
1799 if (pending
& ATMCI_RXRDY
)
1800 atmci_read_data_pio(host
);
1801 if (pending
& ATMCI_TXRDY
)
1802 atmci_write_data_pio(host
);
1804 if (pending
& ATMCI_CMDRDY
)
1805 atmci_cmd_interrupt(host
, status
);
1807 if (pending
& (ATMCI_SDIOIRQA
| ATMCI_SDIOIRQB
))
1808 atmci_sdio_interrupt(host
, status
);
1810 } while (pass_count
++ < 5);
1812 return pass_count
? IRQ_HANDLED
: IRQ_NONE
;
1815 static irqreturn_t
atmci_detect_interrupt(int irq
, void *dev_id
)
1817 struct atmel_mci_slot
*slot
= dev_id
;
1820 * Disable interrupts until the pin has stabilized and check
1821 * the state then. Use mod_timer() since we may be in the
1822 * middle of the timer routine when this interrupt triggers.
1824 disable_irq_nosync(irq
);
1825 mod_timer(&slot
->detect_timer
, jiffies
+ msecs_to_jiffies(20));
1830 static int __init
atmci_init_slot(struct atmel_mci
*host
,
1831 struct mci_slot_pdata
*slot_data
, unsigned int id
,
1832 u32 sdc_reg
, u32 sdio_irq
)
1834 struct mmc_host
*mmc
;
1835 struct atmel_mci_slot
*slot
;
1837 mmc
= mmc_alloc_host(sizeof(struct atmel_mci_slot
), &host
->pdev
->dev
);
1841 slot
= mmc_priv(mmc
);
1844 slot
->detect_pin
= slot_data
->detect_pin
;
1845 slot
->wp_pin
= slot_data
->wp_pin
;
1846 slot
->detect_is_active_high
= slot_data
->detect_is_active_high
;
1847 slot
->sdc_reg
= sdc_reg
;
1848 slot
->sdio_irq
= sdio_irq
;
1850 mmc
->ops
= &atmci_ops
;
1851 mmc
->f_min
= DIV_ROUND_UP(host
->bus_hz
, 512);
1852 mmc
->f_max
= host
->bus_hz
/ 2;
1853 mmc
->ocr_avail
= MMC_VDD_32_33
| MMC_VDD_33_34
;
1855 mmc
->caps
|= MMC_CAP_SDIO_IRQ
;
1856 if (host
->caps
.has_highspeed
)
1857 mmc
->caps
|= MMC_CAP_SD_HIGHSPEED
;
1858 if (slot_data
->bus_width
>= 4)
1859 mmc
->caps
|= MMC_CAP_4_BIT_DATA
;
1862 mmc
->max_req_size
= 32768 * 512;
1863 mmc
->max_blk_size
= 32768;
1864 mmc
->max_blk_count
= 512;
1866 /* Assume card is present initially */
1867 set_bit(ATMCI_CARD_PRESENT
, &slot
->flags
);
1868 if (gpio_is_valid(slot
->detect_pin
)) {
1869 if (gpio_request(slot
->detect_pin
, "mmc_detect")) {
1870 dev_dbg(&mmc
->class_dev
, "no detect pin available\n");
1871 slot
->detect_pin
= -EBUSY
;
1872 } else if (gpio_get_value(slot
->detect_pin
) ^
1873 slot
->detect_is_active_high
) {
1874 clear_bit(ATMCI_CARD_PRESENT
, &slot
->flags
);
1878 if (!gpio_is_valid(slot
->detect_pin
))
1879 mmc
->caps
|= MMC_CAP_NEEDS_POLL
;
1881 if (gpio_is_valid(slot
->wp_pin
)) {
1882 if (gpio_request(slot
->wp_pin
, "mmc_wp")) {
1883 dev_dbg(&mmc
->class_dev
, "no WP pin available\n");
1884 slot
->wp_pin
= -EBUSY
;
1888 host
->slot
[id
] = slot
;
1891 if (gpio_is_valid(slot
->detect_pin
)) {
1894 setup_timer(&slot
->detect_timer
, atmci_detect_change
,
1895 (unsigned long)slot
);
1897 ret
= request_irq(gpio_to_irq(slot
->detect_pin
),
1898 atmci_detect_interrupt
,
1899 IRQF_TRIGGER_FALLING
| IRQF_TRIGGER_RISING
,
1900 "mmc-detect", slot
);
1902 dev_dbg(&mmc
->class_dev
,
1903 "could not request IRQ %d for detect pin\n",
1904 gpio_to_irq(slot
->detect_pin
));
1905 gpio_free(slot
->detect_pin
);
1906 slot
->detect_pin
= -EBUSY
;
1910 atmci_init_debugfs(slot
);
1915 static void __exit
atmci_cleanup_slot(struct atmel_mci_slot
*slot
,
1918 /* Debugfs stuff is cleaned up by mmc core */
1920 set_bit(ATMCI_SHUTDOWN
, &slot
->flags
);
1923 mmc_remove_host(slot
->mmc
);
1925 if (gpio_is_valid(slot
->detect_pin
)) {
1926 int pin
= slot
->detect_pin
;
1928 free_irq(gpio_to_irq(pin
), slot
);
1929 del_timer_sync(&slot
->detect_timer
);
1932 if (gpio_is_valid(slot
->wp_pin
))
1933 gpio_free(slot
->wp_pin
);
1935 slot
->host
->slot
[id
] = NULL
;
1936 mmc_free_host(slot
->mmc
);
1939 static bool atmci_filter(struct dma_chan
*chan
, void *slave
)
1941 struct mci_dma_data
*sl
= slave
;
1943 if (sl
&& find_slave_dev(sl
) == chan
->device
->dev
) {
1944 chan
->private = slave_data_ptr(sl
);
1951 static void atmci_configure_dma(struct atmel_mci
*host
)
1953 struct mci_platform_data
*pdata
;
1958 pdata
= host
->pdev
->dev
.platform_data
;
1960 if (pdata
&& find_slave_dev(pdata
->dma_slave
)) {
1961 dma_cap_mask_t mask
;
1963 setup_dma_addr(pdata
->dma_slave
,
1964 host
->mapbase
+ ATMCI_TDR
,
1965 host
->mapbase
+ ATMCI_RDR
);
1967 /* Try to grab a DMA channel */
1969 dma_cap_set(DMA_SLAVE
, mask
);
1971 dma_request_channel(mask
, atmci_filter
, pdata
->dma_slave
);
1973 if (!host
->dma
.chan
)
1974 dev_notice(&host
->pdev
->dev
, "DMA not available, using PIO\n");
1976 dev_info(&host
->pdev
->dev
,
1977 "Using %s for DMA transfers\n",
1978 dma_chan_name(host
->dma
.chan
));
1981 static inline unsigned int atmci_get_version(struct atmel_mci
*host
)
1983 return atmci_readl(host
, ATMCI_VERSION
) & 0x00000fff;
1987 * HSMCI (High Speed MCI) module is not fully compatible with MCI module.
1988 * HSMCI provides DMA support and a new config register but no more supports
1991 static void __init
atmci_get_cap(struct atmel_mci
*host
)
1993 unsigned int version
;
1995 version
= atmci_get_version(host
);
1996 dev_info(&host
->pdev
->dev
,
1997 "version: 0x%x\n", version
);
1999 host
->caps
.has_dma
= 0;
2000 host
->caps
.has_pdc
= 0;
2001 host
->caps
.has_cfg_reg
= 0;
2002 host
->caps
.has_cstor_reg
= 0;
2003 host
->caps
.has_highspeed
= 0;
2004 host
->caps
.has_rwproof
= 0;
2006 /* keep only major version number */
2007 switch (version
& 0xf00) {
2010 host
->caps
.has_pdc
= 1;
2011 host
->caps
.has_rwproof
= 1;
2016 #ifdef CONFIG_AT_HDMAC
2017 host
->caps
.has_dma
= 1;
2019 host
->caps
.has_dma
= 0;
2020 dev_info(&host
->pdev
->dev
,
2021 "has dma capability but dma engine is not selected, then use pio\n");
2023 host
->caps
.has_cfg_reg
= 1;
2024 host
->caps
.has_cstor_reg
= 1;
2025 host
->caps
.has_highspeed
= 1;
2026 host
->caps
.has_rwproof
= 1;
2029 dev_warn(&host
->pdev
->dev
,
2030 "Unmanaged mci version, set minimum capabilities\n");
2035 static int __init
atmci_probe(struct platform_device
*pdev
)
2037 struct mci_platform_data
*pdata
;
2038 struct atmel_mci
*host
;
2039 struct resource
*regs
;
2040 unsigned int nr_slots
;
2044 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2047 pdata
= pdev
->dev
.platform_data
;
2050 irq
= platform_get_irq(pdev
, 0);
2054 host
= kzalloc(sizeof(struct atmel_mci
), GFP_KERNEL
);
2059 spin_lock_init(&host
->lock
);
2060 INIT_LIST_HEAD(&host
->queue
);
2062 host
->mck
= clk_get(&pdev
->dev
, "mci_clk");
2063 if (IS_ERR(host
->mck
)) {
2064 ret
= PTR_ERR(host
->mck
);
2069 host
->regs
= ioremap(regs
->start
, resource_size(regs
));
2073 clk_enable(host
->mck
);
2074 atmci_writel(host
, ATMCI_CR
, ATMCI_CR_SWRST
);
2075 host
->bus_hz
= clk_get_rate(host
->mck
);
2076 clk_disable(host
->mck
);
2078 host
->mapbase
= regs
->start
;
2080 tasklet_init(&host
->tasklet
, atmci_tasklet_func
, (unsigned long)host
);
2082 ret
= request_irq(irq
, atmci_interrupt
, 0, dev_name(&pdev
->dev
), host
);
2084 goto err_request_irq
;
2086 /* Get MCI capabilities and set operations according to it */
2087 atmci_get_cap(host
);
2088 if (host
->caps
.has_dma
) {
2089 dev_info(&pdev
->dev
, "using DMA\n");
2090 host
->prepare_data
= &atmci_prepare_data_dma
;
2091 host
->submit_data
= &atmci_submit_data_dma
;
2092 host
->stop_transfer
= &atmci_stop_transfer_dma
;
2093 } else if (host
->caps
.has_pdc
) {
2094 dev_info(&pdev
->dev
, "using PDC\n");
2095 host
->prepare_data
= &atmci_prepare_data_pdc
;
2096 host
->submit_data
= &atmci_submit_data_pdc
;
2097 host
->stop_transfer
= &atmci_stop_transfer_pdc
;
2099 dev_info(&pdev
->dev
, "no DMA, no PDC\n");
2100 host
->prepare_data
= &atmci_prepare_data
;
2101 host
->submit_data
= &atmci_submit_data
;
2102 host
->stop_transfer
= &atmci_stop_transfer
;
2105 if (host
->caps
.has_dma
)
2106 atmci_configure_dma(host
);
2108 platform_set_drvdata(pdev
, host
);
2110 /* We need at least one slot to succeed */
2113 if (pdata
->slot
[0].bus_width
) {
2114 ret
= atmci_init_slot(host
, &pdata
->slot
[0],
2115 0, ATMCI_SDCSEL_SLOT_A
, ATMCI_SDIOIRQA
);
2119 if (pdata
->slot
[1].bus_width
) {
2120 ret
= atmci_init_slot(host
, &pdata
->slot
[1],
2121 1, ATMCI_SDCSEL_SLOT_B
, ATMCI_SDIOIRQB
);
2127 dev_err(&pdev
->dev
, "init failed: no slot defined\n");
2131 dev_info(&pdev
->dev
,
2132 "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
2133 host
->mapbase
, irq
, nr_slots
);
2139 dma_release_channel(host
->dma
.chan
);
2140 free_irq(irq
, host
);
2142 iounmap(host
->regs
);
2150 static int __exit
atmci_remove(struct platform_device
*pdev
)
2152 struct atmel_mci
*host
= platform_get_drvdata(pdev
);
2155 platform_set_drvdata(pdev
, NULL
);
2157 for (i
= 0; i
< ATMCI_MAX_NR_SLOTS
; i
++) {
2159 atmci_cleanup_slot(host
->slot
[i
], i
);
2162 clk_enable(host
->mck
);
2163 atmci_writel(host
, ATMCI_IDR
, ~0UL);
2164 atmci_writel(host
, ATMCI_CR
, ATMCI_CR_MCIDIS
);
2165 atmci_readl(host
, ATMCI_SR
);
2166 clk_disable(host
->mck
);
2168 #ifdef CONFIG_MMC_ATMELMCI_DMA
2170 dma_release_channel(host
->dma
.chan
);
2173 free_irq(platform_get_irq(pdev
, 0), host
);
2174 iounmap(host
->regs
);
2183 static int atmci_suspend(struct device
*dev
)
2185 struct atmel_mci
*host
= dev_get_drvdata(dev
);
2188 for (i
= 0; i
< ATMCI_MAX_NR_SLOTS
; i
++) {
2189 struct atmel_mci_slot
*slot
= host
->slot
[i
];
2194 ret
= mmc_suspend_host(slot
->mmc
);
2197 slot
= host
->slot
[i
];
2199 && test_bit(ATMCI_SUSPENDED
, &slot
->flags
)) {
2200 mmc_resume_host(host
->slot
[i
]->mmc
);
2201 clear_bit(ATMCI_SUSPENDED
, &slot
->flags
);
2206 set_bit(ATMCI_SUSPENDED
, &slot
->flags
);
2213 static int atmci_resume(struct device
*dev
)
2215 struct atmel_mci
*host
= dev_get_drvdata(dev
);
2219 for (i
= 0; i
< ATMCI_MAX_NR_SLOTS
; i
++) {
2220 struct atmel_mci_slot
*slot
= host
->slot
[i
];
2223 slot
= host
->slot
[i
];
2226 if (!test_bit(ATMCI_SUSPENDED
, &slot
->flags
))
2228 err
= mmc_resume_host(slot
->mmc
);
2232 clear_bit(ATMCI_SUSPENDED
, &slot
->flags
);
2237 static SIMPLE_DEV_PM_OPS(atmci_pm
, atmci_suspend
, atmci_resume
);
2238 #define ATMCI_PM_OPS (&atmci_pm)
2240 #define ATMCI_PM_OPS NULL
2243 static struct platform_driver atmci_driver
= {
2244 .remove
= __exit_p(atmci_remove
),
2246 .name
= "atmel_mci",
2251 static int __init
atmci_init(void)
2253 return platform_driver_probe(&atmci_driver
, atmci_probe
);
2256 static void __exit
atmci_exit(void)
2258 platform_driver_unregister(&atmci_driver
);
2261 late_initcall(atmci_init
); /* try to load after dma driver when built-in */
2262 module_exit(atmci_exit
);
2264 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
2265 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
2266 MODULE_LICENSE("GPL v2");