drivers/mmc/host/sdhci-of-arasan.c

   1 /*
   2  * Arasan Secure Digital Host Controller Interface.
   3  * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
   4  * Copyright (c) 2012 Wind River Systems, Inc.
   5  * Copyright (C) 2013 Pengutronix e.K.
   6  * Copyright (C) 2013 Xilinx Inc.
   7  *
   8  * Based on sdhci-of-esdhc.c
   9  *
  10  * Copyright (c) 2007 Freescale Semiconductor, Inc.
  11  * Copyright (c) 2009 MontaVista Software, Inc.
  12  *
  13  * Authors: Xiaobo Xie <X.Xie@freescale.com>
  14  *          Anton Vorontsov <avorontsov@ru.mvista.com>
  15  *
  16  * This program is free software; you can redistribute it and/or modify
  17  * it under the terms of the GNU General Public License as published by
  18  * the Free Software Foundation; either version 2 of the License, or (at
  19  * your option) any later version.
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/of_device.h>
  24 #include <linux/phy/phy.h>
  25 #include "sdhci-pltfm.h"
  26
  27 #define SDHCI_ARASAN_CLK_CTRL_OFFSET    0x2c
  28 #define SDHCI_ARASAN_VENDOR_REGISTER    0x78
  29
  30 #define VENDOR_ENHANCED_STROBE          BIT(0)
  31 #define CLK_CTRL_TIMEOUT_SHIFT          16
  32 #define CLK_CTRL_TIMEOUT_MASK           (0xf << CLK_CTRL_TIMEOUT_SHIFT)
  33 #define CLK_CTRL_TIMEOUT_MIN_EXP        13
  34
  35 /**
  36  * struct sdhci_arasan_data
  37  * @clk_ahb:    Pointer to the AHB clock
  38  * @phy:        Pointer to the generic phy
  39  * @phy_on:     True if the PHY is turned on.
  40  */
  41 struct sdhci_arasan_data {
  42         struct clk      *clk_ahb;
  43         struct phy      *phy;
  44         bool            phy_on;
  45 };
  46
  47 static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host *host)
  48 {
  49         u32 div;
  50         unsigned long freq;
  51         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
  52
  53         div = readl(host->ioaddr + SDHCI_ARASAN_CLK_CTRL_OFFSET);
  54         div = (div & CLK_CTRL_TIMEOUT_MASK) >> CLK_CTRL_TIMEOUT_SHIFT;
  55
  56         freq = clk_get_rate(pltfm_host->clk);
  57         freq /= 1 << (CLK_CTRL_TIMEOUT_MIN_EXP + div);
  58
  59         return freq;
  60 }
  61
  62 static void sdhci_arasan_set_clock(struct sdhci_host *host, unsigned int clock)
  63 {
  64         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
  65         struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
  66
  67         if (sdhci_arasan->phy_on && !IS_ERR(sdhci_arasan->phy)) {
  68                 sdhci_arasan->phy_on = false;
  69
  70                 spin_unlock_irq(&host->lock);
  71                 phy_power_off(sdhci_arasan->phy);
  72                 spin_lock_irq(&host->lock);
  73         }
  74
  75         sdhci_set_clock(host, clock);
  76
  77         if (host->mmc->actual_clock && !IS_ERR(sdhci_arasan->phy)) {
  78                 sdhci_arasan->phy_on = true;
  79
  80                 spin_unlock_irq(&host->lock);
  81                 phy_power_on(sdhci_arasan->phy);
  82                 spin_lock_irq(&host->lock);
  83         }
  84 }
  85
  86 static void sdhci_arasan_hs400_enhanced_strobe(struct mmc_host *mmc,
  87                                         struct mmc_ios *ios)
  88 {
  89         u32 vendor;
  90         struct sdhci_host *host = mmc_priv(mmc);
  91
  92         vendor = readl(host->ioaddr + SDHCI_ARASAN_VENDOR_REGISTER);
  93         if (ios->enhanced_strobe)
  94                 vendor |= VENDOR_ENHANCED_STROBE;
  95         else
  96                 vendor &= ~VENDOR_ENHANCED_STROBE;
  97
  98         writel(vendor, host->ioaddr + SDHCI_ARASAN_VENDOR_REGISTER);
  99 }
 100
 101 static struct sdhci_ops sdhci_arasan_ops = {
 102         .set_clock = sdhci_arasan_set_clock,
 103         .get_max_clock = sdhci_pltfm_clk_get_max_clock,
 104         .get_timeout_clock = sdhci_arasan_get_timeout_clock,
 105         .set_bus_width = sdhci_set_bus_width,
 106         .reset = sdhci_reset,
 107         .set_uhs_signaling = sdhci_set_uhs_signaling,
 108 };
 109
 110 static struct sdhci_pltfm_data sdhci_arasan_pdata = {
 111         .ops = &sdhci_arasan_ops,
 112         .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
 113         .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
 114                         SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
 115 };
 116
 117 #ifdef CONFIG_PM_SLEEP
 118 /**
 119  * sdhci_arasan_suspend - Suspend method for the driver
 120  * @dev:        Address of the device structure
 121  * Returns 0 on success and error value on error
 122  *
 123  * Put the device in a low power state.
 124  */
 125 static int sdhci_arasan_suspend(struct device *dev)
 126 {
 127         struct platform_device *pdev = to_platform_device(dev);
 128         struct sdhci_host *host = platform_get_drvdata(pdev);
 129         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 130         struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
 131         int ret;
 132
 133         ret = sdhci_suspend_host(host);
 134         if (ret)
 135                 return ret;
 136
 137         if (!IS_ERR(sdhci_arasan->phy)) {
 138                 ret = phy_power_off(sdhci_arasan->phy);
 139                 if (ret) {
 140                         dev_err(dev, "Cannot power off phy.\n");
 141                         sdhci_resume_host(host);
 142                         return ret;
 143                 }
 144         }
 145
 146         clk_disable(pltfm_host->clk);
 147         clk_disable(sdhci_arasan->clk_ahb);
 148
 149         return 0;
 150 }
 151
 152 /**
 153  * sdhci_arasan_resume - Resume method for the driver
 154  * @dev:        Address of the device structure
 155  * Returns 0 on success and error value on error
 156  *
 157  * Resume operation after suspend
 158  */
 159 static int sdhci_arasan_resume(struct device *dev)
 160 {
 161         struct platform_device *pdev = to_platform_device(dev);
 162         struct sdhci_host *host = platform_get_drvdata(pdev);
 163         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 164         struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
 165         int ret;
 166
 167         ret = clk_enable(sdhci_arasan->clk_ahb);
 168         if (ret) {
 169                 dev_err(dev, "Cannot enable AHB clock.\n");
 170                 return ret;
 171         }
 172
 173         ret = clk_enable(pltfm_host->clk);
 174         if (ret) {
 175                 dev_err(dev, "Cannot enable SD clock.\n");
 176                 return ret;
 177         }
 178
 179         if (!IS_ERR(sdhci_arasan->phy)) {
 180                 ret = phy_power_on(sdhci_arasan->phy);
 181                 if (ret) {
 182                         dev_err(dev, "Cannot power on phy.\n");
 183                         return ret;
 184                 }
 185         }
 186
 187         return sdhci_resume_host(host);
 188 }
 189 #endif /* ! CONFIG_PM_SLEEP */
 190
 191 static SIMPLE_DEV_PM_OPS(sdhci_arasan_dev_pm_ops, sdhci_arasan_suspend,
 192                          sdhci_arasan_resume);
 193
 194 static int sdhci_arasan_probe(struct platform_device *pdev)
 195 {
 196         int ret;
 197         struct clk *clk_xin;
 198         struct sdhci_host *host;
 199         struct sdhci_pltfm_host *pltfm_host;
 200         struct sdhci_arasan_data *sdhci_arasan;
 201
 202         host = sdhci_pltfm_init(pdev, &sdhci_arasan_pdata,
 203                                 sizeof(*sdhci_arasan));
 204         if (IS_ERR(host))
 205                 return PTR_ERR(host);
 206
 207         pltfm_host = sdhci_priv(host);
 208         sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
 209
 210         sdhci_arasan->clk_ahb = devm_clk_get(&pdev->dev, "clk_ahb");
 211         if (IS_ERR(sdhci_arasan->clk_ahb)) {
 212                 dev_err(&pdev->dev, "clk_ahb clock not found.\n");
 213                 ret = PTR_ERR(sdhci_arasan->clk_ahb);
 214                 goto err_pltfm_free;
 215         }
 216
 217         clk_xin = devm_clk_get(&pdev->dev, "clk_xin");
 218         if (IS_ERR(clk_xin)) {
 219                 dev_err(&pdev->dev, "clk_xin clock not found.\n");
 220                 ret = PTR_ERR(clk_xin);
 221                 goto err_pltfm_free;
 222         }
 223
 224         ret = clk_prepare_enable(sdhci_arasan->clk_ahb);
 225         if (ret) {
 226                 dev_err(&pdev->dev, "Unable to enable AHB clock.\n");
 227                 goto err_pltfm_free;
 228         }
 229
 230         ret = clk_prepare_enable(clk_xin);
 231         if (ret) {
 232                 dev_err(&pdev->dev, "Unable to enable SD clock.\n");
 233                 goto clk_dis_ahb;
 234         }
 235
 236         sdhci_get_of_property(pdev);
 237         pltfm_host->clk = clk_xin;
 238
 239         ret = mmc_of_parse(host->mmc);
 240         if (ret) {
 241                 dev_err(&pdev->dev, "parsing dt failed (%u)\n", ret);
 242                 goto clk_disable_all;
 243         }
 244
 245         sdhci_arasan->phy = ERR_PTR(-ENODEV);
 246         if (of_device_is_compatible(pdev->dev.of_node,
 247                                     "arasan,sdhci-5.1")) {
 248                 sdhci_arasan->phy = devm_phy_get(&pdev->dev,
 249                                                  "phy_arasan");
 250                 if (IS_ERR(sdhci_arasan->phy)) {
 251                         ret = PTR_ERR(sdhci_arasan->phy);
 252                         dev_err(&pdev->dev, "No phy for arasan,sdhci-5.1.\n");
 253                         goto clk_disable_all;
 254                 }
 255
 256                 ret = phy_init(sdhci_arasan->phy);
 257                 if (ret < 0) {
 258                         dev_err(&pdev->dev, "phy_init err.\n");
 259                         goto clk_disable_all;
 260                 }
 261
 262                 host->mmc_host_ops.hs400_enhanced_strobe =
 263                                         sdhci_arasan_hs400_enhanced_strobe;
 264         }
 265
 266         ret = sdhci_add_host(host);
 267         if (ret)
 268                 goto err_add_host;
 269
 270         return 0;
 271
 272 err_add_host:
 273         if (!IS_ERR(sdhci_arasan->phy))
 274                 phy_exit(sdhci_arasan->phy);
 275 clk_disable_all:
 276         clk_disable_unprepare(clk_xin);
 277 clk_dis_ahb:
 278         clk_disable_unprepare(sdhci_arasan->clk_ahb);
 279 err_pltfm_free:
 280         sdhci_pltfm_free(pdev);
 281         return ret;
 282 }
 283
 284 static int sdhci_arasan_remove(struct platform_device *pdev)
 285 {
 286         int ret;
 287         struct sdhci_host *host = platform_get_drvdata(pdev);
 288         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 289         struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
 290         struct clk *clk_ahb = sdhci_arasan->clk_ahb;
 291
 292         if (!IS_ERR(sdhci_arasan->phy)) {
 293                 phy_power_off(sdhci_arasan->phy);
 294                 phy_exit(sdhci_arasan->phy);
 295         }
 296
 297         ret = sdhci_pltfm_unregister(pdev);
 298
 299         clk_disable_unprepare(clk_ahb);
 300
 301         return ret;
 302 }
 303
 304 static const struct of_device_id sdhci_arasan_of_match[] = {
 305         { .compatible = "arasan,sdhci-8.9a" },
 306         { .compatible = "arasan,sdhci-5.1" },
 307         { .compatible = "arasan,sdhci-4.9a" },
 308         { }
 309 };
 310 MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match);
 311
 312 static struct platform_driver sdhci_arasan_driver = {
 313         .driver = {
 314                 .name = "sdhci-arasan",
 315                 .of_match_table = sdhci_arasan_of_match,
 316                 .pm = &sdhci_arasan_dev_pm_ops,
 317         },
 318         .probe = sdhci_arasan_probe,
 319         .remove = sdhci_arasan_remove,
 320 };
 321
 322 module_platform_driver(sdhci_arasan_driver);
 323
 324 MODULE_DESCRIPTION("Driver for the Arasan SDHCI Controller");
 325 MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>");
 326 MODULE_LICENSE("GPL");