1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/slab.h>
21 #include <linux/device.h>
22 #include <linux/mmc/host.h>
23 #include <linux/mmc/mmc.h>
24 #include <linux/scatterlist.h>
26 #include <linux/gpio.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/mmc/slot-gpio.h>
29 #include <linux/mmc/sdhci-pci-data.h>
30 #include <linux/acpi.h>
33 #include "sdhci-pci.h"
34 #include "sdhci-pci-o2micro.h"
36 static int sdhci_pci_enable_dma(struct sdhci_host
*host
);
37 static void sdhci_pci_set_bus_width(struct sdhci_host
*host
, int width
);
38 static void sdhci_pci_hw_reset(struct sdhci_host
*host
);
39 static int sdhci_pci_select_drive_strength(struct sdhci_host
*host
,
40 struct mmc_card
*card
,
41 unsigned int max_dtr
, int host_drv
,
42 int card_drv
, int *drv_type
);
44 /*****************************************************************************\
46 * Hardware specific quirk handling *
48 \*****************************************************************************/
50 static int ricoh_probe(struct sdhci_pci_chip
*chip
)
52 if (chip
->pdev
->subsystem_vendor
== PCI_VENDOR_ID_SAMSUNG
||
53 chip
->pdev
->subsystem_vendor
== PCI_VENDOR_ID_SONY
)
54 chip
->quirks
|= SDHCI_QUIRK_NO_CARD_NO_RESET
;
58 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot
*slot
)
61 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT
)
62 & SDHCI_TIMEOUT_CLK_MASK
) |
64 ((0x21 << SDHCI_CLOCK_BASE_SHIFT
)
65 & SDHCI_CLOCK_BASE_MASK
) |
67 SDHCI_TIMEOUT_CLK_UNIT
|
74 static int ricoh_mmc_resume(struct sdhci_pci_chip
*chip
)
76 /* Apply a delay to allow controller to settle */
77 /* Otherwise it becomes confused if card state changed
83 static const struct sdhci_pci_fixes sdhci_ricoh
= {
85 .quirks
= SDHCI_QUIRK_32BIT_DMA_ADDR
|
86 SDHCI_QUIRK_FORCE_DMA
|
87 SDHCI_QUIRK_CLOCK_BEFORE_RESET
,
90 static const struct sdhci_pci_fixes sdhci_ricoh_mmc
= {
91 .probe_slot
= ricoh_mmc_probe_slot
,
92 .resume
= ricoh_mmc_resume
,
93 .quirks
= SDHCI_QUIRK_32BIT_DMA_ADDR
|
94 SDHCI_QUIRK_CLOCK_BEFORE_RESET
|
95 SDHCI_QUIRK_NO_CARD_NO_RESET
|
96 SDHCI_QUIRK_MISSING_CAPS
99 static const struct sdhci_pci_fixes sdhci_ene_712
= {
100 .quirks
= SDHCI_QUIRK_SINGLE_POWER_WRITE
|
101 SDHCI_QUIRK_BROKEN_DMA
,
104 static const struct sdhci_pci_fixes sdhci_ene_714
= {
105 .quirks
= SDHCI_QUIRK_SINGLE_POWER_WRITE
|
106 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS
|
107 SDHCI_QUIRK_BROKEN_DMA
,
110 static const struct sdhci_pci_fixes sdhci_cafe
= {
111 .quirks
= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
|
112 SDHCI_QUIRK_NO_BUSY_IRQ
|
113 SDHCI_QUIRK_BROKEN_CARD_DETECTION
|
114 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
,
117 static const struct sdhci_pci_fixes sdhci_intel_qrk
= {
118 .quirks
= SDHCI_QUIRK_NO_HISPD_BIT
,
121 static int mrst_hc_probe_slot(struct sdhci_pci_slot
*slot
)
123 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
;
128 * ADMA operation is disabled for Moorestown platform due to
131 static int mrst_hc_probe(struct sdhci_pci_chip
*chip
)
134 * slots number is fixed here for MRST as SDIO3/5 are never used and
135 * have hardware bugs.
141 static int pch_hc_probe_slot(struct sdhci_pci_slot
*slot
)
143 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
;
149 static irqreturn_t
sdhci_pci_sd_cd(int irq
, void *dev_id
)
151 struct sdhci_pci_slot
*slot
= dev_id
;
152 struct sdhci_host
*host
= slot
->host
;
154 mmc_detect_change(host
->mmc
, msecs_to_jiffies(200));
158 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot
*slot
)
160 int err
, irq
, gpio
= slot
->cd_gpio
;
162 slot
->cd_gpio
= -EINVAL
;
163 slot
->cd_irq
= -EINVAL
;
165 if (!gpio_is_valid(gpio
))
168 err
= devm_gpio_request(&slot
->chip
->pdev
->dev
, gpio
, "sd_cd");
172 err
= gpio_direction_input(gpio
);
176 irq
= gpio_to_irq(gpio
);
180 err
= request_irq(irq
, sdhci_pci_sd_cd
, IRQF_TRIGGER_RISING
|
181 IRQF_TRIGGER_FALLING
, "sd_cd", slot
);
185 slot
->cd_gpio
= gpio
;
191 devm_gpio_free(&slot
->chip
->pdev
->dev
, gpio
);
193 dev_warn(&slot
->chip
->pdev
->dev
, "failed to setup card detect wake up\n");
196 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot
*slot
)
198 if (slot
->cd_irq
>= 0)
199 free_irq(slot
->cd_irq
, slot
);
204 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot
*slot
)
208 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot
*slot
)
214 static int mfd_emmc_probe_slot(struct sdhci_pci_slot
*slot
)
216 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
| MMC_CAP_NONREMOVABLE
;
217 slot
->host
->mmc
->caps2
|= MMC_CAP2_BOOTPART_NOACC
|
218 MMC_CAP2_HC_ERASE_SZ
;
222 static int mfd_sdio_probe_slot(struct sdhci_pci_slot
*slot
)
224 slot
->host
->mmc
->caps
|= MMC_CAP_POWER_OFF_CARD
| MMC_CAP_NONREMOVABLE
;
228 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0
= {
229 .quirks
= SDHCI_QUIRK_BROKEN_ADMA
| SDHCI_QUIRK_NO_HISPD_BIT
,
230 .probe_slot
= mrst_hc_probe_slot
,
233 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2
= {
234 .quirks
= SDHCI_QUIRK_BROKEN_ADMA
| SDHCI_QUIRK_NO_HISPD_BIT
,
235 .probe
= mrst_hc_probe
,
238 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd
= {
239 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
240 .allow_runtime_pm
= true,
241 .own_cd_for_runtime_pm
= true,
244 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio
= {
245 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
246 .quirks2
= SDHCI_QUIRK2_HOST_OFF_CARD_ON
,
247 .allow_runtime_pm
= true,
248 .probe_slot
= mfd_sdio_probe_slot
,
251 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc
= {
252 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
253 .allow_runtime_pm
= true,
254 .probe_slot
= mfd_emmc_probe_slot
,
257 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio
= {
258 .quirks
= SDHCI_QUIRK_BROKEN_ADMA
,
259 .probe_slot
= pch_hc_probe_slot
,
262 static void sdhci_pci_int_hw_reset(struct sdhci_host
*host
)
266 reg
= sdhci_readb(host
, SDHCI_POWER_CONTROL
);
268 sdhci_writeb(host
, reg
, SDHCI_POWER_CONTROL
);
269 /* For eMMC, minimum is 1us but give it 9us for good measure */
272 sdhci_writeb(host
, reg
, SDHCI_POWER_CONTROL
);
273 /* For eMMC, minimum is 200us but give it 300us for good measure */
274 usleep_range(300, 1000);
277 static int spt_select_drive_strength(struct sdhci_host
*host
,
278 struct mmc_card
*card
,
279 unsigned int max_dtr
,
280 int host_drv
, int card_drv
, int *drv_type
)
284 if (sdhci_pci_spt_drive_strength
> 0)
285 drive_strength
= sdhci_pci_spt_drive_strength
& 0xf;
287 drive_strength
= 0; /* Default 50-ohm */
289 if ((mmc_driver_type_mask(drive_strength
) & card_drv
) == 0)
290 drive_strength
= 0; /* Default 50-ohm */
292 return drive_strength
;
295 /* Try to read the drive strength from the card */
296 static void spt_read_drive_strength(struct sdhci_host
*host
)
301 if (sdhci_pci_spt_drive_strength
)
304 sdhci_pci_spt_drive_strength
= -1;
306 m
= sdhci_readw(host
, SDHCI_HOST_CONTROL2
) & 0x7;
307 if (m
!= 3 && m
!= 5)
309 val
= sdhci_readl(host
, SDHCI_PRESENT_STATE
);
312 sdhci_writel(host
, 0x007f0023, SDHCI_INT_ENABLE
);
313 sdhci_writel(host
, 0, SDHCI_SIGNAL_ENABLE
);
314 sdhci_writew(host
, 0x10, SDHCI_TRANSFER_MODE
);
315 sdhci_writeb(host
, 0xe, SDHCI_TIMEOUT_CONTROL
);
316 sdhci_writew(host
, 512, SDHCI_BLOCK_SIZE
);
317 sdhci_writew(host
, 1, SDHCI_BLOCK_COUNT
);
318 sdhci_writel(host
, 0, SDHCI_ARGUMENT
);
319 sdhci_writew(host
, 0x83b, SDHCI_COMMAND
);
320 for (i
= 0; i
< 1000; i
++) {
321 val
= sdhci_readl(host
, SDHCI_INT_STATUS
);
322 if (val
& 0xffff8000)
328 val
= sdhci_readl(host
, SDHCI_PRESENT_STATE
);
331 for (i
= 0; i
< 47; i
++)
332 val
= sdhci_readl(host
, SDHCI_BUFFER
);
334 if (t
!= 0x200 && t
!= 0x300)
337 sdhci_pci_spt_drive_strength
= 0x10 | ((val
>> 12) & 0xf);
340 static int bxt_get_cd(struct mmc_host
*mmc
)
342 int gpio_cd
= mmc_gpio_get_cd(mmc
);
343 struct sdhci_host
*host
= mmc_priv(mmc
);
350 spin_lock_irqsave(&host
->lock
, flags
);
352 if (host
->flags
& SDHCI_DEVICE_DEAD
)
355 ret
= !!(sdhci_readl(host
, SDHCI_PRESENT_STATE
) & SDHCI_CARD_PRESENT
);
357 spin_unlock_irqrestore(&host
->lock
, flags
);
362 static int byt_emmc_probe_slot(struct sdhci_pci_slot
*slot
)
364 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
| MMC_CAP_NONREMOVABLE
|
365 MMC_CAP_HW_RESET
| MMC_CAP_1_8V_DDR
|
366 MMC_CAP_CMD_DURING_TFR
|
367 MMC_CAP_WAIT_WHILE_BUSY
;
368 slot
->host
->mmc
->caps2
|= MMC_CAP2_HC_ERASE_SZ
;
369 slot
->hw_reset
= sdhci_pci_int_hw_reset
;
370 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_INTEL_BSW_EMMC
)
371 slot
->host
->timeout_clk
= 1000; /* 1000 kHz i.e. 1 MHz */
372 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_INTEL_SPT_EMMC
) {
373 spt_read_drive_strength(slot
->host
);
374 slot
->select_drive_strength
= spt_select_drive_strength
;
380 static int ni_set_max_freq(struct sdhci_pci_slot
*slot
)
383 unsigned long long max_freq
;
385 status
= acpi_evaluate_integer(ACPI_HANDLE(&slot
->chip
->pdev
->dev
),
386 "MXFQ", NULL
, &max_freq
);
387 if (ACPI_FAILURE(status
)) {
388 dev_err(&slot
->chip
->pdev
->dev
,
389 "MXFQ not found in acpi table\n");
393 slot
->host
->mmc
->f_max
= max_freq
* 1000000;
398 static inline int ni_set_max_freq(struct sdhci_pci_slot
*slot
)
404 static int ni_byt_sdio_probe_slot(struct sdhci_pci_slot
*slot
)
408 err
= ni_set_max_freq(slot
);
412 slot
->host
->mmc
->caps
|= MMC_CAP_POWER_OFF_CARD
| MMC_CAP_NONREMOVABLE
|
413 MMC_CAP_WAIT_WHILE_BUSY
;
417 static int byt_sdio_probe_slot(struct sdhci_pci_slot
*slot
)
419 slot
->host
->mmc
->caps
|= MMC_CAP_POWER_OFF_CARD
| MMC_CAP_NONREMOVABLE
|
420 MMC_CAP_WAIT_WHILE_BUSY
;
424 static int byt_sd_probe_slot(struct sdhci_pci_slot
*slot
)
426 slot
->host
->mmc
->caps
|= MMC_CAP_WAIT_WHILE_BUSY
;
428 slot
->cd_override_level
= true;
429 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_INTEL_BXT_SD
||
430 slot
->chip
->pdev
->device
== PCI_DEVICE_ID_INTEL_BXTM_SD
||
431 slot
->chip
->pdev
->device
== PCI_DEVICE_ID_INTEL_APL_SD
||
432 slot
->chip
->pdev
->device
== PCI_DEVICE_ID_INTEL_GLK_SD
) {
433 slot
->host
->mmc_host_ops
.get_cd
= bxt_get_cd
;
434 slot
->host
->mmc
->caps
|= MMC_CAP_AGGRESSIVE_PM
;
440 #define SDHCI_INTEL_PWR_TIMEOUT_CNT 20
441 #define SDHCI_INTEL_PWR_TIMEOUT_UDELAY 100
443 static void sdhci_intel_set_power(struct sdhci_host
*host
, unsigned char mode
,
449 sdhci_set_power(host
, mode
, vdd
);
451 if (mode
== MMC_POWER_OFF
)
455 * Bus power might not enable after D3 -> D0 transition due to the
456 * present state not yet having propagated. Retry for up to 2ms.
458 for (cntr
= 0; cntr
< SDHCI_INTEL_PWR_TIMEOUT_CNT
; cntr
++) {
459 reg
= sdhci_readb(host
, SDHCI_POWER_CONTROL
);
460 if (reg
& SDHCI_POWER_ON
)
462 udelay(SDHCI_INTEL_PWR_TIMEOUT_UDELAY
);
463 reg
|= SDHCI_POWER_ON
;
464 sdhci_writeb(host
, reg
, SDHCI_POWER_CONTROL
);
468 static const struct sdhci_ops sdhci_intel_byt_ops
= {
469 .set_clock
= sdhci_set_clock
,
470 .set_power
= sdhci_intel_set_power
,
471 .enable_dma
= sdhci_pci_enable_dma
,
472 .set_bus_width
= sdhci_pci_set_bus_width
,
473 .reset
= sdhci_reset
,
474 .set_uhs_signaling
= sdhci_set_uhs_signaling
,
475 .hw_reset
= sdhci_pci_hw_reset
,
476 .select_drive_strength
= sdhci_pci_select_drive_strength
,
479 static const struct sdhci_pci_fixes sdhci_intel_byt_emmc
= {
480 .allow_runtime_pm
= true,
481 .probe_slot
= byt_emmc_probe_slot
,
482 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
483 .quirks2
= SDHCI_QUIRK2_PRESET_VALUE_BROKEN
|
484 SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400
|
485 SDHCI_QUIRK2_STOP_WITH_TC
,
486 .ops
= &sdhci_intel_byt_ops
,
489 static const struct sdhci_pci_fixes sdhci_ni_byt_sdio
= {
490 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
491 .quirks2
= SDHCI_QUIRK2_HOST_OFF_CARD_ON
|
492 SDHCI_QUIRK2_PRESET_VALUE_BROKEN
,
493 .allow_runtime_pm
= true,
494 .probe_slot
= ni_byt_sdio_probe_slot
,
495 .ops
= &sdhci_intel_byt_ops
,
498 static const struct sdhci_pci_fixes sdhci_intel_byt_sdio
= {
499 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
500 .quirks2
= SDHCI_QUIRK2_HOST_OFF_CARD_ON
|
501 SDHCI_QUIRK2_PRESET_VALUE_BROKEN
,
502 .allow_runtime_pm
= true,
503 .probe_slot
= byt_sdio_probe_slot
,
504 .ops
= &sdhci_intel_byt_ops
,
507 static const struct sdhci_pci_fixes sdhci_intel_byt_sd
= {
508 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
509 .quirks2
= SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON
|
510 SDHCI_QUIRK2_PRESET_VALUE_BROKEN
|
511 SDHCI_QUIRK2_STOP_WITH_TC
,
512 .allow_runtime_pm
= true,
513 .own_cd_for_runtime_pm
= true,
514 .probe_slot
= byt_sd_probe_slot
,
515 .ops
= &sdhci_intel_byt_ops
,
518 /* Define Host controllers for Intel Merrifield platform */
519 #define INTEL_MRFLD_EMMC_0 0
520 #define INTEL_MRFLD_EMMC_1 1
521 #define INTEL_MRFLD_SD 2
522 #define INTEL_MRFLD_SDIO 3
524 static int intel_mrfld_mmc_probe_slot(struct sdhci_pci_slot
*slot
)
526 unsigned int func
= PCI_FUNC(slot
->chip
->pdev
->devfn
);
529 case INTEL_MRFLD_EMMC_0
:
530 case INTEL_MRFLD_EMMC_1
:
531 slot
->host
->mmc
->caps
|= MMC_CAP_NONREMOVABLE
|
536 slot
->host
->quirks2
|= SDHCI_QUIRK2_NO_1_8_V
;
538 case INTEL_MRFLD_SDIO
:
539 slot
->host
->mmc
->caps
|= MMC_CAP_NONREMOVABLE
|
540 MMC_CAP_POWER_OFF_CARD
;
548 static const struct sdhci_pci_fixes sdhci_intel_mrfld_mmc
= {
549 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
550 .quirks2
= SDHCI_QUIRK2_BROKEN_HS200
|
551 SDHCI_QUIRK2_PRESET_VALUE_BROKEN
,
552 .allow_runtime_pm
= true,
553 .probe_slot
= intel_mrfld_mmc_probe_slot
,
556 /* O2Micro extra registers */
557 #define O2_SD_LOCK_WP 0xD3
558 #define O2_SD_MULTI_VCC3V 0xEE
559 #define O2_SD_CLKREQ 0xEC
560 #define O2_SD_CAPS 0xE0
561 #define O2_SD_ADMA1 0xE2
562 #define O2_SD_ADMA2 0xE7
563 #define O2_SD_INF_MOD 0xF1
565 static int jmicron_pmos(struct sdhci_pci_chip
*chip
, int on
)
570 ret
= pci_read_config_byte(chip
->pdev
, 0xAE, &scratch
);
575 * Turn PMOS on [bit 0], set over current detection to 2.4 V
576 * [bit 1:2] and enable over current debouncing [bit 6].
583 return pci_write_config_byte(chip
->pdev
, 0xAE, scratch
);
586 static int jmicron_probe(struct sdhci_pci_chip
*chip
)
591 if (chip
->pdev
->revision
== 0) {
592 chip
->quirks
|= SDHCI_QUIRK_32BIT_DMA_ADDR
|
593 SDHCI_QUIRK_32BIT_DMA_SIZE
|
594 SDHCI_QUIRK_32BIT_ADMA_SIZE
|
595 SDHCI_QUIRK_RESET_AFTER_REQUEST
|
596 SDHCI_QUIRK_BROKEN_SMALL_PIO
;
600 * JMicron chips can have two interfaces to the same hardware
601 * in order to work around limitations in Microsoft's driver.
602 * We need to make sure we only bind to one of them.
604 * This code assumes two things:
606 * 1. The PCI code adds subfunctions in order.
608 * 2. The MMC interface has a lower subfunction number
609 * than the SD interface.
611 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_SD
)
612 mmcdev
= PCI_DEVICE_ID_JMICRON_JMB38X_MMC
;
613 else if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_SD
)
614 mmcdev
= PCI_DEVICE_ID_JMICRON_JMB388_ESD
;
617 struct pci_dev
*sd_dev
;
620 while ((sd_dev
= pci_get_device(PCI_VENDOR_ID_JMICRON
,
621 mmcdev
, sd_dev
)) != NULL
) {
622 if ((PCI_SLOT(chip
->pdev
->devfn
) ==
623 PCI_SLOT(sd_dev
->devfn
)) &&
624 (chip
->pdev
->bus
== sd_dev
->bus
))
630 dev_info(&chip
->pdev
->dev
, "Refusing to bind to "
631 "secondary interface.\n");
637 * JMicron chips need a bit of a nudge to enable the power
640 ret
= jmicron_pmos(chip
, 1);
642 dev_err(&chip
->pdev
->dev
, "Failure enabling card power\n");
646 /* quirk for unsable RO-detection on JM388 chips */
647 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_SD
||
648 chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
)
649 chip
->quirks
|= SDHCI_QUIRK_UNSTABLE_RO_DETECT
;
654 static void jmicron_enable_mmc(struct sdhci_host
*host
, int on
)
658 scratch
= readb(host
->ioaddr
+ 0xC0);
665 writeb(scratch
, host
->ioaddr
+ 0xC0);
668 static int jmicron_probe_slot(struct sdhci_pci_slot
*slot
)
670 if (slot
->chip
->pdev
->revision
== 0) {
673 version
= readl(slot
->host
->ioaddr
+ SDHCI_HOST_VERSION
);
674 version
= (version
& SDHCI_VENDOR_VER_MASK
) >>
675 SDHCI_VENDOR_VER_SHIFT
;
678 * Older versions of the chip have lots of nasty glitches
679 * in the ADMA engine. It's best just to avoid it
683 slot
->host
->quirks
|= SDHCI_QUIRK_BROKEN_ADMA
;
686 /* JM388 MMC doesn't support 1.8V while SD supports it */
687 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
) {
688 slot
->host
->ocr_avail_sd
= MMC_VDD_32_33
| MMC_VDD_33_34
|
689 MMC_VDD_29_30
| MMC_VDD_30_31
|
690 MMC_VDD_165_195
; /* allow 1.8V */
691 slot
->host
->ocr_avail_mmc
= MMC_VDD_32_33
| MMC_VDD_33_34
|
692 MMC_VDD_29_30
| MMC_VDD_30_31
; /* no 1.8V for MMC */
696 * The secondary interface requires a bit set to get the
699 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
700 slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
)
701 jmicron_enable_mmc(slot
->host
, 1);
703 slot
->host
->mmc
->caps
|= MMC_CAP_BUS_WIDTH_TEST
;
708 static void jmicron_remove_slot(struct sdhci_pci_slot
*slot
, int dead
)
713 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
714 slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
)
715 jmicron_enable_mmc(slot
->host
, 0);
718 static int jmicron_suspend(struct sdhci_pci_chip
*chip
)
722 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
723 chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
) {
724 for (i
= 0; i
< chip
->num_slots
; i
++)
725 jmicron_enable_mmc(chip
->slots
[i
]->host
, 0);
731 static int jmicron_resume(struct sdhci_pci_chip
*chip
)
735 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
736 chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
) {
737 for (i
= 0; i
< chip
->num_slots
; i
++)
738 jmicron_enable_mmc(chip
->slots
[i
]->host
, 1);
741 ret
= jmicron_pmos(chip
, 1);
743 dev_err(&chip
->pdev
->dev
, "Failure enabling card power\n");
750 static const struct sdhci_pci_fixes sdhci_o2
= {
751 .probe
= sdhci_pci_o2_probe
,
752 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
753 .quirks2
= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD
,
754 .probe_slot
= sdhci_pci_o2_probe_slot
,
755 .resume
= sdhci_pci_o2_resume
,
758 static const struct sdhci_pci_fixes sdhci_jmicron
= {
759 .probe
= jmicron_probe
,
761 .probe_slot
= jmicron_probe_slot
,
762 .remove_slot
= jmicron_remove_slot
,
764 .suspend
= jmicron_suspend
,
765 .resume
= jmicron_resume
,
768 /* SysKonnect CardBus2SDIO extra registers */
769 #define SYSKT_CTRL 0x200
770 #define SYSKT_RDFIFO_STAT 0x204
771 #define SYSKT_WRFIFO_STAT 0x208
772 #define SYSKT_POWER_DATA 0x20c
773 #define SYSKT_POWER_330 0xef
774 #define SYSKT_POWER_300 0xf8
775 #define SYSKT_POWER_184 0xcc
776 #define SYSKT_POWER_CMD 0x20d
777 #define SYSKT_POWER_START (1 << 7)
778 #define SYSKT_POWER_STATUS 0x20e
779 #define SYSKT_POWER_STATUS_OK (1 << 0)
780 #define SYSKT_BOARD_REV 0x210
781 #define SYSKT_CHIP_REV 0x211
782 #define SYSKT_CONF_DATA 0x212
783 #define SYSKT_CONF_DATA_1V8 (1 << 2)
784 #define SYSKT_CONF_DATA_2V5 (1 << 1)
785 #define SYSKT_CONF_DATA_3V3 (1 << 0)
787 static int syskt_probe(struct sdhci_pci_chip
*chip
)
789 if ((chip
->pdev
->class & 0x0000FF) == PCI_SDHCI_IFVENDOR
) {
790 chip
->pdev
->class &= ~0x0000FF;
791 chip
->pdev
->class |= PCI_SDHCI_IFDMA
;
796 static int syskt_probe_slot(struct sdhci_pci_slot
*slot
)
800 u8 board_rev
= readb(slot
->host
->ioaddr
+ SYSKT_BOARD_REV
);
801 u8 chip_rev
= readb(slot
->host
->ioaddr
+ SYSKT_CHIP_REV
);
802 dev_info(&slot
->chip
->pdev
->dev
, "SysKonnect CardBus2SDIO, "
803 "board rev %d.%d, chip rev %d.%d\n",
804 board_rev
>> 4, board_rev
& 0xf,
805 chip_rev
>> 4, chip_rev
& 0xf);
806 if (chip_rev
>= 0x20)
807 slot
->host
->quirks
|= SDHCI_QUIRK_FORCE_DMA
;
809 writeb(SYSKT_POWER_330
, slot
->host
->ioaddr
+ SYSKT_POWER_DATA
);
810 writeb(SYSKT_POWER_START
, slot
->host
->ioaddr
+ SYSKT_POWER_CMD
);
812 tm
= 10; /* Wait max 1 ms */
814 ps
= readw(slot
->host
->ioaddr
+ SYSKT_POWER_STATUS
);
815 if (ps
& SYSKT_POWER_STATUS_OK
)
820 dev_err(&slot
->chip
->pdev
->dev
,
821 "power regulator never stabilized");
822 writeb(0, slot
->host
->ioaddr
+ SYSKT_POWER_CMD
);
829 static const struct sdhci_pci_fixes sdhci_syskt
= {
830 .quirks
= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
,
831 .probe
= syskt_probe
,
832 .probe_slot
= syskt_probe_slot
,
835 static int via_probe(struct sdhci_pci_chip
*chip
)
837 if (chip
->pdev
->revision
== 0x10)
838 chip
->quirks
|= SDHCI_QUIRK_DELAY_AFTER_POWER
;
843 static const struct sdhci_pci_fixes sdhci_via
= {
847 static int rtsx_probe_slot(struct sdhci_pci_slot
*slot
)
849 slot
->host
->mmc
->caps2
|= MMC_CAP2_HS200
;
853 static const struct sdhci_pci_fixes sdhci_rtsx
= {
854 .quirks2
= SDHCI_QUIRK2_PRESET_VALUE_BROKEN
|
855 SDHCI_QUIRK2_BROKEN_64_BIT_DMA
|
856 SDHCI_QUIRK2_BROKEN_DDR50
,
857 .probe_slot
= rtsx_probe_slot
,
860 /*AMD chipset generation*/
861 enum amd_chipset_gen
{
862 AMD_CHIPSET_BEFORE_ML
,
869 #define AMD_SD_AUTO_PATTERN 0xB8
870 #define AMD_MSLEEP_DURATION 4
871 #define AMD_SD_MISC_CONTROL 0xD0
872 #define AMD_MAX_TUNE_VALUE 0x0B
873 #define AMD_AUTO_TUNE_SEL 0x10800
874 #define AMD_FIFO_PTR 0x30
875 #define AMD_BIT_MASK 0x1F
877 static void amd_tuning_reset(struct sdhci_host
*host
)
881 val
= sdhci_readw(host
, SDHCI_HOST_CONTROL2
);
882 val
|= SDHCI_CTRL_PRESET_VAL_ENABLE
| SDHCI_CTRL_EXEC_TUNING
;
883 sdhci_writew(host
, val
, SDHCI_HOST_CONTROL2
);
885 val
= sdhci_readw(host
, SDHCI_HOST_CONTROL2
);
886 val
&= ~SDHCI_CTRL_EXEC_TUNING
;
887 sdhci_writew(host
, val
, SDHCI_HOST_CONTROL2
);
890 static void amd_config_tuning_phase(struct pci_dev
*pdev
, u8 phase
)
894 pci_read_config_dword(pdev
, AMD_SD_AUTO_PATTERN
, &val
);
895 val
&= ~AMD_BIT_MASK
;
896 val
|= (AMD_AUTO_TUNE_SEL
| (phase
<< 1));
897 pci_write_config_dword(pdev
, AMD_SD_AUTO_PATTERN
, val
);
900 static void amd_enable_manual_tuning(struct pci_dev
*pdev
)
904 pci_read_config_dword(pdev
, AMD_SD_MISC_CONTROL
, &val
);
906 pci_write_config_dword(pdev
, AMD_SD_MISC_CONTROL
, val
);
909 static int amd_execute_tuning(struct sdhci_host
*host
, u32 opcode
)
911 struct sdhci_pci_slot
*slot
= sdhci_priv(host
);
912 struct pci_dev
*pdev
= slot
->chip
->pdev
;
914 u8 valid_win_max
= 0;
915 u8 valid_win_end
= 0;
916 u8 ctrl
, tune_around
;
918 amd_tuning_reset(host
);
920 for (tune_around
= 0; tune_around
< 12; tune_around
++) {
921 amd_config_tuning_phase(pdev
, tune_around
);
923 if (mmc_send_tuning(host
->mmc
, opcode
, NULL
)) {
925 msleep(AMD_MSLEEP_DURATION
);
926 ctrl
= SDHCI_RESET_CMD
| SDHCI_RESET_DATA
;
927 sdhci_writeb(host
, ctrl
, SDHCI_SOFTWARE_RESET
);
928 } else if (++valid_win
> valid_win_max
) {
929 valid_win_max
= valid_win
;
930 valid_win_end
= tune_around
;
934 if (!valid_win_max
) {
935 dev_err(&pdev
->dev
, "no tuning point found\n");
939 amd_config_tuning_phase(pdev
, valid_win_end
- valid_win_max
/ 2);
941 amd_enable_manual_tuning(pdev
);
943 host
->mmc
->retune_period
= 0;
948 static int amd_probe(struct sdhci_pci_chip
*chip
)
950 struct pci_dev
*smbus_dev
;
951 enum amd_chipset_gen gen
;
953 smbus_dev
= pci_get_device(PCI_VENDOR_ID_AMD
,
954 PCI_DEVICE_ID_AMD_HUDSON2_SMBUS
, NULL
);
956 gen
= AMD_CHIPSET_BEFORE_ML
;
958 smbus_dev
= pci_get_device(PCI_VENDOR_ID_AMD
,
959 PCI_DEVICE_ID_AMD_KERNCZ_SMBUS
, NULL
);
961 if (smbus_dev
->revision
< 0x51)
962 gen
= AMD_CHIPSET_CZ
;
964 gen
= AMD_CHIPSET_NL
;
966 gen
= AMD_CHIPSET_UNKNOWN
;
970 if (gen
== AMD_CHIPSET_BEFORE_ML
|| gen
== AMD_CHIPSET_CZ
)
971 chip
->quirks2
|= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD
;
976 static const struct sdhci_ops amd_sdhci_pci_ops
= {
977 .set_clock
= sdhci_set_clock
,
978 .enable_dma
= sdhci_pci_enable_dma
,
979 .set_bus_width
= sdhci_pci_set_bus_width
,
980 .reset
= sdhci_reset
,
981 .set_uhs_signaling
= sdhci_set_uhs_signaling
,
982 .platform_execute_tuning
= amd_execute_tuning
,
985 static const struct sdhci_pci_fixes sdhci_amd
= {
987 .ops
= &amd_sdhci_pci_ops
,
990 static const struct pci_device_id pci_ids
[] = {
992 .vendor
= PCI_VENDOR_ID_RICOH
,
993 .device
= PCI_DEVICE_ID_RICOH_R5C822
,
994 .subvendor
= PCI_ANY_ID
,
995 .subdevice
= PCI_ANY_ID
,
996 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh
,
1000 .vendor
= PCI_VENDOR_ID_RICOH
,
1002 .subvendor
= PCI_ANY_ID
,
1003 .subdevice
= PCI_ANY_ID
,
1004 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh_mmc
,
1008 .vendor
= PCI_VENDOR_ID_RICOH
,
1010 .subvendor
= PCI_ANY_ID
,
1011 .subdevice
= PCI_ANY_ID
,
1012 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh_mmc
,
1016 .vendor
= PCI_VENDOR_ID_RICOH
,
1018 .subvendor
= PCI_ANY_ID
,
1019 .subdevice
= PCI_ANY_ID
,
1020 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh_mmc
,
1024 .vendor
= PCI_VENDOR_ID_ENE
,
1025 .device
= PCI_DEVICE_ID_ENE_CB712_SD
,
1026 .subvendor
= PCI_ANY_ID
,
1027 .subdevice
= PCI_ANY_ID
,
1028 .driver_data
= (kernel_ulong_t
)&sdhci_ene_712
,
1032 .vendor
= PCI_VENDOR_ID_ENE
,
1033 .device
= PCI_DEVICE_ID_ENE_CB712_SD_2
,
1034 .subvendor
= PCI_ANY_ID
,
1035 .subdevice
= PCI_ANY_ID
,
1036 .driver_data
= (kernel_ulong_t
)&sdhci_ene_712
,
1040 .vendor
= PCI_VENDOR_ID_ENE
,
1041 .device
= PCI_DEVICE_ID_ENE_CB714_SD
,
1042 .subvendor
= PCI_ANY_ID
,
1043 .subdevice
= PCI_ANY_ID
,
1044 .driver_data
= (kernel_ulong_t
)&sdhci_ene_714
,
1048 .vendor
= PCI_VENDOR_ID_ENE
,
1049 .device
= PCI_DEVICE_ID_ENE_CB714_SD_2
,
1050 .subvendor
= PCI_ANY_ID
,
1051 .subdevice
= PCI_ANY_ID
,
1052 .driver_data
= (kernel_ulong_t
)&sdhci_ene_714
,
1056 .vendor
= PCI_VENDOR_ID_MARVELL
,
1057 .device
= PCI_DEVICE_ID_MARVELL_88ALP01_SD
,
1058 .subvendor
= PCI_ANY_ID
,
1059 .subdevice
= PCI_ANY_ID
,
1060 .driver_data
= (kernel_ulong_t
)&sdhci_cafe
,
1064 .vendor
= PCI_VENDOR_ID_JMICRON
,
1065 .device
= PCI_DEVICE_ID_JMICRON_JMB38X_SD
,
1066 .subvendor
= PCI_ANY_ID
,
1067 .subdevice
= PCI_ANY_ID
,
1068 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
1072 .vendor
= PCI_VENDOR_ID_JMICRON
,
1073 .device
= PCI_DEVICE_ID_JMICRON_JMB38X_MMC
,
1074 .subvendor
= PCI_ANY_ID
,
1075 .subdevice
= PCI_ANY_ID
,
1076 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
1080 .vendor
= PCI_VENDOR_ID_JMICRON
,
1081 .device
= PCI_DEVICE_ID_JMICRON_JMB388_SD
,
1082 .subvendor
= PCI_ANY_ID
,
1083 .subdevice
= PCI_ANY_ID
,
1084 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
1088 .vendor
= PCI_VENDOR_ID_JMICRON
,
1089 .device
= PCI_DEVICE_ID_JMICRON_JMB388_ESD
,
1090 .subvendor
= PCI_ANY_ID
,
1091 .subdevice
= PCI_ANY_ID
,
1092 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
1096 .vendor
= PCI_VENDOR_ID_SYSKONNECT
,
1098 .subvendor
= PCI_ANY_ID
,
1099 .subdevice
= PCI_ANY_ID
,
1100 .driver_data
= (kernel_ulong_t
)&sdhci_syskt
,
1104 .vendor
= PCI_VENDOR_ID_VIA
,
1106 .subvendor
= PCI_ANY_ID
,
1107 .subdevice
= PCI_ANY_ID
,
1108 .driver_data
= (kernel_ulong_t
)&sdhci_via
,
1112 .vendor
= PCI_VENDOR_ID_REALTEK
,
1114 .subvendor
= PCI_ANY_ID
,
1115 .subdevice
= PCI_ANY_ID
,
1116 .driver_data
= (kernel_ulong_t
)&sdhci_rtsx
,
1120 .vendor
= PCI_VENDOR_ID_INTEL
,
1121 .device
= PCI_DEVICE_ID_INTEL_QRK_SD
,
1122 .subvendor
= PCI_ANY_ID
,
1123 .subdevice
= PCI_ANY_ID
,
1124 .driver_data
= (kernel_ulong_t
)&sdhci_intel_qrk
,
1128 .vendor
= PCI_VENDOR_ID_INTEL
,
1129 .device
= PCI_DEVICE_ID_INTEL_MRST_SD0
,
1130 .subvendor
= PCI_ANY_ID
,
1131 .subdevice
= PCI_ANY_ID
,
1132 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrst_hc0
,
1136 .vendor
= PCI_VENDOR_ID_INTEL
,
1137 .device
= PCI_DEVICE_ID_INTEL_MRST_SD1
,
1138 .subvendor
= PCI_ANY_ID
,
1139 .subdevice
= PCI_ANY_ID
,
1140 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrst_hc1_hc2
,
1144 .vendor
= PCI_VENDOR_ID_INTEL
,
1145 .device
= PCI_DEVICE_ID_INTEL_MRST_SD2
,
1146 .subvendor
= PCI_ANY_ID
,
1147 .subdevice
= PCI_ANY_ID
,
1148 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrst_hc1_hc2
,
1152 .vendor
= PCI_VENDOR_ID_INTEL
,
1153 .device
= PCI_DEVICE_ID_INTEL_MFD_SD
,
1154 .subvendor
= PCI_ANY_ID
,
1155 .subdevice
= PCI_ANY_ID
,
1156 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sd
,
1160 .vendor
= PCI_VENDOR_ID_INTEL
,
1161 .device
= PCI_DEVICE_ID_INTEL_MFD_SDIO1
,
1162 .subvendor
= PCI_ANY_ID
,
1163 .subdevice
= PCI_ANY_ID
,
1164 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sdio
,
1168 .vendor
= PCI_VENDOR_ID_INTEL
,
1169 .device
= PCI_DEVICE_ID_INTEL_MFD_SDIO2
,
1170 .subvendor
= PCI_ANY_ID
,
1171 .subdevice
= PCI_ANY_ID
,
1172 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sdio
,
1176 .vendor
= PCI_VENDOR_ID_INTEL
,
1177 .device
= PCI_DEVICE_ID_INTEL_MFD_EMMC0
,
1178 .subvendor
= PCI_ANY_ID
,
1179 .subdevice
= PCI_ANY_ID
,
1180 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc
,
1184 .vendor
= PCI_VENDOR_ID_INTEL
,
1185 .device
= PCI_DEVICE_ID_INTEL_MFD_EMMC1
,
1186 .subvendor
= PCI_ANY_ID
,
1187 .subdevice
= PCI_ANY_ID
,
1188 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc
,
1192 .vendor
= PCI_VENDOR_ID_INTEL
,
1193 .device
= PCI_DEVICE_ID_INTEL_PCH_SDIO0
,
1194 .subvendor
= PCI_ANY_ID
,
1195 .subdevice
= PCI_ANY_ID
,
1196 .driver_data
= (kernel_ulong_t
)&sdhci_intel_pch_sdio
,
1200 .vendor
= PCI_VENDOR_ID_INTEL
,
1201 .device
= PCI_DEVICE_ID_INTEL_PCH_SDIO1
,
1202 .subvendor
= PCI_ANY_ID
,
1203 .subdevice
= PCI_ANY_ID
,
1204 .driver_data
= (kernel_ulong_t
)&sdhci_intel_pch_sdio
,
1208 .vendor
= PCI_VENDOR_ID_INTEL
,
1209 .device
= PCI_DEVICE_ID_INTEL_BYT_EMMC
,
1210 .subvendor
= PCI_ANY_ID
,
1211 .subdevice
= PCI_ANY_ID
,
1212 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_emmc
,
1216 .vendor
= PCI_VENDOR_ID_INTEL
,
1217 .device
= PCI_DEVICE_ID_INTEL_BYT_SDIO
,
1218 .subvendor
= PCI_VENDOR_ID_NI
,
1219 .subdevice
= 0x7884,
1220 .driver_data
= (kernel_ulong_t
)&sdhci_ni_byt_sdio
,
1224 .vendor
= PCI_VENDOR_ID_INTEL
,
1225 .device
= PCI_DEVICE_ID_INTEL_BYT_SDIO
,
1226 .subvendor
= PCI_ANY_ID
,
1227 .subdevice
= PCI_ANY_ID
,
1228 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sdio
,
1232 .vendor
= PCI_VENDOR_ID_INTEL
,
1233 .device
= PCI_DEVICE_ID_INTEL_BYT_SD
,
1234 .subvendor
= PCI_ANY_ID
,
1235 .subdevice
= PCI_ANY_ID
,
1236 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sd
,
1240 .vendor
= PCI_VENDOR_ID_INTEL
,
1241 .device
= PCI_DEVICE_ID_INTEL_BYT_EMMC2
,
1242 .subvendor
= PCI_ANY_ID
,
1243 .subdevice
= PCI_ANY_ID
,
1244 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_emmc
,
1248 .vendor
= PCI_VENDOR_ID_INTEL
,
1249 .device
= PCI_DEVICE_ID_INTEL_BSW_EMMC
,
1250 .subvendor
= PCI_ANY_ID
,
1251 .subdevice
= PCI_ANY_ID
,
1252 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_emmc
,
1256 .vendor
= PCI_VENDOR_ID_INTEL
,
1257 .device
= PCI_DEVICE_ID_INTEL_BSW_SDIO
,
1258 .subvendor
= PCI_ANY_ID
,
1259 .subdevice
= PCI_ANY_ID
,
1260 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sdio
,
1264 .vendor
= PCI_VENDOR_ID_INTEL
,
1265 .device
= PCI_DEVICE_ID_INTEL_BSW_SD
,
1266 .subvendor
= PCI_ANY_ID
,
1267 .subdevice
= PCI_ANY_ID
,
1268 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sd
,
1272 .vendor
= PCI_VENDOR_ID_INTEL
,
1273 .device
= PCI_DEVICE_ID_INTEL_CLV_SDIO0
,
1274 .subvendor
= PCI_ANY_ID
,
1275 .subdevice
= PCI_ANY_ID
,
1276 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sd
,
1280 .vendor
= PCI_VENDOR_ID_INTEL
,
1281 .device
= PCI_DEVICE_ID_INTEL_CLV_SDIO1
,
1282 .subvendor
= PCI_ANY_ID
,
1283 .subdevice
= PCI_ANY_ID
,
1284 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sdio
,
1288 .vendor
= PCI_VENDOR_ID_INTEL
,
1289 .device
= PCI_DEVICE_ID_INTEL_CLV_SDIO2
,
1290 .subvendor
= PCI_ANY_ID
,
1291 .subdevice
= PCI_ANY_ID
,
1292 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sdio
,
1296 .vendor
= PCI_VENDOR_ID_INTEL
,
1297 .device
= PCI_DEVICE_ID_INTEL_CLV_EMMC0
,
1298 .subvendor
= PCI_ANY_ID
,
1299 .subdevice
= PCI_ANY_ID
,
1300 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc
,
1304 .vendor
= PCI_VENDOR_ID_INTEL
,
1305 .device
= PCI_DEVICE_ID_INTEL_CLV_EMMC1
,
1306 .subvendor
= PCI_ANY_ID
,
1307 .subdevice
= PCI_ANY_ID
,
1308 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc
,
1312 .vendor
= PCI_VENDOR_ID_INTEL
,
1313 .device
= PCI_DEVICE_ID_INTEL_MRFLD_MMC
,
1314 .subvendor
= PCI_ANY_ID
,
1315 .subdevice
= PCI_ANY_ID
,
1316 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrfld_mmc
,
1320 .vendor
= PCI_VENDOR_ID_INTEL
,
1321 .device
= PCI_DEVICE_ID_INTEL_SPT_EMMC
,
1322 .subvendor
= PCI_ANY_ID
,
1323 .subdevice
= PCI_ANY_ID
,
1324 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_emmc
,
1328 .vendor
= PCI_VENDOR_ID_INTEL
,
1329 .device
= PCI_DEVICE_ID_INTEL_SPT_SDIO
,
1330 .subvendor
= PCI_ANY_ID
,
1331 .subdevice
= PCI_ANY_ID
,
1332 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sdio
,
1336 .vendor
= PCI_VENDOR_ID_INTEL
,
1337 .device
= PCI_DEVICE_ID_INTEL_SPT_SD
,
1338 .subvendor
= PCI_ANY_ID
,
1339 .subdevice
= PCI_ANY_ID
,
1340 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sd
,
1344 .vendor
= PCI_VENDOR_ID_INTEL
,
1345 .device
= PCI_DEVICE_ID_INTEL_DNV_EMMC
,
1346 .subvendor
= PCI_ANY_ID
,
1347 .subdevice
= PCI_ANY_ID
,
1348 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_emmc
,
1352 .vendor
= PCI_VENDOR_ID_INTEL
,
1353 .device
= PCI_DEVICE_ID_INTEL_BXT_EMMC
,
1354 .subvendor
= PCI_ANY_ID
,
1355 .subdevice
= PCI_ANY_ID
,
1356 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_emmc
,
1360 .vendor
= PCI_VENDOR_ID_INTEL
,
1361 .device
= PCI_DEVICE_ID_INTEL_BXT_SDIO
,
1362 .subvendor
= PCI_ANY_ID
,
1363 .subdevice
= PCI_ANY_ID
,
1364 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sdio
,
1368 .vendor
= PCI_VENDOR_ID_INTEL
,
1369 .device
= PCI_DEVICE_ID_INTEL_BXT_SD
,
1370 .subvendor
= PCI_ANY_ID
,
1371 .subdevice
= PCI_ANY_ID
,
1372 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sd
,
1376 .vendor
= PCI_VENDOR_ID_INTEL
,
1377 .device
= PCI_DEVICE_ID_INTEL_BXTM_EMMC
,
1378 .subvendor
= PCI_ANY_ID
,
1379 .subdevice
= PCI_ANY_ID
,
1380 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_emmc
,
1384 .vendor
= PCI_VENDOR_ID_INTEL
,
1385 .device
= PCI_DEVICE_ID_INTEL_BXTM_SDIO
,
1386 .subvendor
= PCI_ANY_ID
,
1387 .subdevice
= PCI_ANY_ID
,
1388 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sdio
,
1392 .vendor
= PCI_VENDOR_ID_INTEL
,
1393 .device
= PCI_DEVICE_ID_INTEL_BXTM_SD
,
1394 .subvendor
= PCI_ANY_ID
,
1395 .subdevice
= PCI_ANY_ID
,
1396 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sd
,
1400 .vendor
= PCI_VENDOR_ID_INTEL
,
1401 .device
= PCI_DEVICE_ID_INTEL_APL_EMMC
,
1402 .subvendor
= PCI_ANY_ID
,
1403 .subdevice
= PCI_ANY_ID
,
1404 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_emmc
,
1408 .vendor
= PCI_VENDOR_ID_INTEL
,
1409 .device
= PCI_DEVICE_ID_INTEL_APL_SDIO
,
1410 .subvendor
= PCI_ANY_ID
,
1411 .subdevice
= PCI_ANY_ID
,
1412 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sdio
,
1416 .vendor
= PCI_VENDOR_ID_INTEL
,
1417 .device
= PCI_DEVICE_ID_INTEL_APL_SD
,
1418 .subvendor
= PCI_ANY_ID
,
1419 .subdevice
= PCI_ANY_ID
,
1420 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sd
,
1424 .vendor
= PCI_VENDOR_ID_INTEL
,
1425 .device
= PCI_DEVICE_ID_INTEL_GLK_EMMC
,
1426 .subvendor
= PCI_ANY_ID
,
1427 .subdevice
= PCI_ANY_ID
,
1428 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_emmc
,
1432 .vendor
= PCI_VENDOR_ID_INTEL
,
1433 .device
= PCI_DEVICE_ID_INTEL_GLK_SDIO
,
1434 .subvendor
= PCI_ANY_ID
,
1435 .subdevice
= PCI_ANY_ID
,
1436 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sdio
,
1440 .vendor
= PCI_VENDOR_ID_INTEL
,
1441 .device
= PCI_DEVICE_ID_INTEL_GLK_SD
,
1442 .subvendor
= PCI_ANY_ID
,
1443 .subdevice
= PCI_ANY_ID
,
1444 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sd
,
1448 .vendor
= PCI_VENDOR_ID_O2
,
1449 .device
= PCI_DEVICE_ID_O2_8120
,
1450 .subvendor
= PCI_ANY_ID
,
1451 .subdevice
= PCI_ANY_ID
,
1452 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1456 .vendor
= PCI_VENDOR_ID_O2
,
1457 .device
= PCI_DEVICE_ID_O2_8220
,
1458 .subvendor
= PCI_ANY_ID
,
1459 .subdevice
= PCI_ANY_ID
,
1460 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1464 .vendor
= PCI_VENDOR_ID_O2
,
1465 .device
= PCI_DEVICE_ID_O2_8221
,
1466 .subvendor
= PCI_ANY_ID
,
1467 .subdevice
= PCI_ANY_ID
,
1468 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1472 .vendor
= PCI_VENDOR_ID_O2
,
1473 .device
= PCI_DEVICE_ID_O2_8320
,
1474 .subvendor
= PCI_ANY_ID
,
1475 .subdevice
= PCI_ANY_ID
,
1476 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1480 .vendor
= PCI_VENDOR_ID_O2
,
1481 .device
= PCI_DEVICE_ID_O2_8321
,
1482 .subvendor
= PCI_ANY_ID
,
1483 .subdevice
= PCI_ANY_ID
,
1484 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1488 .vendor
= PCI_VENDOR_ID_O2
,
1489 .device
= PCI_DEVICE_ID_O2_FUJIN2
,
1490 .subvendor
= PCI_ANY_ID
,
1491 .subdevice
= PCI_ANY_ID
,
1492 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1496 .vendor
= PCI_VENDOR_ID_O2
,
1497 .device
= PCI_DEVICE_ID_O2_SDS0
,
1498 .subvendor
= PCI_ANY_ID
,
1499 .subdevice
= PCI_ANY_ID
,
1500 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1504 .vendor
= PCI_VENDOR_ID_O2
,
1505 .device
= PCI_DEVICE_ID_O2_SDS1
,
1506 .subvendor
= PCI_ANY_ID
,
1507 .subdevice
= PCI_ANY_ID
,
1508 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1512 .vendor
= PCI_VENDOR_ID_O2
,
1513 .device
= PCI_DEVICE_ID_O2_SEABIRD0
,
1514 .subvendor
= PCI_ANY_ID
,
1515 .subdevice
= PCI_ANY_ID
,
1516 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1520 .vendor
= PCI_VENDOR_ID_O2
,
1521 .device
= PCI_DEVICE_ID_O2_SEABIRD1
,
1522 .subvendor
= PCI_ANY_ID
,
1523 .subdevice
= PCI_ANY_ID
,
1524 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1527 .vendor
= PCI_VENDOR_ID_AMD
,
1528 .device
= PCI_ANY_ID
,
1529 .class = PCI_CLASS_SYSTEM_SDHCI
<< 8,
1530 .class_mask
= 0xFFFF00,
1531 .subvendor
= PCI_ANY_ID
,
1532 .subdevice
= PCI_ANY_ID
,
1533 .driver_data
= (kernel_ulong_t
)&sdhci_amd
,
1535 { /* Generic SD host controller */
1536 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI
<< 8), 0xFFFF00)
1539 { /* end: all zeroes */ },
1542 MODULE_DEVICE_TABLE(pci
, pci_ids
);
1544 /*****************************************************************************\
1546 * SDHCI core callbacks *
1548 \*****************************************************************************/
1550 static int sdhci_pci_enable_dma(struct sdhci_host
*host
)
1552 struct sdhci_pci_slot
*slot
;
1553 struct pci_dev
*pdev
;
1555 slot
= sdhci_priv(host
);
1556 pdev
= slot
->chip
->pdev
;
1558 if (((pdev
->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI
<< 8)) &&
1559 ((pdev
->class & 0x0000FF) != PCI_SDHCI_IFDMA
) &&
1560 (host
->flags
& SDHCI_USE_SDMA
)) {
1561 dev_warn(&pdev
->dev
, "Will use DMA mode even though HW "
1562 "doesn't fully claim to support it.\n");
1565 pci_set_master(pdev
);
1570 static void sdhci_pci_set_bus_width(struct sdhci_host
*host
, int width
)
1574 ctrl
= sdhci_readb(host
, SDHCI_HOST_CONTROL
);
1577 case MMC_BUS_WIDTH_8
:
1578 ctrl
|= SDHCI_CTRL_8BITBUS
;
1579 ctrl
&= ~SDHCI_CTRL_4BITBUS
;
1581 case MMC_BUS_WIDTH_4
:
1582 ctrl
|= SDHCI_CTRL_4BITBUS
;
1583 ctrl
&= ~SDHCI_CTRL_8BITBUS
;
1586 ctrl
&= ~(SDHCI_CTRL_8BITBUS
| SDHCI_CTRL_4BITBUS
);
1590 sdhci_writeb(host
, ctrl
, SDHCI_HOST_CONTROL
);
1593 static void sdhci_pci_gpio_hw_reset(struct sdhci_host
*host
)
1595 struct sdhci_pci_slot
*slot
= sdhci_priv(host
);
1596 int rst_n_gpio
= slot
->rst_n_gpio
;
1598 if (!gpio_is_valid(rst_n_gpio
))
1600 gpio_set_value_cansleep(rst_n_gpio
, 0);
1601 /* For eMMC, minimum is 1us but give it 10us for good measure */
1603 gpio_set_value_cansleep(rst_n_gpio
, 1);
1604 /* For eMMC, minimum is 200us but give it 300us for good measure */
1605 usleep_range(300, 1000);
1608 static void sdhci_pci_hw_reset(struct sdhci_host
*host
)
1610 struct sdhci_pci_slot
*slot
= sdhci_priv(host
);
1613 slot
->hw_reset(host
);
1616 static int sdhci_pci_select_drive_strength(struct sdhci_host
*host
,
1617 struct mmc_card
*card
,
1618 unsigned int max_dtr
, int host_drv
,
1619 int card_drv
, int *drv_type
)
1621 struct sdhci_pci_slot
*slot
= sdhci_priv(host
);
1623 if (!slot
->select_drive_strength
)
1626 return slot
->select_drive_strength(host
, card
, max_dtr
, host_drv
,
1627 card_drv
, drv_type
);
1630 static const struct sdhci_ops sdhci_pci_ops
= {
1631 .set_clock
= sdhci_set_clock
,
1632 .enable_dma
= sdhci_pci_enable_dma
,
1633 .set_bus_width
= sdhci_pci_set_bus_width
,
1634 .reset
= sdhci_reset
,
1635 .set_uhs_signaling
= sdhci_set_uhs_signaling
,
1636 .hw_reset
= sdhci_pci_hw_reset
,
1637 .select_drive_strength
= sdhci_pci_select_drive_strength
,
1640 /*****************************************************************************\
1644 \*****************************************************************************/
1646 #ifdef CONFIG_PM_SLEEP
1647 static int sdhci_pci_suspend(struct device
*dev
)
1649 struct pci_dev
*pdev
= to_pci_dev(dev
);
1650 struct sdhci_pci_chip
*chip
;
1651 struct sdhci_pci_slot
*slot
;
1652 mmc_pm_flag_t slot_pm_flags
;
1653 mmc_pm_flag_t pm_flags
= 0;
1656 chip
= pci_get_drvdata(pdev
);
1660 for (i
= 0; i
< chip
->num_slots
; i
++) {
1661 slot
= chip
->slots
[i
];
1665 ret
= sdhci_suspend_host(slot
->host
);
1668 goto err_pci_suspend
;
1670 slot_pm_flags
= slot
->host
->mmc
->pm_flags
;
1671 if (slot_pm_flags
& MMC_PM_WAKE_SDIO_IRQ
)
1672 sdhci_enable_irq_wakeups(slot
->host
);
1674 pm_flags
|= slot_pm_flags
;
1677 if (chip
->fixes
&& chip
->fixes
->suspend
) {
1678 ret
= chip
->fixes
->suspend(chip
);
1680 goto err_pci_suspend
;
1683 if (pm_flags
& MMC_PM_KEEP_POWER
) {
1684 if (pm_flags
& MMC_PM_WAKE_SDIO_IRQ
)
1685 device_init_wakeup(dev
, true);
1687 device_init_wakeup(dev
, false);
1689 device_init_wakeup(dev
, false);
1695 sdhci_resume_host(chip
->slots
[i
]->host
);
1699 static int sdhci_pci_resume(struct device
*dev
)
1701 struct pci_dev
*pdev
= to_pci_dev(dev
);
1702 struct sdhci_pci_chip
*chip
;
1703 struct sdhci_pci_slot
*slot
;
1706 chip
= pci_get_drvdata(pdev
);
1710 if (chip
->fixes
&& chip
->fixes
->resume
) {
1711 ret
= chip
->fixes
->resume(chip
);
1716 for (i
= 0; i
< chip
->num_slots
; i
++) {
1717 slot
= chip
->slots
[i
];
1721 ret
= sdhci_resume_host(slot
->host
);
1731 static int sdhci_pci_runtime_suspend(struct device
*dev
)
1733 struct pci_dev
*pdev
= to_pci_dev(dev
);
1734 struct sdhci_pci_chip
*chip
;
1735 struct sdhci_pci_slot
*slot
;
1738 chip
= pci_get_drvdata(pdev
);
1742 for (i
= 0; i
< chip
->num_slots
; i
++) {
1743 slot
= chip
->slots
[i
];
1747 ret
= sdhci_runtime_suspend_host(slot
->host
);
1750 goto err_pci_runtime_suspend
;
1753 if (chip
->fixes
&& chip
->fixes
->suspend
) {
1754 ret
= chip
->fixes
->suspend(chip
);
1756 goto err_pci_runtime_suspend
;
1761 err_pci_runtime_suspend
:
1763 sdhci_runtime_resume_host(chip
->slots
[i
]->host
);
1767 static int sdhci_pci_runtime_resume(struct device
*dev
)
1769 struct pci_dev
*pdev
= to_pci_dev(dev
);
1770 struct sdhci_pci_chip
*chip
;
1771 struct sdhci_pci_slot
*slot
;
1774 chip
= pci_get_drvdata(pdev
);
1778 if (chip
->fixes
&& chip
->fixes
->resume
) {
1779 ret
= chip
->fixes
->resume(chip
);
1784 for (i
= 0; i
< chip
->num_slots
; i
++) {
1785 slot
= chip
->slots
[i
];
1789 ret
= sdhci_runtime_resume_host(slot
->host
);
1798 static const struct dev_pm_ops sdhci_pci_pm_ops
= {
1799 SET_SYSTEM_SLEEP_PM_OPS(sdhci_pci_suspend
, sdhci_pci_resume
)
1800 SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend
,
1801 sdhci_pci_runtime_resume
, NULL
)
1804 /*****************************************************************************\
1806 * Device probing/removal *
1808 \*****************************************************************************/
1810 static struct sdhci_pci_slot
*sdhci_pci_probe_slot(
1811 struct pci_dev
*pdev
, struct sdhci_pci_chip
*chip
, int first_bar
,
1814 struct sdhci_pci_slot
*slot
;
1815 struct sdhci_host
*host
;
1816 int ret
, bar
= first_bar
+ slotno
;
1818 if (!(pci_resource_flags(pdev
, bar
) & IORESOURCE_MEM
)) {
1819 dev_err(&pdev
->dev
, "BAR %d is not iomem. Aborting.\n", bar
);
1820 return ERR_PTR(-ENODEV
);
1823 if (pci_resource_len(pdev
, bar
) < 0x100) {
1824 dev_err(&pdev
->dev
, "Invalid iomem size. You may "
1825 "experience problems.\n");
1828 if ((pdev
->class & 0x0000FF) == PCI_SDHCI_IFVENDOR
) {
1829 dev_err(&pdev
->dev
, "Vendor specific interface. Aborting.\n");
1830 return ERR_PTR(-ENODEV
);
1833 if ((pdev
->class & 0x0000FF) > PCI_SDHCI_IFVENDOR
) {
1834 dev_err(&pdev
->dev
, "Unknown interface. Aborting.\n");
1835 return ERR_PTR(-ENODEV
);
1838 host
= sdhci_alloc_host(&pdev
->dev
, sizeof(struct sdhci_pci_slot
));
1840 dev_err(&pdev
->dev
, "cannot allocate host\n");
1841 return ERR_CAST(host
);
1844 slot
= sdhci_priv(host
);
1848 slot
->rst_n_gpio
= -EINVAL
;
1849 slot
->cd_gpio
= -EINVAL
;
1852 /* Retrieve platform data if there is any */
1853 if (*sdhci_pci_get_data
)
1854 slot
->data
= sdhci_pci_get_data(pdev
, slotno
);
1857 if (slot
->data
->setup
) {
1858 ret
= slot
->data
->setup(slot
->data
);
1860 dev_err(&pdev
->dev
, "platform setup failed\n");
1864 slot
->rst_n_gpio
= slot
->data
->rst_n_gpio
;
1865 slot
->cd_gpio
= slot
->data
->cd_gpio
;
1868 host
->hw_name
= "PCI";
1869 host
->ops
= chip
->fixes
&& chip
->fixes
->ops
?
1872 host
->quirks
= chip
->quirks
;
1873 host
->quirks2
= chip
->quirks2
;
1875 host
->irq
= pdev
->irq
;
1877 ret
= pcim_iomap_regions(pdev
, BIT(bar
), mmc_hostname(host
->mmc
));
1879 dev_err(&pdev
->dev
, "cannot request region\n");
1883 host
->ioaddr
= pcim_iomap_table(pdev
)[bar
];
1885 if (chip
->fixes
&& chip
->fixes
->probe_slot
) {
1886 ret
= chip
->fixes
->probe_slot(slot
);
1891 if (gpio_is_valid(slot
->rst_n_gpio
)) {
1892 if (!devm_gpio_request(&pdev
->dev
, slot
->rst_n_gpio
, "eMMC_reset")) {
1893 gpio_direction_output(slot
->rst_n_gpio
, 1);
1894 slot
->host
->mmc
->caps
|= MMC_CAP_HW_RESET
;
1895 slot
->hw_reset
= sdhci_pci_gpio_hw_reset
;
1897 dev_warn(&pdev
->dev
, "failed to request rst_n_gpio\n");
1898 slot
->rst_n_gpio
= -EINVAL
;
1902 host
->mmc
->pm_caps
= MMC_PM_KEEP_POWER
| MMC_PM_WAKE_SDIO_IRQ
;
1903 host
->mmc
->slotno
= slotno
;
1904 host
->mmc
->caps2
|= MMC_CAP2_NO_PRESCAN_POWERUP
;
1906 if (slot
->cd_idx
>= 0) {
1907 ret
= mmc_gpiod_request_cd(host
->mmc
, NULL
, slot
->cd_idx
,
1908 slot
->cd_override_level
, 0, NULL
);
1909 if (ret
== -EPROBE_DEFER
)
1913 dev_warn(&pdev
->dev
, "failed to setup card detect gpio\n");
1918 ret
= sdhci_add_host(host
);
1922 sdhci_pci_add_own_cd(slot
);
1925 * Check if the chip needs a separate GPIO for card detect to wake up
1926 * from runtime suspend. If it is not there, don't allow runtime PM.
1927 * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure.
1929 if (chip
->fixes
&& chip
->fixes
->own_cd_for_runtime_pm
&&
1930 !gpio_is_valid(slot
->cd_gpio
) && slot
->cd_idx
< 0)
1931 chip
->allow_runtime_pm
= false;
1936 if (chip
->fixes
&& chip
->fixes
->remove_slot
)
1937 chip
->fixes
->remove_slot(slot
, 0);
1940 if (slot
->data
&& slot
->data
->cleanup
)
1941 slot
->data
->cleanup(slot
->data
);
1944 sdhci_free_host(host
);
1946 return ERR_PTR(ret
);
1949 static void sdhci_pci_remove_slot(struct sdhci_pci_slot
*slot
)
1954 sdhci_pci_remove_own_cd(slot
);
1957 scratch
= readl(slot
->host
->ioaddr
+ SDHCI_INT_STATUS
);
1958 if (scratch
== (u32
)-1)
1961 sdhci_remove_host(slot
->host
, dead
);
1963 if (slot
->chip
->fixes
&& slot
->chip
->fixes
->remove_slot
)
1964 slot
->chip
->fixes
->remove_slot(slot
, dead
);
1966 if (slot
->data
&& slot
->data
->cleanup
)
1967 slot
->data
->cleanup(slot
->data
);
1969 sdhci_free_host(slot
->host
);
1972 static void sdhci_pci_runtime_pm_allow(struct device
*dev
)
1974 pm_suspend_ignore_children(dev
, 1);
1975 pm_runtime_set_autosuspend_delay(dev
, 50);
1976 pm_runtime_use_autosuspend(dev
);
1977 pm_runtime_allow(dev
);
1978 /* Stay active until mmc core scans for a card */
1979 pm_runtime_put_noidle(dev
);
1982 static void sdhci_pci_runtime_pm_forbid(struct device
*dev
)
1984 pm_runtime_forbid(dev
);
1985 pm_runtime_get_noresume(dev
);
1988 static int sdhci_pci_probe(struct pci_dev
*pdev
,
1989 const struct pci_device_id
*ent
)
1991 struct sdhci_pci_chip
*chip
;
1992 struct sdhci_pci_slot
*slot
;
1994 u8 slots
, first_bar
;
1997 BUG_ON(pdev
== NULL
);
1998 BUG_ON(ent
== NULL
);
2000 dev_info(&pdev
->dev
, "SDHCI controller found [%04x:%04x] (rev %x)\n",
2001 (int)pdev
->vendor
, (int)pdev
->device
, (int)pdev
->revision
);
2003 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &slots
);
2007 slots
= PCI_SLOT_INFO_SLOTS(slots
) + 1;
2008 dev_dbg(&pdev
->dev
, "found %d slot(s)\n", slots
);
2012 BUG_ON(slots
> MAX_SLOTS
);
2014 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &first_bar
);
2018 first_bar
&= PCI_SLOT_INFO_FIRST_BAR_MASK
;
2020 if (first_bar
> 5) {
2021 dev_err(&pdev
->dev
, "Invalid first BAR. Aborting.\n");
2025 ret
= pcim_enable_device(pdev
);
2029 chip
= devm_kzalloc(&pdev
->dev
, sizeof(*chip
), GFP_KERNEL
);
2034 chip
->fixes
= (const struct sdhci_pci_fixes
*)ent
->driver_data
;
2036 chip
->quirks
= chip
->fixes
->quirks
;
2037 chip
->quirks2
= chip
->fixes
->quirks2
;
2038 chip
->allow_runtime_pm
= chip
->fixes
->allow_runtime_pm
;
2040 chip
->num_slots
= slots
;
2042 pci_set_drvdata(pdev
, chip
);
2044 if (chip
->fixes
&& chip
->fixes
->probe
) {
2045 ret
= chip
->fixes
->probe(chip
);
2050 slots
= chip
->num_slots
; /* Quirk may have changed this */
2052 for (i
= 0; i
< slots
; i
++) {
2053 slot
= sdhci_pci_probe_slot(pdev
, chip
, first_bar
, i
);
2055 for (i
--; i
>= 0; i
--)
2056 sdhci_pci_remove_slot(chip
->slots
[i
]);
2057 return PTR_ERR(slot
);
2060 chip
->slots
[i
] = slot
;
2063 if (chip
->allow_runtime_pm
)
2064 sdhci_pci_runtime_pm_allow(&pdev
->dev
);
2069 static void sdhci_pci_remove(struct pci_dev
*pdev
)
2072 struct sdhci_pci_chip
*chip
= pci_get_drvdata(pdev
);
2074 if (chip
->allow_runtime_pm
)
2075 sdhci_pci_runtime_pm_forbid(&pdev
->dev
);
2077 for (i
= 0; i
< chip
->num_slots
; i
++)
2078 sdhci_pci_remove_slot(chip
->slots
[i
]);
2081 static struct pci_driver sdhci_driver
= {
2082 .name
= "sdhci-pci",
2083 .id_table
= pci_ids
,
2084 .probe
= sdhci_pci_probe
,
2085 .remove
= sdhci_pci_remove
,
2087 .pm
= &sdhci_pci_pm_ops
2091 module_pci_driver(sdhci_driver
);
2093 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
2094 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
2095 MODULE_LICENSE("GPL");